xref: /freebsd/sys/contrib/device-tree/Bindings/arm/coresight-cpu-debug.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* CoreSight CPU Debug Component:
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotCoreSight CPU debug component are compliant with the ARMv8 architecture
4*c66ec88fSEmmanuel Vadotreference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
5*c66ec88fSEmmanuel Vadotexternal debug module is mainly used for two modes: self-hosted debug and
6*c66ec88fSEmmanuel Vadotexternal debug, and it can be accessed from mmio region from Coresight
7*c66ec88fSEmmanuel Vadotand eventually the debug module connects with CPU for debugging. And the
8*c66ec88fSEmmanuel Vadotdebug module provides sample-based profiling extension, which can be used
9*c66ec88fSEmmanuel Vadotto sample CPU program counter, secure state and exception level, etc;
10*c66ec88fSEmmanuel Vadotusually every CPU has one dedicated debug module to be connected.
11*c66ec88fSEmmanuel Vadot
12*c66ec88fSEmmanuel VadotRequired properties:
13*c66ec88fSEmmanuel Vadot
14*c66ec88fSEmmanuel Vadot- compatible : should be "arm,coresight-cpu-debug"; supplemented with
15*c66ec88fSEmmanuel Vadot               "arm,primecell" since this driver is using the AMBA bus
16*c66ec88fSEmmanuel Vadot	       interface.
17*c66ec88fSEmmanuel Vadot
18*c66ec88fSEmmanuel Vadot- reg : physical base address and length of the register set.
19*c66ec88fSEmmanuel Vadot
20*c66ec88fSEmmanuel Vadot- clocks : the clock associated to this component.
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel Vadot- clock-names : the name of the clock referenced by the code. Since we are
23*c66ec88fSEmmanuel Vadot                using the AMBA framework, the name of the clock providing
24*c66ec88fSEmmanuel Vadot		the interconnect should be "apb_pclk" and the clock is
25*c66ec88fSEmmanuel Vadot		mandatory. The interface between the debug logic and the
26*c66ec88fSEmmanuel Vadot		processor core is clocked by the internal CPU clock, so it
27*c66ec88fSEmmanuel Vadot		is enabled with CPU clock by default.
28*c66ec88fSEmmanuel Vadot
29*c66ec88fSEmmanuel Vadot- cpu : the CPU phandle the debug module is affined to. Do not assume it
30*c66ec88fSEmmanuel Vadot        to default to CPU0 if omitted.
31*c66ec88fSEmmanuel Vadot
32*c66ec88fSEmmanuel VadotOptional properties:
33*c66ec88fSEmmanuel Vadot
34*c66ec88fSEmmanuel Vadot- power-domains: a phandle to the debug power domain. We use "power-domains"
35*c66ec88fSEmmanuel Vadot                 binding to turn on the debug logic if it has own dedicated
36*c66ec88fSEmmanuel Vadot		 power domain and if necessary to use "cpuidle.off=1" or
37*c66ec88fSEmmanuel Vadot		 "nohlt" in the kernel command line or sysfs node to
38*c66ec88fSEmmanuel Vadot		 constrain idle states to ensure registers in the CPU power
39*c66ec88fSEmmanuel Vadot		 domain are accessible.
40*c66ec88fSEmmanuel Vadot
41*c66ec88fSEmmanuel VadotExample:
42*c66ec88fSEmmanuel Vadot
43*c66ec88fSEmmanuel Vadot	debug@f6590000 {
44*c66ec88fSEmmanuel Vadot		compatible = "arm,coresight-cpu-debug","arm,primecell";
45*c66ec88fSEmmanuel Vadot		reg = <0 0xf6590000 0 0x1000>;
46*c66ec88fSEmmanuel Vadot		clocks = <&sys_ctrl HI6220_DAPB_CLK>;
47*c66ec88fSEmmanuel Vadot		clock-names = "apb_pclk";
48*c66ec88fSEmmanuel Vadot		cpu = <&cpu0>;
49*c66ec88fSEmmanuel Vadot	};
50