1c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c66ec88fSEmmanuel Vadot%YAML 1.2 3c66ec88fSEmmanuel Vadot--- 4c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/arm/calxeda/l2ecc.yaml# 5c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadottitle: Calxeda Highbank L2 cache ECC 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadotdescription: | 10c66ec88fSEmmanuel Vadot Binding for the Calxeda Highbank L2 cache controller ECC device. 11c66ec88fSEmmanuel Vadot This does not cover the actual L2 cache controller control registers, 12c66ec88fSEmmanuel Vadot but just the error reporting functionality. 13c66ec88fSEmmanuel Vadot 14c66ec88fSEmmanuel Vadotmaintainers: 15c66ec88fSEmmanuel Vadot - Andre Przywara <andre.przywara@arm.com> 16c66ec88fSEmmanuel Vadot 17c66ec88fSEmmanuel Vadotproperties: 18c66ec88fSEmmanuel Vadot compatible: 19*8d13bc63SEmmanuel Vadot const: calxeda,hb-sregs-l2-ecc 20c66ec88fSEmmanuel Vadot 21c66ec88fSEmmanuel Vadot reg: 22c66ec88fSEmmanuel Vadot maxItems: 1 23c66ec88fSEmmanuel Vadot 24c66ec88fSEmmanuel Vadot interrupts: 25c66ec88fSEmmanuel Vadot items: 26c66ec88fSEmmanuel Vadot - description: single bit error interrupt 27c66ec88fSEmmanuel Vadot - description: double bit error interrupt 28c66ec88fSEmmanuel Vadot 29c66ec88fSEmmanuel Vadotrequired: 30c66ec88fSEmmanuel Vadot - compatible 31c66ec88fSEmmanuel Vadot - reg 32c66ec88fSEmmanuel Vadot - interrupts 33c66ec88fSEmmanuel Vadot 34c66ec88fSEmmanuel VadotadditionalProperties: false 35c66ec88fSEmmanuel Vadot 36c66ec88fSEmmanuel Vadotexamples: 37c66ec88fSEmmanuel Vadot - | 38c66ec88fSEmmanuel Vadot sregs@fff3c200 { 39c66ec88fSEmmanuel Vadot compatible = "calxeda,hb-sregs-l2-ecc"; 40c66ec88fSEmmanuel Vadot reg = <0xfff3c200 0x100>; 41c66ec88fSEmmanuel Vadot interrupts = <0 71 4>, <0 72 4>; 42c66ec88fSEmmanuel Vadot }; 43