1Atmel system registers 2 3Chipid required properties: 4- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" 5- reg : Should contain registers location and length 6 7PIT Timer required properties: 8- compatible: Should be "atmel,at91sam9260-pit" 9- reg: Should contain registers location and length 10- interrupts: Should contain interrupt for the PIT which is the IRQ line 11 shared across all System Controller members. 12 13PIT64B Timer required properties: 14- compatible: Should be "microchip,sam9x60-pit64b" 15- reg: Should contain registers location and length 16- interrupts: Should contain interrupt for PIT64B timer 17- clocks: Should contain the available clock sources for PIT64B timer. 18 19System Timer (ST) required properties: 20- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" 21- reg: Should contain registers location and length 22- interrupts: Should contain interrupt for the ST which is the IRQ line 23 shared across all System Controller members. 24- clocks: phandle to input clock. 25Its subnodes can be: 26- watchdog: compatible should be "atmel,at91rm9200-wdt" 27 28RSTC Reset Controller required properties: 29- compatible: Should be "atmel,<chip>-rstc". 30 <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" 31 it also can be "microchip,sam9x60-rstc" 32- reg: Should contain registers location and length 33- clocks: phandle to input clock. 34 35Example: 36 37 rstc@fffffd00 { 38 compatible = "atmel,at91sam9260-rstc"; 39 reg = <0xfffffd00 0x10>; 40 clocks = <&clk32k>; 41 }; 42 43RAMC SDRAM/DDR Controller required properties: 44- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" 45 "atmel,at91sam9260-sdramc", 46 "atmel,at91sam9g45-ddramc", 47 "atmel,sama5d3-ddramc", 48 "microchip,sam9x60-ddramc" 49- reg: Should contain registers location and length 50 51Examples: 52 53 ramc0: ramc@ffffe800 { 54 compatible = "atmel,at91sam9g45-ddramc"; 55 reg = <0xffffe800 0x200>; 56 }; 57 58SHDWC Shutdown Controller 59 60required properties: 61- compatible: Should be "atmel,<chip>-shdwc". 62 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". 63- reg: Should contain registers location and length 64- clocks: phandle to input clock. 65 66optional properties: 67- atmel,wakeup-mode: String, operation mode of the wakeup mode. 68 Supported values are: "none", "high", "low", "any". 69- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). 70 71optional at91sam9260 properties: 72- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 73 74optional at91sam9rl properties: 75- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 76- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 77 78optional at91sam9x5 properties: 79- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 80 81Example: 82 83 shdwc@fffffd10 { 84 compatible = "atmel,at91sam9260-shdwc"; 85 reg = <0xfffffd10 0x10>; 86 clocks = <&clk32k>; 87 }; 88 89SHDWC SAMA5D2-Compatible Shutdown Controller 90 911) shdwc node 92 93required properties: 94- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or 95 "microchip,sama7g5-shdwc" 96- reg: should contain registers location and length 97- clocks: phandle to input clock. 98- #address-cells: should be one. The cell is the wake-up input index. 99- #size-cells: should be zero. 100 101optional properties: 102 103- debounce-delay-us: minimum wake-up inputs debouncer period in 104 microseconds. It's usually a board-related property. 105- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. 106 107optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties: 108- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 109 110The node contains child nodes for each wake-up input that the platform uses. 111 1122) input nodes 113 114Wake-up input nodes are usually described in the "board" part of the Device 115Tree. Note also that input 0 is linked to the wake-up pin and is frequently 116used. 117 118Required properties: 119- reg: should contain the wake-up input index [0 - 15]. 120 121Optional properties: 122- atmel,wakeup-active-high: boolean, the corresponding wake-up input described 123 by the child, forces the wake-up of the core power supply on a high level. 124 The default is to be active low. 125 126Example: 127 128On the SoC side: 129 shdwc@f8048010 { 130 compatible = "atmel,sama5d2-shdwc"; 131 reg = <0xf8048010 0x10>; 132 clocks = <&clk32k>; 133 #address-cells = <1>; 134 #size-cells = <0>; 135 atmel,wakeup-rtc-timer; 136 }; 137 138On the board side: 139 shdwc@f8048010 { 140 debounce-delay-us = <976>; 141 142 input@0 { 143 reg = <0>; 144 }; 145 146 input@1 { 147 reg = <1>; 148 atmel,wakeup-active-high; 149 }; 150 }; 151 152Special Function Registers (SFR) 153 154Special Function Registers (SFR) manage specific aspects of the integrated 155memory, bridge implementations, processor and other functionality not controlled 156elsewhere. 157 158required properties: 159- compatible: Should be "atmel,<chip>-sfr", "syscon" or 160 "atmel,<chip>-sfrbu", "syscon" 161 <chip> can be "sama5d3", "sama5d4" or "sama5d2". 162 It also can be "microchip,sam9x60-sfr", "syscon". 163- reg: Should contain registers location and length 164 165 sfr@f0038000 { 166 compatible = "atmel,sama5d3-sfr", "syscon"; 167 reg = <0xf0038000 0x60>; 168 }; 169 170Security Module (SECUMOD) 171 172The Security Module macrocell provides all necessary secure functions to avoid 173voltage, temperature, frequency and mechanical attacks on the chip. It also 174embeds secure memories that can be scrambled. 175 176The Security Module also offers the PIOBU pins which can be used as GPIO pins. 177Note that they maintain their voltage during Backup/Self-refresh. 178 179required properties: 180- compatible: Should be "atmel,<chip>-secumod", "syscon". 181 <chip> can be "sama5d2". 182- reg: Should contain registers location and length 183- gpio-controller: Marks the port as GPIO controller. 184- #gpio-cells: There are 2. The pin number is the 185 first, the second represents additional 186 parameters such as GPIO_ACTIVE_HIGH/LOW. 187 188 189 secumod@fc040000 { 190 compatible = "atmel,sama5d2-secumod", "syscon"; 191 reg = <0xfc040000 0x100>; 192 gpio-controller; 193 #gpio-cells = <2>; 194 }; 195