1System Control and Management Interface (SCMI) Message Protocol 2---------------------------------------------------------- 3 4The SCMI is intended to allow agents such as OSPM to manage various functions 5that are provided by the hardware platform it is running on, including power 6and performance functions. 7 8This binding is intended to define the interface the firmware implementing 9the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control 10and Management Interface Platform Design Document")[0] provide for OSPM in 11the device tree. 12 13Required properties: 14 15The scmi node with the following properties shall be under the /firmware/ node. 16 17- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports 18- mboxes: List of phandle and mailbox channel specifiers. It should contain 19 exactly one or two mailboxes, one for transmitting messages("tx") 20 and another optional for receiving the notifications("rx") if 21 supported. 22- shmem : List of phandle pointing to the shared memory(SHM) area as per 23 generic mailbox client binding. 24- #address-cells : should be '1' if the device has sub-nodes, maps to 25 protocol identifier for a given sub-node. 26- #size-cells : should be '0' as 'reg' property doesn't have any size 27 associated with it. 28- arm,smc-id : SMC id required when using smc or hvc transports 29 30Optional properties: 31 32- mbox-names: shall be "tx" or "rx" depending on mboxes entries. 33 34- interrupts : when using smc or hvc transports, this optional 35 property indicates that msg completion by the platform is indicated 36 by an interrupt rather than by the return of the smc call. This 37 should not be used except when the platform requires such behavior. 38 39- interrupt-names : if "interrupts" is present, interrupt-names must also 40 be present and have the value "a2p". 41 42See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details 43about the generic mailbox controller and client driver bindings. 44 45The mailbox is the only permitted method of calling the SCMI firmware. 46Mailbox doorbell is used as a mechanism to alert the presence of a 47messages and/or notification. 48 49Each protocol supported shall have a sub-node with corresponding compatible 50as described in the following sections. If the platform supports dedicated 51communication channel for a particular protocol, the 3 properties namely: 52mboxes, mbox-names and shmem shall be present in the sub-node corresponding 53to that protocol. 54 55Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol 56------------------------------------------------------------ 57 58This binding uses the common clock binding[1]. 59 60Required properties: 61- #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. 62 63Power domain bindings for the power domains based on SCMI Message Protocol 64------------------------------------------------------------ 65 66This binding for the SCMI power domain providers uses the generic power 67domain binding[2]. 68 69Required properties: 70 - #power-domain-cells : Should be 1. Contains the device or the power 71 domain ID value used by SCMI commands. 72 73Regulator bindings for the SCMI Regulator based on SCMI Message Protocol 74------------------------------------------------------------ 75An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain, 76and should be always positioned as a root regulator. 77It does not support any current operation. 78 79SCMI Regulators are grouped under a 'regulators' node which in turn is a child 80of the SCMI Voltage protocol node inside the desired SCMI instance node. 81 82This binding uses the common regulator binding[6]. 83 84Required properties: 85 - reg : shall identify an existent SCMI Voltage Domain. 86 87Sensor bindings for the sensors based on SCMI Message Protocol 88-------------------------------------------------------------- 89SCMI provides an API to access the various sensors on the SoC. 90 91Required properties: 92- #thermal-sensor-cells: should be set to 1. This property follows the 93 thermal device tree bindings[3]. 94 95 Valid cell values are raw identifiers (Sensor ID) 96 as used by the firmware. Refer to platform details 97 for your implementation for the IDs to use. 98 99Reset signal bindings for the reset domains based on SCMI Message Protocol 100------------------------------------------------------------ 101 102This binding for the SCMI reset domain providers uses the generic reset 103signal binding[5]. 104 105Required properties: 106 - #reset-cells : Should be 1. Contains the reset domain ID value used 107 by SCMI commands. 108 109SRAM and Shared Memory for SCMI 110------------------------------- 111 112A small area of SRAM is reserved for SCMI communication between application 113processors and SCP. 114 115The properties should follow the generic mmio-sram description found in [4] 116 117Each sub-node represents the reserved area for SCMI. 118 119Required sub-node properties: 120- reg : The base offset and size of the reserved area with the SRAM 121- compatible : should be "arm,scmi-shmem" for Non-secure SRAM based 122 shared memory 123 124[0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html 125[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 126[2] Documentation/devicetree/bindings/power/power-domain.yaml 127[3] Documentation/devicetree/bindings/thermal/thermal*.yaml 128[4] Documentation/devicetree/bindings/sram/sram.yaml 129[5] Documentation/devicetree/bindings/reset/reset.txt 130[6] Documentation/devicetree/bindings/regulator/regulator.yaml 131 132Example: 133 134sram@50000000 { 135 compatible = "mmio-sram"; 136 reg = <0x0 0x50000000 0x0 0x10000>; 137 138 #address-cells = <1>; 139 #size-cells = <1>; 140 ranges = <0 0x0 0x50000000 0x10000>; 141 142 cpu_scp_lpri: scp-shmem@0 { 143 compatible = "arm,scmi-shmem"; 144 reg = <0x0 0x200>; 145 }; 146 147 cpu_scp_hpri: scp-shmem@200 { 148 compatible = "arm,scmi-shmem"; 149 reg = <0x200 0x200>; 150 }; 151}; 152 153mailbox@40000000 { 154 .... 155 #mbox-cells = <1>; 156 reg = <0x0 0x40000000 0x0 0x10000>; 157}; 158 159firmware { 160 161 ... 162 163 scmi { 164 compatible = "arm,scmi"; 165 mboxes = <&mailbox 0 &mailbox 1>; 166 mbox-names = "tx", "rx"; 167 shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 168 #address-cells = <1>; 169 #size-cells = <0>; 170 171 scmi_devpd: protocol@11 { 172 reg = <0x11>; 173 #power-domain-cells = <1>; 174 }; 175 176 scmi_dvfs: protocol@13 { 177 reg = <0x13>; 178 #clock-cells = <1>; 179 }; 180 181 scmi_clk: protocol@14 { 182 reg = <0x14>; 183 #clock-cells = <1>; 184 }; 185 186 scmi_sensors0: protocol@15 { 187 reg = <0x15>; 188 #thermal-sensor-cells = <1>; 189 }; 190 191 scmi_reset: protocol@16 { 192 reg = <0x16>; 193 #reset-cells = <1>; 194 }; 195 196 scmi_voltage: protocol@17 { 197 reg = <0x17>; 198 199 regulators { 200 regulator_devX: regulator@0 { 201 reg = <0x0>; 202 regulator-max-microvolt = <3300000>; 203 }; 204 205 regulator_devY: regulator@9 { 206 reg = <0x9>; 207 regulator-min-microvolt = <500000>; 208 regulator-max-microvolt = <4200000>; 209 }; 210 211 ... 212 }; 213 }; 214 }; 215}; 216 217cpu@0 { 218 ... 219 reg = <0 0>; 220 clocks = <&scmi_dvfs 0>; 221}; 222 223hdlcd@7ff60000 { 224 ... 225 reg = <0 0x7ff60000 0 0x1000>; 226 clocks = <&scmi_clk 4>; 227 power-domains = <&scmi_devpd 1>; 228 resets = <&scmi_reset 10>; 229}; 230 231thermal-zones { 232 soc_thermal { 233 polling-delay-passive = <100>; 234 polling-delay = <1000>; 235 /* sensor ID */ 236 thermal-sensors = <&scmi_sensors0 3>; 237 ... 238 }; 239}; 240