1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 5 #ifndef __RTW89_CAM_H__ 6 #define __RTW89_CAM_H__ 7 8 #include "core.h" 9 10 #define RTW89_SEC_CAM_LEN 20 11 12 #define RTW89_BSSID_MATCH_ALL GENMASK(5, 0) 13 #define RTW89_BSSID_MATCH_5_BYTES GENMASK(4, 0) 14 15 static inline void FWCMD_SET_ADDR_IDX(void *cmd, u32 value) 16 { 17 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(7, 0)); 18 } 19 20 static inline void FWCMD_SET_ADDR_OFFSET(void *cmd, u32 value) 21 { 22 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(15, 8)); 23 } 24 25 static inline void FWCMD_SET_ADDR_LEN(void *cmd, u32 value) 26 { 27 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(23, 16)); 28 } 29 30 static inline void FWCMD_SET_ADDR_VALID(void *cmd, u32 value) 31 { 32 le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(0)); 33 } 34 35 static inline void FWCMD_SET_ADDR_NET_TYPE(void *cmd, u32 value) 36 { 37 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(2, 1)); 38 } 39 40 static inline void FWCMD_SET_ADDR_BCN_HIT_COND(void *cmd, u32 value) 41 { 42 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(4, 3)); 43 } 44 45 static inline void FWCMD_SET_ADDR_HIT_RULE(void *cmd, u32 value) 46 { 47 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(6, 5)); 48 } 49 50 static inline void FWCMD_SET_ADDR_BB_SEL(void *cmd, u32 value) 51 { 52 le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(7)); 53 } 54 55 static inline void FWCMD_SET_ADDR_ADDR_MASK(void *cmd, u32 value) 56 { 57 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(13, 8)); 58 } 59 60 static inline void FWCMD_SET_ADDR_MASK_SEL(void *cmd, u32 value) 61 { 62 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(15, 14)); 63 } 64 65 static inline void FWCMD_SET_ADDR_SMA_HASH(void *cmd, u32 value) 66 { 67 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(23, 16)); 68 } 69 70 static inline void FWCMD_SET_ADDR_TMA_HASH(void *cmd, u32 value) 71 { 72 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(31, 24)); 73 } 74 75 static inline void FWCMD_SET_ADDR_BSSID_CAM_IDX(void *cmd, u32 value) 76 { 77 le32p_replace_bits((__le32 *)(cmd) + 3, value, GENMASK(5, 0)); 78 } 79 80 static inline void FWCMD_SET_ADDR_SMA0(void *cmd, u32 value) 81 { 82 le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(7, 0)); 83 } 84 85 static inline void FWCMD_SET_ADDR_SMA1(void *cmd, u32 value) 86 { 87 le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(15, 8)); 88 } 89 90 static inline void FWCMD_SET_ADDR_SMA2(void *cmd, u32 value) 91 { 92 le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(23, 16)); 93 } 94 95 static inline void FWCMD_SET_ADDR_SMA3(void *cmd, u32 value) 96 { 97 le32p_replace_bits((__le32 *)(cmd) + 4, value, GENMASK(31, 24)); 98 } 99 100 static inline void FWCMD_SET_ADDR_SMA4(void *cmd, u32 value) 101 { 102 le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(7, 0)); 103 } 104 105 static inline void FWCMD_SET_ADDR_SMA5(void *cmd, u32 value) 106 { 107 le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(15, 8)); 108 } 109 110 static inline void FWCMD_SET_ADDR_TMA0(void *cmd, u32 value) 111 { 112 le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(23, 16)); 113 } 114 115 static inline void FWCMD_SET_ADDR_TMA1(void *cmd, u32 value) 116 { 117 le32p_replace_bits((__le32 *)(cmd) + 5, value, GENMASK(31, 24)); 118 } 119 120 static inline void FWCMD_SET_ADDR_TMA2(void *cmd, u32 value) 121 { 122 le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(7, 0)); 123 } 124 125 static inline void FWCMD_SET_ADDR_TMA3(void *cmd, u32 value) 126 { 127 le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(15, 8)); 128 } 129 130 static inline void FWCMD_SET_ADDR_TMA4(void *cmd, u32 value) 131 { 132 le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(23, 16)); 133 } 134 135 static inline void FWCMD_SET_ADDR_TMA5(void *cmd, u32 value) 136 { 137 le32p_replace_bits((__le32 *)(cmd) + 6, value, GENMASK(31, 24)); 138 } 139 140 static inline void FWCMD_SET_ADDR_MACID(void *cmd, u32 value) 141 { 142 le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(7, 0)); 143 } 144 145 static inline void FWCMD_SET_ADDR_PORT_INT(void *cmd, u32 value) 146 { 147 le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(10, 8)); 148 } 149 150 static inline void FWCMD_SET_ADDR_TSF_SYNC(void *cmd, u32 value) 151 { 152 le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(13, 11)); 153 } 154 155 static inline void FWCMD_SET_ADDR_TF_TRS(void *cmd, u32 value) 156 { 157 le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(14)); 158 } 159 160 static inline void FWCMD_SET_ADDR_LSIG_TXOP(void *cmd, u32 value) 161 { 162 le32p_replace_bits((__le32 *)(cmd) + 8, value, BIT(15)); 163 } 164 165 static inline void FWCMD_SET_ADDR_TGT_IND(void *cmd, u32 value) 166 { 167 le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(26, 24)); 168 } 169 170 static inline void FWCMD_SET_ADDR_FRM_TGT_IND(void *cmd, u32 value) 171 { 172 le32p_replace_bits((__le32 *)(cmd) + 8, value, GENMASK(29, 27)); 173 } 174 175 static inline void FWCMD_SET_ADDR_AID12(void *cmd, u32 value) 176 { 177 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 0)); 178 } 179 180 static inline void FWCMD_SET_ADDR_AID12_0(void *cmd, u32 value) 181 { 182 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(7, 0)); 183 } 184 185 static inline void FWCMD_SET_ADDR_AID12_1(void *cmd, u32 value) 186 { 187 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(11, 8)); 188 } 189 190 static inline void FWCMD_SET_ADDR_WOL_PATTERN(void *cmd, u32 value) 191 { 192 le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(12)); 193 } 194 195 static inline void FWCMD_SET_ADDR_WOL_UC(void *cmd, u32 value) 196 { 197 le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(13)); 198 } 199 200 static inline void FWCMD_SET_ADDR_WOL_MAGIC(void *cmd, u32 value) 201 { 202 le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(14)); 203 } 204 205 static inline void FWCMD_SET_ADDR_WAPI(void *cmd, u32 value) 206 { 207 le32p_replace_bits((__le32 *)(cmd) + 9, value, BIT(15)); 208 } 209 210 static inline void FWCMD_SET_ADDR_SEC_ENT_MODE(void *cmd, u32 value) 211 { 212 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(17, 16)); 213 } 214 215 static inline void FWCMD_SET_ADDR_SEC_ENT0_KEYID(void *cmd, u32 value) 216 { 217 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(19, 18)); 218 } 219 220 static inline void FWCMD_SET_ADDR_SEC_ENT1_KEYID(void *cmd, u32 value) 221 { 222 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(21, 20)); 223 } 224 225 static inline void FWCMD_SET_ADDR_SEC_ENT2_KEYID(void *cmd, u32 value) 226 { 227 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(23, 22)); 228 } 229 230 static inline void FWCMD_SET_ADDR_SEC_ENT3_KEYID(void *cmd, u32 value) 231 { 232 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(25, 24)); 233 } 234 235 static inline void FWCMD_SET_ADDR_SEC_ENT4_KEYID(void *cmd, u32 value) 236 { 237 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(27, 26)); 238 } 239 240 static inline void FWCMD_SET_ADDR_SEC_ENT5_KEYID(void *cmd, u32 value) 241 { 242 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(29, 28)); 243 } 244 245 static inline void FWCMD_SET_ADDR_SEC_ENT6_KEYID(void *cmd, u32 value) 246 { 247 le32p_replace_bits((__le32 *)(cmd) + 9, value, GENMASK(31, 30)); 248 } 249 250 static inline void FWCMD_SET_ADDR_SEC_ENT_VALID(void *cmd, u32 value) 251 { 252 le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(7, 0)); 253 } 254 255 static inline void FWCMD_SET_ADDR_SEC_ENT0(void *cmd, u32 value) 256 { 257 le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(15, 8)); 258 } 259 260 static inline void FWCMD_SET_ADDR_SEC_ENT1(void *cmd, u32 value) 261 { 262 le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(23, 16)); 263 } 264 265 static inline void FWCMD_SET_ADDR_SEC_ENT2(void *cmd, u32 value) 266 { 267 le32p_replace_bits((__le32 *)(cmd) + 10, value, GENMASK(31, 24)); 268 } 269 270 static inline void FWCMD_SET_ADDR_SEC_ENT3(void *cmd, u32 value) 271 { 272 le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(7, 0)); 273 } 274 275 static inline void FWCMD_SET_ADDR_SEC_ENT4(void *cmd, u32 value) 276 { 277 le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(15, 8)); 278 } 279 280 static inline void FWCMD_SET_ADDR_SEC_ENT5(void *cmd, u32 value) 281 { 282 le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(23, 16)); 283 } 284 285 static inline void FWCMD_SET_ADDR_SEC_ENT6(void *cmd, u32 value) 286 { 287 le32p_replace_bits((__le32 *)(cmd) + 11, value, GENMASK(31, 24)); 288 } 289 290 static inline void FWCMD_SET_ADDR_BSSID_IDX(void *cmd, u32 value) 291 { 292 le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(7, 0)); 293 } 294 295 static inline void FWCMD_SET_ADDR_BSSID_OFFSET(void *cmd, u32 value) 296 { 297 le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(15, 8)); 298 } 299 300 static inline void FWCMD_SET_ADDR_BSSID_LEN(void *cmd, u32 value) 301 { 302 le32p_replace_bits((__le32 *)(cmd) + 12, value, GENMASK(23, 16)); 303 } 304 305 static inline void FWCMD_SET_ADDR_BSSID_VALID(void *cmd, u32 value) 306 { 307 le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(0)); 308 } 309 310 static inline void FWCMD_SET_ADDR_BSSID_BB_SEL(void *cmd, u32 value) 311 { 312 le32p_replace_bits((__le32 *)(cmd) + 13, value, BIT(1)); 313 } 314 315 static inline void FWCMD_SET_ADDR_BSSID_MASK(void *cmd, u32 value) 316 { 317 le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(7, 2)); 318 } 319 320 static inline void FWCMD_SET_ADDR_BSSID_BSS_COLOR(void *cmd, u32 value) 321 { 322 le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(13, 8)); 323 } 324 325 static inline void FWCMD_SET_ADDR_BSSID_BSSID0(void *cmd, u32 value) 326 { 327 le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(23, 16)); 328 } 329 330 static inline void FWCMD_SET_ADDR_BSSID_BSSID1(void *cmd, u32 value) 331 { 332 le32p_replace_bits((__le32 *)(cmd) + 13, value, GENMASK(31, 24)); 333 } 334 335 static inline void FWCMD_SET_ADDR_BSSID_BSSID2(void *cmd, u32 value) 336 { 337 le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(7, 0)); 338 } 339 340 static inline void FWCMD_SET_ADDR_BSSID_BSSID3(void *cmd, u32 value) 341 { 342 le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(15, 8)); 343 } 344 345 static inline void FWCMD_SET_ADDR_BSSID_BSSID4(void *cmd, u32 value) 346 { 347 le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(23, 16)); 348 } 349 350 static inline void FWCMD_SET_ADDR_BSSID_BSSID5(void *cmd, u32 value) 351 { 352 le32p_replace_bits((__le32 *)(cmd) + 14, value, GENMASK(31, 24)); 353 } 354 355 struct rtw89_h2c_dctlinfo_ud_v1 { 356 __le32 c0; 357 __le32 w0; 358 __le32 w1; 359 __le32 w2; 360 __le32 w3; 361 __le32 w4; 362 __le32 w5; 363 __le32 w6; 364 __le32 w7; 365 __le32 m0; 366 __le32 m1; 367 __le32 m2; 368 __le32 m3; 369 __le32 m4; 370 __le32 m5; 371 __le32 m6; 372 __le32 m7; 373 } __packed; 374 375 #define DCTLINFO_V1_C0_MACID GENMASK(6, 0) 376 #define DCTLINFO_V1_C0_OP BIT(7) 377 378 #define DCTLINFO_V1_W0_QOS_FIELD_H GENMASK(7, 0) 379 #define DCTLINFO_V1_W0_HW_EXSEQ_MACID GENMASK(14, 8) 380 #define DCTLINFO_V1_W0_QOS_DATA BIT(15) 381 #define DCTLINFO_V1_W0_AES_IV_L GENMASK(31, 16) 382 #define DCTLINFO_V1_W0_ALL GENMASK(31, 0) 383 #define DCTLINFO_V1_W1_AES_IV_H GENMASK(31, 0) 384 #define DCTLINFO_V1_W1_ALL GENMASK(31, 0) 385 #define DCTLINFO_V1_W2_SEQ0 GENMASK(11, 0) 386 #define DCTLINFO_V1_W2_SEQ1 GENMASK(23, 12) 387 #define DCTLINFO_V1_W2_AMSDU_MAX_LEN GENMASK(26, 24) 388 #define DCTLINFO_V1_W2_STA_AMSDU_EN BIT(27) 389 #define DCTLINFO_V1_W2_CHKSUM_OFLD_EN BIT(28) 390 #define DCTLINFO_V1_W2_WITH_LLC BIT(29) 391 #define DCTLINFO_V1_W2_ALL GENMASK(29, 0) 392 #define DCTLINFO_V1_W3_SEQ2 GENMASK(11, 0) 393 #define DCTLINFO_V1_W3_SEQ3 GENMASK(23, 12) 394 #define DCTLINFO_V1_W3_TGT_IND GENMASK(27, 24) 395 #define DCTLINFO_V1_W3_TGT_IND_EN BIT(28) 396 #define DCTLINFO_V1_W3_HTC_LB GENMASK(31, 29) 397 #define DCTLINFO_V1_W3_ALL GENMASK(31, 0) 398 #define DCTLINFO_V1_W4_MHDR_LEN GENMASK(4, 0) 399 #define DCTLINFO_V1_W4_VLAN_TAG_VALID BIT(5) 400 #define DCTLINFO_V1_W4_VLAN_TAG_SEL GENMASK(7, 6) 401 #define DCTLINFO_V1_W4_HTC_ORDER BIT(8) 402 #define DCTLINFO_V1_W4_SEC_KEY_ID GENMASK(10, 9) 403 #define DCTLINFO_V1_W4_WAPI BIT(15) 404 #define DCTLINFO_V1_W4_SEC_ENT_MODE GENMASK(17, 16) 405 #define DCTLINFO_V1_W4_SEC_ENT0_KEYID GENMASK(19, 18) 406 #define DCTLINFO_V1_W4_SEC_ENT1_KEYID GENMASK(21, 20) 407 #define DCTLINFO_V1_W4_SEC_ENT2_KEYID GENMASK(23, 22) 408 #define DCTLINFO_V1_W4_SEC_ENT3_KEYID GENMASK(25, 24) 409 #define DCTLINFO_V1_W4_SEC_ENT4_KEYID GENMASK(27, 26) 410 #define DCTLINFO_V1_W4_SEC_ENT5_KEYID GENMASK(29, 28) 411 #define DCTLINFO_V1_W4_SEC_ENT6_KEYID GENMASK(31, 30) 412 #define DCTLINFO_V1_W4_ALL (GENMASK(31, 15) | GENMASK(10, 0)) 413 #define DCTLINFO_V1_W5_SEC_ENT_VALID GENMASK(7, 0) 414 #define DCTLINFO_V1_W5_SEC_ENT0 GENMASK(15, 8) 415 #define DCTLINFO_V1_W5_SEC_ENT1 GENMASK(23, 16) 416 #define DCTLINFO_V1_W5_SEC_ENT2 GENMASK(31, 24) 417 #define DCTLINFO_V1_W5_ALL GENMASK(31, 0) 418 #define DCTLINFO_V1_W6_SEC_ENT3 GENMASK(7, 0) 419 #define DCTLINFO_V1_W6_SEC_ENT4 GENMASK(15, 8) 420 #define DCTLINFO_V1_W6_SEC_ENT5 GENMASK(23, 16) 421 #define DCTLINFO_V1_W6_SEC_ENT6 GENMASK(31, 24) 422 #define DCTLINFO_V1_W6_ALL GENMASK(31, 0) 423 424 struct rtw89_h2c_dctlinfo_ud_v2 { 425 __le32 c0; 426 __le32 w0; 427 __le32 w1; 428 __le32 w2; 429 __le32 w3; 430 __le32 w4; 431 __le32 w5; 432 __le32 w6; 433 __le32 w7; 434 __le32 w8; 435 __le32 w9; 436 __le32 w10; 437 __le32 w11; 438 __le32 w12; 439 __le32 w13; 440 __le32 w14; 441 __le32 w15; 442 __le32 m0; 443 __le32 m1; 444 __le32 m2; 445 __le32 m3; 446 __le32 m4; 447 __le32 m5; 448 __le32 m6; 449 __le32 m7; 450 __le32 m8; 451 __le32 m9; 452 __le32 m10; 453 __le32 m11; 454 __le32 m12; 455 __le32 m13; 456 __le32 m14; 457 __le32 m15; 458 } __packed; 459 460 #define DCTLINFO_V2_C0_MACID GENMASK(6, 0) 461 #define DCTLINFO_V2_C0_OP BIT(7) 462 463 #define DCTLINFO_V2_W0_QOS_FIELD_H GENMASK(7, 0) 464 #define DCTLINFO_V2_W0_HW_EXSEQ_MACID GENMASK(14, 8) 465 #define DCTLINFO_V2_W0_QOS_DATA BIT(15) 466 #define DCTLINFO_V2_W0_AES_IV_L GENMASK(31, 16) 467 #define DCTLINFO_V2_W0_ALL GENMASK(31, 0) 468 #define DCTLINFO_V2_W1_AES_IV_H GENMASK(31, 0) 469 #define DCTLINFO_V2_W1_ALL GENMASK(31, 0) 470 #define DCTLINFO_V2_W2_SEQ0 GENMASK(11, 0) 471 #define DCTLINFO_V2_W2_SEQ1 GENMASK(23, 12) 472 #define DCTLINFO_V2_W2_AMSDU_MAX_LEN GENMASK(26, 24) 473 #define DCTLINFO_V2_W2_STA_AMSDU_EN BIT(27) 474 #define DCTLINFO_V2_W2_CHKSUM_OFLD_EN BIT(28) 475 #define DCTLINFO_V2_W2_WITH_LLC BIT(29) 476 #define DCTLINFO_V2_W2_NAT25_EN BIT(30) 477 #define DCTLINFO_V2_W2_IS_MLD BIT(31) 478 #define DCTLINFO_V2_W2_ALL GENMASK(31, 0) 479 #define DCTLINFO_V2_W3_SEQ2 GENMASK(11, 0) 480 #define DCTLINFO_V2_W3_SEQ3 GENMASK(23, 12) 481 #define DCTLINFO_V2_W3_TGT_IND GENMASK(27, 24) 482 #define DCTLINFO_V2_W3_TGT_IND_EN BIT(28) 483 #define DCTLINFO_V2_W3_HTC_LB GENMASK(31, 29) 484 #define DCTLINFO_V2_W3_ALL GENMASK(31, 0) 485 #define DCTLINFO_V2_W4_VLAN_TAG_SEL GENMASK(7, 5) 486 #define DCTLINFO_V2_W4_HTC_ORDER BIT(8) 487 #define DCTLINFO_V2_W4_SEC_KEY_ID GENMASK(10, 9) 488 #define DCTLINFO_V2_W4_VLAN_RX_DYNAMIC_PCP_EN BIT(11) 489 #define DCTLINFO_V2_W4_VLAN_RX_PKT_DROP BIT(12) 490 #define DCTLINFO_V2_W4_VLAN_RX_VALID BIT(13) 491 #define DCTLINFO_V2_W4_VLAN_TX_VALID BIT(14) 492 #define DCTLINFO_V2_W4_WAPI BIT(15) 493 #define DCTLINFO_V2_W4_SEC_ENT_MODE GENMASK(17, 16) 494 #define DCTLINFO_V2_W4_SEC_ENT0_KEYID GENMASK(19, 18) 495 #define DCTLINFO_V2_W4_SEC_ENT1_KEYID GENMASK(21, 20) 496 #define DCTLINFO_V2_W4_SEC_ENT2_KEYID GENMASK(23, 22) 497 #define DCTLINFO_V2_W4_SEC_ENT3_KEYID GENMASK(25, 24) 498 #define DCTLINFO_V2_W4_SEC_ENT4_KEYID GENMASK(27, 26) 499 #define DCTLINFO_V2_W4_SEC_ENT5_KEYID GENMASK(29, 28) 500 #define DCTLINFO_V2_W4_SEC_ENT6_KEYID GENMASK(31, 30) 501 #define DCTLINFO_V2_W4_ALL GENMASK(31, 5) 502 #define DCTLINFO_V2_W5_SEC_ENT7_KEYID GENMASK(1, 0) 503 #define DCTLINFO_V2_W5_SEC_ENT8_KEYID GENMASK(3, 2) 504 #define DCTLINFO_V2_W5_SEC_ENT_VALID_V1 GENMASK(23, 8) 505 #define DCTLINFO_V2_W5_SEC_ENT0_V1 GENMASK(31, 24) 506 #define DCTLINFO_V2_W5_ALL (GENMASK(31, 8) | GENMASK(3, 0)) 507 #define DCTLINFO_V2_W6_SEC_ENT1_V1 GENMASK(7, 0) 508 #define DCTLINFO_V2_W6_SEC_ENT2_V1 GENMASK(15, 8) 509 #define DCTLINFO_V2_W6_SEC_ENT3_V1 GENMASK(23, 16) 510 #define DCTLINFO_V2_W6_SEC_ENT4_V1 GENMASK(31, 24) 511 #define DCTLINFO_V2_W6_ALL GENMASK(31, 0) 512 #define DCTLINFO_V2_W7_SEC_ENT5_V1 GENMASK(7, 0) 513 #define DCTLINFO_V2_W7_SEC_ENT6_V1 GENMASK(15, 8) 514 #define DCTLINFO_V2_W7_SEC_ENT7 GENMASK(23, 16) 515 #define DCTLINFO_V2_W7_SEC_ENT8 GENMASK(31, 24) 516 #define DCTLINFO_V2_W7_ALL GENMASK(31, 0) 517 #define DCTLINFO_V2_W8_MLD_SMA_L_V1 GENMASK(31, 0) 518 #define DCTLINFO_V2_W8_ALL GENMASK(31, 0) 519 #define DCTLINFO_V2_W9_MLD_SMA_H_V1 GENMASK(15, 0) 520 #define DCTLINFO_V2_W9_MLD_TMA_L_V1 GENMASK(31, 16) 521 #define DCTLINFO_V2_W9_ALL GENMASK(31, 0) 522 #define DCTLINFO_V2_W10_MLD_TMA_H_V1 GENMASK(31, 0) 523 #define DCTLINFO_V2_W10_ALL GENMASK(31, 0) 524 #define DCTLINFO_V2_W11_MLD_TA_BSSID_L_V1 GENMASK(31, 0) 525 #define DCTLINFO_V2_W11_ALL GENMASK(31, 0) 526 #define DCTLINFO_V2_W12_MLD_TA_BSSID_H_V1 GENMASK(15, 0) 527 #define DCTLINFO_V2_W12_ALL GENMASK(15, 0) 528 529 int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); 530 void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); 531 int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, 532 struct rtw89_addr_cam_entry *addr_cam, 533 const struct rtw89_bssid_cam_entry *bssid_cam); 534 void rtw89_cam_deinit_addr_cam(struct rtw89_dev *rtwdev, 535 struct rtw89_addr_cam_entry *addr_cam); 536 int rtw89_cam_init_bssid_cam(struct rtw89_dev *rtwdev, 537 struct rtw89_vif *rtwvif, 538 struct rtw89_bssid_cam_entry *bssid_cam, 539 const u8 *bssid); 540 void rtw89_cam_deinit_bssid_cam(struct rtw89_dev *rtwdev, 541 struct rtw89_bssid_cam_entry *bssid_cam); 542 void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, 543 struct rtw89_vif *vif, 544 struct rtw89_sta *rtwsta, 545 const u8 *scan_mac_addr, u8 *cmd); 546 void rtw89_cam_fill_dctl_sec_cam_info_v1(struct rtw89_dev *rtwdev, 547 struct rtw89_vif *rtwvif, 548 struct rtw89_sta *rtwsta, 549 struct rtw89_h2c_dctlinfo_ud_v1 *h2c); 550 void rtw89_cam_fill_dctl_sec_cam_info_v2(struct rtw89_dev *rtwdev, 551 struct rtw89_vif *rtwvif, 552 struct rtw89_sta *rtwsta, 553 struct rtw89_h2c_dctlinfo_ud_v2 *h2c); 554 int rtw89_cam_fill_bssid_cam_info(struct rtw89_dev *rtwdev, 555 struct rtw89_vif *rtwvif, 556 struct rtw89_sta *rtwsta, u8 *cmd); 557 int rtw89_cam_sec_key_add(struct rtw89_dev *rtwdev, 558 struct ieee80211_vif *vif, 559 struct ieee80211_sta *sta, 560 struct ieee80211_key_conf *key); 561 int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev, 562 struct ieee80211_vif *vif, 563 struct ieee80211_sta *sta, 564 struct ieee80211_key_conf *key, 565 bool inform_fw); 566 void rtw89_cam_bssid_changed(struct rtw89_dev *rtwdev, 567 struct rtw89_vif *rtwvif); 568 void rtw89_cam_reset_keys(struct rtw89_dev *rtwdev); 569 #endif 570