1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright (C) 2021 Martin Blumenstingl <martin.blumenstingl@googlemail.com> 3 * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com> 4 * 5 * Based on rtw88/pci.c: 6 * Copyright(c) 2018-2019 Realtek Corporation 7 */ 8 9 #include <linux/module.h> 10 #include <linux/mmc/host.h> 11 #include <linux/mmc/sdio_func.h> 12 #include "main.h" 13 #include "debug.h" 14 #include "fw.h" 15 #include "ps.h" 16 #include "reg.h" 17 #include "rx.h" 18 #include "sdio.h" 19 #include "tx.h" 20 21 #define RTW_SDIO_INDIRECT_RW_RETRIES 50 22 23 static bool rtw_sdio_is_bus_addr(u32 addr) 24 { 25 return !!(addr & RTW_SDIO_BUS_MSK); 26 } 27 28 static bool rtw_sdio_bus_claim_needed(struct rtw_sdio *rtwsdio) 29 { 30 return !rtwsdio->irq_thread || 31 rtwsdio->irq_thread != current; 32 } 33 34 static u32 rtw_sdio_to_bus_offset(struct rtw_dev *rtwdev, u32 addr) 35 { 36 switch (addr & RTW_SDIO_BUS_MSK) { 37 case WLAN_IOREG_OFFSET: 38 addr &= WLAN_IOREG_REG_MSK; 39 addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 40 REG_SDIO_CMD_ADDR_MAC_REG); 41 break; 42 case SDIO_LOCAL_OFFSET: 43 addr &= SDIO_LOCAL_REG_MSK; 44 addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 45 REG_SDIO_CMD_ADDR_SDIO_REG); 46 break; 47 default: 48 rtw_warn(rtwdev, "Cannot convert addr 0x%08x to bus offset", 49 addr); 50 } 51 52 return addr; 53 } 54 55 static bool rtw_sdio_use_memcpy_io(struct rtw_dev *rtwdev, u32 addr, 56 u8 alignment) 57 { 58 return IS_ALIGNED(addr, alignment) && 59 test_bit(RTW_FLAG_POWERON, rtwdev->flags); 60 } 61 62 static void rtw_sdio_writel(struct rtw_dev *rtwdev, u32 val, u32 addr, 63 int *err_ret) 64 { 65 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 66 u8 buf[4]; 67 int i; 68 69 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) { 70 sdio_writel(rtwsdio->sdio_func, val, addr, err_ret); 71 return; 72 } 73 74 *(__le32 *)buf = cpu_to_le32(val); 75 76 for (i = 0; i < 4; i++) { 77 sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); 78 if (*err_ret) 79 return; 80 } 81 } 82 83 static void rtw_sdio_writew(struct rtw_dev *rtwdev, u16 val, u32 addr, 84 int *err_ret) 85 { 86 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 87 u8 buf[2]; 88 int i; 89 90 *(__le16 *)buf = cpu_to_le16(val); 91 92 for (i = 0; i < 2; i++) { 93 sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); 94 if (*err_ret) 95 return; 96 } 97 } 98 99 static u32 rtw_sdio_readl(struct rtw_dev *rtwdev, u32 addr, int *err_ret) 100 { 101 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 102 u8 buf[4]; 103 int i; 104 105 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) 106 return sdio_readl(rtwsdio->sdio_func, addr, err_ret); 107 108 for (i = 0; i < 4; i++) { 109 buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); 110 if (*err_ret) 111 return 0; 112 } 113 114 return le32_to_cpu(*(__le32 *)buf); 115 } 116 117 static u16 rtw_sdio_readw(struct rtw_dev *rtwdev, u32 addr, int *err_ret) 118 { 119 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 120 u8 buf[2]; 121 int i; 122 123 for (i = 0; i < 2; i++) { 124 buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); 125 if (*err_ret) 126 return 0; 127 } 128 129 return le16_to_cpu(*(__le16 *)buf); 130 } 131 132 static u32 rtw_sdio_to_io_address(struct rtw_dev *rtwdev, u32 addr, 133 bool direct) 134 { 135 if (!direct) 136 return addr; 137 138 if (!rtw_sdio_is_bus_addr(addr)) 139 addr |= WLAN_IOREG_OFFSET; 140 141 return rtw_sdio_to_bus_offset(rtwdev, addr); 142 } 143 144 static bool rtw_sdio_use_direct_io(struct rtw_dev *rtwdev, u32 addr) 145 { 146 return !rtw_sdio_is_sdio30_supported(rtwdev) || 147 rtw_sdio_is_bus_addr(addr); 148 } 149 150 static int rtw_sdio_indirect_reg_cfg(struct rtw_dev *rtwdev, u32 addr, u32 cfg) 151 { 152 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 153 unsigned int retry; 154 u32 reg_cfg; 155 int ret; 156 u8 tmp; 157 158 reg_cfg = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_CFG); 159 160 rtw_sdio_writel(rtwdev, addr | cfg | BIT_SDIO_INDIRECT_REG_CFG_UNK20, 161 reg_cfg, &ret); 162 if (ret) 163 return ret; 164 165 for (retry = 0; retry < RTW_SDIO_INDIRECT_RW_RETRIES; retry++) { 166 tmp = sdio_readb(rtwsdio->sdio_func, reg_cfg + 2, &ret); 167 if (!ret && (tmp & BIT(4))) 168 return 0; 169 } 170 171 return -ETIMEDOUT; 172 } 173 174 static u8 rtw_sdio_indirect_read8(struct rtw_dev *rtwdev, u32 addr, 175 int *err_ret) 176 { 177 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 178 u32 reg_data; 179 180 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 181 BIT_SDIO_INDIRECT_REG_CFG_READ); 182 if (*err_ret) 183 return 0; 184 185 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 186 return sdio_readb(rtwsdio->sdio_func, reg_data, err_ret); 187 } 188 189 static int rtw_sdio_indirect_read_bytes(struct rtw_dev *rtwdev, u32 addr, 190 u8 *buf, int count) 191 { 192 int i, ret = 0; 193 194 for (i = 0; i < count; i++) { 195 buf[i] = rtw_sdio_indirect_read8(rtwdev, addr + i, &ret); 196 if (ret) 197 break; 198 } 199 200 return ret; 201 } 202 203 static u16 rtw_sdio_indirect_read16(struct rtw_dev *rtwdev, u32 addr, 204 int *err_ret) 205 { 206 u32 reg_data; 207 u8 buf[2]; 208 209 if (!IS_ALIGNED(addr, 2)) { 210 *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 2); 211 if (*err_ret) 212 return 0; 213 214 return le16_to_cpu(*(__le16 *)buf); 215 } 216 217 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 218 BIT_SDIO_INDIRECT_REG_CFG_READ); 219 if (*err_ret) 220 return 0; 221 222 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 223 return rtw_sdio_readw(rtwdev, reg_data, err_ret); 224 } 225 226 static u32 rtw_sdio_indirect_read32(struct rtw_dev *rtwdev, u32 addr, 227 int *err_ret) 228 { 229 u32 reg_data; 230 u8 buf[4]; 231 232 if (!IS_ALIGNED(addr, 4)) { 233 *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 4); 234 if (*err_ret) 235 return 0; 236 237 return le32_to_cpu(*(__le32 *)buf); 238 } 239 240 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 241 BIT_SDIO_INDIRECT_REG_CFG_READ); 242 if (*err_ret) 243 return 0; 244 245 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 246 return rtw_sdio_readl(rtwdev, reg_data, err_ret); 247 } 248 249 static u8 rtw_sdio_read8(struct rtw_dev *rtwdev, u32 addr) 250 { 251 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 252 bool direct, bus_claim; 253 int ret; 254 u8 val; 255 256 direct = rtw_sdio_use_direct_io(rtwdev, addr); 257 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 258 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 259 260 if (bus_claim) 261 sdio_claim_host(rtwsdio->sdio_func); 262 263 if (direct) 264 val = sdio_readb(rtwsdio->sdio_func, addr, &ret); 265 else 266 val = rtw_sdio_indirect_read8(rtwdev, addr, &ret); 267 268 if (bus_claim) 269 sdio_release_host(rtwsdio->sdio_func); 270 271 if (ret) 272 rtw_warn(rtwdev, "sdio read8 failed (0x%x): %d", addr, ret); 273 274 return val; 275 } 276 277 static u16 rtw_sdio_read16(struct rtw_dev *rtwdev, u32 addr) 278 { 279 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 280 bool direct, bus_claim; 281 int ret; 282 u16 val; 283 284 direct = rtw_sdio_use_direct_io(rtwdev, addr); 285 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 286 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 287 288 if (bus_claim) 289 sdio_claim_host(rtwsdio->sdio_func); 290 291 if (direct) 292 val = rtw_sdio_readw(rtwdev, addr, &ret); 293 else 294 val = rtw_sdio_indirect_read16(rtwdev, addr, &ret); 295 296 if (bus_claim) 297 sdio_release_host(rtwsdio->sdio_func); 298 299 if (ret) 300 rtw_warn(rtwdev, "sdio read16 failed (0x%x): %d", addr, ret); 301 302 return val; 303 } 304 305 static u32 rtw_sdio_read32(struct rtw_dev *rtwdev, u32 addr) 306 { 307 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 308 bool direct, bus_claim; 309 u32 val; 310 int ret; 311 312 direct = rtw_sdio_use_direct_io(rtwdev, addr); 313 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 314 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 315 316 if (bus_claim) 317 sdio_claim_host(rtwsdio->sdio_func); 318 319 if (direct) 320 val = rtw_sdio_readl(rtwdev, addr, &ret); 321 else 322 val = rtw_sdio_indirect_read32(rtwdev, addr, &ret); 323 324 if (bus_claim) 325 sdio_release_host(rtwsdio->sdio_func); 326 327 if (ret) 328 rtw_warn(rtwdev, "sdio read32 failed (0x%x): %d", addr, ret); 329 330 return val; 331 } 332 333 static void rtw_sdio_indirect_write8(struct rtw_dev *rtwdev, u8 val, u32 addr, 334 int *err_ret) 335 { 336 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 337 u32 reg_data; 338 339 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 340 sdio_writeb(rtwsdio->sdio_func, val, reg_data, err_ret); 341 if (*err_ret) 342 return; 343 344 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 345 BIT_SDIO_INDIRECT_REG_CFG_WRITE); 346 } 347 348 static void rtw_sdio_indirect_write16(struct rtw_dev *rtwdev, u16 val, u32 addr, 349 int *err_ret) 350 { 351 u32 reg_data; 352 353 if (!IS_ALIGNED(addr, 2)) { 354 addr = rtw_sdio_to_io_address(rtwdev, addr, true); 355 rtw_sdio_writew(rtwdev, val, addr, err_ret); 356 return; 357 } 358 359 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 360 rtw_sdio_writew(rtwdev, val, reg_data, err_ret); 361 if (*err_ret) 362 return; 363 364 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 365 BIT_SDIO_INDIRECT_REG_CFG_WRITE | 366 BIT_SDIO_INDIRECT_REG_CFG_WORD); 367 } 368 369 static void rtw_sdio_indirect_write32(struct rtw_dev *rtwdev, u32 val, 370 u32 addr, int *err_ret) 371 { 372 u32 reg_data; 373 374 if (!IS_ALIGNED(addr, 4)) { 375 addr = rtw_sdio_to_io_address(rtwdev, addr, true); 376 rtw_sdio_writel(rtwdev, val, addr, err_ret); 377 return; 378 } 379 380 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 381 rtw_sdio_writel(rtwdev, val, reg_data, err_ret); 382 383 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 384 BIT_SDIO_INDIRECT_REG_CFG_WRITE | 385 BIT_SDIO_INDIRECT_REG_CFG_DWORD); 386 } 387 388 static void rtw_sdio_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) 389 { 390 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 391 bool direct, bus_claim; 392 int ret; 393 394 direct = rtw_sdio_use_direct_io(rtwdev, addr); 395 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 396 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 397 398 if (bus_claim) 399 sdio_claim_host(rtwsdio->sdio_func); 400 401 if (direct) 402 sdio_writeb(rtwsdio->sdio_func, val, addr, &ret); 403 else 404 rtw_sdio_indirect_write8(rtwdev, val, addr, &ret); 405 406 if (bus_claim) 407 sdio_release_host(rtwsdio->sdio_func); 408 409 if (ret) 410 rtw_warn(rtwdev, "sdio write8 failed (0x%x): %d", addr, ret); 411 } 412 413 static void rtw_sdio_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) 414 { 415 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 416 bool direct, bus_claim; 417 int ret; 418 419 direct = rtw_sdio_use_direct_io(rtwdev, addr); 420 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 421 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 422 423 if (bus_claim) 424 sdio_claim_host(rtwsdio->sdio_func); 425 426 if (direct) 427 rtw_sdio_writew(rtwdev, val, addr, &ret); 428 else 429 rtw_sdio_indirect_write16(rtwdev, val, addr, &ret); 430 431 if (bus_claim) 432 sdio_release_host(rtwsdio->sdio_func); 433 434 if (ret) 435 rtw_warn(rtwdev, "sdio write16 failed (0x%x): %d", addr, ret); 436 } 437 438 static void rtw_sdio_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) 439 { 440 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 441 bool direct, bus_claim; 442 int ret; 443 444 direct = rtw_sdio_use_direct_io(rtwdev, addr); 445 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 446 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 447 448 if (bus_claim) 449 sdio_claim_host(rtwsdio->sdio_func); 450 451 if (direct) 452 rtw_sdio_writel(rtwdev, val, addr, &ret); 453 else 454 rtw_sdio_indirect_write32(rtwdev, val, addr, &ret); 455 456 if (bus_claim) 457 sdio_release_host(rtwsdio->sdio_func); 458 459 if (ret) 460 rtw_warn(rtwdev, "sdio write32 failed (0x%x): %d", addr, ret); 461 } 462 463 static u32 rtw_sdio_get_tx_addr(struct rtw_dev *rtwdev, size_t size, 464 enum rtw_tx_queue_type queue) 465 { 466 u32 txaddr; 467 468 switch (queue) { 469 case RTW_TX_QUEUE_BCN: 470 case RTW_TX_QUEUE_H2C: 471 case RTW_TX_QUEUE_HI0: 472 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 473 REG_SDIO_CMD_ADDR_TXFF_HIGH); 474 break; 475 case RTW_TX_QUEUE_VI: 476 case RTW_TX_QUEUE_VO: 477 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 478 REG_SDIO_CMD_ADDR_TXFF_NORMAL); 479 break; 480 case RTW_TX_QUEUE_BE: 481 case RTW_TX_QUEUE_BK: 482 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 483 REG_SDIO_CMD_ADDR_TXFF_LOW); 484 break; 485 case RTW_TX_QUEUE_MGMT: 486 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 487 REG_SDIO_CMD_ADDR_TXFF_EXTRA); 488 break; 489 default: 490 rtw_warn(rtwdev, "Unsupported queue for TX addr: 0x%02x\n", 491 queue); 492 return 0; 493 } 494 495 txaddr += DIV_ROUND_UP(size, 4); 496 497 return txaddr; 498 }; 499 500 static int rtw_sdio_read_port(struct rtw_dev *rtwdev, u8 *buf, size_t count) 501 { 502 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 503 struct mmc_host *host = rtwsdio->sdio_func->card->host; 504 bool bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 505 u32 rxaddr = rtwsdio->rx_addr++; 506 int ret = 0, err; 507 size_t bytes; 508 509 if (bus_claim) 510 sdio_claim_host(rtwsdio->sdio_func); 511 512 while (count > 0) { 513 bytes = min_t(size_t, host->max_req_size, count); 514 515 err = sdio_memcpy_fromio(rtwsdio->sdio_func, buf, 516 RTW_SDIO_ADDR_RX_RX0FF_GEN(rxaddr), 517 bytes); 518 if (err) { 519 rtw_warn(rtwdev, 520 "Failed to read %zu byte(s) from SDIO port 0x%08x: %d", 521 bytes, rxaddr, err); 522 523 /* Signal to the caller that reading did not work and 524 * that the data in the buffer is short/corrupted. 525 */ 526 ret = err; 527 528 /* Don't stop here - instead drain the remaining data 529 * from the card's buffer, else the card will return 530 * corrupt data for the next rtw_sdio_read_port() call. 531 */ 532 } 533 534 count -= bytes; 535 buf += bytes; 536 } 537 538 if (bus_claim) 539 sdio_release_host(rtwsdio->sdio_func); 540 541 return ret; 542 } 543 544 static int rtw_sdio_check_free_txpg(struct rtw_dev *rtwdev, u8 queue, 545 size_t count) 546 { 547 unsigned int pages_free, pages_needed; 548 549 if (rtw_chip_wcpu_11n(rtwdev)) { 550 u32 free_txpg; 551 552 free_txpg = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); 553 554 switch (queue) { 555 case RTW_TX_QUEUE_BCN: 556 case RTW_TX_QUEUE_H2C: 557 case RTW_TX_QUEUE_HI0: 558 case RTW_TX_QUEUE_MGMT: 559 /* high */ 560 pages_free = free_txpg & 0xff; 561 break; 562 case RTW_TX_QUEUE_VI: 563 case RTW_TX_QUEUE_VO: 564 /* normal */ 565 pages_free = (free_txpg >> 8) & 0xff; 566 break; 567 case RTW_TX_QUEUE_BE: 568 case RTW_TX_QUEUE_BK: 569 /* low */ 570 pages_free = (free_txpg >> 16) & 0xff; 571 break; 572 default: 573 rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); 574 return -EINVAL; 575 } 576 577 /* add the pages from the public queue */ 578 pages_free += (free_txpg >> 24) & 0xff; 579 } else { 580 u32 free_txpg[3]; 581 582 free_txpg[0] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); 583 free_txpg[1] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 4); 584 free_txpg[2] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 8); 585 586 switch (queue) { 587 case RTW_TX_QUEUE_BCN: 588 case RTW_TX_QUEUE_H2C: 589 case RTW_TX_QUEUE_HI0: 590 /* high */ 591 pages_free = free_txpg[0] & 0xfff; 592 break; 593 case RTW_TX_QUEUE_VI: 594 case RTW_TX_QUEUE_VO: 595 /* normal */ 596 pages_free = (free_txpg[0] >> 16) & 0xfff; 597 break; 598 case RTW_TX_QUEUE_BE: 599 case RTW_TX_QUEUE_BK: 600 /* low */ 601 pages_free = free_txpg[1] & 0xfff; 602 break; 603 case RTW_TX_QUEUE_MGMT: 604 /* extra */ 605 pages_free = free_txpg[2] & 0xfff; 606 break; 607 default: 608 rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); 609 return -EINVAL; 610 } 611 612 /* add the pages from the public queue */ 613 pages_free += (free_txpg[1] >> 16) & 0xfff; 614 } 615 616 pages_needed = DIV_ROUND_UP(count, rtwdev->chip->page_size); 617 618 if (pages_needed > pages_free) { 619 rtw_dbg(rtwdev, RTW_DBG_SDIO, 620 "Not enough free pages (%u needed, %u free) in queue %u for %zu bytes\n", 621 pages_needed, pages_free, queue, count); 622 return -EBUSY; 623 } 624 625 return 0; 626 } 627 628 static int rtw_sdio_write_port(struct rtw_dev *rtwdev, struct sk_buff *skb, 629 enum rtw_tx_queue_type queue) 630 { 631 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 632 bool bus_claim; 633 size_t txsize; 634 u32 txaddr; 635 int ret; 636 637 txaddr = rtw_sdio_get_tx_addr(rtwdev, skb->len, queue); 638 if (!txaddr) 639 return -EINVAL; 640 641 txsize = sdio_align_size(rtwsdio->sdio_func, skb->len); 642 643 ret = rtw_sdio_check_free_txpg(rtwdev, queue, txsize); 644 if (ret) 645 return ret; 646 647 if (!IS_ALIGNED((unsigned long)skb->data, RTW_SDIO_DATA_PTR_ALIGN)) 648 rtw_warn(rtwdev, "Got unaligned SKB in %s() for queue %u\n", 649 __func__, queue); 650 651 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 652 653 if (bus_claim) 654 sdio_claim_host(rtwsdio->sdio_func); 655 656 ret = sdio_memcpy_toio(rtwsdio->sdio_func, txaddr, skb->data, txsize); 657 658 if (bus_claim) 659 sdio_release_host(rtwsdio->sdio_func); 660 661 if (ret) 662 rtw_warn(rtwdev, 663 "Failed to write %zu byte(s) to SDIO port 0x%08x", 664 txsize, txaddr); 665 666 return ret; 667 } 668 669 static void rtw_sdio_init(struct rtw_dev *rtwdev) 670 { 671 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 672 673 rtwsdio->irq_mask = REG_SDIO_HIMR_RX_REQUEST | REG_SDIO_HIMR_CPWM1; 674 } 675 676 static void rtw_sdio_enable_rx_aggregation(struct rtw_dev *rtwdev) 677 { 678 u8 size, timeout; 679 680 if (rtw_chip_wcpu_11n(rtwdev)) { 681 size = 0x6; 682 timeout = 0x6; 683 } else { 684 size = 0xff; 685 timeout = 0x1; 686 } 687 688 /* Make the firmware honor the size limit configured below */ 689 rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC); 690 691 rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN); 692 693 rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, 694 FIELD_PREP(BIT_RXDMA_AGG_PG_TH, size) | 695 FIELD_PREP(BIT_DMA_AGG_TO_V1, timeout)); 696 697 rtw_write8_set(rtwdev, REG_RXDMA_MODE, BIT_DMA_MODE); 698 } 699 700 static void rtw_sdio_enable_interrupt(struct rtw_dev *rtwdev) 701 { 702 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 703 704 rtw_write32(rtwdev, REG_SDIO_HIMR, rtwsdio->irq_mask); 705 } 706 707 static void rtw_sdio_disable_interrupt(struct rtw_dev *rtwdev) 708 { 709 rtw_write32(rtwdev, REG_SDIO_HIMR, 0x0); 710 } 711 712 static u8 rtw_sdio_get_tx_qsel(struct rtw_dev *rtwdev, struct sk_buff *skb, 713 u8 queue) 714 { 715 switch (queue) { 716 case RTW_TX_QUEUE_BCN: 717 return TX_DESC_QSEL_BEACON; 718 case RTW_TX_QUEUE_H2C: 719 return TX_DESC_QSEL_H2C; 720 case RTW_TX_QUEUE_MGMT: 721 if (rtw_chip_wcpu_11n(rtwdev)) 722 return TX_DESC_QSEL_HIGH; 723 else 724 return TX_DESC_QSEL_MGMT; 725 case RTW_TX_QUEUE_HI0: 726 return TX_DESC_QSEL_HIGH; 727 default: 728 return skb->priority; 729 } 730 } 731 732 static int rtw_sdio_setup(struct rtw_dev *rtwdev) 733 { 734 /* nothing to do */ 735 return 0; 736 } 737 738 static int rtw_sdio_start(struct rtw_dev *rtwdev) 739 { 740 rtw_sdio_enable_rx_aggregation(rtwdev); 741 rtw_sdio_enable_interrupt(rtwdev); 742 743 return 0; 744 } 745 746 static void rtw_sdio_stop(struct rtw_dev *rtwdev) 747 { 748 rtw_sdio_disable_interrupt(rtwdev); 749 } 750 751 static void rtw_sdio_deep_ps_enter(struct rtw_dev *rtwdev) 752 { 753 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 754 bool tx_empty = true; 755 u8 queue; 756 757 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) { 758 /* Deep PS state is not allowed to TX-DMA */ 759 for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { 760 /* BCN queue is rsvd page, does not have DMA interrupt 761 * H2C queue is managed by firmware 762 */ 763 if (queue == RTW_TX_QUEUE_BCN || 764 queue == RTW_TX_QUEUE_H2C) 765 continue; 766 767 /* check if there is any skb DMAing */ 768 if (skb_queue_len(&rtwsdio->tx_queue[queue])) { 769 tx_empty = false; 770 break; 771 } 772 } 773 } 774 775 if (!tx_empty) { 776 rtw_dbg(rtwdev, RTW_DBG_PS, 777 "TX path not empty, cannot enter deep power save state\n"); 778 return; 779 } 780 781 set_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags); 782 rtw_power_mode_change(rtwdev, true); 783 } 784 785 static void rtw_sdio_deep_ps_leave(struct rtw_dev *rtwdev) 786 { 787 if (test_and_clear_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 788 rtw_power_mode_change(rtwdev, false); 789 } 790 791 static void rtw_sdio_deep_ps(struct rtw_dev *rtwdev, bool enter) 792 { 793 if (enter && !test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 794 rtw_sdio_deep_ps_enter(rtwdev); 795 796 if (!enter && test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 797 rtw_sdio_deep_ps_leave(rtwdev); 798 } 799 800 static void rtw_sdio_tx_kick_off(struct rtw_dev *rtwdev) 801 { 802 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 803 804 queue_work(rtwsdio->txwq, &rtwsdio->tx_handler_data->work); 805 } 806 807 static void rtw_sdio_link_ps(struct rtw_dev *rtwdev, bool enter) 808 { 809 /* nothing to do */ 810 } 811 812 static void rtw_sdio_interface_cfg(struct rtw_dev *rtwdev) 813 { 814 u32 val; 815 816 rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); 817 818 val = rtw_read32(rtwdev, REG_SDIO_TX_CTRL); 819 val &= 0xfff8; 820 rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val); 821 } 822 823 static struct rtw_sdio_tx_data *rtw_sdio_get_tx_data(struct sk_buff *skb) 824 { 825 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 826 827 BUILD_BUG_ON(sizeof(struct rtw_sdio_tx_data) > 828 sizeof(info->status.status_driver_data)); 829 830 return (struct rtw_sdio_tx_data *)info->status.status_driver_data; 831 } 832 833 static void rtw_sdio_tx_skb_prepare(struct rtw_dev *rtwdev, 834 struct rtw_tx_pkt_info *pkt_info, 835 struct sk_buff *skb, 836 enum rtw_tx_queue_type queue) 837 { 838 const struct rtw_chip_info *chip = rtwdev->chip; 839 unsigned long data_addr, aligned_addr; 840 size_t offset; 841 u8 *pkt_desc; 842 843 pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); 844 845 data_addr = (unsigned long)pkt_desc; 846 aligned_addr = ALIGN(data_addr, RTW_SDIO_DATA_PTR_ALIGN); 847 848 if (data_addr != aligned_addr) { 849 /* Ensure that the start of the pkt_desc is always aligned at 850 * RTW_SDIO_DATA_PTR_ALIGN. 851 */ 852 offset = RTW_SDIO_DATA_PTR_ALIGN - (aligned_addr - data_addr); 853 854 pkt_desc = skb_push(skb, offset); 855 856 /* By inserting padding to align the start of the pkt_desc we 857 * need to inform the firmware that the actual data starts at 858 * a different offset than normal. 859 */ 860 pkt_info->offset += offset; 861 } 862 863 memset(pkt_desc, 0, chip->tx_pkt_desc_sz); 864 865 pkt_info->qsel = rtw_sdio_get_tx_qsel(rtwdev, skb, queue); 866 867 rtw_tx_fill_tx_desc(pkt_info, skb); 868 rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, pkt_desc); 869 } 870 871 static int rtw_sdio_write_data(struct rtw_dev *rtwdev, 872 struct rtw_tx_pkt_info *pkt_info, 873 struct sk_buff *skb, 874 enum rtw_tx_queue_type queue) 875 { 876 int ret; 877 878 rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); 879 880 ret = rtw_sdio_write_port(rtwdev, skb, queue); 881 dev_kfree_skb_any(skb); 882 883 return ret; 884 } 885 886 static int rtw_sdio_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, 887 u32 size) 888 { 889 struct rtw_tx_pkt_info pkt_info = {}; 890 struct sk_buff *skb; 891 892 skb = rtw_tx_write_data_rsvd_page_get(rtwdev, &pkt_info, buf, size); 893 if (!skb) 894 return -ENOMEM; 895 896 return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); 897 } 898 899 static int rtw_sdio_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) 900 { 901 struct rtw_tx_pkt_info pkt_info = {}; 902 struct sk_buff *skb; 903 904 skb = rtw_tx_write_data_h2c_get(rtwdev, &pkt_info, buf, size); 905 if (!skb) 906 return -ENOMEM; 907 908 return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); 909 } 910 911 static int rtw_sdio_tx_write(struct rtw_dev *rtwdev, 912 struct rtw_tx_pkt_info *pkt_info, 913 struct sk_buff *skb) 914 { 915 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 916 enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); 917 struct rtw_sdio_tx_data *tx_data; 918 919 rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); 920 921 tx_data = rtw_sdio_get_tx_data(skb); 922 tx_data->sn = pkt_info->sn; 923 924 skb_queue_tail(&rtwsdio->tx_queue[queue], skb); 925 926 return 0; 927 } 928 929 static void rtw_sdio_tx_err_isr(struct rtw_dev *rtwdev) 930 { 931 u32 val = rtw_read32(rtwdev, REG_TXDMA_STATUS); 932 933 rtw_write32(rtwdev, REG_TXDMA_STATUS, val); 934 } 935 936 static void rtw_sdio_rx_skb(struct rtw_dev *rtwdev, struct sk_buff *skb, 937 u32 pkt_offset, struct rtw_rx_pkt_stat *pkt_stat, 938 struct ieee80211_rx_status *rx_status) 939 { 940 *IEEE80211_SKB_RXCB(skb) = *rx_status; 941 942 if (pkt_stat->is_c2h) { 943 skb_put(skb, pkt_stat->pkt_len + pkt_offset); 944 rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); 945 return; 946 } 947 948 skb_put(skb, pkt_stat->pkt_len); 949 skb_reserve(skb, pkt_offset); 950 951 rtw_rx_stats(rtwdev, pkt_stat->vif, skb); 952 953 ieee80211_rx_irqsafe(rtwdev->hw, skb); 954 } 955 956 static void rtw_sdio_rxfifo_recv(struct rtw_dev *rtwdev, u32 rx_len) 957 { 958 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 959 const struct rtw_chip_info *chip = rtwdev->chip; 960 u32 pkt_desc_sz = chip->rx_pkt_desc_sz; 961 struct ieee80211_rx_status rx_status; 962 struct rtw_rx_pkt_stat pkt_stat; 963 struct sk_buff *skb, *split_skb; 964 u32 pkt_offset, curr_pkt_len; 965 size_t bufsz; 966 u8 *rx_desc; 967 int ret; 968 969 bufsz = sdio_align_size(rtwsdio->sdio_func, rx_len); 970 971 skb = dev_alloc_skb(bufsz); 972 if (!skb) 973 return; 974 975 ret = rtw_sdio_read_port(rtwdev, skb->data, bufsz); 976 if (ret) { 977 dev_kfree_skb_any(skb); 978 return; 979 } 980 981 while (true) { 982 rx_desc = skb->data; 983 chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, 984 &rx_status); 985 pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + 986 pkt_stat.shift; 987 988 curr_pkt_len = ALIGN(pkt_offset + pkt_stat.pkt_len, 989 RTW_SDIO_DATA_PTR_ALIGN); 990 991 if ((curr_pkt_len + pkt_desc_sz) >= rx_len) { 992 /* Use the original skb (with it's adjusted offset) 993 * when processing the last (or even the only) entry to 994 * have it's memory freed automatically. 995 */ 996 rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, 997 &rx_status); 998 break; 999 } 1000 1001 split_skb = dev_alloc_skb(curr_pkt_len); 1002 if (!split_skb) { 1003 rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, 1004 &rx_status); 1005 break; 1006 } 1007 1008 skb_copy_header(split_skb, skb); 1009 memcpy(split_skb->data, skb->data, curr_pkt_len); 1010 1011 rtw_sdio_rx_skb(rtwdev, split_skb, pkt_offset, &pkt_stat, 1012 &rx_status); 1013 1014 /* Move to the start of the next RX descriptor */ 1015 skb_reserve(skb, curr_pkt_len); 1016 rx_len -= curr_pkt_len; 1017 } 1018 } 1019 1020 static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev) 1021 { 1022 u32 rx_len, hisr, total_rx_bytes = 0; 1023 1024 do { 1025 if (rtw_chip_wcpu_11n(rtwdev)) 1026 rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN); 1027 else 1028 rx_len = rtw_read32(rtwdev, REG_SDIO_RX0_REQ_LEN); 1029 1030 if (!rx_len) 1031 break; 1032 1033 rtw_sdio_rxfifo_recv(rtwdev, rx_len); 1034 1035 total_rx_bytes += rx_len; 1036 1037 if (rtw_chip_wcpu_11n(rtwdev)) { 1038 /* Stop if no more RX requests are pending, even if 1039 * rx_len could be greater than zero in the next 1040 * iteration. This is needed because the RX buffer may 1041 * already contain data while either HW or FW are not 1042 * done filling that buffer yet. Still reading the 1043 * buffer can result in packets where 1044 * rtw_rx_pkt_stat.pkt_len is zero or points beyond the 1045 * end of the buffer. 1046 */ 1047 hisr = rtw_read32(rtwdev, REG_SDIO_HISR); 1048 } else { 1049 /* RTW_WCPU_11AC chips have improved hardware or 1050 * firmware and can use rx_len unconditionally. 1051 */ 1052 hisr = REG_SDIO_HISR_RX_REQUEST; 1053 } 1054 } while (total_rx_bytes < SZ_64K && hisr & REG_SDIO_HISR_RX_REQUEST); 1055 } 1056 1057 static void rtw_sdio_handle_interrupt(struct sdio_func *sdio_func) 1058 { 1059 struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); 1060 struct rtw_sdio *rtwsdio; 1061 struct rtw_dev *rtwdev; 1062 u32 hisr; 1063 1064 rtwdev = hw->priv; 1065 rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1066 1067 rtwsdio->irq_thread = current; 1068 1069 hisr = rtw_read32(rtwdev, REG_SDIO_HISR); 1070 1071 if (hisr & REG_SDIO_HISR_TXERR) 1072 rtw_sdio_tx_err_isr(rtwdev); 1073 if (hisr & REG_SDIO_HISR_RX_REQUEST) { 1074 hisr &= ~REG_SDIO_HISR_RX_REQUEST; 1075 rtw_sdio_rx_isr(rtwdev); 1076 } 1077 1078 rtw_write32(rtwdev, REG_SDIO_HISR, hisr); 1079 1080 rtwsdio->irq_thread = NULL; 1081 } 1082 1083 static int __maybe_unused rtw_sdio_suspend(struct device *dev) 1084 { 1085 struct sdio_func *func = dev_to_sdio_func(dev); 1086 struct ieee80211_hw *hw = dev_get_drvdata(dev); 1087 struct rtw_dev *rtwdev = hw->priv; 1088 int ret; 1089 1090 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 1091 if (ret) 1092 rtw_err(rtwdev, "Failed to host PM flag MMC_PM_KEEP_POWER"); 1093 1094 return ret; 1095 } 1096 1097 static int __maybe_unused rtw_sdio_resume(struct device *dev) 1098 { 1099 return 0; 1100 } 1101 1102 SIMPLE_DEV_PM_OPS(rtw_sdio_pm_ops, rtw_sdio_suspend, rtw_sdio_resume); 1103 EXPORT_SYMBOL(rtw_sdio_pm_ops); 1104 1105 static int rtw_sdio_claim(struct rtw_dev *rtwdev, struct sdio_func *sdio_func) 1106 { 1107 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1108 int ret; 1109 1110 sdio_claim_host(sdio_func); 1111 1112 ret = sdio_enable_func(sdio_func); 1113 if (ret) { 1114 rtw_err(rtwdev, "Failed to enable SDIO func"); 1115 goto err_release_host; 1116 } 1117 1118 ret = sdio_set_block_size(sdio_func, RTW_SDIO_BLOCK_SIZE); 1119 if (ret) { 1120 rtw_err(rtwdev, "Failed to set SDIO block size to 512"); 1121 goto err_disable_func; 1122 } 1123 1124 rtwsdio->sdio_func = sdio_func; 1125 1126 rtwsdio->sdio3_bus_mode = mmc_card_uhs(sdio_func->card); 1127 1128 sdio_set_drvdata(sdio_func, rtwdev->hw); 1129 SET_IEEE80211_DEV(rtwdev->hw, &sdio_func->dev); 1130 1131 sdio_release_host(sdio_func); 1132 1133 return 0; 1134 1135 err_disable_func: 1136 sdio_disable_func(sdio_func); 1137 err_release_host: 1138 sdio_release_host(sdio_func); 1139 return ret; 1140 } 1141 1142 static void rtw_sdio_declaim(struct rtw_dev *rtwdev, 1143 struct sdio_func *sdio_func) 1144 { 1145 sdio_claim_host(sdio_func); 1146 sdio_disable_func(sdio_func); 1147 sdio_release_host(sdio_func); 1148 } 1149 1150 static struct rtw_hci_ops rtw_sdio_ops = { 1151 .tx_write = rtw_sdio_tx_write, 1152 .tx_kick_off = rtw_sdio_tx_kick_off, 1153 .setup = rtw_sdio_setup, 1154 .start = rtw_sdio_start, 1155 .stop = rtw_sdio_stop, 1156 .deep_ps = rtw_sdio_deep_ps, 1157 .link_ps = rtw_sdio_link_ps, 1158 .interface_cfg = rtw_sdio_interface_cfg, 1159 1160 .read8 = rtw_sdio_read8, 1161 .read16 = rtw_sdio_read16, 1162 .read32 = rtw_sdio_read32, 1163 .write8 = rtw_sdio_write8, 1164 .write16 = rtw_sdio_write16, 1165 .write32 = rtw_sdio_write32, 1166 .write_data_rsvd_page = rtw_sdio_write_data_rsvd_page, 1167 .write_data_h2c = rtw_sdio_write_data_h2c, 1168 }; 1169 1170 static int rtw_sdio_request_irq(struct rtw_dev *rtwdev, 1171 struct sdio_func *sdio_func) 1172 { 1173 int ret; 1174 1175 sdio_claim_host(sdio_func); 1176 ret = sdio_claim_irq(sdio_func, &rtw_sdio_handle_interrupt); 1177 sdio_release_host(sdio_func); 1178 1179 if (ret) { 1180 rtw_err(rtwdev, "failed to claim SDIO IRQ"); 1181 return ret; 1182 } 1183 1184 return 0; 1185 } 1186 1187 static void rtw_sdio_indicate_tx_status(struct rtw_dev *rtwdev, 1188 struct sk_buff *skb) 1189 { 1190 struct rtw_sdio_tx_data *tx_data = rtw_sdio_get_tx_data(skb); 1191 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1192 struct ieee80211_hw *hw = rtwdev->hw; 1193 1194 /* enqueue to wait for tx report */ 1195 if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { 1196 rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); 1197 return; 1198 } 1199 1200 /* always ACK for others, then they won't be marked as drop */ 1201 ieee80211_tx_info_clear_status(info); 1202 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 1203 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 1204 else 1205 info->flags |= IEEE80211_TX_STAT_ACK; 1206 1207 ieee80211_tx_status_irqsafe(hw, skb); 1208 } 1209 1210 static void rtw_sdio_process_tx_queue(struct rtw_dev *rtwdev, 1211 enum rtw_tx_queue_type queue) 1212 { 1213 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1214 struct sk_buff *skb; 1215 int ret; 1216 1217 skb = skb_dequeue(&rtwsdio->tx_queue[queue]); 1218 if (!skb) 1219 return; 1220 1221 ret = rtw_sdio_write_port(rtwdev, skb, queue); 1222 if (ret) { 1223 skb_queue_head(&rtwsdio->tx_queue[queue], skb); 1224 return; 1225 } 1226 1227 if (queue <= RTW_TX_QUEUE_VO) 1228 rtw_sdio_indicate_tx_status(rtwdev, skb); 1229 else 1230 dev_kfree_skb_any(skb); 1231 } 1232 1233 static void rtw_sdio_tx_handler(struct work_struct *work) 1234 { 1235 struct rtw_sdio_work_data *work_data = 1236 container_of(work, struct rtw_sdio_work_data, work); 1237 struct rtw_sdio *rtwsdio; 1238 struct rtw_dev *rtwdev; 1239 int limit, queue; 1240 1241 rtwdev = work_data->rtwdev; 1242 rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1243 1244 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) 1245 rtw_sdio_deep_ps_leave(rtwdev); 1246 1247 for (queue = RTK_MAX_TX_QUEUE_NUM - 1; queue >= 0; queue--) { 1248 for (limit = 0; limit < 1000; limit++) { 1249 rtw_sdio_process_tx_queue(rtwdev, queue); 1250 1251 if (skb_queue_empty(&rtwsdio->tx_queue[queue])) 1252 break; 1253 } 1254 } 1255 } 1256 1257 static void rtw_sdio_free_irq(struct rtw_dev *rtwdev, 1258 struct sdio_func *sdio_func) 1259 { 1260 sdio_claim_host(sdio_func); 1261 sdio_release_irq(sdio_func); 1262 sdio_release_host(sdio_func); 1263 } 1264 1265 static int rtw_sdio_init_tx(struct rtw_dev *rtwdev) 1266 { 1267 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1268 int i; 1269 1270 rtwsdio->txwq = create_singlethread_workqueue("rtw88_sdio: tx wq"); 1271 if (!rtwsdio->txwq) { 1272 rtw_err(rtwdev, "failed to create TX work queue\n"); 1273 return -ENOMEM; 1274 } 1275 1276 for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) 1277 skb_queue_head_init(&rtwsdio->tx_queue[i]); 1278 rtwsdio->tx_handler_data = kmalloc(sizeof(*rtwsdio->tx_handler_data), 1279 GFP_KERNEL); 1280 if (!rtwsdio->tx_handler_data) 1281 goto err_destroy_wq; 1282 1283 rtwsdio->tx_handler_data->rtwdev = rtwdev; 1284 INIT_WORK(&rtwsdio->tx_handler_data->work, rtw_sdio_tx_handler); 1285 1286 return 0; 1287 1288 err_destroy_wq: 1289 destroy_workqueue(rtwsdio->txwq); 1290 return -ENOMEM; 1291 } 1292 1293 static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev) 1294 { 1295 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1296 int i; 1297 1298 for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) 1299 skb_queue_purge(&rtwsdio->tx_queue[i]); 1300 1301 flush_workqueue(rtwsdio->txwq); 1302 destroy_workqueue(rtwsdio->txwq); 1303 kfree(rtwsdio->tx_handler_data); 1304 } 1305 1306 int rtw_sdio_probe(struct sdio_func *sdio_func, 1307 const struct sdio_device_id *id) 1308 { 1309 struct ieee80211_hw *hw; 1310 struct rtw_dev *rtwdev; 1311 int drv_data_size; 1312 int ret; 1313 1314 drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_sdio); 1315 hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); 1316 if (!hw) { 1317 dev_err(&sdio_func->dev, "failed to allocate hw"); 1318 return -ENOMEM; 1319 } 1320 1321 rtwdev = hw->priv; 1322 rtwdev->hw = hw; 1323 rtwdev->dev = &sdio_func->dev; 1324 rtwdev->chip = (struct rtw_chip_info *)id->driver_data; 1325 rtwdev->hci.ops = &rtw_sdio_ops; 1326 rtwdev->hci.type = RTW_HCI_TYPE_SDIO; 1327 1328 ret = rtw_core_init(rtwdev); 1329 if (ret) 1330 goto err_release_hw; 1331 1332 rtw_dbg(rtwdev, RTW_DBG_SDIO, 1333 "rtw88 SDIO probe: vendor=0x%04x device=%04x class=%02x", 1334 id->vendor, id->device, id->class); 1335 1336 ret = rtw_sdio_claim(rtwdev, sdio_func); 1337 if (ret) { 1338 rtw_err(rtwdev, "failed to claim SDIO device"); 1339 goto err_deinit_core; 1340 } 1341 1342 rtw_sdio_init(rtwdev); 1343 1344 ret = rtw_sdio_init_tx(rtwdev); 1345 if (ret) { 1346 rtw_err(rtwdev, "failed to init SDIO TX queue\n"); 1347 goto err_sdio_declaim; 1348 } 1349 1350 ret = rtw_chip_info_setup(rtwdev); 1351 if (ret) { 1352 rtw_err(rtwdev, "failed to setup chip information"); 1353 goto err_destroy_txwq; 1354 } 1355 1356 ret = rtw_sdio_request_irq(rtwdev, sdio_func); 1357 if (ret) 1358 goto err_destroy_txwq; 1359 1360 ret = rtw_register_hw(rtwdev, hw); 1361 if (ret) { 1362 rtw_err(rtwdev, "failed to register hw"); 1363 goto err_free_irq; 1364 } 1365 1366 return 0; 1367 1368 err_free_irq: 1369 rtw_sdio_free_irq(rtwdev, sdio_func); 1370 err_destroy_txwq: 1371 rtw_sdio_deinit_tx(rtwdev); 1372 err_sdio_declaim: 1373 rtw_sdio_declaim(rtwdev, sdio_func); 1374 err_deinit_core: 1375 rtw_core_deinit(rtwdev); 1376 err_release_hw: 1377 ieee80211_free_hw(hw); 1378 1379 return ret; 1380 } 1381 EXPORT_SYMBOL(rtw_sdio_probe); 1382 1383 void rtw_sdio_remove(struct sdio_func *sdio_func) 1384 { 1385 struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); 1386 struct rtw_dev *rtwdev; 1387 1388 if (!hw) 1389 return; 1390 1391 rtwdev = hw->priv; 1392 1393 rtw_unregister_hw(rtwdev, hw); 1394 rtw_sdio_disable_interrupt(rtwdev); 1395 rtw_sdio_free_irq(rtwdev, sdio_func); 1396 rtw_sdio_declaim(rtwdev, sdio_func); 1397 rtw_sdio_deinit_tx(rtwdev); 1398 rtw_core_deinit(rtwdev); 1399 ieee80211_free_hw(hw); 1400 } 1401 EXPORT_SYMBOL(rtw_sdio_remove); 1402 1403 void rtw_sdio_shutdown(struct device *dev) 1404 { 1405 struct sdio_func *sdio_func = dev_to_sdio_func(dev); 1406 const struct rtw_chip_info *chip; 1407 struct ieee80211_hw *hw; 1408 struct rtw_dev *rtwdev; 1409 1410 hw = sdio_get_drvdata(sdio_func); 1411 if (!hw) 1412 return; 1413 1414 rtwdev = hw->priv; 1415 chip = rtwdev->chip; 1416 1417 if (chip->ops->shutdown) 1418 chip->ops->shutdown(rtwdev); 1419 } 1420 EXPORT_SYMBOL(rtw_sdio_shutdown); 1421 1422 MODULE_AUTHOR("Martin Blumenstingl"); 1423 MODULE_AUTHOR("Jernej Skrabec"); 1424 MODULE_DESCRIPTION("Realtek 802.11ac wireless SDIO driver"); 1425 MODULE_LICENSE("Dual BSD/GPL"); 1426