1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #ifndef __RTW_REGD_H_ 6 #define __RTW_REGD_H_ 7 8 #define IEEE80211_CHAN_NO_IBSS IEEE80211_CHAN_NO_IR 9 #define IEEE80211_CHAN_PASSIVE_SCAN IEEE80211_CHAN_NO_IR 10 enum rtw_chplan_id { 11 RTW_CHPLAN_ETSI1_NULL = 0x21, 12 RTW_CHPLAN_WORLD_ETSI1 = 0x26, 13 RTW_CHPLAN_MKK1_MKK1 = 0x27, 14 RTW_CHPLAN_IC1_IC2 = 0x2B, 15 RTW_CHPLAN_WORLD_CHILE1 = 0x2D, 16 RTW_CHPLAN_WORLD_FCC3 = 0x30, 17 RTW_CHPLAN_WORLD_FCC5 = 0x32, 18 RTW_CHPLAN_FCC1_FCC7 = 0x34, 19 RTW_CHPLAN_WORLD_ETSI2 = 0x35, 20 RTW_CHPLAN_WORLD_ETSI3 = 0x36, 21 RTW_CHPLAN_ETSI1_ETSI12 = 0x3D, 22 RTW_CHPLAN_KCC1_KCC2 = 0x3E, 23 RTW_CHPLAN_ETSI1_ETSI4 = 0x42, 24 RTW_CHPLAN_FCC1_NCC3 = 0x44, 25 RTW_CHPLAN_WORLD_ACMA1 = 0x45, 26 RTW_CHPLAN_WORLD_ETSI6 = 0x47, 27 RTW_CHPLAN_WORLD_ETSI7 = 0x48, 28 RTW_CHPLAN_WORLD_ETSI8 = 0x49, 29 RTW_CHPLAN_KCC1_KCC3 = 0x4B, 30 RTW_CHPLAN_WORLD_ETSI10 = 0x51, 31 RTW_CHPLAN_WORLD_ETSI14 = 0x59, 32 RTW_CHPLAN_FCC2_FCC7 = 0x61, 33 RTW_CHPLAN_FCC2_FCC1 = 0x62, 34 RTW_CHPLAN_WORLD_ETSI15 = 0x63, 35 RTW_CHPLAN_WORLD_FCC7 = 0x73, 36 RTW_CHPLAN_FCC2_FCC17 = 0x74, 37 RTW_CHPLAN_WORLD_ETSI20 = 0x75, 38 RTW_CHPLAN_FCC2_FCC11 = 0x76, 39 RTW_CHPLAN_REALTEK_DEFINE = 0x7f, 40 }; 41 42 struct country_code_to_enum_rd { 43 u16 countrycode; 44 const char *iso_name; 45 }; 46 47 enum country_code_type { 48 COUNTRY_CODE_FCC = 0, 49 COUNTRY_CODE_IC = 1, 50 COUNTRY_CODE_ETSI = 2, 51 COUNTRY_CODE_SPAIN = 3, 52 COUNTRY_CODE_FRANCE = 4, 53 COUNTRY_CODE_MKK = 5, 54 COUNTRY_CODE_MKK1 = 6, 55 COUNTRY_CODE_ISRAEL = 7, 56 COUNTRY_CODE_TELEC = 8, 57 COUNTRY_CODE_MIC = 9, 58 COUNTRY_CODE_GLOBAL_DOMAIN = 10, 59 COUNTRY_CODE_WORLD_WIDE_13 = 11, 60 COUNTRY_CODE_TELEC_NETGEAR = 12, 61 COUNTRY_CODE_WORLD_WIDE_13_5G_ALL = 13, 62 63 /* new channel plan above this */ 64 COUNTRY_CODE_MAX 65 }; 66 67 int rtw_regd_init(struct rtw_dev *rtwdev); 68 int rtw_regd_hint(struct rtw_dev *rtwdev); 69 u8 rtw_regd_get(struct rtw_dev *rtwdev); 70 bool rtw_regd_has_alt(u8 regd, u8 *regd_alt); 71 #endif 72