xref: /freebsd/sys/contrib/dev/rtw88/main.c (revision 924226fba12cc9a228c73b956e1b7fa24c60b055)
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019  Realtek Corporation
3  */
4 
5 #if defined(__FreeBSD__)
6 #define	LINUXKPI_PARAM_PREFIX	rtw88_
7 #endif
8 
9 #include <linux/devcoredump.h>
10 
11 #include "main.h"
12 #include "regd.h"
13 #include "fw.h"
14 #include "ps.h"
15 #include "sec.h"
16 #include "mac.h"
17 #include "coex.h"
18 #include "phy.h"
19 #include "reg.h"
20 #include "efuse.h"
21 #include "tx.h"
22 #include "debug.h"
23 #include "bf.h"
24 #include "sar.h"
25 
26 bool rtw_disable_lps_deep_mode;
27 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
28 bool rtw_bf_support = true;
29 unsigned int rtw_debug_mask;
30 EXPORT_SYMBOL(rtw_debug_mask);
31 /* EDCCA is enabled during normal behavior. For debugging purpose in
32  * a noisy environment, it can be disabled via edcca debugfs. Because
33  * all rtw88 devices will probably be affected if environment is noisy,
34  * rtw_edcca_enabled is just declared by driver instead of by device.
35  * So, turning it off will take effect for all rtw88 devices before
36  * there is a tough reason to maintain rtw_edcca_enabled by device.
37  */
38 bool rtw_edcca_enabled = true;
39 
40 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
41 module_param_named(support_bf, rtw_bf_support, bool, 0644);
42 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
43 
44 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
45 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
46 MODULE_PARM_DESC(debug_mask, "Debugging mask");
47 
48 static struct ieee80211_channel rtw_channeltable_2g[] = {
49 	{.center_freq = 2412, .hw_value = 1,},
50 	{.center_freq = 2417, .hw_value = 2,},
51 	{.center_freq = 2422, .hw_value = 3,},
52 	{.center_freq = 2427, .hw_value = 4,},
53 	{.center_freq = 2432, .hw_value = 5,},
54 	{.center_freq = 2437, .hw_value = 6,},
55 	{.center_freq = 2442, .hw_value = 7,},
56 	{.center_freq = 2447, .hw_value = 8,},
57 	{.center_freq = 2452, .hw_value = 9,},
58 	{.center_freq = 2457, .hw_value = 10,},
59 	{.center_freq = 2462, .hw_value = 11,},
60 	{.center_freq = 2467, .hw_value = 12,},
61 	{.center_freq = 2472, .hw_value = 13,},
62 	{.center_freq = 2484, .hw_value = 14,},
63 };
64 
65 static struct ieee80211_channel rtw_channeltable_5g[] = {
66 	{.center_freq = 5180, .hw_value = 36,},
67 	{.center_freq = 5200, .hw_value = 40,},
68 	{.center_freq = 5220, .hw_value = 44,},
69 	{.center_freq = 5240, .hw_value = 48,},
70 	{.center_freq = 5260, .hw_value = 52,},
71 	{.center_freq = 5280, .hw_value = 56,},
72 	{.center_freq = 5300, .hw_value = 60,},
73 	{.center_freq = 5320, .hw_value = 64,},
74 	{.center_freq = 5500, .hw_value = 100,},
75 	{.center_freq = 5520, .hw_value = 104,},
76 	{.center_freq = 5540, .hw_value = 108,},
77 	{.center_freq = 5560, .hw_value = 112,},
78 	{.center_freq = 5580, .hw_value = 116,},
79 	{.center_freq = 5600, .hw_value = 120,},
80 	{.center_freq = 5620, .hw_value = 124,},
81 	{.center_freq = 5640, .hw_value = 128,},
82 	{.center_freq = 5660, .hw_value = 132,},
83 	{.center_freq = 5680, .hw_value = 136,},
84 	{.center_freq = 5700, .hw_value = 140,},
85 	{.center_freq = 5720, .hw_value = 144,},
86 	{.center_freq = 5745, .hw_value = 149,},
87 	{.center_freq = 5765, .hw_value = 153,},
88 	{.center_freq = 5785, .hw_value = 157,},
89 	{.center_freq = 5805, .hw_value = 161,},
90 	{.center_freq = 5825, .hw_value = 165,
91 	 .flags = IEEE80211_CHAN_NO_HT40MINUS},
92 };
93 
94 static struct ieee80211_rate rtw_ratetable[] = {
95 	{.bitrate = 10, .hw_value = 0x00,},
96 	{.bitrate = 20, .hw_value = 0x01,},
97 	{.bitrate = 55, .hw_value = 0x02,},
98 	{.bitrate = 110, .hw_value = 0x03,},
99 	{.bitrate = 60, .hw_value = 0x04,},
100 	{.bitrate = 90, .hw_value = 0x05,},
101 	{.bitrate = 120, .hw_value = 0x06,},
102 	{.bitrate = 180, .hw_value = 0x07,},
103 	{.bitrate = 240, .hw_value = 0x08,},
104 	{.bitrate = 360, .hw_value = 0x09,},
105 	{.bitrate = 480, .hw_value = 0x0a,},
106 	{.bitrate = 540, .hw_value = 0x0b,},
107 };
108 
109 u16 rtw_desc_to_bitrate(u8 desc_rate)
110 {
111 	struct ieee80211_rate rate;
112 
113 	if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
114 		return 0;
115 
116 	rate = rtw_ratetable[desc_rate];
117 
118 	return rate.bitrate;
119 }
120 
121 static struct ieee80211_supported_band rtw_band_2ghz = {
122 	.band = NL80211_BAND_2GHZ,
123 
124 	.channels = rtw_channeltable_2g,
125 	.n_channels = ARRAY_SIZE(rtw_channeltable_2g),
126 
127 	.bitrates = rtw_ratetable,
128 	.n_bitrates = ARRAY_SIZE(rtw_ratetable),
129 
130 	.ht_cap = {0},
131 	.vht_cap = {0},
132 };
133 
134 static struct ieee80211_supported_band rtw_band_5ghz = {
135 	.band = NL80211_BAND_5GHZ,
136 
137 	.channels = rtw_channeltable_5g,
138 	.n_channels = ARRAY_SIZE(rtw_channeltable_5g),
139 
140 	/* 5G has no CCK rates */
141 	.bitrates = rtw_ratetable + 4,
142 	.n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
143 
144 	.ht_cap = {0},
145 	.vht_cap = {0},
146 };
147 
148 struct rtw_watch_dog_iter_data {
149 	struct rtw_dev *rtwdev;
150 	struct rtw_vif *rtwvif;
151 };
152 
153 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
154 {
155 	struct rtw_bf_info *bf_info = &rtwdev->bf_info;
156 	u8 fix_rate_enable = 0;
157 	u8 new_csi_rate_idx;
158 
159 	if (rtwvif->bfee.role != RTW_BFEE_SU &&
160 	    rtwvif->bfee.role != RTW_BFEE_MU)
161 		return;
162 
163 	rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
164 			      bf_info->cur_csi_rpt_rate,
165 			      fix_rate_enable, &new_csi_rate_idx);
166 
167 	if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
168 		bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
169 }
170 
171 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
172 				   struct ieee80211_vif *vif)
173 {
174 	struct rtw_watch_dog_iter_data *iter_data = data;
175 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
176 
177 	if (vif->type == NL80211_IFTYPE_STATION)
178 		if (vif->bss_conf.assoc)
179 			iter_data->rtwvif = rtwvif;
180 
181 	rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
182 
183 	rtwvif->stats.tx_unicast = 0;
184 	rtwvif->stats.rx_unicast = 0;
185 	rtwvif->stats.tx_cnt = 0;
186 	rtwvif->stats.rx_cnt = 0;
187 }
188 
189 /* process TX/RX statistics periodically for hardware,
190  * the information helps hardware to enhance performance
191  */
192 static void rtw_watch_dog_work(struct work_struct *work)
193 {
194 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
195 					      watch_dog_work.work);
196 	struct rtw_traffic_stats *stats = &rtwdev->stats;
197 	struct rtw_watch_dog_iter_data data = {};
198 	bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
199 	bool ps_active;
200 
201 	mutex_lock(&rtwdev->mutex);
202 
203 	if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
204 		goto unlock;
205 
206 	ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
207 				     RTW_WATCH_DOG_DELAY_TIME);
208 
209 	if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
210 		set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
211 	else
212 		clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
213 
214 	rtw_coex_wl_status_check(rtwdev);
215 	rtw_coex_query_bt_hid_list(rtwdev);
216 
217 	if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
218 		rtw_coex_wl_status_change_notify(rtwdev, 0);
219 
220 	if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
221 	    stats->rx_cnt > RTW_LPS_THRESHOLD)
222 		ps_active = true;
223 	else
224 		ps_active = false;
225 
226 	ewma_tp_add(&stats->tx_ewma_tp,
227 		    (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
228 	ewma_tp_add(&stats->rx_ewma_tp,
229 		    (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
230 	stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
231 	stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
232 
233 	/* reset tx/rx statictics */
234 	stats->tx_unicast = 0;
235 	stats->rx_unicast = 0;
236 	stats->tx_cnt = 0;
237 	stats->rx_cnt = 0;
238 
239 	if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
240 		goto unlock;
241 
242 	/* make sure BB/RF is working for dynamic mech */
243 	rtw_leave_lps(rtwdev);
244 
245 	rtw_phy_dynamic_mechanism(rtwdev);
246 
247 	data.rtwdev = rtwdev;
248 	/* use atomic version to avoid taking local->iflist_mtx mutex */
249 	rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
250 
251 	/* fw supports only one station associated to enter lps, if there are
252 	 * more than two stations associated to the AP, then we can not enter
253 	 * lps, because fw does not handle the overlapped beacon interval
254 	 *
255 	 * mac80211 should iterate vifs and determine if driver can enter
256 	 * ps by passing IEEE80211_CONF_PS to us, all we need to do is to
257 	 * get that vif and check if device is having traffic more than the
258 	 * threshold.
259 	 */
260 	if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
261 	    !rtwdev->beacon_loss)
262 		rtw_enter_lps(rtwdev, data.rtwvif->port);
263 
264 	rtwdev->watch_dog_cnt++;
265 
266 unlock:
267 	mutex_unlock(&rtwdev->mutex);
268 }
269 
270 static void rtw_c2h_work(struct work_struct *work)
271 {
272 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
273 	struct sk_buff *skb, *tmp;
274 
275 	skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
276 		skb_unlink(skb, &rtwdev->c2h_queue);
277 		rtw_fw_c2h_cmd_handle(rtwdev, skb);
278 		dev_kfree_skb_any(skb);
279 	}
280 }
281 
282 static void rtw_ips_work(struct work_struct *work)
283 {
284 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
285 
286 	mutex_lock(&rtwdev->mutex);
287 	if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
288 		rtw_enter_ips(rtwdev);
289 	mutex_unlock(&rtwdev->mutex);
290 }
291 
292 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
293 {
294 	unsigned long mac_id;
295 
296 	mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
297 	if (mac_id < RTW_MAX_MAC_ID_NUM)
298 		set_bit(mac_id, rtwdev->mac_id_map);
299 
300 	return mac_id;
301 }
302 
303 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
304 		struct ieee80211_vif *vif)
305 {
306 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
307 	int i;
308 
309 	si->mac_id = rtw_acquire_macid(rtwdev);
310 	if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
311 		return -ENOSPC;
312 
313 	si->sta = sta;
314 	si->vif = vif;
315 	si->init_ra_lv = 1;
316 	ewma_rssi_init(&si->avg_rssi);
317 	for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
318 		rtw_txq_init(rtwdev, sta->txq[i]);
319 
320 	rtw_update_sta_info(rtwdev, si, true);
321 	rtw_fw_media_status_report(rtwdev, si->mac_id, true);
322 
323 	rtwdev->sta_cnt++;
324 	rtwdev->beacon_loss = false;
325 #if defined(__linux__)
326 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
327 		sta->addr, si->mac_id);
328 #elif defined(__FreeBSD__)
329 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n",
330 		sta->addr, ":", si->mac_id);
331 #endif
332 
333 	return 0;
334 }
335 
336 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
337 		    bool fw_exist)
338 {
339 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
340 	int i;
341 
342 	rtw_release_macid(rtwdev, si->mac_id);
343 	if (fw_exist)
344 		rtw_fw_media_status_report(rtwdev, si->mac_id, false);
345 
346 	for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
347 		rtw_txq_cleanup(rtwdev, sta->txq[i]);
348 
349 	kfree(si->mask);
350 
351 	rtwdev->sta_cnt--;
352 #if defined(__linux__)
353 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
354 		sta->addr, si->mac_id);
355 #elif defined(__FreeBSD__)
356 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n",
357 		sta->addr, ":", si->mac_id);
358 #endif
359 }
360 
361 struct rtw_fwcd_hdr {
362 	u32 item;
363 	u32 size;
364 	u32 padding1;
365 	u32 padding2;
366 } __packed;
367 
368 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
369 {
370 	struct rtw_chip_info *chip = rtwdev->chip;
371 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
372 	const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
373 	u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
374 	u8 i;
375 
376 	if (segs) {
377 		prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
378 
379 		for (i = 0; i < segs->num; i++)
380 			prep_size += segs->segs[i];
381 	}
382 
383 	desc->data = vmalloc(prep_size);
384 	if (!desc->data)
385 		return -ENOMEM;
386 
387 	desc->size = prep_size;
388 	desc->next = desc->data;
389 
390 	return 0;
391 }
392 
393 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
394 {
395 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
396 	struct rtw_fwcd_hdr *hdr;
397 	u8 *next;
398 
399 	if (!desc->data) {
400 		rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
401 		return NULL;
402 	}
403 
404 	next = desc->next + sizeof(struct rtw_fwcd_hdr);
405 	if (next - desc->data + size > desc->size) {
406 		rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
407 		return NULL;
408 	}
409 
410 	hdr = (struct rtw_fwcd_hdr *)(desc->next);
411 	hdr->item = item;
412 	hdr->size = size;
413 	hdr->padding1 = 0x01234567;
414 	hdr->padding2 = 0x89abcdef;
415 	desc->next = next + size;
416 
417 	return next;
418 }
419 
420 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
421 {
422 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
423 
424 	rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
425 
426 	/* Data will be freed after lifetime of device coredump. After calling
427 	 * dev_coredump, data is supposed to be handled by the device coredump
428 	 * framework. Note that a new dump will be discarded if a previous one
429 	 * hasn't been released yet.
430 	 */
431 	dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
432 }
433 
434 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
435 {
436 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
437 
438 	if (free_self) {
439 		rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
440 		vfree(desc->data);
441 	}
442 
443 	desc->data = NULL;
444 	desc->next = NULL;
445 }
446 
447 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
448 {
449 	u32 size = rtwdev->chip->fw_rxff_size;
450 	u32 *buf;
451 	u8 seq;
452 
453 	buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
454 	if (!buf)
455 		return -ENOMEM;
456 
457 	if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
458 		rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
459 		return -EINVAL;
460 	}
461 
462 	if (GET_FW_DUMP_LEN(buf) == 0) {
463 		rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
464 		return -EINVAL;
465 	}
466 
467 	seq = GET_FW_DUMP_SEQ(buf);
468 	if (seq > 0) {
469 		rtw_dbg(rtwdev, RTW_DBG_FW,
470 			"fw crash dump's seq is wrong: %d\n", seq);
471 		return -EINVAL;
472 	}
473 
474 	return 0;
475 }
476 
477 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
478 		u32 fwcd_item)
479 {
480 	u32 rxff = rtwdev->chip->fw_rxff_size;
481 	u32 dump_size, done_size = 0;
482 	u8 *buf;
483 	int ret;
484 
485 	buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
486 	if (!buf)
487 		return -ENOMEM;
488 
489 	while (size) {
490 		dump_size = size > rxff ? rxff : size;
491 
492 		ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
493 					  dump_size);
494 		if (ret) {
495 			rtw_err(rtwdev,
496 				"ddma fw 0x%x [+0x%x] to fw fifo fail\n",
497 				ocp_src, done_size);
498 			return ret;
499 		}
500 
501 		ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
502 				       dump_size, (u32 *)(buf + done_size));
503 		if (ret) {
504 			rtw_err(rtwdev,
505 				"dump fw 0x%x [+0x%x] from fw fifo fail\n",
506 				ocp_src, done_size);
507 			return ret;
508 		}
509 
510 		size -= dump_size;
511 		done_size += dump_size;
512 	}
513 
514 	return 0;
515 }
516 EXPORT_SYMBOL(rtw_dump_fw);
517 
518 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
519 {
520 	u8 *buf;
521 	u32 i;
522 
523 	if (addr & 0x3) {
524 		WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
525 		return -EINVAL;
526 	}
527 
528 	buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
529 	if (!buf)
530 		return -ENOMEM;
531 
532 	for (i = 0; i < size; i += 4)
533 		*(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
534 
535 	return 0;
536 }
537 EXPORT_SYMBOL(rtw_dump_reg);
538 
539 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
540 			   struct ieee80211_bss_conf *conf)
541 {
542 	if (conf && conf->assoc) {
543 		rtwvif->aid = conf->aid;
544 		rtwvif->net_type = RTW_NET_MGD_LINKED;
545 	} else {
546 		rtwvif->aid = 0;
547 		rtwvif->net_type = RTW_NET_NO_LINK;
548 	}
549 }
550 
551 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
552 			       struct ieee80211_vif *vif,
553 			       struct ieee80211_sta *sta,
554 			       struct ieee80211_key_conf *key,
555 			       void *data)
556 {
557 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
558 	struct rtw_sec_desc *sec = &rtwdev->sec;
559 
560 	rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
561 }
562 
563 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
564 {
565 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
566 
567 	if (rtwdev->sta_cnt == 0) {
568 		rtw_warn(rtwdev, "sta count before reset should not be 0\n");
569 		return;
570 	}
571 	rtw_sta_remove(rtwdev, sta, false);
572 }
573 
574 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
575 {
576 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
577 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
578 
579 	rtw_bf_disassoc(rtwdev, vif, NULL);
580 	rtw_vif_assoc_changed(rtwvif, NULL);
581 	rtw_txq_cleanup(rtwdev, vif->txq);
582 }
583 
584 void rtw_fw_recovery(struct rtw_dev *rtwdev)
585 {
586 	if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
587 		ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
588 }
589 
590 static void __fw_recovery_work(struct rtw_dev *rtwdev)
591 {
592 	int ret = 0;
593 
594 	set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
595 	clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
596 
597 	ret = rtw_fwcd_prep(rtwdev);
598 	if (ret)
599 		goto free;
600 	ret = rtw_fw_dump_crash_log(rtwdev);
601 	if (ret)
602 		goto free;
603 	ret = rtw_chip_dump_fw_crash(rtwdev);
604 	if (ret)
605 		goto free;
606 
607 	rtw_fwcd_dump(rtwdev);
608 free:
609 	rtw_fwcd_free(rtwdev, !!ret);
610 	rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
611 
612 	WARN(1, "firmware crash, start reset and recover\n");
613 
614 	rcu_read_lock();
615 	rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
616 	rcu_read_unlock();
617 	rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
618 	rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
619 	rtw_enter_ips(rtwdev);
620 }
621 
622 static void rtw_fw_recovery_work(struct work_struct *work)
623 {
624 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
625 					      fw_recovery_work);
626 
627 	mutex_lock(&rtwdev->mutex);
628 	__fw_recovery_work(rtwdev);
629 	mutex_unlock(&rtwdev->mutex);
630 
631 	ieee80211_restart_hw(rtwdev->hw);
632 }
633 
634 struct rtw_txq_ba_iter_data {
635 };
636 
637 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
638 {
639 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
640 	int ret;
641 	u8 tid;
642 
643 	tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
644 	while (tid != IEEE80211_NUM_TIDS) {
645 		clear_bit(tid, si->tid_ba);
646 		ret = ieee80211_start_tx_ba_session(sta, tid, 0);
647 		if (ret == -EINVAL) {
648 			struct ieee80211_txq *txq;
649 			struct rtw_txq *rtwtxq;
650 
651 			txq = sta->txq[tid];
652 			rtwtxq = (struct rtw_txq *)txq->drv_priv;
653 			set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
654 		}
655 
656 		tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
657 	}
658 }
659 
660 static void rtw_txq_ba_work(struct work_struct *work)
661 {
662 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
663 	struct rtw_txq_ba_iter_data data;
664 
665 	rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
666 }
667 
668 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
669 {
670 	if (IS_CH_2G_BAND(channel))
671 		pkt_stat->band = NL80211_BAND_2GHZ;
672 	else if (IS_CH_5G_BAND(channel))
673 		pkt_stat->band = NL80211_BAND_5GHZ;
674 	else
675 		return;
676 
677 	pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
678 }
679 EXPORT_SYMBOL(rtw_set_rx_freq_band);
680 
681 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
682 {
683 	rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
684 	rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
685 }
686 
687 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
688 			    struct rtw_channel_params *chan_params)
689 {
690 	struct ieee80211_channel *channel = chandef->chan;
691 	enum nl80211_chan_width width = chandef->width;
692 	u8 *cch_by_bw = chan_params->cch_by_bw;
693 	u32 primary_freq, center_freq;
694 	u8 center_chan;
695 	u8 bandwidth = RTW_CHANNEL_WIDTH_20;
696 	u8 primary_chan_idx = 0;
697 	u8 i;
698 
699 	center_chan = channel->hw_value;
700 	primary_freq = channel->center_freq;
701 	center_freq = chandef->center_freq1;
702 
703 	/* assign the center channel used while 20M bw is selected */
704 	cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
705 
706 	switch (width) {
707 	case NL80211_CHAN_WIDTH_20_NOHT:
708 	case NL80211_CHAN_WIDTH_20:
709 		bandwidth = RTW_CHANNEL_WIDTH_20;
710 		primary_chan_idx = RTW_SC_DONT_CARE;
711 		break;
712 	case NL80211_CHAN_WIDTH_40:
713 		bandwidth = RTW_CHANNEL_WIDTH_40;
714 		if (primary_freq > center_freq) {
715 			primary_chan_idx = RTW_SC_20_UPPER;
716 			center_chan -= 2;
717 		} else {
718 			primary_chan_idx = RTW_SC_20_LOWER;
719 			center_chan += 2;
720 		}
721 		break;
722 	case NL80211_CHAN_WIDTH_80:
723 		bandwidth = RTW_CHANNEL_WIDTH_80;
724 		if (primary_freq > center_freq) {
725 			if (primary_freq - center_freq == 10) {
726 				primary_chan_idx = RTW_SC_20_UPPER;
727 				center_chan -= 2;
728 			} else {
729 				primary_chan_idx = RTW_SC_20_UPMOST;
730 				center_chan -= 6;
731 			}
732 			/* assign the center channel used
733 			 * while 40M bw is selected
734 			 */
735 			cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
736 		} else {
737 			if (center_freq - primary_freq == 10) {
738 				primary_chan_idx = RTW_SC_20_LOWER;
739 				center_chan += 2;
740 			} else {
741 				primary_chan_idx = RTW_SC_20_LOWEST;
742 				center_chan += 6;
743 			}
744 			/* assign the center channel used
745 			 * while 40M bw is selected
746 			 */
747 			cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
748 		}
749 		break;
750 	default:
751 		center_chan = 0;
752 		break;
753 	}
754 
755 	chan_params->center_chan = center_chan;
756 	chan_params->bandwidth = bandwidth;
757 	chan_params->primary_chan_idx = primary_chan_idx;
758 
759 	/* assign the center channel used while current bw is selected */
760 	cch_by_bw[bandwidth] = center_chan;
761 
762 	for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
763 		cch_by_bw[i] = 0;
764 }
765 
766 void rtw_set_channel(struct rtw_dev *rtwdev)
767 {
768 	struct ieee80211_hw *hw = rtwdev->hw;
769 	struct rtw_hal *hal = &rtwdev->hal;
770 	struct rtw_chip_info *chip = rtwdev->chip;
771 	struct rtw_channel_params ch_param;
772 	u8 center_chan, bandwidth, primary_chan_idx;
773 	u8 i;
774 
775 	rtw_get_channel_params(&hw->conf.chandef, &ch_param);
776 	if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
777 		return;
778 
779 	center_chan = ch_param.center_chan;
780 	bandwidth = ch_param.bandwidth;
781 	primary_chan_idx = ch_param.primary_chan_idx;
782 
783 	hal->current_band_width = bandwidth;
784 	hal->current_channel = center_chan;
785 	hal->current_primary_channel_index = primary_chan_idx;
786 	hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
787 
788 	switch (center_chan) {
789 	case 1 ... 14:
790 		hal->sar_band = RTW_SAR_BAND_0;
791 		break;
792 	case 36 ... 64:
793 		hal->sar_band = RTW_SAR_BAND_1;
794 		break;
795 	case 100 ... 144:
796 		hal->sar_band = RTW_SAR_BAND_3;
797 		break;
798 	case 149 ... 177:
799 		hal->sar_band = RTW_SAR_BAND_4;
800 		break;
801 	default:
802 		WARN(1, "unknown ch(%u) to SAR band\n", center_chan);
803 		hal->sar_band = RTW_SAR_BAND_0;
804 		break;
805 	}
806 
807 	for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
808 		hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
809 
810 	chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
811 
812 	if (hal->current_band_type == RTW_BAND_5G) {
813 		rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
814 	} else {
815 		if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
816 			rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
817 		else
818 			rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
819 	}
820 
821 	rtw_phy_set_tx_power_level(rtwdev, center_chan);
822 
823 	/* if the channel isn't set for scanning, we will do RF calibration
824 	 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
825 	 * during scanning on each channel takes too long.
826 	 */
827 	if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
828 		rtwdev->need_rfk = true;
829 }
830 
831 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
832 {
833 	struct rtw_chip_info *chip = rtwdev->chip;
834 
835 	if (rtwdev->need_rfk) {
836 		rtwdev->need_rfk = false;
837 		chip->ops->phy_calibration(rtwdev);
838 	}
839 }
840 
841 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
842 {
843 	int i;
844 
845 	for (i = 0; i < ETH_ALEN; i++)
846 		rtw_write8(rtwdev, start + i, addr[i]);
847 }
848 
849 void rtw_vif_port_config(struct rtw_dev *rtwdev,
850 			 struct rtw_vif *rtwvif,
851 			 u32 config)
852 {
853 	u32 addr, mask;
854 
855 	if (config & PORT_SET_MAC_ADDR) {
856 		addr = rtwvif->conf->mac_addr.addr;
857 		rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
858 	}
859 	if (config & PORT_SET_BSSID) {
860 		addr = rtwvif->conf->bssid.addr;
861 		rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
862 	}
863 	if (config & PORT_SET_NET_TYPE) {
864 		addr = rtwvif->conf->net_type.addr;
865 		mask = rtwvif->conf->net_type.mask;
866 		rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
867 	}
868 	if (config & PORT_SET_AID) {
869 		addr = rtwvif->conf->aid.addr;
870 		mask = rtwvif->conf->aid.mask;
871 		rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
872 	}
873 	if (config & PORT_SET_BCN_CTRL) {
874 		addr = rtwvif->conf->bcn_ctrl.addr;
875 		mask = rtwvif->conf->bcn_ctrl.mask;
876 		rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
877 	}
878 }
879 
880 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
881 {
882 	u8 bw = 0;
883 
884 	switch (bw_cap) {
885 	case EFUSE_HW_CAP_IGNORE:
886 	case EFUSE_HW_CAP_SUPP_BW80:
887 		bw |= BIT(RTW_CHANNEL_WIDTH_80);
888 		fallthrough;
889 	case EFUSE_HW_CAP_SUPP_BW40:
890 		bw |= BIT(RTW_CHANNEL_WIDTH_40);
891 		fallthrough;
892 	default:
893 		bw |= BIT(RTW_CHANNEL_WIDTH_20);
894 		break;
895 	}
896 
897 	return bw;
898 }
899 
900 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
901 {
902 	struct rtw_hal *hal = &rtwdev->hal;
903 	struct rtw_chip_info *chip = rtwdev->chip;
904 
905 	if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
906 	    hw_ant_num >= hal->rf_path_num)
907 		return;
908 
909 	switch (hw_ant_num) {
910 	case 1:
911 		hal->rf_type = RF_1T1R;
912 		hal->rf_path_num = 1;
913 		if (!chip->fix_rf_phy_num)
914 			hal->rf_phy_num = hal->rf_path_num;
915 		hal->antenna_tx = BB_PATH_A;
916 		hal->antenna_rx = BB_PATH_A;
917 		break;
918 	default:
919 		WARN(1, "invalid hw configuration from efuse\n");
920 		break;
921 	}
922 }
923 
924 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
925 {
926 	u64 ra_mask = 0;
927 	u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
928 	u8 vht_mcs_cap;
929 	int i, nss;
930 
931 	/* 4SS, every two bits for MCS7/8/9 */
932 	for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
933 		vht_mcs_cap = mcs_map & 0x3;
934 		switch (vht_mcs_cap) {
935 		case 2: /* MCS9 */
936 			ra_mask |= 0x3ffULL << nss;
937 			break;
938 		case 1: /* MCS8 */
939 			ra_mask |= 0x1ffULL << nss;
940 			break;
941 		case 0: /* MCS7 */
942 			ra_mask |= 0x0ffULL << nss;
943 			break;
944 		default:
945 			break;
946 		}
947 	}
948 
949 	return ra_mask;
950 }
951 
952 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
953 {
954 	u8 rate_id = 0;
955 
956 	switch (wireless_set) {
957 	case WIRELESS_CCK:
958 		rate_id = RTW_RATEID_B_20M;
959 		break;
960 	case WIRELESS_OFDM:
961 		rate_id = RTW_RATEID_G;
962 		break;
963 	case WIRELESS_CCK | WIRELESS_OFDM:
964 		rate_id = RTW_RATEID_BG;
965 		break;
966 	case WIRELESS_OFDM | WIRELESS_HT:
967 		if (tx_num == 1)
968 			rate_id = RTW_RATEID_GN_N1SS;
969 		else if (tx_num == 2)
970 			rate_id = RTW_RATEID_GN_N2SS;
971 		else if (tx_num == 3)
972 			rate_id = RTW_RATEID_ARFR5_N_3SS;
973 		break;
974 	case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
975 		if (bw_mode == RTW_CHANNEL_WIDTH_40) {
976 			if (tx_num == 1)
977 				rate_id = RTW_RATEID_BGN_40M_1SS;
978 			else if (tx_num == 2)
979 				rate_id = RTW_RATEID_BGN_40M_2SS;
980 			else if (tx_num == 3)
981 				rate_id = RTW_RATEID_ARFR5_N_3SS;
982 			else if (tx_num == 4)
983 				rate_id = RTW_RATEID_ARFR7_N_4SS;
984 		} else {
985 			if (tx_num == 1)
986 				rate_id = RTW_RATEID_BGN_20M_1SS;
987 			else if (tx_num == 2)
988 				rate_id = RTW_RATEID_BGN_20M_2SS;
989 			else if (tx_num == 3)
990 				rate_id = RTW_RATEID_ARFR5_N_3SS;
991 			else if (tx_num == 4)
992 				rate_id = RTW_RATEID_ARFR7_N_4SS;
993 		}
994 		break;
995 	case WIRELESS_OFDM | WIRELESS_VHT:
996 		if (tx_num == 1)
997 			rate_id = RTW_RATEID_ARFR1_AC_1SS;
998 		else if (tx_num == 2)
999 			rate_id = RTW_RATEID_ARFR0_AC_2SS;
1000 		else if (tx_num == 3)
1001 			rate_id = RTW_RATEID_ARFR4_AC_3SS;
1002 		else if (tx_num == 4)
1003 			rate_id = RTW_RATEID_ARFR6_AC_4SS;
1004 		break;
1005 	case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1006 		if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1007 			if (tx_num == 1)
1008 				rate_id = RTW_RATEID_ARFR1_AC_1SS;
1009 			else if (tx_num == 2)
1010 				rate_id = RTW_RATEID_ARFR0_AC_2SS;
1011 			else if (tx_num == 3)
1012 				rate_id = RTW_RATEID_ARFR4_AC_3SS;
1013 			else if (tx_num == 4)
1014 				rate_id = RTW_RATEID_ARFR6_AC_4SS;
1015 		} else {
1016 			if (tx_num == 1)
1017 				rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1018 			else if (tx_num == 2)
1019 				rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1020 			else if (tx_num == 3)
1021 				rate_id = RTW_RATEID_ARFR4_AC_3SS;
1022 			else if (tx_num == 4)
1023 				rate_id = RTW_RATEID_ARFR6_AC_4SS;
1024 		}
1025 		break;
1026 	default:
1027 		break;
1028 	}
1029 
1030 	return rate_id;
1031 }
1032 
1033 #define RA_MASK_CCK_RATES	0x0000f
1034 #define RA_MASK_OFDM_RATES	0x00ff0
1035 #define RA_MASK_HT_RATES_1SS	(0xff000ULL << 0)
1036 #define RA_MASK_HT_RATES_2SS	(0xff000ULL << 8)
1037 #define RA_MASK_HT_RATES_3SS	(0xff000ULL << 16)
1038 #define RA_MASK_HT_RATES	(RA_MASK_HT_RATES_1SS | \
1039 				 RA_MASK_HT_RATES_2SS | \
1040 				 RA_MASK_HT_RATES_3SS)
1041 #define RA_MASK_VHT_RATES_1SS	(0x3ff000ULL << 0)
1042 #define RA_MASK_VHT_RATES_2SS	(0x3ff000ULL << 10)
1043 #define RA_MASK_VHT_RATES_3SS	(0x3ff000ULL << 20)
1044 #define RA_MASK_VHT_RATES	(RA_MASK_VHT_RATES_1SS | \
1045 				 RA_MASK_VHT_RATES_2SS | \
1046 				 RA_MASK_VHT_RATES_3SS)
1047 #define RA_MASK_CCK_IN_BG	0x00005
1048 #define RA_MASK_CCK_IN_HT	0x00005
1049 #define RA_MASK_CCK_IN_VHT	0x00005
1050 #define RA_MASK_OFDM_IN_VHT	0x00010
1051 #define RA_MASK_OFDM_IN_HT_2G	0x00010
1052 #define RA_MASK_OFDM_IN_HT_5G	0x00030
1053 
1054 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1055 {
1056 	u8 rssi_level = si->rssi_level;
1057 
1058 	if (wireless_set == WIRELESS_CCK)
1059 		return 0xffffffffffffffffULL;
1060 
1061 	if (rssi_level == 0)
1062 		return 0xffffffffffffffffULL;
1063 	else if (rssi_level == 1)
1064 		return 0xfffffffffffffff0ULL;
1065 	else if (rssi_level == 2)
1066 		return 0xffffffffffffefe0ULL;
1067 	else if (rssi_level == 3)
1068 		return 0xffffffffffffcfc0ULL;
1069 	else if (rssi_level == 4)
1070 		return 0xffffffffffff8f80ULL;
1071 	else
1072 		return 0xffffffffffff0f00ULL;
1073 }
1074 
1075 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1076 {
1077 	if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1078 		ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1079 
1080 	if (ra_mask == 0)
1081 		ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1082 
1083 	return ra_mask;
1084 }
1085 
1086 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1087 			     u64 ra_mask, bool is_vht_enable)
1088 {
1089 	struct rtw_hal *hal = &rtwdev->hal;
1090 	const struct cfg80211_bitrate_mask *mask = si->mask;
1091 	u64 cfg_mask = GENMASK_ULL(63, 0);
1092 	u8 band;
1093 
1094 	if (!si->use_cfg_mask)
1095 		return ra_mask;
1096 
1097 	band = hal->current_band_type;
1098 	if (band == RTW_BAND_2G) {
1099 		band = NL80211_BAND_2GHZ;
1100 		cfg_mask = mask->control[band].legacy;
1101 	} else if (band == RTW_BAND_5G) {
1102 		band = NL80211_BAND_5GHZ;
1103 		cfg_mask = u64_encode_bits(mask->control[band].legacy,
1104 					   RA_MASK_OFDM_RATES);
1105 	}
1106 
1107 	if (!is_vht_enable) {
1108 		if (ra_mask & RA_MASK_HT_RATES_1SS)
1109 			cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1110 						    RA_MASK_HT_RATES_1SS);
1111 		if (ra_mask & RA_MASK_HT_RATES_2SS)
1112 			cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1113 						    RA_MASK_HT_RATES_2SS);
1114 	} else {
1115 		if (ra_mask & RA_MASK_VHT_RATES_1SS)
1116 			cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1117 						    RA_MASK_VHT_RATES_1SS);
1118 		if (ra_mask & RA_MASK_VHT_RATES_2SS)
1119 			cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1120 						    RA_MASK_VHT_RATES_2SS);
1121 	}
1122 
1123 	ra_mask &= cfg_mask;
1124 
1125 	return ra_mask;
1126 }
1127 
1128 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1129 			 bool reset_ra_mask)
1130 {
1131 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1132 	struct ieee80211_sta *sta = si->sta;
1133 	struct rtw_efuse *efuse = &rtwdev->efuse;
1134 	struct rtw_hal *hal = &rtwdev->hal;
1135 	u8 wireless_set;
1136 	u8 bw_mode;
1137 	u8 rate_id;
1138 	u8 rf_type = RF_1T1R;
1139 	u8 stbc_en = 0;
1140 	u8 ldpc_en = 0;
1141 	u8 tx_num = 1;
1142 	u64 ra_mask = 0;
1143 	u64 ra_mask_bak = 0;
1144 	bool is_vht_enable = false;
1145 	bool is_support_sgi = false;
1146 
1147 	if (sta->deflink.vht_cap.vht_supported) {
1148 		is_vht_enable = true;
1149 		ra_mask |= get_vht_ra_mask(sta);
1150 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1151 			stbc_en = VHT_STBC_EN;
1152 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1153 			ldpc_en = VHT_LDPC_EN;
1154 	} else if (sta->deflink.ht_cap.ht_supported) {
1155 		ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1156 			   (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1157 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1158 			stbc_en = HT_STBC_EN;
1159 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1160 			ldpc_en = HT_LDPC_EN;
1161 	}
1162 
1163 	if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1164 		ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1165 
1166 	if (hal->current_band_type == RTW_BAND_5G) {
1167 		ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1168 		ra_mask_bak = ra_mask;
1169 		if (sta->deflink.vht_cap.vht_supported) {
1170 			ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1171 			wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1172 		} else if (sta->deflink.ht_cap.ht_supported) {
1173 			ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1174 			wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1175 		} else {
1176 			wireless_set = WIRELESS_OFDM;
1177 		}
1178 		dm_info->rrsr_val_init = RRSR_INIT_5G;
1179 	} else if (hal->current_band_type == RTW_BAND_2G) {
1180 		ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1181 		ra_mask_bak = ra_mask;
1182 		if (sta->deflink.vht_cap.vht_supported) {
1183 			ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1184 				   RA_MASK_OFDM_IN_VHT;
1185 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1186 				       WIRELESS_HT | WIRELESS_VHT;
1187 		} else if (sta->deflink.ht_cap.ht_supported) {
1188 			ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1189 				   RA_MASK_OFDM_IN_HT_2G;
1190 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1191 				       WIRELESS_HT;
1192 		} else if (sta->deflink.supp_rates[0] <= 0xf) {
1193 			wireless_set = WIRELESS_CCK;
1194 		} else {
1195 			ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1196 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1197 		}
1198 		dm_info->rrsr_val_init = RRSR_INIT_2G;
1199 	} else {
1200 		rtw_err(rtwdev, "Unknown band type\n");
1201 		ra_mask_bak = ra_mask;
1202 		wireless_set = 0;
1203 	}
1204 
1205 	switch (sta->deflink.bandwidth) {
1206 	case IEEE80211_STA_RX_BW_80:
1207 		bw_mode = RTW_CHANNEL_WIDTH_80;
1208 		is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1209 				 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1210 		break;
1211 	case IEEE80211_STA_RX_BW_40:
1212 		bw_mode = RTW_CHANNEL_WIDTH_40;
1213 		is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1214 				 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1215 		break;
1216 	default:
1217 		bw_mode = RTW_CHANNEL_WIDTH_20;
1218 		is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1219 				 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1220 		break;
1221 	}
1222 
1223 	if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) {
1224 		tx_num = 2;
1225 		rf_type = RF_2T2R;
1226 	} else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) {
1227 		tx_num = 2;
1228 		rf_type = RF_2T2R;
1229 	}
1230 
1231 	rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1232 
1233 	ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1234 	ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1235 	ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1236 
1237 	si->bw_mode = bw_mode;
1238 	si->stbc_en = stbc_en;
1239 	si->ldpc_en = ldpc_en;
1240 	si->rf_type = rf_type;
1241 	si->wireless_set = wireless_set;
1242 	si->sgi_enable = is_support_sgi;
1243 	si->vht_enable = is_vht_enable;
1244 	si->ra_mask = ra_mask;
1245 	si->rate_id = rate_id;
1246 
1247 	rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1248 }
1249 
1250 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1251 {
1252 	struct rtw_chip_info *chip = rtwdev->chip;
1253 	struct rtw_fw_state *fw;
1254 
1255 	fw = &rtwdev->fw;
1256 	wait_for_completion(&fw->completion);
1257 	if (!fw->firmware)
1258 		return -EINVAL;
1259 
1260 	if (chip->wow_fw_name) {
1261 		fw = &rtwdev->wow_fw;
1262 		wait_for_completion(&fw->completion);
1263 		if (!fw->firmware)
1264 			return -EINVAL;
1265 	}
1266 
1267 	return 0;
1268 }
1269 
1270 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1271 						       struct rtw_fw_state *fw)
1272 {
1273 	struct rtw_chip_info *chip = rtwdev->chip;
1274 
1275 	if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1276 	    !fw->feature)
1277 		return LPS_DEEP_MODE_NONE;
1278 
1279 	if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1280 	    rtw_fw_feature_check(fw, FW_FEATURE_PG))
1281 		return LPS_DEEP_MODE_PG;
1282 
1283 	if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1284 	    rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1285 		return LPS_DEEP_MODE_LCLK;
1286 
1287 	return LPS_DEEP_MODE_NONE;
1288 }
1289 
1290 static int rtw_power_on(struct rtw_dev *rtwdev)
1291 {
1292 	struct rtw_chip_info *chip = rtwdev->chip;
1293 	struct rtw_fw_state *fw = &rtwdev->fw;
1294 	bool wifi_only;
1295 	int ret;
1296 
1297 	ret = rtw_hci_setup(rtwdev);
1298 	if (ret) {
1299 		rtw_err(rtwdev, "failed to setup hci\n");
1300 		goto err;
1301 	}
1302 
1303 	/* power on MAC before firmware downloaded */
1304 	ret = rtw_mac_power_on(rtwdev);
1305 	if (ret) {
1306 		rtw_err(rtwdev, "failed to power on mac\n");
1307 		goto err;
1308 	}
1309 
1310 	ret = rtw_wait_firmware_completion(rtwdev);
1311 	if (ret) {
1312 		rtw_err(rtwdev, "failed to wait firmware completion\n");
1313 		goto err_off;
1314 	}
1315 
1316 	ret = rtw_download_firmware(rtwdev, fw);
1317 	if (ret) {
1318 		rtw_err(rtwdev, "failed to download firmware\n");
1319 		goto err_off;
1320 	}
1321 
1322 	/* config mac after firmware downloaded */
1323 	ret = rtw_mac_init(rtwdev);
1324 	if (ret) {
1325 		rtw_err(rtwdev, "failed to configure mac\n");
1326 		goto err_off;
1327 	}
1328 
1329 	chip->ops->phy_set_param(rtwdev);
1330 
1331 	ret = rtw_hci_start(rtwdev);
1332 	if (ret) {
1333 		rtw_err(rtwdev, "failed to start hci\n");
1334 		goto err_off;
1335 	}
1336 
1337 	/* send H2C after HCI has started */
1338 	rtw_fw_send_general_info(rtwdev);
1339 	rtw_fw_send_phydm_info(rtwdev);
1340 
1341 	wifi_only = !rtwdev->efuse.btcoex;
1342 	rtw_coex_power_on_setting(rtwdev);
1343 	rtw_coex_init_hw_config(rtwdev, wifi_only);
1344 
1345 	return 0;
1346 
1347 err_off:
1348 	rtw_mac_power_off(rtwdev);
1349 
1350 err:
1351 	return ret;
1352 }
1353 
1354 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1355 {
1356 	if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1357 		return;
1358 
1359 	if (start) {
1360 		rtw_fw_scan_notify(rtwdev, true);
1361 	} else {
1362 		reinit_completion(&rtwdev->fw_scan_density);
1363 		rtw_fw_scan_notify(rtwdev, false);
1364 		if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1365 						 SCAN_NOTIFY_TIMEOUT))
1366 			rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1367 	}
1368 }
1369 
1370 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1371 			 const u8 *mac_addr, bool hw_scan)
1372 {
1373 	u32 config = 0;
1374 	int ret = 0;
1375 
1376 	rtw_leave_lps(rtwdev);
1377 
1378 	if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1379 		ret = rtw_leave_ips(rtwdev);
1380 		if (ret) {
1381 			rtw_err(rtwdev, "failed to leave idle state\n");
1382 			return;
1383 		}
1384 	}
1385 
1386 	ether_addr_copy(rtwvif->mac_addr, mac_addr);
1387 	config |= PORT_SET_MAC_ADDR;
1388 	rtw_vif_port_config(rtwdev, rtwvif, config);
1389 
1390 	rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1391 	rtw_core_fw_scan_notify(rtwdev, true);
1392 
1393 	set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1394 	set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1395 }
1396 
1397 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1398 			    bool hw_scan)
1399 {
1400 	struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1401 	u32 config = 0;
1402 
1403 	if (!rtwvif)
1404 		return;
1405 
1406 	clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1407 	clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1408 
1409 	rtw_core_fw_scan_notify(rtwdev, false);
1410 
1411 	ether_addr_copy(rtwvif->mac_addr, vif->addr);
1412 	config |= PORT_SET_MAC_ADDR;
1413 	rtw_vif_port_config(rtwdev, rtwvif, config);
1414 
1415 	rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1416 
1417 	if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1418 		ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1419 }
1420 
1421 int rtw_core_start(struct rtw_dev *rtwdev)
1422 {
1423 	int ret;
1424 
1425 	ret = rtw_power_on(rtwdev);
1426 	if (ret)
1427 		return ret;
1428 
1429 	rtw_sec_enable_sec_engine(rtwdev);
1430 
1431 	rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1432 	rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1433 
1434 	/* rcr reset after powered on */
1435 	rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1436 
1437 	ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1438 				     RTW_WATCH_DOG_DELAY_TIME);
1439 
1440 	set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1441 
1442 	return 0;
1443 }
1444 
1445 static void rtw_power_off(struct rtw_dev *rtwdev)
1446 {
1447 	rtw_hci_stop(rtwdev);
1448 	rtw_coex_power_off_setting(rtwdev);
1449 	rtw_mac_power_off(rtwdev);
1450 }
1451 
1452 void rtw_core_stop(struct rtw_dev *rtwdev)
1453 {
1454 	struct rtw_coex *coex = &rtwdev->coex;
1455 
1456 	clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1457 	clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1458 
1459 	mutex_unlock(&rtwdev->mutex);
1460 
1461 	cancel_work_sync(&rtwdev->c2h_work);
1462 	cancel_work_sync(&rtwdev->update_beacon_work);
1463 	cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1464 	cancel_delayed_work_sync(&coex->bt_relink_work);
1465 	cancel_delayed_work_sync(&coex->bt_reenable_work);
1466 	cancel_delayed_work_sync(&coex->defreeze_work);
1467 	cancel_delayed_work_sync(&coex->wl_remain_work);
1468 	cancel_delayed_work_sync(&coex->bt_remain_work);
1469 	cancel_delayed_work_sync(&coex->wl_connecting_work);
1470 	cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1471 	cancel_delayed_work_sync(&coex->wl_ccklock_work);
1472 
1473 	mutex_lock(&rtwdev->mutex);
1474 
1475 	rtw_power_off(rtwdev);
1476 }
1477 
1478 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1479 			    struct ieee80211_sta_ht_cap *ht_cap)
1480 {
1481 	struct rtw_efuse *efuse = &rtwdev->efuse;
1482 	struct rtw_chip_info *chip = rtwdev->chip;
1483 
1484 	ht_cap->ht_supported = true;
1485 	ht_cap->cap = 0;
1486 	ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1487 			IEEE80211_HT_CAP_MAX_AMSDU |
1488 			(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1489 
1490 	if (rtw_chip_has_rx_ldpc(rtwdev))
1491 		ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1492 	if (rtw_chip_has_tx_stbc(rtwdev))
1493 		ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1494 
1495 	if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1496 		ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1497 				IEEE80211_HT_CAP_DSSSCCK40 |
1498 				IEEE80211_HT_CAP_SGI_40;
1499 	ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1500 	ht_cap->ampdu_density = chip->ampdu_density;
1501 	ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1502 	if (efuse->hw_cap.nss > 1) {
1503 		ht_cap->mcs.rx_mask[0] = 0xFF;
1504 		ht_cap->mcs.rx_mask[1] = 0xFF;
1505 		ht_cap->mcs.rx_mask[4] = 0x01;
1506 		ht_cap->mcs.rx_highest = cpu_to_le16(300);
1507 	} else {
1508 		ht_cap->mcs.rx_mask[0] = 0xFF;
1509 		ht_cap->mcs.rx_mask[1] = 0x00;
1510 		ht_cap->mcs.rx_mask[4] = 0x01;
1511 		ht_cap->mcs.rx_highest = cpu_to_le16(150);
1512 	}
1513 }
1514 
1515 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1516 			     struct ieee80211_sta_vht_cap *vht_cap)
1517 {
1518 	struct rtw_efuse *efuse = &rtwdev->efuse;
1519 	u16 mcs_map;
1520 	__le16 highest;
1521 
1522 	if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1523 	    efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1524 		return;
1525 
1526 	vht_cap->vht_supported = true;
1527 	vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1528 		       IEEE80211_VHT_CAP_SHORT_GI_80 |
1529 		       IEEE80211_VHT_CAP_RXSTBC_1 |
1530 		       IEEE80211_VHT_CAP_HTC_VHT |
1531 		       IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1532 		       0;
1533 	if (rtwdev->hal.rf_path_num > 1)
1534 		vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1535 	vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1536 			IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1537 	vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1538 			IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1539 
1540 	if (rtw_chip_has_rx_ldpc(rtwdev))
1541 		vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1542 
1543 	mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
1544 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
1545 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
1546 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
1547 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
1548 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
1549 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
1550 	if (efuse->hw_cap.nss > 1) {
1551 		highest = cpu_to_le16(780);
1552 		mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
1553 	} else {
1554 		highest = cpu_to_le16(390);
1555 		mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
1556 	}
1557 
1558 	vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1559 	vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1560 	vht_cap->vht_mcs.rx_highest = highest;
1561 	vht_cap->vht_mcs.tx_highest = highest;
1562 }
1563 
1564 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1565 				   struct rtw_chip_info *chip)
1566 {
1567 	struct rtw_dev *rtwdev = hw->priv;
1568 	struct ieee80211_supported_band *sband;
1569 
1570 	if (chip->band & RTW_BAND_2G) {
1571 		sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1572 		if (!sband)
1573 			goto err_out;
1574 		if (chip->ht_supported)
1575 			rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1576 		hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1577 	}
1578 
1579 	if (chip->band & RTW_BAND_5G) {
1580 		sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1581 		if (!sband)
1582 			goto err_out;
1583 		if (chip->ht_supported)
1584 			rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1585 		if (chip->vht_supported)
1586 			rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1587 		hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1588 	}
1589 
1590 	return;
1591 
1592 err_out:
1593 	rtw_err(rtwdev, "failed to set supported band\n");
1594 }
1595 
1596 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1597 				     struct rtw_chip_info *chip)
1598 {
1599 	kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1600 	kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1601 }
1602 
1603 static void rtw_vif_smps_iter(void *data, u8 *mac,
1604 			      struct ieee80211_vif *vif)
1605 {
1606 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1607 
1608 	if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc)
1609 		return;
1610 
1611 	if (rtwdev->hal.txrx_1ss)
1612 		ieee80211_request_smps(vif, IEEE80211_SMPS_STATIC);
1613 	else
1614 		ieee80211_request_smps(vif, IEEE80211_SMPS_OFF);
1615 }
1616 
1617 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1618 {
1619 	struct rtw_chip_info *chip = rtwdev->chip;
1620 	struct rtw_hal *hal = &rtwdev->hal;
1621 
1622 	if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1623 		return;
1624 
1625 	rtwdev->hal.txrx_1ss = txrx_1ss;
1626 	if (txrx_1ss)
1627 		chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1628 	else
1629 		chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1630 					    hal->antenna_rx, false);
1631 	rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1632 }
1633 
1634 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1635 				      struct rtw_fw_state *fw)
1636 {
1637 	u32 feature;
1638 	const struct rtw_fw_hdr *fw_hdr =
1639 				(const struct rtw_fw_hdr *)fw->firmware->data;
1640 
1641 	feature = le32_to_cpu(fw_hdr->feature);
1642 	fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1643 }
1644 
1645 static void __update_firmware_info(struct rtw_dev *rtwdev,
1646 				   struct rtw_fw_state *fw)
1647 {
1648 	const struct rtw_fw_hdr *fw_hdr =
1649 				(const struct rtw_fw_hdr *)fw->firmware->data;
1650 
1651 	fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1652 	fw->version = le16_to_cpu(fw_hdr->version);
1653 	fw->sub_version = fw_hdr->subversion;
1654 	fw->sub_index = fw_hdr->subindex;
1655 
1656 	__update_firmware_feature(rtwdev, fw);
1657 }
1658 
1659 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1660 					  struct rtw_fw_state *fw)
1661 {
1662 	struct rtw_fw_hdr_legacy *legacy =
1663 #if defined(__linux__)
1664 				(struct rtw_fw_hdr_legacy *)fw->firmware->data;
1665 #elif defined(__FreeBSD__)
1666 	    __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data);
1667 #endif
1668 
1669 	fw->h2c_version = 0;
1670 	fw->version = le16_to_cpu(legacy->version);
1671 	fw->sub_version = legacy->subversion1;
1672 	fw->sub_index = legacy->subversion2;
1673 }
1674 
1675 static void update_firmware_info(struct rtw_dev *rtwdev,
1676 				 struct rtw_fw_state *fw)
1677 {
1678 	if (rtw_chip_wcpu_11n(rtwdev))
1679 		__update_firmware_info_legacy(rtwdev, fw);
1680 	else
1681 		__update_firmware_info(rtwdev, fw);
1682 }
1683 
1684 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1685 {
1686 	struct rtw_fw_state *fw = context;
1687 	struct rtw_dev *rtwdev = fw->rtwdev;
1688 
1689 	if (!firmware || !firmware->data) {
1690 		rtw_err(rtwdev, "failed to request firmware\n");
1691 		complete_all(&fw->completion);
1692 		return;
1693 	}
1694 
1695 	fw->firmware = firmware;
1696 	update_firmware_info(rtwdev, fw);
1697 	complete_all(&fw->completion);
1698 
1699 	rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n",
1700 		 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1701 }
1702 
1703 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1704 {
1705 	const char *fw_name;
1706 	struct rtw_fw_state *fw;
1707 	int ret;
1708 
1709 	switch (type) {
1710 	case RTW_WOWLAN_FW:
1711 		fw = &rtwdev->wow_fw;
1712 		fw_name = rtwdev->chip->wow_fw_name;
1713 		break;
1714 
1715 	case RTW_NORMAL_FW:
1716 		fw = &rtwdev->fw;
1717 		fw_name = rtwdev->chip->fw_name;
1718 		break;
1719 
1720 	default:
1721 		rtw_warn(rtwdev, "unsupported firmware type\n");
1722 		return -ENOENT;
1723 	}
1724 
1725 	fw->rtwdev = rtwdev;
1726 	init_completion(&fw->completion);
1727 
1728 	ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1729 				      GFP_KERNEL, fw, rtw_load_firmware_cb);
1730 	if (ret) {
1731 		rtw_err(rtwdev, "failed to async firmware request\n");
1732 		return ret;
1733 	}
1734 
1735 	return 0;
1736 }
1737 
1738 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1739 {
1740 	struct rtw_chip_info *chip = rtwdev->chip;
1741 	struct rtw_hal *hal = &rtwdev->hal;
1742 	struct rtw_efuse *efuse = &rtwdev->efuse;
1743 
1744 	switch (rtw_hci_type(rtwdev)) {
1745 	case RTW_HCI_TYPE_PCIE:
1746 		rtwdev->hci.rpwm_addr = 0x03d9;
1747 		rtwdev->hci.cpwm_addr = 0x03da;
1748 		break;
1749 	default:
1750 		rtw_err(rtwdev, "unsupported hci type\n");
1751 		return -EINVAL;
1752 	}
1753 
1754 	hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1755 	hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1756 	hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1757 	if (hal->chip_version & BIT_RF_TYPE_ID) {
1758 		hal->rf_type = RF_2T2R;
1759 		hal->rf_path_num = 2;
1760 		hal->antenna_tx = BB_PATH_AB;
1761 		hal->antenna_rx = BB_PATH_AB;
1762 	} else {
1763 		hal->rf_type = RF_1T1R;
1764 		hal->rf_path_num = 1;
1765 		hal->antenna_tx = BB_PATH_A;
1766 		hal->antenna_rx = BB_PATH_A;
1767 	}
1768 	hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1769 			  hal->rf_path_num;
1770 
1771 	efuse->physical_size = chip->phy_efuse_size;
1772 	efuse->logical_size = chip->log_efuse_size;
1773 	efuse->protect_size = chip->ptct_efuse_size;
1774 
1775 	/* default use ack */
1776 	rtwdev->hal.rcr |= BIT_VHT_DACK;
1777 
1778 	hal->bfee_sts_cap = 3;
1779 
1780 	return 0;
1781 }
1782 
1783 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1784 {
1785 	struct rtw_fw_state *fw = &rtwdev->fw;
1786 	int ret;
1787 
1788 	ret = rtw_hci_setup(rtwdev);
1789 	if (ret) {
1790 		rtw_err(rtwdev, "failed to setup hci\n");
1791 		goto err;
1792 	}
1793 
1794 	ret = rtw_mac_power_on(rtwdev);
1795 	if (ret) {
1796 		rtw_err(rtwdev, "failed to power on mac\n");
1797 		goto err;
1798 	}
1799 
1800 	rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1801 
1802 	wait_for_completion(&fw->completion);
1803 	if (!fw->firmware) {
1804 		ret = -EINVAL;
1805 		rtw_err(rtwdev, "failed to load firmware\n");
1806 		goto err;
1807 	}
1808 
1809 	ret = rtw_download_firmware(rtwdev, fw);
1810 	if (ret) {
1811 		rtw_err(rtwdev, "failed to download firmware\n");
1812 		goto err_off;
1813 	}
1814 
1815 	return 0;
1816 
1817 err_off:
1818 	rtw_mac_power_off(rtwdev);
1819 
1820 err:
1821 	return ret;
1822 }
1823 
1824 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1825 {
1826 	struct rtw_efuse *efuse = &rtwdev->efuse;
1827 	u8 hw_feature[HW_FEATURE_LEN];
1828 	u8 id;
1829 	u8 bw;
1830 	int i;
1831 
1832 	id = rtw_read8(rtwdev, REG_C2HEVT);
1833 	if (id != C2H_HW_FEATURE_REPORT) {
1834 		rtw_err(rtwdev, "failed to read hw feature report\n");
1835 		return -EBUSY;
1836 	}
1837 
1838 	for (i = 0; i < HW_FEATURE_LEN; i++)
1839 		hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1840 
1841 	rtw_write8(rtwdev, REG_C2HEVT, 0);
1842 
1843 	bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1844 	efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1845 	efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1846 	efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1847 	efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1848 	efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1849 
1850 	rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1851 
1852 	if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1853 	    efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1854 		efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1855 
1856 	rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1857 		"hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1858 		efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1859 		efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1860 
1861 	return 0;
1862 }
1863 
1864 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1865 {
1866 	rtw_hci_stop(rtwdev);
1867 	rtw_mac_power_off(rtwdev);
1868 }
1869 
1870 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1871 {
1872 	struct rtw_efuse *efuse = &rtwdev->efuse;
1873 	int ret;
1874 
1875 	mutex_lock(&rtwdev->mutex);
1876 
1877 	/* power on mac to read efuse */
1878 	ret = rtw_chip_efuse_enable(rtwdev);
1879 	if (ret)
1880 		goto out_unlock;
1881 
1882 	ret = rtw_parse_efuse_map(rtwdev);
1883 	if (ret)
1884 		goto out_disable;
1885 
1886 	ret = rtw_dump_hw_feature(rtwdev);
1887 	if (ret)
1888 		goto out_disable;
1889 
1890 	ret = rtw_check_supported_rfe(rtwdev);
1891 	if (ret)
1892 		goto out_disable;
1893 
1894 	if (efuse->crystal_cap == 0xff)
1895 		efuse->crystal_cap = 0;
1896 	if (efuse->pa_type_2g == 0xff)
1897 		efuse->pa_type_2g = 0;
1898 	if (efuse->pa_type_5g == 0xff)
1899 		efuse->pa_type_5g = 0;
1900 	if (efuse->lna_type_2g == 0xff)
1901 		efuse->lna_type_2g = 0;
1902 	if (efuse->lna_type_5g == 0xff)
1903 		efuse->lna_type_5g = 0;
1904 	if (efuse->channel_plan == 0xff)
1905 		efuse->channel_plan = 0x7f;
1906 	if (efuse->rf_board_option == 0xff)
1907 		efuse->rf_board_option = 0;
1908 	if (efuse->bt_setting & BIT(0))
1909 		efuse->share_ant = true;
1910 	if (efuse->regd == 0xff)
1911 		efuse->regd = 0;
1912 	if (efuse->tx_bb_swing_setting_2g == 0xff)
1913 		efuse->tx_bb_swing_setting_2g = 0;
1914 	if (efuse->tx_bb_swing_setting_5g == 0xff)
1915 		efuse->tx_bb_swing_setting_5g = 0;
1916 
1917 	efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1918 	efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1919 	efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1920 	efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1921 	efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1922 
1923 out_disable:
1924 	rtw_chip_efuse_disable(rtwdev);
1925 
1926 out_unlock:
1927 	mutex_unlock(&rtwdev->mutex);
1928 	return ret;
1929 }
1930 
1931 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1932 {
1933 	struct rtw_hal *hal = &rtwdev->hal;
1934 	const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1935 
1936 	if (!rfe_def)
1937 		return -ENODEV;
1938 
1939 	rtw_phy_setup_phy_cond(rtwdev, 0);
1940 
1941 	rtw_phy_init_tx_power(rtwdev);
1942 	if (rfe_def->agc_btg_tbl)
1943 		rtw_load_table(rtwdev, rfe_def->agc_btg_tbl);
1944 	rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1945 	rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1946 	rtw_phy_tx_power_by_rate_config(hal);
1947 	rtw_phy_tx_power_limit_config(hal);
1948 
1949 	return 0;
1950 }
1951 
1952 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1953 {
1954 	int ret;
1955 
1956 	ret = rtw_chip_parameter_setup(rtwdev);
1957 	if (ret) {
1958 		rtw_err(rtwdev, "failed to setup chip parameters\n");
1959 		goto err_out;
1960 	}
1961 
1962 	ret = rtw_chip_efuse_info_setup(rtwdev);
1963 	if (ret) {
1964 		rtw_err(rtwdev, "failed to setup chip efuse info\n");
1965 		goto err_out;
1966 	}
1967 
1968 	ret = rtw_chip_board_info_setup(rtwdev);
1969 	if (ret) {
1970 		rtw_err(rtwdev, "failed to setup chip board info\n");
1971 		goto err_out;
1972 	}
1973 
1974 	return 0;
1975 
1976 err_out:
1977 	return ret;
1978 }
1979 EXPORT_SYMBOL(rtw_chip_info_setup);
1980 
1981 static void rtw_stats_init(struct rtw_dev *rtwdev)
1982 {
1983 	struct rtw_traffic_stats *stats = &rtwdev->stats;
1984 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1985 	int i;
1986 
1987 	ewma_tp_init(&stats->tx_ewma_tp);
1988 	ewma_tp_init(&stats->rx_ewma_tp);
1989 
1990 	for (i = 0; i < RTW_EVM_NUM; i++)
1991 		ewma_evm_init(&dm_info->ewma_evm[i]);
1992 	for (i = 0; i < RTW_SNR_NUM; i++)
1993 		ewma_snr_init(&dm_info->ewma_snr[i]);
1994 }
1995 
1996 int rtw_core_init(struct rtw_dev *rtwdev)
1997 {
1998 	struct rtw_chip_info *chip = rtwdev->chip;
1999 	struct rtw_coex *coex = &rtwdev->coex;
2000 	int ret;
2001 
2002 	INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2003 	INIT_LIST_HEAD(&rtwdev->txqs);
2004 
2005 	timer_setup(&rtwdev->tx_report.purge_timer,
2006 		    rtw_tx_report_purge_timer, 0);
2007 	rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2008 
2009 	INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2010 	INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2011 	INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2012 	INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2013 	INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2014 	INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2015 	INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2016 	INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2017 			  rtw_coex_bt_multi_link_remain_work);
2018 	INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2019 	INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2020 	INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2021 	INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2022 	INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2023 	INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2024 	INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2025 	skb_queue_head_init(&rtwdev->c2h_queue);
2026 	skb_queue_head_init(&rtwdev->coex.queue);
2027 	skb_queue_head_init(&rtwdev->tx_report.queue);
2028 
2029 	spin_lock_init(&rtwdev->rf_lock);
2030 	spin_lock_init(&rtwdev->h2c.lock);
2031 	spin_lock_init(&rtwdev->txq_lock);
2032 	spin_lock_init(&rtwdev->tx_report.q_lock);
2033 
2034 	mutex_init(&rtwdev->mutex);
2035 	mutex_init(&rtwdev->coex.mutex);
2036 	mutex_init(&rtwdev->hal.tx_power_mutex);
2037 
2038 	init_waitqueue_head(&rtwdev->coex.wait);
2039 	init_completion(&rtwdev->lps_leave_check);
2040 	init_completion(&rtwdev->fw_scan_density);
2041 
2042 	rtwdev->sec.total_cam_num = 32;
2043 	rtwdev->hal.current_channel = 1;
2044 	rtwdev->dm_info.fix_rate = U8_MAX;
2045 	set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
2046 
2047 	rtw_stats_init(rtwdev);
2048 
2049 	/* default rx filter setting */
2050 	rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2051 			  BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2052 			  BIT_AB | BIT_AM | BIT_APM;
2053 
2054 	ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2055 	if (ret) {
2056 		rtw_warn(rtwdev, "no firmware loaded\n");
2057 		return ret;
2058 	}
2059 
2060 	if (chip->wow_fw_name) {
2061 		ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2062 		if (ret) {
2063 			rtw_warn(rtwdev, "no wow firmware loaded\n");
2064 			wait_for_completion(&rtwdev->fw.completion);
2065 			if (rtwdev->fw.firmware)
2066 				release_firmware(rtwdev->fw.firmware);
2067 			return ret;
2068 		}
2069 	}
2070 
2071 #if defined(__FreeBSD__)
2072 	rtw_wait_firmware_completion(rtwdev);
2073 #endif
2074 
2075 	return 0;
2076 }
2077 EXPORT_SYMBOL(rtw_core_init);
2078 
2079 void rtw_core_deinit(struct rtw_dev *rtwdev)
2080 {
2081 	struct rtw_fw_state *fw = &rtwdev->fw;
2082 	struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2083 	struct rtw_rsvd_page *rsvd_pkt, *tmp;
2084 	unsigned long flags;
2085 
2086 	rtw_wait_firmware_completion(rtwdev);
2087 
2088 	if (fw->firmware)
2089 		release_firmware(fw->firmware);
2090 
2091 	if (wow_fw->firmware)
2092 		release_firmware(wow_fw->firmware);
2093 
2094 	destroy_workqueue(rtwdev->tx_wq);
2095 	spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2096 	skb_queue_purge(&rtwdev->tx_report.queue);
2097 	skb_queue_purge(&rtwdev->coex.queue);
2098 	spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2099 
2100 	list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2101 				 build_list) {
2102 		list_del(&rsvd_pkt->build_list);
2103 		kfree(rsvd_pkt);
2104 	}
2105 
2106 	mutex_destroy(&rtwdev->mutex);
2107 	mutex_destroy(&rtwdev->coex.mutex);
2108 	mutex_destroy(&rtwdev->hal.tx_power_mutex);
2109 }
2110 EXPORT_SYMBOL(rtw_core_deinit);
2111 
2112 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2113 {
2114 	struct rtw_hal *hal = &rtwdev->hal;
2115 	int max_tx_headroom = 0;
2116 	int ret;
2117 
2118 	/* TODO: USB & SDIO may need extra room? */
2119 	max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2120 
2121 	hw->extra_tx_headroom = max_tx_headroom;
2122 	hw->queues = IEEE80211_NUM_ACS;
2123 	hw->txq_data_size = sizeof(struct rtw_txq);
2124 	hw->sta_data_size = sizeof(struct rtw_sta_info);
2125 	hw->vif_data_size = sizeof(struct rtw_vif);
2126 
2127 	ieee80211_hw_set(hw, SIGNAL_DBM);
2128 	ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2129 	ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2130 	ieee80211_hw_set(hw, MFP_CAPABLE);
2131 	ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2132 	ieee80211_hw_set(hw, SUPPORTS_PS);
2133 	ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2134 	ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2135 	ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2136 	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2137 	ieee80211_hw_set(hw, TX_AMSDU);
2138 	ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2139 
2140 	hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2141 				     BIT(NL80211_IFTYPE_AP) |
2142 				     BIT(NL80211_IFTYPE_ADHOC) |
2143 				     BIT(NL80211_IFTYPE_MESH_POINT);
2144 	hw->wiphy->available_antennas_tx = hal->antenna_tx;
2145 	hw->wiphy->available_antennas_rx = hal->antenna_rx;
2146 
2147 	hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2148 			    WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2149 
2150 	hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2151 	hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2152 	hw->wiphy->max_scan_ie_len = RTW_SCAN_MAX_IE_LEN;
2153 
2154 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2155 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2156 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2157 
2158 #ifdef CONFIG_PM
2159 	hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2160 	hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2161 #endif
2162 	rtw_set_supported_band(hw, rtwdev->chip);
2163 	SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2164 
2165 	hw->wiphy->sar_capa = &rtw_sar_capa;
2166 
2167 	ret = rtw_regd_init(rtwdev);
2168 	if (ret) {
2169 		rtw_err(rtwdev, "failed to init regd\n");
2170 		return ret;
2171 	}
2172 
2173 	ret = ieee80211_register_hw(hw);
2174 	if (ret) {
2175 		rtw_err(rtwdev, "failed to register hw\n");
2176 		return ret;
2177 	}
2178 
2179 	ret = rtw_regd_hint(rtwdev);
2180 	if (ret) {
2181 		rtw_err(rtwdev, "failed to hint regd\n");
2182 		return ret;
2183 	}
2184 
2185 	rtw_debugfs_init(rtwdev);
2186 
2187 	rtwdev->bf_info.bfer_mu_cnt = 0;
2188 	rtwdev->bf_info.bfer_su_cnt = 0;
2189 
2190 	return 0;
2191 }
2192 EXPORT_SYMBOL(rtw_register_hw);
2193 
2194 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2195 {
2196 	struct rtw_chip_info *chip = rtwdev->chip;
2197 
2198 	ieee80211_unregister_hw(hw);
2199 	rtw_unset_supported_band(hw, chip);
2200 }
2201 EXPORT_SYMBOL(rtw_unregister_hw);
2202 
2203 MODULE_AUTHOR("Realtek Corporation");
2204 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2205 MODULE_LICENSE("Dual BSD/GPL");
2206 #if defined(__FreeBSD__)
2207 MODULE_VERSION(rtw88_core, 1);
2208 MODULE_DEPEND(rtw88_core, linuxkpi, 1, 1, 1);
2209 MODULE_DEPEND(rtw88_core, linuxkpi_wlan, 1, 1, 1);
2210 #ifdef CONFIG_RTW88_DEBUGFS
2211 MODULE_DEPEND(rtw88_core, debugfs, 1, 1, 1);
2212 #endif
2213 #endif
2214