1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #if defined(__FreeBSD__) 6 #define LINUXKPI_PARAM_PREFIX rtw88_ 7 #endif 8 9 #include <linux/devcoredump.h> 10 11 #include "main.h" 12 #include "regd.h" 13 #include "fw.h" 14 #include "ps.h" 15 #include "sec.h" 16 #include "mac.h" 17 #include "coex.h" 18 #include "phy.h" 19 #include "reg.h" 20 #include "efuse.h" 21 #include "tx.h" 22 #include "debug.h" 23 #include "bf.h" 24 #include "sar.h" 25 #include "sdio.h" 26 27 bool rtw_disable_lps_deep_mode; 28 EXPORT_SYMBOL(rtw_disable_lps_deep_mode); 29 bool rtw_bf_support = true; 30 unsigned int rtw_debug_mask; 31 EXPORT_SYMBOL(rtw_debug_mask); 32 /* EDCCA is enabled during normal behavior. For debugging purpose in 33 * a noisy environment, it can be disabled via edcca debugfs. Because 34 * all rtw88 devices will probably be affected if environment is noisy, 35 * rtw_edcca_enabled is just declared by driver instead of by device. 36 * So, turning it off will take effect for all rtw88 devices before 37 * there is a tough reason to maintain rtw_edcca_enabled by device. 38 */ 39 bool rtw_edcca_enabled = true; 40 41 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644); 42 module_param_named(support_bf, rtw_bf_support, bool, 0644); 43 module_param_named(debug_mask, rtw_debug_mask, uint, 0644); 44 45 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS"); 46 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); 47 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 48 49 static struct ieee80211_channel rtw_channeltable_2g[] = { 50 {.center_freq = 2412, .hw_value = 1,}, 51 {.center_freq = 2417, .hw_value = 2,}, 52 {.center_freq = 2422, .hw_value = 3,}, 53 {.center_freq = 2427, .hw_value = 4,}, 54 {.center_freq = 2432, .hw_value = 5,}, 55 {.center_freq = 2437, .hw_value = 6,}, 56 {.center_freq = 2442, .hw_value = 7,}, 57 {.center_freq = 2447, .hw_value = 8,}, 58 {.center_freq = 2452, .hw_value = 9,}, 59 {.center_freq = 2457, .hw_value = 10,}, 60 {.center_freq = 2462, .hw_value = 11,}, 61 {.center_freq = 2467, .hw_value = 12,}, 62 {.center_freq = 2472, .hw_value = 13,}, 63 {.center_freq = 2484, .hw_value = 14,}, 64 }; 65 66 static struct ieee80211_channel rtw_channeltable_5g[] = { 67 {.center_freq = 5180, .hw_value = 36,}, 68 {.center_freq = 5200, .hw_value = 40,}, 69 {.center_freq = 5220, .hw_value = 44,}, 70 {.center_freq = 5240, .hw_value = 48,}, 71 {.center_freq = 5260, .hw_value = 52,}, 72 {.center_freq = 5280, .hw_value = 56,}, 73 {.center_freq = 5300, .hw_value = 60,}, 74 {.center_freq = 5320, .hw_value = 64,}, 75 {.center_freq = 5500, .hw_value = 100,}, 76 {.center_freq = 5520, .hw_value = 104,}, 77 {.center_freq = 5540, .hw_value = 108,}, 78 {.center_freq = 5560, .hw_value = 112,}, 79 {.center_freq = 5580, .hw_value = 116,}, 80 {.center_freq = 5600, .hw_value = 120,}, 81 {.center_freq = 5620, .hw_value = 124,}, 82 {.center_freq = 5640, .hw_value = 128,}, 83 {.center_freq = 5660, .hw_value = 132,}, 84 {.center_freq = 5680, .hw_value = 136,}, 85 {.center_freq = 5700, .hw_value = 140,}, 86 {.center_freq = 5720, .hw_value = 144,}, 87 {.center_freq = 5745, .hw_value = 149,}, 88 {.center_freq = 5765, .hw_value = 153,}, 89 {.center_freq = 5785, .hw_value = 157,}, 90 {.center_freq = 5805, .hw_value = 161,}, 91 {.center_freq = 5825, .hw_value = 165, 92 .flags = IEEE80211_CHAN_NO_HT40MINUS}, 93 }; 94 95 static struct ieee80211_rate rtw_ratetable[] = { 96 {.bitrate = 10, .hw_value = 0x00,}, 97 {.bitrate = 20, .hw_value = 0x01,}, 98 {.bitrate = 55, .hw_value = 0x02,}, 99 {.bitrate = 110, .hw_value = 0x03,}, 100 {.bitrate = 60, .hw_value = 0x04,}, 101 {.bitrate = 90, .hw_value = 0x05,}, 102 {.bitrate = 120, .hw_value = 0x06,}, 103 {.bitrate = 180, .hw_value = 0x07,}, 104 {.bitrate = 240, .hw_value = 0x08,}, 105 {.bitrate = 360, .hw_value = 0x09,}, 106 {.bitrate = 480, .hw_value = 0x0a,}, 107 {.bitrate = 540, .hw_value = 0x0b,}, 108 }; 109 110 static const struct ieee80211_iface_limit rtw_iface_limits[] = { 111 { 112 .max = 1, 113 .types = BIT(NL80211_IFTYPE_STATION), 114 }, 115 { 116 .max = 1, 117 .types = BIT(NL80211_IFTYPE_AP), 118 } 119 }; 120 121 static const struct ieee80211_iface_combination rtw_iface_combs[] = { 122 { 123 .limits = rtw_iface_limits, 124 .n_limits = ARRAY_SIZE(rtw_iface_limits), 125 .max_interfaces = 2, 126 .num_different_channels = 1, 127 } 128 }; 129 130 u16 rtw_desc_to_bitrate(u8 desc_rate) 131 { 132 struct ieee80211_rate rate; 133 134 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n")) 135 return 0; 136 137 rate = rtw_ratetable[desc_rate]; 138 139 return rate.bitrate; 140 } 141 142 static struct ieee80211_supported_band rtw_band_2ghz = { 143 .band = NL80211_BAND_2GHZ, 144 145 .channels = rtw_channeltable_2g, 146 .n_channels = ARRAY_SIZE(rtw_channeltable_2g), 147 148 .bitrates = rtw_ratetable, 149 .n_bitrates = ARRAY_SIZE(rtw_ratetable), 150 151 .ht_cap = {0}, 152 .vht_cap = {0}, 153 }; 154 155 static struct ieee80211_supported_band rtw_band_5ghz = { 156 .band = NL80211_BAND_5GHZ, 157 158 .channels = rtw_channeltable_5g, 159 .n_channels = ARRAY_SIZE(rtw_channeltable_5g), 160 161 /* 5G has no CCK rates */ 162 .bitrates = rtw_ratetable + 4, 163 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4, 164 165 .ht_cap = {0}, 166 .vht_cap = {0}, 167 }; 168 169 struct rtw_watch_dog_iter_data { 170 struct rtw_dev *rtwdev; 171 struct rtw_vif *rtwvif; 172 }; 173 174 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) 175 { 176 struct rtw_bf_info *bf_info = &rtwdev->bf_info; 177 u8 fix_rate_enable = 0; 178 u8 new_csi_rate_idx; 179 180 if (rtwvif->bfee.role != RTW_BFEE_SU && 181 rtwvif->bfee.role != RTW_BFEE_MU) 182 return; 183 184 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi, 185 bf_info->cur_csi_rpt_rate, 186 fix_rate_enable, &new_csi_rate_idx); 187 188 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate) 189 bf_info->cur_csi_rpt_rate = new_csi_rate_idx; 190 } 191 192 static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif) 193 { 194 struct rtw_watch_dog_iter_data *iter_data = data; 195 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 196 197 if (vif->type == NL80211_IFTYPE_STATION) 198 if (vif->cfg.assoc) 199 iter_data->rtwvif = rtwvif; 200 201 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); 202 203 rtwvif->stats.tx_unicast = 0; 204 rtwvif->stats.rx_unicast = 0; 205 rtwvif->stats.tx_cnt = 0; 206 rtwvif->stats.rx_cnt = 0; 207 } 208 209 /* process TX/RX statistics periodically for hardware, 210 * the information helps hardware to enhance performance 211 */ 212 static void rtw_watch_dog_work(struct work_struct *work) 213 { 214 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 215 watch_dog_work.work); 216 struct rtw_traffic_stats *stats = &rtwdev->stats; 217 struct rtw_watch_dog_iter_data data = {}; 218 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 219 bool ps_active; 220 221 mutex_lock(&rtwdev->mutex); 222 223 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags)) 224 goto unlock; 225 226 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 227 RTW_WATCH_DOG_DELAY_TIME); 228 229 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100) 230 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 231 else 232 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); 233 234 rtw_coex_wl_status_check(rtwdev); 235 rtw_coex_query_bt_hid_list(rtwdev); 236 237 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) 238 rtw_coex_wl_status_change_notify(rtwdev, 0); 239 240 if (stats->tx_cnt > RTW_LPS_THRESHOLD || 241 stats->rx_cnt > RTW_LPS_THRESHOLD) 242 ps_active = true; 243 else 244 ps_active = false; 245 246 ewma_tp_add(&stats->tx_ewma_tp, 247 (u32)(stats->tx_unicast >> RTW_TP_SHIFT)); 248 ewma_tp_add(&stats->rx_ewma_tp, 249 (u32)(stats->rx_unicast >> RTW_TP_SHIFT)); 250 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp); 251 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp); 252 253 /* reset tx/rx statictics */ 254 stats->tx_unicast = 0; 255 stats->rx_unicast = 0; 256 stats->tx_cnt = 0; 257 stats->rx_cnt = 0; 258 259 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 260 goto unlock; 261 262 /* make sure BB/RF is working for dynamic mech */ 263 rtw_leave_lps(rtwdev); 264 265 rtw_phy_dynamic_mechanism(rtwdev); 266 267 data.rtwdev = rtwdev; 268 /* rtw_iterate_vifs internally uses an atomic iterator which is needed 269 * to avoid taking local->iflist_mtx mutex 270 */ 271 rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data); 272 273 /* fw supports only one station associated to enter lps, if there are 274 * more than two stations associated to the AP, then we can not enter 275 * lps, because fw does not handle the overlapped beacon interval 276 * 277 * rtw_recalc_lps() iterate vifs and determine if driver can enter 278 * ps by vif->type and vif->cfg.ps, all we need to do here is to 279 * get that vif and check if device is having traffic more than the 280 * threshold. 281 */ 282 if (rtwdev->ps_enabled && data.rtwvif && !ps_active && 283 !rtwdev->beacon_loss && !rtwdev->ap_active) 284 rtw_enter_lps(rtwdev, data.rtwvif->port); 285 286 rtwdev->watch_dog_cnt++; 287 288 unlock: 289 mutex_unlock(&rtwdev->mutex); 290 } 291 292 static void rtw_c2h_work(struct work_struct *work) 293 { 294 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work); 295 struct sk_buff *skb, *tmp; 296 297 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 298 skb_unlink(skb, &rtwdev->c2h_queue); 299 rtw_fw_c2h_cmd_handle(rtwdev, skb); 300 dev_kfree_skb_any(skb); 301 } 302 } 303 304 static void rtw_ips_work(struct work_struct *work) 305 { 306 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work); 307 308 mutex_lock(&rtwdev->mutex); 309 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE) 310 rtw_enter_ips(rtwdev); 311 mutex_unlock(&rtwdev->mutex); 312 } 313 314 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) 315 { 316 unsigned long mac_id; 317 318 mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM); 319 if (mac_id < RTW_MAX_MAC_ID_NUM) 320 set_bit(mac_id, rtwdev->mac_id_map); 321 322 return mac_id; 323 } 324 325 static void rtw_sta_rc_work(struct work_struct *work) 326 { 327 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info, 328 rc_work); 329 struct rtw_dev *rtwdev = si->rtwdev; 330 331 mutex_lock(&rtwdev->mutex); 332 rtw_update_sta_info(rtwdev, si, true); 333 mutex_unlock(&rtwdev->mutex); 334 } 335 336 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 337 struct ieee80211_vif *vif) 338 { 339 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 340 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 341 int i; 342 343 si->mac_id = rtw_acquire_macid(rtwdev); 344 if (si->mac_id >= RTW_MAX_MAC_ID_NUM) 345 return -ENOSPC; 346 347 if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0) 348 rtwvif->mac_id = si->mac_id; 349 si->rtwdev = rtwdev; 350 si->sta = sta; 351 si->vif = vif; 352 si->init_ra_lv = 1; 353 ewma_rssi_init(&si->avg_rssi); 354 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 355 rtw_txq_init(rtwdev, sta->txq[i]); 356 INIT_WORK(&si->rc_work, rtw_sta_rc_work); 357 358 rtw_update_sta_info(rtwdev, si, true); 359 rtw_fw_media_status_report(rtwdev, si->mac_id, true); 360 361 rtwdev->sta_cnt++; 362 rtwdev->beacon_loss = false; 363 #if defined(__linux__) 364 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n", 365 sta->addr, si->mac_id); 366 #elif defined(__FreeBSD__) 367 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D joined with macid %d\n", 368 sta->addr, ":", si->mac_id); 369 #endif 370 371 return 0; 372 } 373 374 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, 375 bool fw_exist) 376 { 377 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 378 int i; 379 380 cancel_work_sync(&si->rc_work); 381 382 rtw_release_macid(rtwdev, si->mac_id); 383 if (fw_exist) 384 rtw_fw_media_status_report(rtwdev, si->mac_id, false); 385 386 for (i = 0; i < ARRAY_SIZE(sta->txq); i++) 387 rtw_txq_cleanup(rtwdev, sta->txq[i]); 388 389 kfree(si->mask); 390 391 rtwdev->sta_cnt--; 392 #if defined(__linux__) 393 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n", 394 sta->addr, si->mac_id); 395 #elif defined(__FreeBSD__) 396 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %6D with macid %d left\n", 397 sta->addr, ":", si->mac_id); 398 #endif 399 } 400 401 struct rtw_fwcd_hdr { 402 u32 item; 403 u32 size; 404 u32 padding1; 405 u32 padding2; 406 } __packed; 407 408 static int rtw_fwcd_prep(struct rtw_dev *rtwdev) 409 { 410 const struct rtw_chip_info *chip = rtwdev->chip; 411 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 412 const struct rtw_fwcd_segs *segs = chip->fwcd_segs; 413 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); 414 u8 i; 415 416 if (segs) { 417 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr); 418 419 for (i = 0; i < segs->num; i++) 420 prep_size += segs->segs[i]; 421 } 422 423 desc->data = vmalloc(prep_size); 424 if (!desc->data) 425 return -ENOMEM; 426 427 desc->size = prep_size; 428 desc->next = desc->data; 429 430 return 0; 431 } 432 433 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size) 434 { 435 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 436 struct rtw_fwcd_hdr *hdr; 437 u8 *next; 438 439 if (!desc->data) { 440 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n"); 441 return NULL; 442 } 443 444 next = desc->next + sizeof(struct rtw_fwcd_hdr); 445 if (next - desc->data + size > desc->size) { 446 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n"); 447 return NULL; 448 } 449 450 hdr = (struct rtw_fwcd_hdr *)(desc->next); 451 hdr->item = item; 452 hdr->size = size; 453 hdr->padding1 = 0x01234567; 454 hdr->padding2 = 0x89abcdef; 455 desc->next = next + size; 456 457 return next; 458 } 459 460 static void rtw_fwcd_dump(struct rtw_dev *rtwdev) 461 { 462 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 463 464 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n"); 465 466 /* Data will be freed after lifetime of device coredump. After calling 467 * dev_coredump, data is supposed to be handled by the device coredump 468 * framework. Note that a new dump will be discarded if a previous one 469 * hasn't been released yet. 470 */ 471 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL); 472 } 473 474 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self) 475 { 476 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; 477 478 if (free_self) { 479 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n"); 480 vfree(desc->data); 481 } 482 483 desc->data = NULL; 484 desc->next = NULL; 485 } 486 487 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) 488 { 489 u32 size = rtwdev->chip->fw_rxff_size; 490 u32 *buf; 491 u8 seq; 492 493 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size); 494 if (!buf) 495 return -ENOMEM; 496 497 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) { 498 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n"); 499 return -EINVAL; 500 } 501 502 if (GET_FW_DUMP_LEN(buf) == 0) { 503 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n"); 504 return -EINVAL; 505 } 506 507 seq = GET_FW_DUMP_SEQ(buf); 508 if (seq > 0) { 509 rtw_dbg(rtwdev, RTW_DBG_FW, 510 "fw crash dump's seq is wrong: %d\n", seq); 511 return -EINVAL; 512 } 513 514 return 0; 515 } 516 517 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, 518 u32 fwcd_item) 519 { 520 u32 rxff = rtwdev->chip->fw_rxff_size; 521 u32 dump_size, done_size = 0; 522 u8 *buf; 523 int ret; 524 525 buf = rtw_fwcd_next(rtwdev, fwcd_item, size); 526 if (!buf) 527 return -ENOMEM; 528 529 while (size) { 530 dump_size = size > rxff ? rxff : size; 531 532 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size, 533 dump_size); 534 if (ret) { 535 rtw_err(rtwdev, 536 "ddma fw 0x%x [+0x%x] to fw fifo fail\n", 537 ocp_src, done_size); 538 return ret; 539 } 540 541 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, 542 dump_size, (u32 *)(buf + done_size)); 543 if (ret) { 544 rtw_err(rtwdev, 545 "dump fw 0x%x [+0x%x] from fw fifo fail\n", 546 ocp_src, done_size); 547 return ret; 548 } 549 550 size -= dump_size; 551 done_size += dump_size; 552 } 553 554 return 0; 555 } 556 EXPORT_SYMBOL(rtw_dump_fw); 557 558 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size) 559 { 560 u8 *buf; 561 u32 i; 562 563 if (addr & 0x3) { 564 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr); 565 return -EINVAL; 566 } 567 568 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size); 569 if (!buf) 570 return -ENOMEM; 571 572 for (i = 0; i < size; i += 4) 573 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i); 574 575 return 0; 576 } 577 EXPORT_SYMBOL(rtw_dump_reg); 578 579 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, 580 struct ieee80211_bss_conf *conf) 581 { 582 struct ieee80211_vif *vif = NULL; 583 584 if (conf) 585 vif = container_of(conf, struct ieee80211_vif, bss_conf); 586 587 if (conf && vif->cfg.assoc) { 588 rtwvif->aid = vif->cfg.aid; 589 rtwvif->net_type = RTW_NET_MGD_LINKED; 590 } else { 591 rtwvif->aid = 0; 592 rtwvif->net_type = RTW_NET_NO_LINK; 593 } 594 } 595 596 static void rtw_reset_key_iter(struct ieee80211_hw *hw, 597 struct ieee80211_vif *vif, 598 struct ieee80211_sta *sta, 599 struct ieee80211_key_conf *key, 600 void *data) 601 { 602 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 603 struct rtw_sec_desc *sec = &rtwdev->sec; 604 605 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx); 606 } 607 608 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta) 609 { 610 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 611 612 if (rtwdev->sta_cnt == 0) { 613 rtw_warn(rtwdev, "sta count before reset should not be 0\n"); 614 return; 615 } 616 rtw_sta_remove(rtwdev, sta, false); 617 } 618 619 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 620 { 621 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 622 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 623 624 rtw_bf_disassoc(rtwdev, vif, NULL); 625 rtw_vif_assoc_changed(rtwvif, NULL); 626 rtw_txq_cleanup(rtwdev, vif->txq); 627 } 628 629 void rtw_fw_recovery(struct rtw_dev *rtwdev) 630 { 631 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)) 632 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work); 633 } 634 635 static void __fw_recovery_work(struct rtw_dev *rtwdev) 636 { 637 int ret = 0; 638 639 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); 640 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); 641 642 ret = rtw_fwcd_prep(rtwdev); 643 if (ret) 644 goto free; 645 ret = rtw_fw_dump_crash_log(rtwdev); 646 if (ret) 647 goto free; 648 ret = rtw_chip_dump_fw_crash(rtwdev); 649 if (ret) 650 goto free; 651 652 rtw_fwcd_dump(rtwdev); 653 free: 654 rtw_fwcd_free(rtwdev, !!ret); 655 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); 656 657 WARN(1, "firmware crash, start reset and recover\n"); 658 659 rcu_read_lock(); 660 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev); 661 rcu_read_unlock(); 662 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); 663 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); 664 bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM); 665 rtw_enter_ips(rtwdev); 666 } 667 668 static void rtw_fw_recovery_work(struct work_struct *work) 669 { 670 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, 671 fw_recovery_work); 672 673 mutex_lock(&rtwdev->mutex); 674 __fw_recovery_work(rtwdev); 675 mutex_unlock(&rtwdev->mutex); 676 677 ieee80211_restart_hw(rtwdev->hw); 678 } 679 680 struct rtw_txq_ba_iter_data { 681 }; 682 683 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta) 684 { 685 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; 686 int ret; 687 u8 tid; 688 689 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 690 while (tid != IEEE80211_NUM_TIDS) { 691 clear_bit(tid, si->tid_ba); 692 ret = ieee80211_start_tx_ba_session(sta, tid, 0); 693 if (ret == -EINVAL) { 694 struct ieee80211_txq *txq; 695 struct rtw_txq *rtwtxq; 696 697 txq = sta->txq[tid]; 698 rtwtxq = (struct rtw_txq *)txq->drv_priv; 699 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags); 700 } 701 702 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS); 703 } 704 } 705 706 static void rtw_txq_ba_work(struct work_struct *work) 707 { 708 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work); 709 struct rtw_txq_ba_iter_data data; 710 711 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); 712 } 713 714 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel) 715 { 716 if (IS_CH_2G_BAND(channel)) 717 pkt_stat->band = NL80211_BAND_2GHZ; 718 else if (IS_CH_5G_BAND(channel)) 719 pkt_stat->band = NL80211_BAND_5GHZ; 720 else 721 return; 722 723 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band); 724 } 725 EXPORT_SYMBOL(rtw_set_rx_freq_band); 726 727 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period) 728 { 729 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE); 730 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1); 731 } 732 733 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, 734 u8 primary_channel, enum rtw_supported_band band, 735 enum rtw_bandwidth bandwidth) 736 { 737 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band); 738 struct rtw_hal *hal = &rtwdev->hal; 739 u8 *cch_by_bw = hal->cch_by_bw; 740 u32 center_freq, primary_freq; 741 enum rtw_sar_bands sar_band; 742 u8 primary_channel_idx; 743 744 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band); 745 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band); 746 747 /* assign the center channel used while 20M bw is selected */ 748 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel; 749 750 /* assign the center channel used while current bw is selected */ 751 cch_by_bw[bandwidth] = center_channel; 752 753 switch (bandwidth) { 754 case RTW_CHANNEL_WIDTH_20: 755 default: 756 primary_channel_idx = RTW_SC_DONT_CARE; 757 break; 758 case RTW_CHANNEL_WIDTH_40: 759 if (primary_freq > center_freq) 760 primary_channel_idx = RTW_SC_20_UPPER; 761 else 762 primary_channel_idx = RTW_SC_20_LOWER; 763 break; 764 case RTW_CHANNEL_WIDTH_80: 765 if (primary_freq > center_freq) { 766 if (primary_freq - center_freq == 10) 767 primary_channel_idx = RTW_SC_20_UPPER; 768 else 769 primary_channel_idx = RTW_SC_20_UPMOST; 770 771 /* assign the center channel used 772 * while 40M bw is selected 773 */ 774 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4; 775 } else { 776 if (center_freq - primary_freq == 10) 777 primary_channel_idx = RTW_SC_20_LOWER; 778 else 779 primary_channel_idx = RTW_SC_20_LOWEST; 780 781 /* assign the center channel used 782 * while 40M bw is selected 783 */ 784 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4; 785 } 786 break; 787 } 788 789 switch (center_channel) { 790 case 1 ... 14: 791 sar_band = RTW_SAR_BAND_0; 792 break; 793 case 36 ... 64: 794 sar_band = RTW_SAR_BAND_1; 795 break; 796 case 100 ... 144: 797 sar_band = RTW_SAR_BAND_3; 798 break; 799 case 149 ... 177: 800 sar_band = RTW_SAR_BAND_4; 801 break; 802 default: 803 WARN(1, "unknown ch(%u) to SAR band\n", center_channel); 804 sar_band = RTW_SAR_BAND_0; 805 break; 806 } 807 808 hal->current_primary_channel_index = primary_channel_idx; 809 hal->current_band_width = bandwidth; 810 hal->primary_channel = primary_channel; 811 hal->current_channel = center_channel; 812 hal->current_band_type = band; 813 hal->sar_band = sar_band; 814 } 815 816 void rtw_get_channel_params(struct cfg80211_chan_def *chandef, 817 struct rtw_channel_params *chan_params) 818 { 819 struct ieee80211_channel *channel = chandef->chan; 820 enum nl80211_chan_width width = chandef->width; 821 u32 primary_freq, center_freq; 822 u8 center_chan; 823 u8 bandwidth = RTW_CHANNEL_WIDTH_20; 824 825 center_chan = channel->hw_value; 826 primary_freq = channel->center_freq; 827 center_freq = chandef->center_freq1; 828 829 switch (width) { 830 case NL80211_CHAN_WIDTH_20_NOHT: 831 case NL80211_CHAN_WIDTH_20: 832 bandwidth = RTW_CHANNEL_WIDTH_20; 833 break; 834 case NL80211_CHAN_WIDTH_40: 835 bandwidth = RTW_CHANNEL_WIDTH_40; 836 if (primary_freq > center_freq) 837 center_chan -= 2; 838 else 839 center_chan += 2; 840 break; 841 case NL80211_CHAN_WIDTH_80: 842 bandwidth = RTW_CHANNEL_WIDTH_80; 843 if (primary_freq > center_freq) { 844 if (primary_freq - center_freq == 10) 845 center_chan -= 2; 846 else 847 center_chan -= 6; 848 } else { 849 if (center_freq - primary_freq == 10) 850 center_chan += 2; 851 else 852 center_chan += 6; 853 } 854 break; 855 default: 856 center_chan = 0; 857 break; 858 } 859 860 chan_params->center_chan = center_chan; 861 chan_params->bandwidth = bandwidth; 862 chan_params->primary_chan = channel->hw_value; 863 } 864 865 void rtw_set_channel(struct rtw_dev *rtwdev) 866 { 867 const struct rtw_chip_info *chip = rtwdev->chip; 868 struct ieee80211_hw *hw = rtwdev->hw; 869 struct rtw_hal *hal = &rtwdev->hal; 870 struct rtw_channel_params ch_param; 871 u8 center_chan, primary_chan, bandwidth, band; 872 873 rtw_get_channel_params(&hw->conf.chandef, &ch_param); 874 if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) 875 return; 876 877 center_chan = ch_param.center_chan; 878 primary_chan = ch_param.primary_chan; 879 bandwidth = ch_param.bandwidth; 880 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; 881 882 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth); 883 884 if (rtwdev->scan_info.op_chan) 885 rtw_store_op_chan(rtwdev, true); 886 887 chip->ops->set_channel(rtwdev, center_chan, bandwidth, 888 hal->current_primary_channel_index); 889 890 if (hal->current_band_type == RTW_BAND_5G) { 891 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); 892 } else { 893 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 894 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G); 895 else 896 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN); 897 } 898 899 rtw_phy_set_tx_power_level(rtwdev, center_chan); 900 901 /* if the channel isn't set for scanning, we will do RF calibration 902 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration 903 * during scanning on each channel takes too long. 904 */ 905 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) 906 rtwdev->need_rfk = true; 907 } 908 909 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev) 910 { 911 const struct rtw_chip_info *chip = rtwdev->chip; 912 913 if (rtwdev->need_rfk) { 914 rtwdev->need_rfk = false; 915 chip->ops->phy_calibration(rtwdev); 916 } 917 } 918 919 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr) 920 { 921 int i; 922 923 for (i = 0; i < ETH_ALEN; i++) 924 rtw_write8(rtwdev, start + i, addr[i]); 925 } 926 927 void rtw_vif_port_config(struct rtw_dev *rtwdev, 928 struct rtw_vif *rtwvif, 929 u32 config) 930 { 931 u32 addr, mask; 932 933 if (config & PORT_SET_MAC_ADDR) { 934 addr = rtwvif->conf->mac_addr.addr; 935 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr); 936 } 937 if (config & PORT_SET_BSSID) { 938 addr = rtwvif->conf->bssid.addr; 939 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid); 940 } 941 if (config & PORT_SET_NET_TYPE) { 942 addr = rtwvif->conf->net_type.addr; 943 mask = rtwvif->conf->net_type.mask; 944 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); 945 } 946 if (config & PORT_SET_AID) { 947 addr = rtwvif->conf->aid.addr; 948 mask = rtwvif->conf->aid.mask; 949 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); 950 } 951 if (config & PORT_SET_BCN_CTRL) { 952 addr = rtwvif->conf->bcn_ctrl.addr; 953 mask = rtwvif->conf->bcn_ctrl.mask; 954 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl); 955 } 956 } 957 958 static u8 hw_bw_cap_to_bitamp(u8 bw_cap) 959 { 960 u8 bw = 0; 961 962 switch (bw_cap) { 963 case EFUSE_HW_CAP_IGNORE: 964 case EFUSE_HW_CAP_SUPP_BW80: 965 bw |= BIT(RTW_CHANNEL_WIDTH_80); 966 fallthrough; 967 case EFUSE_HW_CAP_SUPP_BW40: 968 bw |= BIT(RTW_CHANNEL_WIDTH_40); 969 fallthrough; 970 default: 971 bw |= BIT(RTW_CHANNEL_WIDTH_20); 972 break; 973 } 974 975 return bw; 976 } 977 978 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) 979 { 980 const struct rtw_chip_info *chip = rtwdev->chip; 981 struct rtw_hal *hal = &rtwdev->hal; 982 983 if (hw_ant_num == EFUSE_HW_CAP_IGNORE || 984 hw_ant_num >= hal->rf_path_num) 985 return; 986 987 switch (hw_ant_num) { 988 case 1: 989 hal->rf_type = RF_1T1R; 990 hal->rf_path_num = 1; 991 if (!chip->fix_rf_phy_num) 992 hal->rf_phy_num = hal->rf_path_num; 993 hal->antenna_tx = BB_PATH_A; 994 hal->antenna_rx = BB_PATH_A; 995 break; 996 default: 997 WARN(1, "invalid hw configuration from efuse\n"); 998 break; 999 } 1000 } 1001 1002 static u64 get_vht_ra_mask(struct ieee80211_sta *sta) 1003 { 1004 u64 ra_mask = 0; 1005 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 1006 u8 vht_mcs_cap; 1007 int i, nss; 1008 1009 /* 4SS, every two bits for MCS7/8/9 */ 1010 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) { 1011 vht_mcs_cap = mcs_map & 0x3; 1012 switch (vht_mcs_cap) { 1013 case 2: /* MCS9 */ 1014 ra_mask |= 0x3ffULL << nss; 1015 break; 1016 case 1: /* MCS8 */ 1017 ra_mask |= 0x1ffULL << nss; 1018 break; 1019 case 0: /* MCS7 */ 1020 ra_mask |= 0x0ffULL << nss; 1021 break; 1022 default: 1023 break; 1024 } 1025 } 1026 1027 return ra_mask; 1028 } 1029 1030 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) 1031 { 1032 u8 rate_id = 0; 1033 1034 switch (wireless_set) { 1035 case WIRELESS_CCK: 1036 rate_id = RTW_RATEID_B_20M; 1037 break; 1038 case WIRELESS_OFDM: 1039 rate_id = RTW_RATEID_G; 1040 break; 1041 case WIRELESS_CCK | WIRELESS_OFDM: 1042 rate_id = RTW_RATEID_BG; 1043 break; 1044 case WIRELESS_OFDM | WIRELESS_HT: 1045 if (tx_num == 1) 1046 rate_id = RTW_RATEID_GN_N1SS; 1047 else if (tx_num == 2) 1048 rate_id = RTW_RATEID_GN_N2SS; 1049 else if (tx_num == 3) 1050 rate_id = RTW_RATEID_ARFR5_N_3SS; 1051 break; 1052 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT: 1053 if (bw_mode == RTW_CHANNEL_WIDTH_40) { 1054 if (tx_num == 1) 1055 rate_id = RTW_RATEID_BGN_40M_1SS; 1056 else if (tx_num == 2) 1057 rate_id = RTW_RATEID_BGN_40M_2SS; 1058 else if (tx_num == 3) 1059 rate_id = RTW_RATEID_ARFR5_N_3SS; 1060 else if (tx_num == 4) 1061 rate_id = RTW_RATEID_ARFR7_N_4SS; 1062 } else { 1063 if (tx_num == 1) 1064 rate_id = RTW_RATEID_BGN_20M_1SS; 1065 else if (tx_num == 2) 1066 rate_id = RTW_RATEID_BGN_20M_2SS; 1067 else if (tx_num == 3) 1068 rate_id = RTW_RATEID_ARFR5_N_3SS; 1069 else if (tx_num == 4) 1070 rate_id = RTW_RATEID_ARFR7_N_4SS; 1071 } 1072 break; 1073 case WIRELESS_OFDM | WIRELESS_VHT: 1074 if (tx_num == 1) 1075 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1076 else if (tx_num == 2) 1077 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1078 else if (tx_num == 3) 1079 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1080 else if (tx_num == 4) 1081 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1082 break; 1083 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT: 1084 if (bw_mode >= RTW_CHANNEL_WIDTH_80) { 1085 if (tx_num == 1) 1086 rate_id = RTW_RATEID_ARFR1_AC_1SS; 1087 else if (tx_num == 2) 1088 rate_id = RTW_RATEID_ARFR0_AC_2SS; 1089 else if (tx_num == 3) 1090 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1091 else if (tx_num == 4) 1092 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1093 } else { 1094 if (tx_num == 1) 1095 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS; 1096 else if (tx_num == 2) 1097 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS; 1098 else if (tx_num == 3) 1099 rate_id = RTW_RATEID_ARFR4_AC_3SS; 1100 else if (tx_num == 4) 1101 rate_id = RTW_RATEID_ARFR6_AC_4SS; 1102 } 1103 break; 1104 default: 1105 break; 1106 } 1107 1108 return rate_id; 1109 } 1110 1111 #define RA_MASK_CCK_RATES 0x0000f 1112 #define RA_MASK_OFDM_RATES 0x00ff0 1113 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0) 1114 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8) 1115 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16) 1116 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \ 1117 RA_MASK_HT_RATES_2SS | \ 1118 RA_MASK_HT_RATES_3SS) 1119 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0) 1120 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10) 1121 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20) 1122 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ 1123 RA_MASK_VHT_RATES_2SS | \ 1124 RA_MASK_VHT_RATES_3SS) 1125 #define RA_MASK_CCK_IN_BG 0x00005 1126 #define RA_MASK_CCK_IN_HT 0x00005 1127 #define RA_MASK_CCK_IN_VHT 0x00005 1128 #define RA_MASK_OFDM_IN_VHT 0x00010 1129 #define RA_MASK_OFDM_IN_HT_2G 0x00010 1130 #define RA_MASK_OFDM_IN_HT_5G 0x00030 1131 1132 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set) 1133 { 1134 u8 rssi_level = si->rssi_level; 1135 1136 if (wireless_set == WIRELESS_CCK) 1137 return 0xffffffffffffffffULL; 1138 1139 if (rssi_level == 0) 1140 return 0xffffffffffffffffULL; 1141 else if (rssi_level == 1) 1142 return 0xfffffffffffffff0ULL; 1143 else if (rssi_level == 2) 1144 return 0xffffffffffffefe0ULL; 1145 else if (rssi_level == 3) 1146 return 0xffffffffffffcfc0ULL; 1147 else if (rssi_level == 4) 1148 return 0xffffffffffff8f80ULL; 1149 else 1150 return 0xffffffffffff0f00ULL; 1151 } 1152 1153 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak) 1154 { 1155 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) 1156 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1157 1158 if (ra_mask == 0) 1159 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); 1160 1161 return ra_mask; 1162 } 1163 1164 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1165 u64 ra_mask, bool is_vht_enable) 1166 { 1167 struct rtw_hal *hal = &rtwdev->hal; 1168 const struct cfg80211_bitrate_mask *mask = si->mask; 1169 u64 cfg_mask = GENMASK_ULL(63, 0); 1170 u8 band; 1171 1172 if (!si->use_cfg_mask) 1173 return ra_mask; 1174 1175 band = hal->current_band_type; 1176 if (band == RTW_BAND_2G) { 1177 band = NL80211_BAND_2GHZ; 1178 cfg_mask = mask->control[band].legacy; 1179 } else if (band == RTW_BAND_5G) { 1180 band = NL80211_BAND_5GHZ; 1181 cfg_mask = u64_encode_bits(mask->control[band].legacy, 1182 RA_MASK_OFDM_RATES); 1183 } 1184 1185 if (!is_vht_enable) { 1186 if (ra_mask & RA_MASK_HT_RATES_1SS) 1187 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], 1188 RA_MASK_HT_RATES_1SS); 1189 if (ra_mask & RA_MASK_HT_RATES_2SS) 1190 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], 1191 RA_MASK_HT_RATES_2SS); 1192 } else { 1193 if (ra_mask & RA_MASK_VHT_RATES_1SS) 1194 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], 1195 RA_MASK_VHT_RATES_1SS); 1196 if (ra_mask & RA_MASK_VHT_RATES_2SS) 1197 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], 1198 RA_MASK_VHT_RATES_2SS); 1199 } 1200 1201 ra_mask &= cfg_mask; 1202 1203 return ra_mask; 1204 } 1205 1206 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, 1207 bool reset_ra_mask) 1208 { 1209 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 1210 struct ieee80211_sta *sta = si->sta; 1211 struct rtw_efuse *efuse = &rtwdev->efuse; 1212 struct rtw_hal *hal = &rtwdev->hal; 1213 u8 wireless_set; 1214 u8 bw_mode; 1215 u8 rate_id; 1216 u8 rf_type = RF_1T1R; 1217 u8 stbc_en = 0; 1218 u8 ldpc_en = 0; 1219 u8 tx_num = 1; 1220 u64 ra_mask = 0; 1221 u64 ra_mask_bak = 0; 1222 bool is_vht_enable = false; 1223 bool is_support_sgi = false; 1224 1225 if (sta->deflink.vht_cap.vht_supported) { 1226 is_vht_enable = true; 1227 ra_mask |= get_vht_ra_mask(sta); 1228 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) 1229 stbc_en = VHT_STBC_EN; 1230 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) 1231 ldpc_en = VHT_LDPC_EN; 1232 } else if (sta->deflink.ht_cap.ht_supported) { 1233 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) | 1234 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12); 1235 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1236 stbc_en = HT_STBC_EN; 1237 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) 1238 ldpc_en = HT_LDPC_EN; 1239 } 1240 1241 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) 1242 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; 1243 1244 if (hal->current_band_type == RTW_BAND_5G) { 1245 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; 1246 ra_mask_bak = ra_mask; 1247 if (sta->deflink.vht_cap.vht_supported) { 1248 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; 1249 wireless_set = WIRELESS_OFDM | WIRELESS_VHT; 1250 } else if (sta->deflink.ht_cap.ht_supported) { 1251 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; 1252 wireless_set = WIRELESS_OFDM | WIRELESS_HT; 1253 } else { 1254 wireless_set = WIRELESS_OFDM; 1255 } 1256 dm_info->rrsr_val_init = RRSR_INIT_5G; 1257 } else if (hal->current_band_type == RTW_BAND_2G) { 1258 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; 1259 ra_mask_bak = ra_mask; 1260 if (sta->deflink.vht_cap.vht_supported) { 1261 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | 1262 RA_MASK_OFDM_IN_VHT; 1263 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1264 WIRELESS_HT | WIRELESS_VHT; 1265 } else if (sta->deflink.ht_cap.ht_supported) { 1266 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | 1267 RA_MASK_OFDM_IN_HT_2G; 1268 wireless_set = WIRELESS_CCK | WIRELESS_OFDM | 1269 WIRELESS_HT; 1270 #if defined(__linux__) 1271 } else if (sta->deflink.supp_rates[0] <= 0xf) { 1272 #elif defined(__FreeBSD__) 1273 } else if (sta->deflink.supp_rates[NL80211_BAND_2GHZ] <= 0xf) { 1274 #endif 1275 wireless_set = WIRELESS_CCK; 1276 } else { 1277 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG; 1278 wireless_set = WIRELESS_CCK | WIRELESS_OFDM; 1279 } 1280 dm_info->rrsr_val_init = RRSR_INIT_2G; 1281 } else { 1282 rtw_err(rtwdev, "Unknown band type\n"); 1283 ra_mask_bak = ra_mask; 1284 wireless_set = 0; 1285 } 1286 1287 switch (sta->deflink.bandwidth) { 1288 case IEEE80211_STA_RX_BW_80: 1289 bw_mode = RTW_CHANNEL_WIDTH_80; 1290 is_support_sgi = sta->deflink.vht_cap.vht_supported && 1291 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); 1292 break; 1293 case IEEE80211_STA_RX_BW_40: 1294 bw_mode = RTW_CHANNEL_WIDTH_40; 1295 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1296 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); 1297 break; 1298 default: 1299 bw_mode = RTW_CHANNEL_WIDTH_20; 1300 is_support_sgi = sta->deflink.ht_cap.ht_supported && 1301 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); 1302 break; 1303 } 1304 1305 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) { 1306 tx_num = 2; 1307 rf_type = RF_2T2R; 1308 } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) { 1309 tx_num = 2; 1310 rf_type = RF_2T2R; 1311 } 1312 1313 rate_id = get_rate_id(wireless_set, bw_mode, tx_num); 1314 1315 ra_mask &= rtw_rate_mask_rssi(si, wireless_set); 1316 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak); 1317 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable); 1318 1319 si->bw_mode = bw_mode; 1320 si->stbc_en = stbc_en; 1321 si->ldpc_en = ldpc_en; 1322 si->rf_type = rf_type; 1323 si->sgi_enable = is_support_sgi; 1324 si->vht_enable = is_vht_enable; 1325 si->ra_mask = ra_mask; 1326 si->rate_id = rate_id; 1327 1328 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask); 1329 } 1330 1331 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) 1332 { 1333 const struct rtw_chip_info *chip = rtwdev->chip; 1334 struct rtw_fw_state *fw; 1335 1336 fw = &rtwdev->fw; 1337 wait_for_completion(&fw->completion); 1338 if (!fw->firmware) 1339 return -EINVAL; 1340 1341 if (chip->wow_fw_name) { 1342 fw = &rtwdev->wow_fw; 1343 wait_for_completion(&fw->completion); 1344 if (!fw->firmware) 1345 return -EINVAL; 1346 } 1347 1348 return 0; 1349 } 1350 1351 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev, 1352 struct rtw_fw_state *fw) 1353 { 1354 const struct rtw_chip_info *chip = rtwdev->chip; 1355 1356 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported || 1357 !fw->feature) 1358 return LPS_DEEP_MODE_NONE; 1359 1360 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) && 1361 rtw_fw_feature_check(fw, FW_FEATURE_PG)) 1362 return LPS_DEEP_MODE_PG; 1363 1364 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) && 1365 rtw_fw_feature_check(fw, FW_FEATURE_LCLK)) 1366 return LPS_DEEP_MODE_LCLK; 1367 1368 return LPS_DEEP_MODE_NONE; 1369 } 1370 1371 static int rtw_power_on(struct rtw_dev *rtwdev) 1372 { 1373 const struct rtw_chip_info *chip = rtwdev->chip; 1374 struct rtw_fw_state *fw = &rtwdev->fw; 1375 bool wifi_only; 1376 int ret; 1377 1378 ret = rtw_hci_setup(rtwdev); 1379 if (ret) { 1380 rtw_err(rtwdev, "failed to setup hci\n"); 1381 goto err; 1382 } 1383 1384 /* power on MAC before firmware downloaded */ 1385 ret = rtw_mac_power_on(rtwdev); 1386 if (ret) { 1387 rtw_err(rtwdev, "failed to power on mac\n"); 1388 goto err; 1389 } 1390 1391 ret = rtw_wait_firmware_completion(rtwdev); 1392 if (ret) { 1393 rtw_err(rtwdev, "failed to wait firmware completion\n"); 1394 goto err_off; 1395 } 1396 1397 ret = rtw_download_firmware(rtwdev, fw); 1398 if (ret) { 1399 rtw_err(rtwdev, "failed to download firmware\n"); 1400 goto err_off; 1401 } 1402 1403 /* config mac after firmware downloaded */ 1404 ret = rtw_mac_init(rtwdev); 1405 if (ret) { 1406 rtw_err(rtwdev, "failed to configure mac\n"); 1407 goto err_off; 1408 } 1409 1410 chip->ops->phy_set_param(rtwdev); 1411 1412 ret = rtw_hci_start(rtwdev); 1413 if (ret) { 1414 rtw_err(rtwdev, "failed to start hci\n"); 1415 goto err_off; 1416 } 1417 1418 /* send H2C after HCI has started */ 1419 rtw_fw_send_general_info(rtwdev); 1420 rtw_fw_send_phydm_info(rtwdev); 1421 1422 wifi_only = !rtwdev->efuse.btcoex; 1423 rtw_coex_power_on_setting(rtwdev); 1424 rtw_coex_init_hw_config(rtwdev, wifi_only); 1425 1426 return 0; 1427 1428 err_off: 1429 rtw_mac_power_off(rtwdev); 1430 1431 err: 1432 return ret; 1433 } 1434 1435 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start) 1436 { 1437 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN)) 1438 return; 1439 1440 if (start) { 1441 rtw_fw_scan_notify(rtwdev, true); 1442 } else { 1443 reinit_completion(&rtwdev->fw_scan_density); 1444 rtw_fw_scan_notify(rtwdev, false); 1445 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density, 1446 SCAN_NOTIFY_TIMEOUT)) 1447 rtw_warn(rtwdev, "firmware failed to report density after scan\n"); 1448 } 1449 } 1450 1451 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, 1452 const u8 *mac_addr, bool hw_scan) 1453 { 1454 u32 config = 0; 1455 int ret = 0; 1456 1457 rtw_leave_lps(rtwdev); 1458 1459 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) { 1460 ret = rtw_leave_ips(rtwdev); 1461 if (ret) { 1462 rtw_err(rtwdev, "failed to leave idle state\n"); 1463 return; 1464 } 1465 } 1466 1467 ether_addr_copy(rtwvif->mac_addr, mac_addr); 1468 config |= PORT_SET_MAC_ADDR; 1469 rtw_vif_port_config(rtwdev, rtwvif, config); 1470 1471 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); 1472 rtw_core_fw_scan_notify(rtwdev, true); 1473 1474 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1475 set_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1476 } 1477 1478 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, 1479 bool hw_scan) 1480 { 1481 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL; 1482 u32 config = 0; 1483 1484 if (!rtwvif) 1485 return; 1486 1487 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); 1488 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); 1489 1490 rtw_core_fw_scan_notify(rtwdev, false); 1491 1492 ether_addr_copy(rtwvif->mac_addr, vif->addr); 1493 config |= PORT_SET_MAC_ADDR; 1494 rtw_vif_port_config(rtwdev, rtwvif, config); 1495 1496 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); 1497 1498 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) 1499 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); 1500 } 1501 1502 int rtw_core_start(struct rtw_dev *rtwdev) 1503 { 1504 int ret; 1505 1506 ret = rtw_power_on(rtwdev); 1507 if (ret) 1508 return ret; 1509 1510 rtw_sec_enable_sec_engine(rtwdev); 1511 1512 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw); 1513 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw); 1514 1515 /* rcr reset after powered on */ 1516 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); 1517 1518 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work, 1519 RTW_WATCH_DOG_DELAY_TIME); 1520 1521 set_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1522 1523 return 0; 1524 } 1525 1526 static void rtw_power_off(struct rtw_dev *rtwdev) 1527 { 1528 rtw_hci_stop(rtwdev); 1529 rtw_coex_power_off_setting(rtwdev); 1530 rtw_mac_power_off(rtwdev); 1531 } 1532 1533 void rtw_core_stop(struct rtw_dev *rtwdev) 1534 { 1535 struct rtw_coex *coex = &rtwdev->coex; 1536 1537 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags); 1538 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags); 1539 1540 mutex_unlock(&rtwdev->mutex); 1541 1542 cancel_work_sync(&rtwdev->c2h_work); 1543 cancel_work_sync(&rtwdev->update_beacon_work); 1544 cancel_delayed_work_sync(&rtwdev->watch_dog_work); 1545 cancel_delayed_work_sync(&coex->bt_relink_work); 1546 cancel_delayed_work_sync(&coex->bt_reenable_work); 1547 cancel_delayed_work_sync(&coex->defreeze_work); 1548 cancel_delayed_work_sync(&coex->wl_remain_work); 1549 cancel_delayed_work_sync(&coex->bt_remain_work); 1550 cancel_delayed_work_sync(&coex->wl_connecting_work); 1551 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work); 1552 cancel_delayed_work_sync(&coex->wl_ccklock_work); 1553 1554 mutex_lock(&rtwdev->mutex); 1555 1556 rtw_power_off(rtwdev); 1557 } 1558 1559 static void rtw_init_ht_cap(struct rtw_dev *rtwdev, 1560 struct ieee80211_sta_ht_cap *ht_cap) 1561 { 1562 const struct rtw_chip_info *chip = rtwdev->chip; 1563 struct rtw_efuse *efuse = &rtwdev->efuse; 1564 1565 ht_cap->ht_supported = true; 1566 ht_cap->cap = 0; 1567 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 | 1568 IEEE80211_HT_CAP_MAX_AMSDU | 1569 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT); 1570 1571 if (rtw_chip_has_rx_ldpc(rtwdev)) 1572 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; 1573 if (rtw_chip_has_tx_stbc(rtwdev)) 1574 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; 1575 1576 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) 1577 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1578 IEEE80211_HT_CAP_DSSSCCK40 | 1579 IEEE80211_HT_CAP_SGI_40; 1580 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; 1581 ht_cap->ampdu_density = chip->ampdu_density; 1582 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 1583 if (efuse->hw_cap.nss > 1) { 1584 ht_cap->mcs.rx_mask[0] = 0xFF; 1585 ht_cap->mcs.rx_mask[1] = 0xFF; 1586 ht_cap->mcs.rx_mask[4] = 0x01; 1587 ht_cap->mcs.rx_highest = cpu_to_le16(300); 1588 } else { 1589 ht_cap->mcs.rx_mask[0] = 0xFF; 1590 ht_cap->mcs.rx_mask[1] = 0x00; 1591 ht_cap->mcs.rx_mask[4] = 0x01; 1592 ht_cap->mcs.rx_highest = cpu_to_le16(150); 1593 } 1594 } 1595 1596 static void rtw_init_vht_cap(struct rtw_dev *rtwdev, 1597 struct ieee80211_sta_vht_cap *vht_cap) 1598 { 1599 struct rtw_efuse *efuse = &rtwdev->efuse; 1600 u16 mcs_map; 1601 __le16 highest; 1602 1603 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE && 1604 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT) 1605 return; 1606 1607 vht_cap->vht_supported = true; 1608 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 1609 IEEE80211_VHT_CAP_SHORT_GI_80 | 1610 IEEE80211_VHT_CAP_RXSTBC_1 | 1611 IEEE80211_VHT_CAP_HTC_VHT | 1612 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 1613 0; 1614 if (rtwdev->hal.rf_path_num > 1) 1615 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC; 1616 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 1617 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; 1618 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap << 1619 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 1620 1621 if (rtw_chip_has_rx_ldpc(rtwdev)) 1622 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC; 1623 1624 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 | 1625 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 | 1626 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 | 1627 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 | 1628 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 | 1629 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 | 1630 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14; 1631 if (efuse->hw_cap.nss > 1) { 1632 highest = cpu_to_le16(780); 1633 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2; 1634 } else { 1635 highest = cpu_to_le16(390); 1636 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2; 1637 } 1638 1639 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); 1640 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); 1641 vht_cap->vht_mcs.rx_highest = highest; 1642 vht_cap->vht_mcs.tx_highest = highest; 1643 } 1644 1645 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev) 1646 { 1647 u16 len; 1648 1649 len = rtwdev->chip->max_scan_ie_len; 1650 1651 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) && 1652 rtwdev->chip->id == RTW_CHIP_TYPE_8822C) 1653 len = IEEE80211_MAX_DATA_LEN; 1654 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM)) 1655 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE; 1656 1657 return len; 1658 } 1659 1660 static void rtw_set_supported_band(struct ieee80211_hw *hw, 1661 const struct rtw_chip_info *chip) 1662 { 1663 struct rtw_dev *rtwdev = hw->priv; 1664 struct ieee80211_supported_band *sband; 1665 1666 if (chip->band & RTW_BAND_2G) { 1667 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL); 1668 if (!sband) 1669 goto err_out; 1670 if (chip->ht_supported) 1671 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1672 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband; 1673 } 1674 1675 if (chip->band & RTW_BAND_5G) { 1676 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL); 1677 if (!sband) 1678 goto err_out; 1679 if (chip->ht_supported) 1680 rtw_init_ht_cap(rtwdev, &sband->ht_cap); 1681 if (chip->vht_supported) 1682 rtw_init_vht_cap(rtwdev, &sband->vht_cap); 1683 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband; 1684 } 1685 1686 return; 1687 1688 err_out: 1689 rtw_err(rtwdev, "failed to set supported band\n"); 1690 } 1691 1692 static void rtw_unset_supported_band(struct ieee80211_hw *hw, 1693 const struct rtw_chip_info *chip) 1694 { 1695 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); 1696 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); 1697 } 1698 1699 static void rtw_vif_smps_iter(void *data, u8 *mac, 1700 struct ieee80211_vif *vif) 1701 { 1702 struct rtw_dev *rtwdev = (struct rtw_dev *)data; 1703 1704 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) 1705 return; 1706 1707 if (rtwdev->hal.txrx_1ss) 1708 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC); 1709 else 1710 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF); 1711 } 1712 1713 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss) 1714 { 1715 const struct rtw_chip_info *chip = rtwdev->chip; 1716 struct rtw_hal *hal = &rtwdev->hal; 1717 1718 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss) 1719 return; 1720 1721 rtwdev->hal.txrx_1ss = txrx_1ss; 1722 if (txrx_1ss) 1723 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false); 1724 else 1725 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx, 1726 hal->antenna_rx, false); 1727 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev); 1728 } 1729 1730 static void __update_firmware_feature(struct rtw_dev *rtwdev, 1731 struct rtw_fw_state *fw) 1732 { 1733 u32 feature; 1734 const struct rtw_fw_hdr *fw_hdr = 1735 (const struct rtw_fw_hdr *)fw->firmware->data; 1736 1737 feature = le32_to_cpu(fw_hdr->feature); 1738 fw->feature = feature & FW_FEATURE_SIG ? feature : 0; 1739 1740 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C && 1741 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13)) 1742 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM; 1743 } 1744 1745 static void __update_firmware_info(struct rtw_dev *rtwdev, 1746 struct rtw_fw_state *fw) 1747 { 1748 const struct rtw_fw_hdr *fw_hdr = 1749 (const struct rtw_fw_hdr *)fw->firmware->data; 1750 1751 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver); 1752 fw->version = le16_to_cpu(fw_hdr->version); 1753 fw->sub_version = fw_hdr->subversion; 1754 fw->sub_index = fw_hdr->subindex; 1755 1756 __update_firmware_feature(rtwdev, fw); 1757 } 1758 1759 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, 1760 struct rtw_fw_state *fw) 1761 { 1762 struct rtw_fw_hdr_legacy *legacy = 1763 #if defined(__linux__) 1764 (struct rtw_fw_hdr_legacy *)fw->firmware->data; 1765 #elif defined(__FreeBSD__) 1766 __DECONST(struct rtw_fw_hdr_legacy *, fw->firmware->data); 1767 #endif 1768 1769 fw->h2c_version = 0; 1770 fw->version = le16_to_cpu(legacy->version); 1771 fw->sub_version = legacy->subversion1; 1772 fw->sub_index = legacy->subversion2; 1773 } 1774 1775 static void update_firmware_info(struct rtw_dev *rtwdev, 1776 struct rtw_fw_state *fw) 1777 { 1778 if (rtw_chip_wcpu_11n(rtwdev)) 1779 __update_firmware_info_legacy(rtwdev, fw); 1780 else 1781 __update_firmware_info(rtwdev, fw); 1782 } 1783 1784 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) 1785 { 1786 struct rtw_fw_state *fw = context; 1787 struct rtw_dev *rtwdev = fw->rtwdev; 1788 1789 if (!firmware || !firmware->data) { 1790 rtw_err(rtwdev, "failed to request firmware\n"); 1791 complete_all(&fw->completion); 1792 return; 1793 } 1794 1795 fw->firmware = firmware; 1796 update_firmware_info(rtwdev, fw); 1797 complete_all(&fw->completion); 1798 1799 rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", 1800 fw->type == RTW_WOWLAN_FW ? "WOW " : "", 1801 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); 1802 } 1803 1804 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) 1805 { 1806 const char *fw_name; 1807 struct rtw_fw_state *fw; 1808 int ret; 1809 1810 switch (type) { 1811 case RTW_WOWLAN_FW: 1812 fw = &rtwdev->wow_fw; 1813 fw_name = rtwdev->chip->wow_fw_name; 1814 break; 1815 1816 case RTW_NORMAL_FW: 1817 fw = &rtwdev->fw; 1818 fw_name = rtwdev->chip->fw_name; 1819 break; 1820 1821 default: 1822 rtw_warn(rtwdev, "unsupported firmware type\n"); 1823 return -ENOENT; 1824 } 1825 1826 fw->type = type; 1827 fw->rtwdev = rtwdev; 1828 init_completion(&fw->completion); 1829 1830 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 1831 GFP_KERNEL, fw, rtw_load_firmware_cb); 1832 if (ret) { 1833 rtw_err(rtwdev, "failed to async firmware request\n"); 1834 return ret; 1835 } 1836 1837 return 0; 1838 } 1839 1840 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) 1841 { 1842 const struct rtw_chip_info *chip = rtwdev->chip; 1843 struct rtw_hal *hal = &rtwdev->hal; 1844 struct rtw_efuse *efuse = &rtwdev->efuse; 1845 1846 switch (rtw_hci_type(rtwdev)) { 1847 case RTW_HCI_TYPE_PCIE: 1848 rtwdev->hci.rpwm_addr = 0x03d9; 1849 rtwdev->hci.cpwm_addr = 0x03da; 1850 break; 1851 case RTW_HCI_TYPE_SDIO: 1852 rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1; 1853 rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2; 1854 break; 1855 case RTW_HCI_TYPE_USB: 1856 rtwdev->hci.rpwm_addr = 0xfe58; 1857 rtwdev->hci.cpwm_addr = 0xfe57; 1858 break; 1859 default: 1860 rtw_err(rtwdev, "unsupported hci type\n"); 1861 return -EINVAL; 1862 } 1863 1864 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1865 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1866 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1867 if (hal->chip_version & BIT_RF_TYPE_ID) { 1868 hal->rf_type = RF_2T2R; 1869 hal->rf_path_num = 2; 1870 hal->antenna_tx = BB_PATH_AB; 1871 hal->antenna_rx = BB_PATH_AB; 1872 } else { 1873 hal->rf_type = RF_1T1R; 1874 hal->rf_path_num = 1; 1875 hal->antenna_tx = BB_PATH_A; 1876 hal->antenna_rx = BB_PATH_A; 1877 } 1878 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num : 1879 hal->rf_path_num; 1880 1881 efuse->physical_size = chip->phy_efuse_size; 1882 efuse->logical_size = chip->log_efuse_size; 1883 efuse->protect_size = chip->ptct_efuse_size; 1884 1885 /* default use ack */ 1886 rtwdev->hal.rcr |= BIT_VHT_DACK; 1887 1888 hal->bfee_sts_cap = 3; 1889 1890 return 0; 1891 } 1892 1893 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) 1894 { 1895 struct rtw_fw_state *fw = &rtwdev->fw; 1896 int ret; 1897 1898 ret = rtw_hci_setup(rtwdev); 1899 if (ret) { 1900 rtw_err(rtwdev, "failed to setup hci\n"); 1901 goto err; 1902 } 1903 1904 ret = rtw_mac_power_on(rtwdev); 1905 if (ret) { 1906 rtw_err(rtwdev, "failed to power on mac\n"); 1907 goto err; 1908 } 1909 1910 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP); 1911 1912 wait_for_completion(&fw->completion); 1913 if (!fw->firmware) { 1914 ret = -EINVAL; 1915 rtw_err(rtwdev, "failed to load firmware\n"); 1916 goto err; 1917 } 1918 1919 ret = rtw_download_firmware(rtwdev, fw); 1920 if (ret) { 1921 rtw_err(rtwdev, "failed to download firmware\n"); 1922 goto err_off; 1923 } 1924 1925 return 0; 1926 1927 err_off: 1928 rtw_mac_power_off(rtwdev); 1929 1930 err: 1931 return ret; 1932 } 1933 1934 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev) 1935 { 1936 struct rtw_efuse *efuse = &rtwdev->efuse; 1937 u8 hw_feature[HW_FEATURE_LEN]; 1938 u8 id; 1939 u8 bw; 1940 int i; 1941 1942 id = rtw_read8(rtwdev, REG_C2HEVT); 1943 if (id != C2H_HW_FEATURE_REPORT) { 1944 rtw_err(rtwdev, "failed to read hw feature report\n"); 1945 return -EBUSY; 1946 } 1947 1948 for (i = 0; i < HW_FEATURE_LEN; i++) 1949 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i); 1950 1951 rtw_write8(rtwdev, REG_C2HEVT, 0); 1952 1953 bw = GET_EFUSE_HW_CAP_BW(hw_feature); 1954 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw); 1955 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature); 1956 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature); 1957 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature); 1958 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature); 1959 1960 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num); 1961 1962 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE || 1963 efuse->hw_cap.nss > rtwdev->hal.rf_path_num) 1964 efuse->hw_cap.nss = rtwdev->hal.rf_path_num; 1965 1966 rtw_dbg(rtwdev, RTW_DBG_EFUSE, 1967 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n", 1968 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, 1969 efuse->hw_cap.ant_num, efuse->hw_cap.nss); 1970 1971 return 0; 1972 } 1973 1974 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev) 1975 { 1976 rtw_hci_stop(rtwdev); 1977 rtw_mac_power_off(rtwdev); 1978 } 1979 1980 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) 1981 { 1982 struct rtw_efuse *efuse = &rtwdev->efuse; 1983 int ret; 1984 1985 mutex_lock(&rtwdev->mutex); 1986 1987 /* power on mac to read efuse */ 1988 ret = rtw_chip_efuse_enable(rtwdev); 1989 if (ret) 1990 goto out_unlock; 1991 1992 ret = rtw_parse_efuse_map(rtwdev); 1993 if (ret) 1994 goto out_disable; 1995 1996 ret = rtw_dump_hw_feature(rtwdev); 1997 if (ret) 1998 goto out_disable; 1999 2000 ret = rtw_check_supported_rfe(rtwdev); 2001 if (ret) 2002 goto out_disable; 2003 2004 if (efuse->crystal_cap == 0xff) 2005 efuse->crystal_cap = 0; 2006 if (efuse->pa_type_2g == 0xff) 2007 efuse->pa_type_2g = 0; 2008 if (efuse->pa_type_5g == 0xff) 2009 efuse->pa_type_5g = 0; 2010 if (efuse->lna_type_2g == 0xff) 2011 efuse->lna_type_2g = 0; 2012 if (efuse->lna_type_5g == 0xff) 2013 efuse->lna_type_5g = 0; 2014 if (efuse->channel_plan == 0xff) 2015 efuse->channel_plan = 0x7f; 2016 if (efuse->rf_board_option == 0xff) 2017 efuse->rf_board_option = 0; 2018 if (efuse->bt_setting & BIT(0)) 2019 efuse->share_ant = true; 2020 if (efuse->regd == 0xff) 2021 efuse->regd = 0; 2022 if (efuse->tx_bb_swing_setting_2g == 0xff) 2023 efuse->tx_bb_swing_setting_2g = 0; 2024 if (efuse->tx_bb_swing_setting_5g == 0xff) 2025 efuse->tx_bb_swing_setting_5g = 0; 2026 2027 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20; 2028 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0; 2029 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0; 2030 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0; 2031 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0; 2032 2033 out_disable: 2034 rtw_chip_efuse_disable(rtwdev); 2035 2036 out_unlock: 2037 mutex_unlock(&rtwdev->mutex); 2038 return ret; 2039 } 2040 2041 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) 2042 { 2043 struct rtw_hal *hal = &rtwdev->hal; 2044 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev); 2045 2046 if (!rfe_def) 2047 return -ENODEV; 2048 2049 rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type); 2050 2051 rtw_phy_init_tx_power(rtwdev); 2052 if (rfe_def->agc_btg_tbl) 2053 rtw_load_table(rtwdev, rfe_def->agc_btg_tbl); 2054 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); 2055 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); 2056 rtw_phy_tx_power_by_rate_config(hal); 2057 rtw_phy_tx_power_limit_config(hal); 2058 2059 return 0; 2060 } 2061 2062 int rtw_chip_info_setup(struct rtw_dev *rtwdev) 2063 { 2064 int ret; 2065 2066 ret = rtw_chip_parameter_setup(rtwdev); 2067 if (ret) { 2068 rtw_err(rtwdev, "failed to setup chip parameters\n"); 2069 goto err_out; 2070 } 2071 2072 ret = rtw_chip_efuse_info_setup(rtwdev); 2073 if (ret) { 2074 rtw_err(rtwdev, "failed to setup chip efuse info\n"); 2075 goto err_out; 2076 } 2077 2078 ret = rtw_chip_board_info_setup(rtwdev); 2079 if (ret) { 2080 rtw_err(rtwdev, "failed to setup chip board info\n"); 2081 goto err_out; 2082 } 2083 2084 return 0; 2085 2086 err_out: 2087 return ret; 2088 } 2089 EXPORT_SYMBOL(rtw_chip_info_setup); 2090 2091 static void rtw_stats_init(struct rtw_dev *rtwdev) 2092 { 2093 struct rtw_traffic_stats *stats = &rtwdev->stats; 2094 struct rtw_dm_info *dm_info = &rtwdev->dm_info; 2095 int i; 2096 2097 ewma_tp_init(&stats->tx_ewma_tp); 2098 ewma_tp_init(&stats->rx_ewma_tp); 2099 2100 for (i = 0; i < RTW_EVM_NUM; i++) 2101 ewma_evm_init(&dm_info->ewma_evm[i]); 2102 for (i = 0; i < RTW_SNR_NUM; i++) 2103 ewma_snr_init(&dm_info->ewma_snr[i]); 2104 } 2105 2106 int rtw_core_init(struct rtw_dev *rtwdev) 2107 { 2108 const struct rtw_chip_info *chip = rtwdev->chip; 2109 struct rtw_coex *coex = &rtwdev->coex; 2110 int ret; 2111 2112 INIT_LIST_HEAD(&rtwdev->rsvd_page_list); 2113 INIT_LIST_HEAD(&rtwdev->txqs); 2114 2115 timer_setup(&rtwdev->tx_report.purge_timer, 2116 rtw_tx_report_purge_timer, 0); 2117 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); 2118 if (!rtwdev->tx_wq) { 2119 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n"); 2120 return -ENOMEM; 2121 } 2122 2123 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); 2124 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); 2125 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work); 2126 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); 2127 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work); 2128 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work); 2129 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work); 2130 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work, 2131 rtw_coex_bt_multi_link_remain_work); 2132 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); 2133 INIT_WORK(&rtwdev->tx_work, rtw_tx_work); 2134 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); 2135 INIT_WORK(&rtwdev->ips_work, rtw_ips_work); 2136 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); 2137 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work); 2138 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); 2139 skb_queue_head_init(&rtwdev->c2h_queue); 2140 skb_queue_head_init(&rtwdev->coex.queue); 2141 skb_queue_head_init(&rtwdev->tx_report.queue); 2142 2143 spin_lock_init(&rtwdev->txq_lock); 2144 spin_lock_init(&rtwdev->tx_report.q_lock); 2145 2146 mutex_init(&rtwdev->mutex); 2147 mutex_init(&rtwdev->hal.tx_power_mutex); 2148 2149 init_waitqueue_head(&rtwdev->coex.wait); 2150 init_completion(&rtwdev->lps_leave_check); 2151 init_completion(&rtwdev->fw_scan_density); 2152 2153 rtwdev->sec.total_cam_num = 32; 2154 rtwdev->hal.current_channel = 1; 2155 rtwdev->dm_info.fix_rate = U8_MAX; 2156 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); 2157 2158 rtw_stats_init(rtwdev); 2159 2160 /* default rx filter setting */ 2161 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV | 2162 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS | 2163 BIT_AB | BIT_AM | BIT_APM; 2164 2165 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); 2166 if (ret) { 2167 rtw_warn(rtwdev, "no firmware loaded\n"); 2168 goto out; 2169 } 2170 2171 if (chip->wow_fw_name) { 2172 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW); 2173 if (ret) { 2174 rtw_warn(rtwdev, "no wow firmware loaded\n"); 2175 wait_for_completion(&rtwdev->fw.completion); 2176 if (rtwdev->fw.firmware) 2177 release_firmware(rtwdev->fw.firmware); 2178 goto out; 2179 } 2180 } 2181 2182 #if defined(__FreeBSD__) 2183 rtw_wait_firmware_completion(rtwdev); 2184 #endif 2185 2186 return 0; 2187 2188 out: 2189 destroy_workqueue(rtwdev->tx_wq); 2190 return ret; 2191 } 2192 EXPORT_SYMBOL(rtw_core_init); 2193 2194 void rtw_core_deinit(struct rtw_dev *rtwdev) 2195 { 2196 struct rtw_fw_state *fw = &rtwdev->fw; 2197 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw; 2198 struct rtw_rsvd_page *rsvd_pkt, *tmp; 2199 unsigned long flags; 2200 2201 rtw_wait_firmware_completion(rtwdev); 2202 2203 if (fw->firmware) 2204 release_firmware(fw->firmware); 2205 2206 if (wow_fw->firmware) 2207 release_firmware(wow_fw->firmware); 2208 2209 destroy_workqueue(rtwdev->tx_wq); 2210 timer_delete_sync(&rtwdev->tx_report.purge_timer); 2211 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); 2212 skb_queue_purge(&rtwdev->tx_report.queue); 2213 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 2214 skb_queue_purge(&rtwdev->coex.queue); 2215 skb_queue_purge(&rtwdev->c2h_queue); 2216 2217 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 2218 build_list) { 2219 list_del(&rsvd_pkt->build_list); 2220 kfree(rsvd_pkt); 2221 } 2222 2223 mutex_destroy(&rtwdev->mutex); 2224 mutex_destroy(&rtwdev->hal.tx_power_mutex); 2225 } 2226 EXPORT_SYMBOL(rtw_core_deinit); 2227 2228 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2229 { 2230 struct rtw_hal *hal = &rtwdev->hal; 2231 int max_tx_headroom = 0; 2232 int ret; 2233 2234 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; 2235 2236 if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) 2237 max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN; 2238 2239 hw->extra_tx_headroom = max_tx_headroom; 2240 hw->queues = IEEE80211_NUM_ACS; 2241 hw->txq_data_size = sizeof(struct rtw_txq); 2242 hw->sta_data_size = sizeof(struct rtw_sta_info); 2243 hw->vif_data_size = sizeof(struct rtw_vif); 2244 2245 ieee80211_hw_set(hw, SIGNAL_DBM); 2246 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 2247 ieee80211_hw_set(hw, AMPDU_AGGREGATION); 2248 ieee80211_hw_set(hw, MFP_CAPABLE); 2249 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS); 2250 ieee80211_hw_set(hw, SUPPORTS_PS); 2251 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 2252 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT); 2253 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); 2254 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 2255 ieee80211_hw_set(hw, TX_AMSDU); 2256 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); 2257 2258 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 2259 BIT(NL80211_IFTYPE_AP) | 2260 BIT(NL80211_IFTYPE_ADHOC) | 2261 BIT(NL80211_IFTYPE_MESH_POINT); 2262 hw->wiphy->available_antennas_tx = hal->antenna_tx; 2263 hw->wiphy->available_antennas_rx = hal->antenna_rx; 2264 2265 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | 2266 WIPHY_FLAG_TDLS_EXTERNAL_SETUP; 2267 2268 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; 2269 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; 2270 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev); 2271 2272 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) { 2273 hw->wiphy->iface_combinations = rtw_iface_combs; 2274 hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs); 2275 } 2276 2277 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 2278 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); 2279 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); 2280 2281 #ifdef CONFIG_PM 2282 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; 2283 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids; 2284 #endif 2285 rtw_set_supported_band(hw, rtwdev->chip); 2286 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); 2287 2288 hw->wiphy->sar_capa = &rtw_sar_capa; 2289 2290 ret = rtw_regd_init(rtwdev); 2291 if (ret) { 2292 rtw_err(rtwdev, "failed to init regd\n"); 2293 return ret; 2294 } 2295 2296 ret = ieee80211_register_hw(hw); 2297 if (ret) { 2298 rtw_err(rtwdev, "failed to register hw\n"); 2299 return ret; 2300 } 2301 2302 ret = rtw_regd_hint(rtwdev); 2303 if (ret) { 2304 rtw_err(rtwdev, "failed to hint regd\n"); 2305 return ret; 2306 } 2307 2308 rtw_debugfs_init(rtwdev); 2309 2310 rtwdev->bf_info.bfer_mu_cnt = 0; 2311 rtwdev->bf_info.bfer_su_cnt = 0; 2312 2313 return 0; 2314 } 2315 EXPORT_SYMBOL(rtw_register_hw); 2316 2317 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) 2318 { 2319 const struct rtw_chip_info *chip = rtwdev->chip; 2320 2321 ieee80211_unregister_hw(hw); 2322 rtw_unset_supported_band(hw, chip); 2323 } 2324 EXPORT_SYMBOL(rtw_unregister_hw); 2325 2326 static 2327 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2328 const struct rtw_hw_reg *reg2, u8 nbytes) 2329 { 2330 u8 i; 2331 2332 for (i = 0; i < nbytes; i++) { 2333 u8 v1 = rtw_read8(rtwdev, reg1->addr + i); 2334 u8 v2 = rtw_read8(rtwdev, reg2->addr + i); 2335 2336 rtw_write8(rtwdev, reg1->addr + i, v2); 2337 rtw_write8(rtwdev, reg2->addr + i, v1); 2338 } 2339 } 2340 2341 static 2342 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, 2343 const struct rtw_hw_reg *reg2) 2344 { 2345 u32 v1, v2; 2346 2347 v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); 2348 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); 2349 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); 2350 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); 2351 } 2352 2353 struct rtw_iter_port_switch_data { 2354 struct rtw_dev *rtwdev; 2355 struct rtw_vif *rtwvif_ap; 2356 }; 2357 2358 static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif) 2359 { 2360 struct rtw_iter_port_switch_data *iter_data = data; 2361 struct rtw_dev *rtwdev = iter_data->rtwdev; 2362 struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv; 2363 struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap; 2364 const struct rtw_hw_reg *reg1, *reg2; 2365 2366 if (rtwvif_target->port != RTW_PORT_0) 2367 return; 2368 2369 rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", 2370 rtwvif_ap->port, rtwvif_target->port); 2371 2372 /* Leave LPS so the value swapped are not in PS mode */ 2373 rtw_leave_lps(rtwdev); 2374 2375 reg1 = &rtwvif_ap->conf->net_type; 2376 reg2 = &rtwvif_target->conf->net_type; 2377 rtw_swap_reg_mask(rtwdev, reg1, reg2); 2378 2379 reg1 = &rtwvif_ap->conf->mac_addr; 2380 reg2 = &rtwvif_target->conf->mac_addr; 2381 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2382 2383 reg1 = &rtwvif_ap->conf->bssid; 2384 reg2 = &rtwvif_target->conf->bssid; 2385 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); 2386 2387 reg1 = &rtwvif_ap->conf->bcn_ctrl; 2388 reg2 = &rtwvif_target->conf->bcn_ctrl; 2389 rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1); 2390 2391 swap(rtwvif_target->port, rtwvif_ap->port); 2392 swap(rtwvif_target->conf, rtwvif_ap->conf); 2393 2394 rtw_fw_default_port(rtwdev, rtwvif_target); 2395 } 2396 2397 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 2398 { 2399 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2400 struct rtw_iter_port_switch_data iter_data; 2401 2402 if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0) 2403 return; 2404 2405 iter_data.rtwdev = rtwdev; 2406 iter_data.rtwvif_ap = rtwvif; 2407 rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); 2408 } 2409 2410 static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif) 2411 { 2412 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 2413 bool *active = data; 2414 2415 if (*active) 2416 return; 2417 2418 if (vif->type != NL80211_IFTYPE_STATION) 2419 return; 2420 2421 if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) 2422 *active = true; 2423 } 2424 2425 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev) 2426 { 2427 bool sta_active = false; 2428 2429 rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active); 2430 2431 return rtwdev->ap_active || sta_active; 2432 } 2433 2434 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) 2435 { 2436 if (!rtwdev->ap_active) 2437 return; 2438 2439 if (enable) { 2440 rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2441 rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2442 } else { 2443 rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); 2444 rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); 2445 } 2446 } 2447 2448 MODULE_AUTHOR("Realtek Corporation"); 2449 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); 2450 MODULE_LICENSE("Dual BSD/GPL"); 2451