1*6c92544dSBjoern A. Zeeb // SPDX-License-Identifier: ISC
2*6c92544dSBjoern A. Zeeb /*
3*6c92544dSBjoern A. Zeeb * Copyright (C) 2019 Lorenzo Bianconi <lorenzo@kernel.org>
4*6c92544dSBjoern A. Zeeb */
5*6c92544dSBjoern A. Zeeb
6*6c92544dSBjoern A. Zeeb #include "mt76.h"
7*6c92544dSBjoern A. Zeeb #include <linux/pci.h>
8*6c92544dSBjoern A. Zeeb
mt76_pci_disable_aspm(struct pci_dev * pdev)9*6c92544dSBjoern A. Zeeb void mt76_pci_disable_aspm(struct pci_dev *pdev)
10*6c92544dSBjoern A. Zeeb {
11*6c92544dSBjoern A. Zeeb struct pci_dev *parent = pdev->bus->self;
12*6c92544dSBjoern A. Zeeb u16 aspm_conf, parent_aspm_conf = 0;
13*6c92544dSBjoern A. Zeeb
14*6c92544dSBjoern A. Zeeb pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &aspm_conf);
15*6c92544dSBjoern A. Zeeb aspm_conf &= PCI_EXP_LNKCTL_ASPMC;
16*6c92544dSBjoern A. Zeeb if (parent) {
17*6c92544dSBjoern A. Zeeb pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
18*6c92544dSBjoern A. Zeeb &parent_aspm_conf);
19*6c92544dSBjoern A. Zeeb parent_aspm_conf &= PCI_EXP_LNKCTL_ASPMC;
20*6c92544dSBjoern A. Zeeb }
21*6c92544dSBjoern A. Zeeb
22*6c92544dSBjoern A. Zeeb if (!aspm_conf && (!parent || !parent_aspm_conf)) {
23*6c92544dSBjoern A. Zeeb /* aspm already disabled */
24*6c92544dSBjoern A. Zeeb return;
25*6c92544dSBjoern A. Zeeb }
26*6c92544dSBjoern A. Zeeb
27*6c92544dSBjoern A. Zeeb dev_info(&pdev->dev, "disabling ASPM %s %s\n",
28*6c92544dSBjoern A. Zeeb (aspm_conf & PCI_EXP_LNKCTL_ASPM_L0S) ? "L0s" : "",
29*6c92544dSBjoern A. Zeeb (aspm_conf & PCI_EXP_LNKCTL_ASPM_L1) ? "L1" : "");
30*6c92544dSBjoern A. Zeeb
31*6c92544dSBjoern A. Zeeb if (IS_ENABLED(CONFIG_PCIEASPM)) {
32*6c92544dSBjoern A. Zeeb int err;
33*6c92544dSBjoern A. Zeeb
34*6c92544dSBjoern A. Zeeb err = pci_disable_link_state(pdev, aspm_conf);
35*6c92544dSBjoern A. Zeeb if (!err)
36*6c92544dSBjoern A. Zeeb return;
37*6c92544dSBjoern A. Zeeb }
38*6c92544dSBjoern A. Zeeb
39*6c92544dSBjoern A. Zeeb /* both device and parent should have the same ASPM setting.
40*6c92544dSBjoern A. Zeeb * disable ASPM in downstream component first and then upstream.
41*6c92544dSBjoern A. Zeeb */
42*6c92544dSBjoern A. Zeeb pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_conf);
43*6c92544dSBjoern A. Zeeb if (parent)
44*6c92544dSBjoern A. Zeeb pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
45*6c92544dSBjoern A. Zeeb aspm_conf);
46*6c92544dSBjoern A. Zeeb }
47*6c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt76_pci_disable_aspm);
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