1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #ifndef __MT7996_H 7 #define __MT7996_H 8 9 #include <linux/interrupt.h> 10 #include <linux/ktime.h> 11 #if defined(__FreeBSD__) 12 #include <linux/uuid.h> 13 #endif 14 #include "../mt76_connac.h" 15 #include "regs.h" 16 17 #define MT7996_MAX_RADIOS 3 18 #define MT7996_MAX_INTERFACES 19 /* per-band */ 19 #define MT7996_MAX_WMM_SETS 4 20 #define MT7996_WTBL_BMC_SIZE (is_mt7996(&dev->mt76) ? 64 : 32) 21 #define MT7996_WTBL_RESERVED (mt7996_wtbl_size(dev) - 1) 22 #define MT7996_WTBL_STA (MT7996_WTBL_RESERVED - \ 23 mt7996_max_interface_num(dev)) 24 25 #define MT7996_WATCHDOG_TIME (HZ / 10) 26 #define MT7996_RESET_TIMEOUT (30 * HZ) 27 28 #define MT7996_TX_RING_SIZE 2048 29 #define MT7996_TX_MCU_RING_SIZE 256 30 #define MT7996_TX_FWDL_RING_SIZE 128 31 32 #define MT7996_RX_RING_SIZE 1536 33 #define MT7996_RX_MCU_RING_SIZE 512 34 #define MT7996_RX_MCU_RING_SIZE_WA 1024 35 /* scatter-gather of mcu event is not supported in connac3 */ 36 #define MT7996_RX_MCU_BUF_SIZE (2048 + \ 37 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 38 39 #define MT7996_DEVICE_ID 0x7990 40 #define MT7996_DEVICE_ID_2 0x7991 41 #define MT7992_DEVICE_ID 0x7992 42 #define MT7992_DEVICE_ID_2 0x799a 43 #define MT7990_DEVICE_ID 0x7993 44 #define MT7990_DEVICE_ID_2 0x799b 45 46 #define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin" 47 #define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin" 48 #define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin" 49 #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin" 50 51 #define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin" 52 #define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin" 53 #define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP 54 #define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin" 55 56 #define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin" 57 #define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin" 58 #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin" 59 #define MT7992_ROM_PATCH "mediatek/mt7996/mt7992_rom_patch.bin" 60 61 #define MT7992_FIRMWARE_WA_23 "mediatek/mt7996/mt7992_wa_23.bin" 62 #define MT7992_FIRMWARE_WM_23 "mediatek/mt7996/mt7992_wm_23.bin" 63 #define MT7992_FIRMWARE_DSP_23 "mediatek/mt7996/mt7992_dsp_23.bin" 64 #define MT7992_ROM_PATCH_23 "mediatek/mt7996/mt7992_rom_patch_23.bin" 65 66 #define MT7990_FIRMWARE_WA "" 67 #define MT7990_FIRMWARE_WM "mediatek/mt7996/mt7990_wm.bin" 68 #define MT7990_FIRMWARE_DSP "" 69 #define MT7990_ROM_PATCH "mediatek/mt7996/mt7990_rom_patch.bin" 70 71 #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin" 72 #define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin" 73 #define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin" 74 #define MT7996_EEPROM_DEFAULT_233_INT "mediatek/mt7996/mt7996_eeprom_233_2i5i6i.bin" 75 76 #define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom.bin" 77 #define MT7992_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7992_eeprom_2i5i.bin" 78 #define MT7992_EEPROM_DEFAULT_MIX "mediatek/mt7996/mt7992_eeprom_2i5e.bin" 79 #define MT7992_EEPROM_DEFAULT_23 "mediatek/mt7996/mt7992_eeprom_23.bin" 80 #define MT7992_EEPROM_DEFAULT_23_INT "mediatek/mt7996/mt7992_eeprom_23_2i5i.bin" 81 82 #define MT7990_EEPROM_DEFAULT "mediatek/mt7996/mt7990_eeprom.bin" 83 #define MT7990_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7990_eeprom_2i5i.bin" 84 85 #define MT7996_EEPROM_SIZE 7680 86 #define MT7996_EEPROM_BLOCK_SIZE 16 87 #define MT7996_TOKEN_SIZE 16384 88 #define MT7996_HW_TOKEN_SIZE 8192 89 90 #define MT7996_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 91 #define MT7996_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 92 #define MT7996_IBF_MAX_NC 2 93 #define MT7996_IBF_TIMEOUT 0x18 94 #define MT7996_IBF_TIMEOUT_LEGACY 0x48 95 96 #define MT7992_CFEND_RATE_DEFAULT 0x4b /* OFDM 6M */ 97 #define MT7992_IBF_TIMEOUT 0xff 98 99 #define MT7996_SKU_RATE_NUM 417 100 #define MT7996_SKU_PATH_NUM 494 101 102 #define MT7996_MAX_TWT_AGRT 16 103 #define MT7996_MAX_STA_TWT_AGRT 8 104 #define MT7996_MIN_TWT_DUR 64 105 #define MT7996_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 3) 106 107 /* NOTE: used to map mt76_rates. idx may change if firmware expands table */ 108 #define MT7996_BASIC_RATES_TBL 31 109 #define MT7996_BEACON_RATES_TBL 25 110 111 #define MT7996_THERMAL_THROTTLE_MAX 100 112 #define MT7996_CDEV_THROTTLE_MAX 99 113 #define MT7996_CRIT_TEMP_IDX 0 114 #define MT7996_MAX_TEMP_IDX 1 115 #define MT7996_CRIT_TEMP 110 116 #define MT7996_MAX_TEMP 120 117 118 #define MT7996_RRO_MAX_SESSION 1024 119 #define MT7996_RRO_WINDOW_MAX_LEN 1024 120 #define MT7996_RRO_ADDR_ELEM_LEN 128 121 #define MT7996_RRO_BA_BITMAP_LEN 2 122 #define MT7996_RRO_BA_BITMAP_CR_SIZE ((MT7996_RRO_MAX_SESSION * 128) / \ 123 MT7996_RRO_BA_BITMAP_LEN) 124 #define MT7996_RRO_BA_BITMAP_SESSION_SIZE (MT7996_RRO_MAX_SESSION / \ 125 MT7996_RRO_ADDR_ELEM_LEN) 126 #define MT7996_RRO_WINDOW_MAX_SIZE (MT7996_RRO_WINDOW_MAX_LEN * \ 127 MT7996_RRO_BA_BITMAP_SESSION_SIZE) 128 129 #define MT7996_RX_BUF_SIZE (1800 + \ 130 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 131 #define MT7996_RX_MSDU_PAGE_SIZE (128 + \ 132 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 133 134 struct mt7996_vif; 135 struct mt7996_sta; 136 struct mt7996_dfs_pulse; 137 struct mt7996_dfs_pattern; 138 139 enum mt7996_ram_type { 140 MT7996_RAM_TYPE_WM, 141 MT7996_RAM_TYPE_WA, 142 MT7996_RAM_TYPE_DSP, 143 }; 144 145 enum mt7996_var_type { 146 MT7996_VAR_TYPE_444, 147 MT7996_VAR_TYPE_233, 148 }; 149 150 enum mt7992_var_type { 151 MT7992_VAR_TYPE_44, 152 MT7992_VAR_TYPE_23, 153 }; 154 155 enum mt7990_var_type { 156 MT7990_VAR_TYPE_23, 157 }; 158 159 enum mt7996_fem_type { 160 MT7996_FEM_EXT, 161 MT7996_FEM_INT, 162 MT7996_FEM_MIX, 163 }; 164 165 enum mt7996_txq_id { 166 MT7996_TXQ_FWDL = 16, 167 MT7996_TXQ_MCU_WM, 168 MT7996_TXQ_BAND0, 169 MT7996_TXQ_BAND1, 170 MT7996_TXQ_MCU_WA, 171 MT7996_TXQ_BAND2, 172 }; 173 174 enum mt7996_rxq_id { 175 MT7996_RXQ_MCU_WM = 0, 176 MT7996_RXQ_MCU_WA, 177 MT7996_RXQ_MCU_WA_MAIN = 2, 178 MT7996_RXQ_MCU_WA_EXT = 3, /* for mt7992 */ 179 MT7996_RXQ_MCU_WA_TRI = 3, 180 MT7996_RXQ_BAND0 = 4, 181 MT7996_RXQ_BAND1 = 5, /* for mt7992 */ 182 MT7996_RXQ_BAND2 = 5, 183 MT7996_RXQ_RRO_BAND0 = 8, 184 MT7996_RXQ_RRO_BAND1 = 8,/* unused */ 185 MT7996_RXQ_RRO_BAND2 = 6, 186 MT7996_RXQ_MSDU_PG_BAND0 = 10, 187 MT7996_RXQ_MSDU_PG_BAND1 = 11, 188 MT7996_RXQ_MSDU_PG_BAND2 = 12, 189 MT7996_RXQ_TXFREE0 = 9, 190 MT7996_RXQ_TXFREE1 = 9, 191 MT7996_RXQ_TXFREE2 = 7, 192 MT7996_RXQ_RRO_IND = 0, 193 MT7990_RXQ_TXFREE0 = 6, 194 MT7990_RXQ_TXFREE1 = 7, 195 }; 196 197 struct mt7996_twt_flow { 198 struct list_head list; 199 u64 start_tsf; 200 u64 tsf; 201 u32 duration; 202 u16 wcid; 203 __le16 mantissa; 204 u8 exp; 205 u8 table_id; 206 u8 id; 207 u8 protection:1; 208 u8 flowtype:1; 209 u8 trigger:1; 210 u8 sched:1; 211 }; 212 213 DECLARE_EWMA(avg_signal, 10, 8) 214 215 struct mt7996_sta_link { 216 struct mt76_wcid wcid; /* must be first */ 217 218 struct mt7996_sta *sta; 219 220 struct list_head rc_list; 221 u32 airtime_ac[8]; 222 223 int ack_signal; 224 struct ewma_avg_signal avg_ack_signal; 225 226 unsigned long changed; 227 228 struct mt76_connac_sta_key_conf bip; 229 230 struct { 231 u8 flowid_mask; 232 struct mt7996_twt_flow flow[MT7996_MAX_STA_TWT_AGRT]; 233 } twt; 234 235 struct rcu_head rcu_head; 236 }; 237 238 struct mt7996_sta { 239 struct mt7996_sta_link deflink; /* must be first */ 240 struct mt7996_sta_link __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS]; 241 u8 deflink_id; 242 243 struct mt7996_vif *vif; 244 }; 245 246 struct mt7996_vif_link { 247 struct mt76_vif_link mt76; /* must be first */ 248 249 struct mt7996_sta_link msta_link; 250 struct mt7996_phy *phy; 251 252 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS]; 253 struct cfg80211_bitrate_mask bitrate_mask; 254 }; 255 256 struct mt7996_vif { 257 struct mt7996_vif_link deflink; /* must be first */ 258 struct mt76_vif_data mt76; 259 }; 260 261 /* crash-dump */ 262 struct mt7996_crash_data { 263 guid_t guid; 264 struct timespec64 timestamp; 265 266 u8 *memdump_buf; 267 size_t memdump_buf_len; 268 }; 269 270 struct mt7996_hif { 271 struct list_head list; 272 273 struct device *dev; 274 void __iomem *regs; 275 int irq; 276 }; 277 278 struct mt7996_wed_rro_addr { 279 u32 head_low; 280 u32 head_high : 4; 281 u32 count: 11; 282 u32 oor: 1; 283 u32 rsv : 8; 284 u32 signature : 8; 285 }; 286 287 struct mt7996_wed_rro_session_id { 288 struct list_head list; 289 u16 id; 290 }; 291 292 struct mt7996_phy { 293 struct mt76_phy *mt76; 294 struct mt7996_dev *dev; 295 296 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 297 298 struct thermal_cooling_device *cdev; 299 u8 cdev_state; 300 u8 throttle_state; 301 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ 302 303 u32 rxfilter; 304 u64 omac_mask; 305 306 u16 noise; 307 308 s16 coverage_class; 309 u8 slottime; 310 311 u16 beacon_rate; 312 313 u32 rx_ampdu_ts; 314 u32 ampdu_ref; 315 int txpower; 316 317 struct mt76_mib_stats mib; 318 struct mt76_channel_state state_ts; 319 320 u16 orig_chainmask; 321 u16 orig_antenna_mask; 322 323 bool has_aux_rx; 324 bool counter_reset; 325 }; 326 327 struct mt7996_dev { 328 union { /* must be first */ 329 struct mt76_dev mt76; 330 struct mt76_phy mphy; 331 }; 332 333 struct mt7996_phy *radio_phy[MT7996_MAX_RADIOS]; 334 struct wiphy_radio radios[MT7996_MAX_RADIOS]; 335 struct wiphy_radio_freq_range radio_freqs[MT7996_MAX_RADIOS]; 336 337 struct mt7996_hif *hif2; 338 struct mt7996_reg_desc reg; 339 u8 q_id[MT7996_MAX_QUEUE]; 340 u32 q_int_mask[MT7996_MAX_QUEUE]; 341 u32 q_wfdma_mask; 342 343 const struct mt76_bus_ops *bus_ops; 344 struct mt7996_phy phy; 345 346 /* monitor rx chain configured channel */ 347 struct cfg80211_chan_def rdd2_chandef; 348 struct mt7996_phy *rdd2_phy; 349 350 u16 chainmask; 351 u8 chainshift[__MT_MAX_BAND]; 352 u32 hif_idx; 353 354 struct work_struct init_work; 355 struct work_struct rc_work; 356 struct work_struct dump_work; 357 struct work_struct reset_work; 358 wait_queue_head_t reset_wait; 359 struct { 360 u32 state; 361 u32 wa_reset_count; 362 u32 wm_reset_count; 363 bool hw_full_reset:1; 364 bool hw_init_done:1; 365 bool restart:1; 366 } recovery; 367 368 /* protects coredump data */ 369 struct mutex dump_mutex; 370 #ifdef CONFIG_DEV_COREDUMP 371 struct { 372 struct mt7996_crash_data *crash_data; 373 } coredump; 374 #endif 375 376 struct list_head sta_rc_list; 377 struct list_head twt_list; 378 379 u32 hw_pattern; 380 381 bool flash_mode:1; 382 bool has_eht:1; 383 bool has_rro:1; 384 385 struct { 386 struct { 387 void *ptr; 388 dma_addr_t phy_addr; 389 } ba_bitmap[MT7996_RRO_BA_BITMAP_LEN]; 390 struct { 391 void *ptr; 392 dma_addr_t phy_addr; 393 } addr_elem[MT7996_RRO_ADDR_ELEM_LEN]; 394 struct { 395 void *ptr; 396 dma_addr_t phy_addr; 397 } session; 398 399 struct work_struct work; 400 struct list_head poll_list; 401 spinlock_t lock; 402 } wed_rro; 403 404 bool ibf; 405 u8 fw_debug_wm; 406 u8 fw_debug_wa; 407 u8 fw_debug_bin; 408 u16 fw_debug_seq; 409 410 struct dentry *debugfs_dir; 411 struct rchan *relay_fwlog; 412 413 struct { 414 u16 table_mask; 415 u8 n_agrt; 416 } twt; 417 418 spinlock_t reg_lock; 419 420 u8 wtbl_size_group; 421 struct { 422 u8 type:4; 423 u8 fem:4; 424 } var; 425 }; 426 427 enum { 428 WFDMA0 = 0x0, 429 WFDMA1, 430 WFDMA_EXT, 431 __MT_WFDMA_MAX, 432 }; 433 434 enum rdd_idx { 435 MT_RDD_IDX_BAND2, /* RDD idx for band idx 2 */ 436 MT_RDD_IDX_BAND1, /* RDD idx for band idx 1 */ 437 MT_RDD_IDX_BACKGROUND, /* RDD idx for background chain */ 438 }; 439 440 enum mt7996_rdd_cmd { 441 RDD_STOP, 442 RDD_START, 443 RDD_DET_MODE, 444 RDD_RADAR_EMULATE, 445 RDD_START_TXQ = 20, 446 RDD_CAC_START = 50, 447 RDD_CAC_END, 448 RDD_NORMAL_START, 449 RDD_DISABLE_DFS_CAL, 450 RDD_PULSE_DBG, 451 RDD_READ_PULSE, 452 RDD_RESUME_BF, 453 RDD_IRQ_OFF, 454 }; 455 456 static inline int 457 mt7996_get_rdd_idx(struct mt7996_phy *phy, bool is_background) 458 { 459 if (!phy->mt76->cap.has_5ghz) 460 return -1; 461 462 if (is_background) 463 return MT_RDD_IDX_BACKGROUND; 464 465 if (phy->mt76->band_idx == MT_BAND2) 466 return MT_RDD_IDX_BAND2; 467 468 return MT_RDD_IDX_BAND1; 469 } 470 471 static inline struct mt7996_dev * 472 mt7996_hw_dev(struct ieee80211_hw *hw) 473 { 474 struct mt76_phy *phy = hw->priv; 475 476 return container_of(phy->dev, struct mt7996_dev, mt76); 477 } 478 479 static inline struct mt7996_phy * 480 __mt7996_phy(struct mt7996_dev *dev, enum mt76_band_id band) 481 { 482 struct mt76_phy *phy = dev->mt76.phys[band]; 483 484 if (!phy) 485 return NULL; 486 487 return phy->priv; 488 } 489 490 static inline struct mt7996_phy * 491 mt7996_phy2(struct mt7996_dev *dev) 492 { 493 return __mt7996_phy(dev, MT_BAND1); 494 } 495 496 static inline struct mt7996_phy * 497 mt7996_phy3(struct mt7996_dev *dev) 498 { 499 return __mt7996_phy(dev, MT_BAND2); 500 } 501 502 static inline bool 503 mt7996_band_valid(struct mt7996_dev *dev, u8 band) 504 { 505 if (!is_mt7996(&dev->mt76)) 506 return band <= MT_BAND1; 507 508 return band <= MT_BAND2; 509 } 510 511 static inline struct mt7996_phy * 512 mt7996_band_phy(struct mt7996_dev *dev, enum nl80211_band band) 513 { 514 struct mt76_phy *mphy; 515 516 mphy = dev->mt76.band_phys[band]; 517 if (!mphy) 518 return NULL; 519 520 return mphy->priv; 521 } 522 523 static inline struct mt7996_vif_link * 524 mt7996_vif_link(struct mt7996_dev *dev, struct ieee80211_vif *vif, int link_id) 525 { 526 return (struct mt7996_vif_link *)mt76_vif_link(&dev->mt76, vif, link_id); 527 } 528 529 static inline struct mt7996_phy * 530 mt7996_vif_link_phy(struct mt7996_vif_link *link) 531 { 532 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76); 533 534 if (!mphy) 535 return NULL; 536 537 return mphy->priv; 538 } 539 540 static inline struct mt7996_vif_link * 541 mt7996_vif_conf_link(struct mt7996_dev *dev, struct ieee80211_vif *vif, 542 struct ieee80211_bss_conf *link_conf) 543 { 544 return (struct mt7996_vif_link *)mt76_vif_conf_link(&dev->mt76, vif, 545 link_conf); 546 } 547 548 #define mt7996_for_each_phy(dev, phy) \ 549 for (int __i = 0; __i < ARRAY_SIZE((dev)->radio_phy); __i++) \ 550 if (((phy) = (dev)->radio_phy[__i]) != NULL) 551 552 extern const struct ieee80211_ops mt7996_ops; 553 extern struct pci_driver mt7996_pci_driver; 554 extern struct pci_driver mt7996_hif_driver; 555 556 struct mt7996_dev *mt7996_mmio_probe(struct device *pdev, 557 void __iomem *mem_base, u32 device_id); 558 void mt7996_wfsys_reset(struct mt7996_dev *dev); 559 irqreturn_t mt7996_irq_handler(int irq, void *dev_instance); 560 u64 __mt7996_get_tsf(struct ieee80211_hw *hw, struct mt7996_vif_link *link); 561 int mt7996_register_device(struct mt7996_dev *dev); 562 void mt7996_unregister_device(struct mt7996_dev *dev); 563 int mt7996_vif_link_add(struct mt76_phy *mphy, struct ieee80211_vif *vif, 564 struct ieee80211_bss_conf *link_conf, 565 struct mt76_vif_link *mlink); 566 void mt7996_vif_link_remove(struct mt76_phy *mphy, struct ieee80211_vif *vif, 567 struct ieee80211_bss_conf *link_conf, 568 struct mt76_vif_link *mlink); 569 int mt7996_eeprom_init(struct mt7996_dev *dev); 570 int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy); 571 int mt7996_eeprom_get_target_power(struct mt7996_dev *dev, 572 struct ieee80211_channel *chan); 573 s8 mt7996_eeprom_get_power_delta(struct mt7996_dev *dev, int band); 574 bool mt7996_eeprom_has_background_radar(struct mt7996_dev *dev); 575 int mt7996_dma_init(struct mt7996_dev *dev); 576 void mt7996_dma_reset(struct mt7996_dev *dev, bool force); 577 void mt7996_dma_prefetch(struct mt7996_dev *dev); 578 void mt7996_dma_cleanup(struct mt7996_dev *dev); 579 void mt7996_dma_start(struct mt7996_dev *dev, bool reset, bool wed_reset); 580 int mt7996_init_tx_queues(struct mt7996_phy *phy, int idx, 581 int n_desc, int ring_base, struct mtk_wed_device *wed); 582 void mt7996_init_txpower(struct mt7996_phy *phy); 583 int mt7996_txbf_init(struct mt7996_dev *dev); 584 void mt7996_reset(struct mt7996_dev *dev); 585 int mt7996_run(struct mt7996_phy *phy); 586 int mt7996_mcu_init(struct mt7996_dev *dev); 587 int mt7996_mcu_init_firmware(struct mt7996_dev *dev); 588 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 589 struct mt7996_vif_link *link, 590 struct mt7996_twt_flow *flow, 591 int cmd); 592 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 593 struct ieee80211_bss_conf *link_conf, 594 struct mt76_vif_link *mlink, bool enable); 595 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 596 struct ieee80211_bss_conf *link_conf, 597 struct mt76_vif_link *mlink, 598 struct mt7996_sta_link *msta_link, int enable); 599 int mt7996_mcu_add_sta(struct mt7996_dev *dev, 600 struct ieee80211_bss_conf *link_conf, 601 struct ieee80211_link_sta *link_sta, 602 struct mt7996_vif_link *link, 603 struct mt7996_sta_link *msta_link, 604 int conn_state, bool newly); 605 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev, 606 struct mt7996_vif_link *link, 607 struct mt7996_sta_link *msta_link); 608 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 609 struct ieee80211_ampdu_params *params, 610 struct mt7996_vif_link *link, 611 struct mt7996_sta_link *msta_link, bool enable); 612 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 613 struct ieee80211_ampdu_params *params, 614 struct mt7996_vif_link *link, bool enable); 615 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 616 struct mt76_vif_link *mlink, 617 struct cfg80211_he_bss_color *he_bss_color); 618 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 619 struct ieee80211_bss_conf *link_conf); 620 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 621 struct ieee80211_bss_conf *link_conf, 622 struct mt7996_vif_link *link, u32 changed); 623 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, 624 struct mt7996_vif_link *link, 625 struct ieee80211_he_obss_pd *he_obss_pd); 626 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct mt7996_sta *msta, 627 struct ieee80211_vif *vif, u8 link_id, 628 bool changed); 629 int mt7996_set_channel(struct mt76_phy *mphy); 630 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag); 631 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 632 struct ieee80211_bss_conf *link_conf); 633 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 634 void *data, u16 version); 635 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct mt7996_sta *msta, 636 void *data, u8 link_id, u32 field); 637 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev); 638 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len); 639 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num); 640 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap); 641 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 set, u8 band); 642 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action); 643 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val); 644 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 645 const struct mt7996_dfs_pulse *pulse); 646 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 647 const struct mt7996_dfs_pattern *pattern); 648 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable); 649 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val); 650 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 651 struct ieee80211_bss_conf *link_conf); 652 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch); 653 int mt7996_mcu_get_temperature(struct mt7996_phy *phy); 654 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state); 655 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable); 656 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy); 657 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 rdd_idx, u8 val); 658 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 659 struct cfg80211_chan_def *chandef); 660 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 661 u16 rate_idx, bool beacon); 662 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set); 663 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans); 664 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val); 665 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); 666 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl); 667 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level); 668 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev); 669 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb); 670 void mt7996_mcu_exit(struct mt7996_dev *dev); 671 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag); 672 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id); 673 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled); 674 675 static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev) 676 { 677 return min(MT7996_MAX_INTERFACES * (1 + mt7996_band_valid(dev, MT_BAND1) + 678 mt7996_band_valid(dev, MT_BAND2)), 679 MT7996_WTBL_BMC_SIZE); 680 } 681 682 static inline u16 mt7996_wtbl_size(struct mt7996_dev *dev) 683 { 684 return (dev->wtbl_size_group << 8) + MT7996_WTBL_BMC_SIZE; 685 } 686 687 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg, 688 u32 clear, u32 set); 689 690 static inline void mt7996_irq_enable(struct mt7996_dev *dev, u32 mask) 691 { 692 if (dev->hif2) 693 mt7996_dual_hif_set_irq_mask(dev, false, 0, mask); 694 else 695 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 696 697 tasklet_schedule(&dev->mt76.irq_tasklet); 698 } 699 700 static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask) 701 { 702 if (dev->hif2) 703 mt7996_dual_hif_set_irq_mask(dev, true, mask, 0); 704 else 705 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0); 706 } 707 708 void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset, 709 size_t len); 710 711 static inline u16 mt7996_rx_chainmask(struct mt7996_phy *phy) 712 { 713 int max_nss = hweight8(phy->mt76->hw->wiphy->available_antennas_tx); 714 int cur_nss = hweight8(phy->mt76->antenna_mask); 715 u16 tx_chainmask = phy->mt76->chainmask; 716 717 if (cur_nss != max_nss) 718 return tx_chainmask; 719 720 return tx_chainmask | (BIT(fls(tx_chainmask)) * phy->has_aux_rx); 721 } 722 723 static inline bool mt7996_has_wa(struct mt7996_dev *dev) 724 { 725 return !is_mt7990(&dev->mt76); 726 } 727 728 void mt7996_mac_init(struct mt7996_dev *dev); 729 u32 mt7996_mac_wtbl_lmac_addr(struct mt7996_dev *dev, u16 wcid, u8 dw); 730 bool mt7996_mac_wtbl_update(struct mt7996_dev *dev, int idx, u32 mask); 731 void mt7996_mac_reset_counters(struct mt7996_phy *phy); 732 void mt7996_mac_cca_stats_reset(struct mt7996_phy *phy); 733 void mt7996_mac_enable_nf(struct mt7996_dev *dev, u8 band); 734 void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi, 735 struct sk_buff *skb, struct mt76_wcid *wcid, 736 struct ieee80211_key_conf *key, int pid, 737 enum mt76_txq_id qid, u32 changed); 738 void mt7996_mac_update_beacons(struct mt7996_phy *phy); 739 void mt7996_mac_set_coverage_class(struct mt7996_phy *phy); 740 void mt7996_mac_work(struct work_struct *work); 741 void mt7996_mac_reset_work(struct work_struct *work); 742 void mt7996_mac_dump_work(struct work_struct *work); 743 void mt7996_mac_sta_rc_work(struct work_struct *work); 744 void mt7996_mac_update_stats(struct mt7996_phy *phy); 745 void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev, 746 struct mt7996_vif_link *link, 747 struct mt7996_sta_link *msta_link, 748 u8 flowid); 749 void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw, 750 struct ieee80211_sta *sta, 751 struct ieee80211_twt_setup *twt); 752 int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 753 enum mt76_txq_id qid, struct mt76_wcid *wcid, 754 struct ieee80211_sta *sta, 755 struct mt76_tx_info *tx_info); 756 void mt7996_tx_token_put(struct mt7996_dev *dev); 757 void mt7996_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 758 struct sk_buff *skb, u32 *info); 759 bool mt7996_rx_check(struct mt76_dev *mdev, void *data, int len); 760 void mt7996_stats_work(struct work_struct *work); 761 int mt76_dfs_start_rdd(struct mt7996_dev *dev, bool force); 762 int mt7996_dfs_init_radar_detector(struct mt7996_phy *phy); 763 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy); 764 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy); 765 void mt7996_update_channel(struct mt76_phy *mphy); 766 int mt7996_init_debugfs(struct mt7996_dev *dev); 767 void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len); 768 bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len); 769 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 770 struct ieee80211_key_conf *key, int mcu_cmd, 771 struct mt76_wcid *wcid, enum set_key_cmd cmd); 772 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, 773 struct mt7996_vif_link *link, 774 struct mt7996_sta_link *msta_link, 775 struct ieee80211_key_conf *key); 776 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 777 struct ieee80211_vif *vif, 778 struct mt7996_vif_link *link, 779 struct mt7996_sta_link *msta_link); 780 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode); 781 #ifdef CONFIG_MAC80211_DEBUGFS 782 void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 783 struct ieee80211_sta *sta, struct dentry *dir); 784 #endif 785 int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, 786 bool hif2, int *irq); 787 u32 mt7996_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); 788 789 #ifdef CONFIG_MTK_DEBUG 790 int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir); 791 #endif 792 793 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 794 int mt7996_dma_rro_init(struct mt7996_dev *dev); 795 #endif /* CONFIG_NET_MEDIATEK_SOC_WED */ 796 797 #endif 798