1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case 0x7992: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 default: \ 22 _fw = MT7992_##name; \ 23 } \ 24 break; \ 25 case 0x7990: \ 26 default: \ 27 switch ((_dev)->var.type) { \ 28 case MT7996_VAR_TYPE_233: \ 29 _fw = MT7996_##name##_233; \ 30 break; \ 31 default: \ 32 _fw = MT7996_##name; \ 33 } \ 34 break; \ 35 } \ 36 _fw; \ 37 }) 38 39 struct mt7996_patch_hdr { 40 char build_date[16]; 41 char platform[4]; 42 __be32 hw_sw_ver; 43 __be32 patch_ver; 44 __be16 checksum; 45 u16 reserved; 46 struct { 47 __be32 patch_ver; 48 __be32 subsys; 49 __be32 feature; 50 __be32 n_region; 51 __be32 crc; 52 u32 reserved[11]; 53 } desc; 54 } __packed; 55 56 struct mt7996_patch_sec { 57 __be32 type; 58 __be32 offs; 59 __be32 size; 60 union { 61 __be32 spec[13]; 62 struct { 63 __be32 addr; 64 __be32 len; 65 __be32 sec_key_idx; 66 __be32 align_len; 67 u32 reserved[9]; 68 } info; 69 }; 70 } __packed; 71 72 struct mt7996_fw_trailer { 73 u8 chip_id; 74 u8 eco_code; 75 u8 n_region; 76 u8 format_ver; 77 u8 format_flag; 78 u8 reserved[2]; 79 char fw_ver[10]; 80 char build_date[15]; 81 u32 crc; 82 } __packed; 83 84 struct mt7996_fw_region { 85 __le32 decomp_crc; 86 __le32 decomp_len; 87 __le32 decomp_blk_sz; 88 u8 reserved[4]; 89 __le32 addr; 90 __le32 len; 91 u8 feature_set; 92 u8 reserved1[15]; 93 } __packed; 94 95 #define MCU_PATCH_ADDRESS 0x200000 96 97 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 98 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 99 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 100 101 static bool sr_scene_detect = true; 102 module_param(sr_scene_detect, bool, 0644); 103 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 104 105 static u8 106 mt7996_mcu_get_sta_nss(u16 mcs_map) 107 { 108 u8 nss; 109 110 for (nss = 8; nss > 0; nss--) { 111 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 112 113 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 114 break; 115 } 116 117 return nss - 1; 118 } 119 120 static void 121 mt7996_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 122 u16 mcs_map) 123 { 124 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 125 enum nl80211_band band = msta->vif->deflink.phy->mt76->chandef.chan->band; 126 const u16 *mask = msta->vif->deflink.bitrate_mask.control[band].he_mcs; 127 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 128 129 for (nss = 0; nss < max_nss; nss++) { 130 int mcs; 131 132 switch ((mcs_map >> (2 * nss)) & 0x3) { 133 case IEEE80211_HE_MCS_SUPPORT_0_11: 134 mcs = GENMASK(11, 0); 135 break; 136 case IEEE80211_HE_MCS_SUPPORT_0_9: 137 mcs = GENMASK(9, 0); 138 break; 139 case IEEE80211_HE_MCS_SUPPORT_0_7: 140 mcs = GENMASK(7, 0); 141 break; 142 default: 143 mcs = 0; 144 } 145 146 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 147 148 switch (mcs) { 149 case 0 ... 7: 150 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 151 break; 152 case 8 ... 9: 153 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 154 break; 155 case 10 ... 11: 156 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 157 break; 158 default: 159 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 160 break; 161 } 162 mcs_map &= ~(0x3 << (nss * 2)); 163 mcs_map |= mcs << (nss * 2); 164 } 165 166 *he_mcs = cpu_to_le16(mcs_map); 167 } 168 169 static void 170 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 171 const u16 *mask) 172 { 173 u16 mcs, mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 174 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 175 176 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 177 switch (mcs_map & 0x3) { 178 case IEEE80211_VHT_MCS_SUPPORT_0_9: 179 mcs = GENMASK(9, 0); 180 break; 181 case IEEE80211_VHT_MCS_SUPPORT_0_8: 182 mcs = GENMASK(8, 0); 183 break; 184 case IEEE80211_VHT_MCS_SUPPORT_0_7: 185 mcs = GENMASK(7, 0); 186 break; 187 default: 188 mcs = 0; 189 } 190 191 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 192 } 193 } 194 195 static void 196 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 197 const u8 *mask) 198 { 199 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 200 201 for (nss = 0; nss < max_nss; nss++) 202 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 203 } 204 205 static int 206 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 207 struct sk_buff *skb, int seq) 208 { 209 struct mt7996_mcu_rxd *rxd; 210 struct mt7996_mcu_uni_event *event; 211 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 212 int ret = 0; 213 214 if (!skb) { 215 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 216 cmd, seq); 217 return -ETIMEDOUT; 218 } 219 220 rxd = (struct mt7996_mcu_rxd *)skb->data; 221 if (seq != rxd->seq) 222 return -EAGAIN; 223 224 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 225 skb_pull(skb, sizeof(*rxd) - 4); 226 ret = *skb->data; 227 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 228 rxd->eid == MCU_UNI_EVENT_RESULT) { 229 skb_pull(skb, sizeof(*rxd)); 230 event = (struct mt7996_mcu_uni_event *)skb->data; 231 ret = le32_to_cpu(event->status); 232 /* skip invalid event */ 233 if (mcu_cmd != event->cid) 234 ret = -EAGAIN; 235 } else { 236 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 237 } 238 239 return ret; 240 } 241 242 static int 243 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 244 int cmd, int *wait_seq) 245 { 246 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 247 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 248 struct mt76_connac2_mcu_uni_txd *uni_txd; 249 struct mt76_connac2_mcu_txd *mcu_txd; 250 enum mt76_mcuq_id qid; 251 __le32 *txd; 252 u32 val; 253 u8 seq; 254 255 mdev->mcu.timeout = 20 * HZ; 256 257 seq = ++dev->mt76.mcu.msg_seq & 0xf; 258 if (!seq) 259 seq = ++dev->mt76.mcu.msg_seq & 0xf; 260 261 if (cmd == MCU_CMD(FW_SCATTER)) { 262 qid = MT_MCUQ_FWDL; 263 goto exit; 264 } 265 266 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 267 txd = (__le32 *)skb_push(skb, txd_len); 268 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 269 qid = MT_MCUQ_WA; 270 else 271 qid = MT_MCUQ_WM; 272 273 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 274 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 275 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 276 txd[0] = cpu_to_le32(val); 277 278 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 279 txd[1] = cpu_to_le32(val); 280 281 if (cmd & __MCU_CMD_FIELD_UNI) { 282 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 283 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 284 uni_txd->cid = cpu_to_le16(mcu_cmd); 285 uni_txd->s2d_index = MCU_S2D_H2CN; 286 uni_txd->pkt_type = MCU_PKT_ID; 287 uni_txd->seq = seq; 288 289 if (cmd & __MCU_CMD_FIELD_QUERY) 290 uni_txd->option = MCU_CMD_UNI_QUERY_ACK; 291 else 292 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 293 294 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 295 uni_txd->s2d_index = MCU_S2D_H2CN; 296 else if (cmd & __MCU_CMD_FIELD_WA) 297 uni_txd->s2d_index = MCU_S2D_H2C; 298 else if (cmd & __MCU_CMD_FIELD_WM) 299 uni_txd->s2d_index = MCU_S2D_H2N; 300 301 goto exit; 302 } 303 304 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 305 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 306 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 307 MT_TX_MCU_PORT_RX_Q0)); 308 mcu_txd->pkt_type = MCU_PKT_ID; 309 mcu_txd->seq = seq; 310 311 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 312 mcu_txd->set_query = MCU_Q_NA; 313 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 314 if (mcu_txd->ext_cid) { 315 mcu_txd->ext_cid_ack = 1; 316 317 if (cmd & __MCU_CMD_FIELD_QUERY) 318 mcu_txd->set_query = MCU_Q_QUERY; 319 else 320 mcu_txd->set_query = MCU_Q_SET; 321 } 322 323 if (cmd & __MCU_CMD_FIELD_WA) 324 mcu_txd->s2d_index = MCU_S2D_H2C; 325 else 326 mcu_txd->s2d_index = MCU_S2D_H2N; 327 328 exit: 329 if (wait_seq) 330 *wait_seq = seq; 331 332 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 333 } 334 335 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 336 { 337 struct { 338 __le32 args[3]; 339 } req = { 340 .args = { 341 cpu_to_le32(a1), 342 cpu_to_le32(a2), 343 cpu_to_le32(a3), 344 }, 345 }; 346 347 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 348 } 349 350 static void 351 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 352 { 353 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 354 return; 355 356 ieee80211_csa_finish(vif, 0); 357 } 358 359 static void 360 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 361 { 362 struct mt76_phy *mphy = &dev->mt76.phy; 363 struct mt7996_mcu_rdd_report *r; 364 365 r = (struct mt7996_mcu_rdd_report *)skb->data; 366 367 if (r->band_idx >= ARRAY_SIZE(dev->mt76.phys)) 368 return; 369 370 if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy) 371 return; 372 373 if (r->band_idx == MT_RX_SEL2) 374 mphy = dev->rdd2_phy->mt76; 375 else 376 mphy = dev->mt76.phys[r->band_idx]; 377 378 if (!mphy) 379 return; 380 381 if (r->band_idx == MT_RX_SEL2) 382 cfg80211_background_radar_event(mphy->hw->wiphy, 383 &dev->rdd2_chandef, 384 GFP_ATOMIC); 385 else 386 ieee80211_radar_detected(mphy->hw, NULL); 387 dev->hw_pattern++; 388 } 389 390 static void 391 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 392 { 393 #define UNI_EVENT_FW_LOG_FORMAT 0 394 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 395 const char *data = (char *)&rxd[1] + 4, *type; 396 #if defined(__linux__) 397 struct tlv *tlv = (struct tlv *)data; 398 #elif defined(__FreeBSD__) 399 const struct tlv *tlv = (const struct tlv *)data; 400 #endif 401 int len; 402 403 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 404 len = skb->len - sizeof(*rxd); 405 data = (char *)&rxd[1]; 406 goto out; 407 } 408 409 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 410 return; 411 412 data += sizeof(*tlv) + 4; 413 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 414 415 out: 416 switch (rxd->s2d_index) { 417 case 0: 418 #if defined(CONFIG_MT7996_DEBUGFS) 419 if (mt7996_debugfs_rx_log(dev, data, len)) 420 return; 421 #endif 422 423 type = "WM"; 424 break; 425 case 2: 426 type = "WA"; 427 break; 428 default: 429 type = "unknown"; 430 break; 431 } 432 433 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 434 } 435 436 static void 437 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 438 { 439 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 440 return; 441 442 ieee80211_color_change_finish(vif, 0); 443 } 444 445 static void 446 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 447 { 448 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 449 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 450 struct header { 451 u8 band; 452 u8 rsv[3]; 453 }; 454 struct mt76_phy *mphy = &dev->mt76.phy; 455 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 456 const char *data = (char *)&rxd[1], *tail; 457 #if defined(__linux__) 458 struct header *hdr = (struct header *)data; 459 struct tlv *tlv = (struct tlv *)(data + 4); 460 #elif defined(__FreeBSD__) 461 const struct header *hdr = (const struct header *)data; 462 const struct tlv *tlv = (const struct tlv *)(data + 4); 463 #endif 464 465 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 466 return; 467 468 if (hdr->band && dev->mt76.phys[hdr->band]) 469 mphy = dev->mt76.phys[hdr->band]; 470 471 tail = skb->data + skb->len; 472 data += sizeof(struct header); 473 while (data + sizeof(struct tlv) < tail && le16_to_cpu(tlv->len)) { 474 switch (le16_to_cpu(tlv->tag)) { 475 case UNI_EVENT_IE_COUNTDOWN_CSA: 476 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 477 IEEE80211_IFACE_ITER_RESUME_ALL, 478 mt7996_mcu_csa_finish, mphy->hw); 479 break; 480 case UNI_EVENT_IE_COUNTDOWN_BCC: 481 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 482 IEEE80211_IFACE_ITER_RESUME_ALL, 483 mt7996_mcu_cca_finish, mphy->hw); 484 break; 485 } 486 487 data += le16_to_cpu(tlv->len); 488 #if defined(__linux__) 489 tlv = (struct tlv *)data; 490 #elif defined(__FreeBSD__) 491 tlv = (const struct tlv *)data; 492 #endif 493 } 494 } 495 496 static int 497 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 498 { 499 switch (mcu_rate->tx_mode) { 500 case MT_PHY_TYPE_CCK: 501 case MT_PHY_TYPE_OFDM: 502 break; 503 case MT_PHY_TYPE_HT: 504 case MT_PHY_TYPE_HT_GF: 505 case MT_PHY_TYPE_VHT: 506 if (mcu_rate->tx_gi) 507 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 508 else 509 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 510 break; 511 case MT_PHY_TYPE_HE_SU: 512 case MT_PHY_TYPE_HE_EXT_SU: 513 case MT_PHY_TYPE_HE_TB: 514 case MT_PHY_TYPE_HE_MU: 515 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 516 return -EINVAL; 517 rate->he_gi = mcu_rate->tx_gi; 518 break; 519 case MT_PHY_TYPE_EHT_SU: 520 case MT_PHY_TYPE_EHT_TRIG: 521 case MT_PHY_TYPE_EHT_MU: 522 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 523 return -EINVAL; 524 rate->eht_gi = mcu_rate->tx_gi; 525 break; 526 default: 527 return -EINVAL; 528 } 529 530 return 0; 531 } 532 533 static void 534 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 535 { 536 struct mt7996_mcu_all_sta_info_event *res; 537 u16 i; 538 539 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 540 541 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 542 543 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 544 u8 ac; 545 u16 wlan_idx; 546 struct mt76_wcid *wcid; 547 548 switch (le16_to_cpu(res->tag)) { 549 case UNI_ALL_STA_TXRX_RATE: 550 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 551 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 552 553 if (!wcid) 554 break; 555 556 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 557 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 558 break; 559 case UNI_ALL_STA_TXRX_ADM_STAT: 560 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 561 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 562 563 if (!wcid) 564 break; 565 566 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 567 wcid->stats.tx_bytes += 568 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 569 wcid->stats.rx_bytes += 570 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 571 } 572 break; 573 case UNI_ALL_STA_TXRX_MSDU_COUNT: 574 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 575 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]); 576 577 if (!wcid) 578 break; 579 580 wcid->stats.tx_packets += 581 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 582 wcid->stats.rx_packets += 583 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 584 break; 585 default: 586 break; 587 } 588 } 589 } 590 591 static void 592 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 593 { 594 #define THERMAL_NOTIFY_TAG 0x4 595 #define THERMAL_NOTIFY 0x2 596 struct mt76_phy *mphy = &dev->mt76.phy; 597 struct mt7996_mcu_thermal_notify *n; 598 struct mt7996_phy *phy; 599 600 n = (struct mt7996_mcu_thermal_notify *)skb->data; 601 602 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 603 return; 604 605 if (n->event_id != THERMAL_NOTIFY) 606 return; 607 608 if (n->band_idx > MT_BAND2) 609 return; 610 611 mphy = dev->mt76.phys[n->band_idx]; 612 if (!mphy) 613 return; 614 615 phy = (struct mt7996_phy *)mphy->priv; 616 phy->throttle_state = n->duty_percent; 617 } 618 619 static void 620 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 621 { 622 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 623 624 switch (rxd->ext_eid) { 625 case MCU_EXT_EVENT_FW_LOG_2_HOST: 626 mt7996_mcu_rx_log_message(dev, skb); 627 break; 628 default: 629 break; 630 } 631 } 632 633 static void 634 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 635 { 636 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 637 638 switch (rxd->eid) { 639 case MCU_EVENT_EXT: 640 mt7996_mcu_rx_ext_event(dev, skb); 641 break; 642 case MCU_UNI_EVENT_THERMAL: 643 mt7996_mcu_rx_thermal_notify(dev, skb); 644 break; 645 default: 646 break; 647 } 648 dev_kfree_skb(skb); 649 } 650 651 static void 652 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 653 { 654 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 655 656 if (!dev->has_rro) 657 return; 658 659 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 660 661 switch (le16_to_cpu(event->tag)) { 662 case UNI_WED_RRO_BA_SESSION_STATUS: { 663 struct mt7996_mcu_wed_rro_ba_event *e; 664 665 while (skb->len >= sizeof(*e)) { 666 struct mt76_rx_tid *tid; 667 struct mt76_wcid *wcid; 668 u16 idx; 669 670 e = (void *)skb->data; 671 idx = le16_to_cpu(e->wlan_id); 672 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) 673 break; 674 675 wcid = rcu_dereference(dev->mt76.wcid[idx]); 676 if (!wcid || !wcid->sta) 677 break; 678 679 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 680 break; 681 682 tid = rcu_dereference(wcid->aggr[e->tid]); 683 if (!tid) 684 break; 685 686 tid->id = le16_to_cpu(e->id); 687 skb_pull(skb, sizeof(*e)); 688 } 689 break; 690 } 691 case UNI_WED_RRO_BA_SESSION_DELETE: { 692 struct mt7996_mcu_wed_rro_ba_delete_event *e; 693 694 while (skb->len >= sizeof(*e)) { 695 struct mt7996_wed_rro_session_id *session; 696 697 e = (void *)skb->data; 698 session = kzalloc(sizeof(*session), GFP_ATOMIC); 699 if (!session) 700 break; 701 702 session->id = le16_to_cpu(e->session_id); 703 704 spin_lock_bh(&dev->wed_rro.lock); 705 list_add_tail(&session->list, &dev->wed_rro.poll_list); 706 spin_unlock_bh(&dev->wed_rro.lock); 707 708 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 709 skb_pull(skb, sizeof(*e)); 710 } 711 break; 712 } 713 default: 714 break; 715 } 716 } 717 718 static void 719 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 720 { 721 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 722 723 switch (rxd->eid) { 724 case MCU_UNI_EVENT_FW_LOG_2_HOST: 725 mt7996_mcu_rx_log_message(dev, skb); 726 break; 727 case MCU_UNI_EVENT_IE_COUNTDOWN: 728 mt7996_mcu_ie_countdown(dev, skb); 729 break; 730 case MCU_UNI_EVENT_RDD_REPORT: 731 mt7996_mcu_rx_radar_detected(dev, skb); 732 break; 733 case MCU_UNI_EVENT_ALL_STA_INFO: 734 mt7996_mcu_rx_all_sta_info_event(dev, skb); 735 break; 736 case MCU_UNI_EVENT_WED_RRO: 737 mt7996_mcu_wed_rro_event(dev, skb); 738 break; 739 default: 740 break; 741 } 742 dev_kfree_skb(skb); 743 } 744 745 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 746 { 747 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 748 749 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 750 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 751 return; 752 } 753 754 /* WA still uses legacy event*/ 755 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 756 !rxd->seq) 757 mt7996_mcu_rx_unsolicited_event(dev, skb); 758 else 759 mt76_mcu_rx_event(&dev->mt76, skb); 760 } 761 762 static struct tlv * 763 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 764 { 765 struct tlv *ptlv = skb_put_zero(skb, len); 766 767 ptlv->tag = cpu_to_le16(tag); 768 ptlv->len = cpu_to_le16(len); 769 770 return ptlv; 771 } 772 773 static void 774 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 775 { 776 static const u8 rlm_ch_band[] = { 777 [NL80211_BAND_2GHZ] = 1, 778 [NL80211_BAND_5GHZ] = 2, 779 [NL80211_BAND_6GHZ] = 3, 780 }; 781 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 782 struct bss_rlm_tlv *ch; 783 struct tlv *tlv; 784 int freq1 = chandef->center_freq1; 785 786 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 787 788 ch = (struct bss_rlm_tlv *)tlv; 789 ch->control_channel = chandef->chan->hw_value; 790 ch->center_chan = ieee80211_frequency_to_channel(freq1); 791 ch->bw = mt76_connac_chan_bw(chandef); 792 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 793 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 794 ch->band = rlm_ch_band[chandef->chan->band]; 795 796 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 797 int freq2 = chandef->center_freq2; 798 799 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 800 } 801 } 802 803 static void 804 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 805 { 806 struct bss_ra_tlv *ra; 807 struct tlv *tlv; 808 809 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 810 811 ra = (struct bss_ra_tlv *)tlv; 812 ra->short_preamble = true; 813 } 814 815 static void 816 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 817 struct ieee80211_bss_conf *link_conf, 818 struct mt7996_phy *phy) 819 { 820 #define DEFAULT_HE_PE_DURATION 4 821 #define DEFAULT_HE_DURATION_RTS_THRES 1023 822 const struct ieee80211_sta_he_cap *cap; 823 struct bss_info_uni_he *he; 824 struct tlv *tlv; 825 826 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 827 828 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 829 830 he = (struct bss_info_uni_he *)tlv; 831 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext; 832 if (!he->he_pe_duration) 833 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 834 835 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th); 836 if (!he->he_rts_thres) 837 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 838 839 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 840 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 841 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 842 } 843 844 static void 845 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf, 846 bool enable) 847 { 848 struct bss_info_uni_mbssid *mbssid; 849 struct tlv *tlv; 850 851 if (!link_conf->bssid_indicator && enable) 852 return; 853 854 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 855 856 mbssid = (struct bss_info_uni_mbssid *)tlv; 857 858 if (enable) { 859 mbssid->max_indicator = link_conf->bssid_indicator; 860 mbssid->mbss_idx = link_conf->bssid_index; 861 mbssid->tx_bss_omac_idx = 0; 862 } 863 } 864 865 static void 866 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink, 867 struct mt7996_phy *phy) 868 { 869 struct bss_rate_tlv *bmc; 870 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 871 enum nl80211_band band = chandef->chan->band; 872 struct tlv *tlv; 873 u8 idx = mlink->mcast_rates_idx ? 874 mlink->mcast_rates_idx : mlink->basic_rates_idx; 875 876 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 877 878 bmc = (struct bss_rate_tlv *)tlv; 879 880 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 881 bmc->bc_fixed_rate = idx; 882 bmc->mc_fixed_rate = idx; 883 } 884 885 static void 886 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 887 { 888 struct bss_txcmd_tlv *txcmd; 889 struct tlv *tlv; 890 891 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 892 893 txcmd = (struct bss_txcmd_tlv *)tlv; 894 txcmd->txcmd_mode = en; 895 } 896 897 static void 898 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 899 { 900 struct bss_mld_tlv *mld; 901 struct tlv *tlv; 902 903 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 904 905 mld = (struct bss_mld_tlv *)tlv; 906 mld->group_mld_id = 0xff; 907 mld->own_mld_id = mlink->idx; 908 mld->remap_idx = 0xff; 909 } 910 911 static void 912 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 913 { 914 struct bss_sec_tlv *sec; 915 struct tlv *tlv; 916 917 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 918 919 sec = (struct bss_sec_tlv *)tlv; 920 sec->cipher = mlink->cipher; 921 } 922 923 static int 924 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink, 925 const u8 *addr, bool bssid, bool enable) 926 { 927 #define UNI_MUAR_ENTRY 2 928 u32 idx = mlink->omac_idx - REPEATER_BSSID_START; 929 struct { 930 struct { 931 u8 band; 932 u8 __rsv[3]; 933 } hdr; 934 935 __le16 tag; 936 __le16 len; 937 938 bool smesh; 939 u8 bssid; 940 u8 index; 941 u8 entry_add; 942 u8 addr[ETH_ALEN]; 943 u8 __rsv[2]; 944 } __packed req = { 945 .hdr.band = mlink->band_idx, 946 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 947 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 948 .smesh = false, 949 .index = idx * 2 + bssid, 950 .entry_add = true, 951 }; 952 953 if (enable) 954 memcpy(req.addr, addr, ETH_ALEN); 955 956 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 957 sizeof(req), true); 958 } 959 960 static void 961 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 962 { 963 struct bss_ifs_time_tlv *ifs_time; 964 struct tlv *tlv; 965 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 966 967 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 968 969 ifs_time = (struct bss_ifs_time_tlv *)tlv; 970 ifs_time->slot_valid = true; 971 ifs_time->sifs_valid = true; 972 ifs_time->rifs_valid = true; 973 ifs_time->eifs_valid = true; 974 975 ifs_time->slot_time = cpu_to_le16(phy->slottime); 976 ifs_time->sifs_time = cpu_to_le16(10); 977 ifs_time->rifs_time = cpu_to_le16(2); 978 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 979 980 if (is_2ghz) { 981 ifs_time->eifs_cck_valid = true; 982 ifs_time->eifs_cck_time = cpu_to_le16(314); 983 } 984 } 985 986 static int 987 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 988 struct ieee80211_vif *vif, 989 struct ieee80211_bss_conf *link_conf, 990 struct mt76_vif_link *mvif, 991 struct mt76_phy *phy, u16 wlan_idx, 992 bool enable) 993 { 994 struct cfg80211_chan_def *chandef = &phy->chandef; 995 struct mt76_connac_bss_basic_tlv *bss; 996 u32 type = CONNECTION_INFRA_AP; 997 u16 sta_wlan_idx = wlan_idx; 998 struct ieee80211_sta *sta; 999 struct tlv *tlv; 1000 int idx; 1001 1002 switch (vif->type) { 1003 case NL80211_IFTYPE_MESH_POINT: 1004 case NL80211_IFTYPE_AP: 1005 case NL80211_IFTYPE_MONITOR: 1006 break; 1007 case NL80211_IFTYPE_STATION: 1008 if (enable) { 1009 rcu_read_lock(); 1010 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 1011 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 1012 if (sta) { 1013 struct mt76_wcid *wcid; 1014 1015 wcid = (struct mt76_wcid *)sta->drv_priv; 1016 sta_wlan_idx = wcid->idx; 1017 } 1018 rcu_read_unlock(); 1019 } 1020 type = CONNECTION_INFRA_STA; 1021 break; 1022 case NL80211_IFTYPE_ADHOC: 1023 type = CONNECTION_IBSS_ADHOC; 1024 break; 1025 default: 1026 WARN_ON(1); 1027 break; 1028 } 1029 1030 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1031 1032 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1033 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1034 bss->dtim_period = link_conf->dtim_period; 1035 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1036 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1037 bss->conn_type = cpu_to_le32(type); 1038 bss->omac_idx = mvif->omac_idx; 1039 bss->band_idx = mvif->band_idx; 1040 bss->wmm_idx = mvif->wmm_idx; 1041 bss->conn_state = !enable; 1042 bss->active = enable; 1043 1044 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1045 bss->hw_bss_idx = idx; 1046 1047 if (vif->type == NL80211_IFTYPE_MONITOR) { 1048 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1049 return 0; 1050 } 1051 1052 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN); 1053 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1054 bss->dtim_period = vif->bss_conf.dtim_period; 1055 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1056 chandef->chan->band, NULL); 1057 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, &vif->bss_conf, 1058 chandef->chan->band); 1059 1060 return 0; 1061 } 1062 1063 static struct sk_buff * 1064 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1065 { 1066 struct bss_req_hdr hdr = { 1067 .bss_idx = mvif->idx, 1068 }; 1069 struct sk_buff *skb; 1070 1071 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1072 if (!skb) 1073 return ERR_PTR(-ENOMEM); 1074 1075 skb_put_data(skb, &hdr, sizeof(hdr)); 1076 1077 return skb; 1078 } 1079 1080 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1081 struct ieee80211_bss_conf *link_conf, 1082 struct mt76_vif_link *mlink, int enable) 1083 { 1084 struct mt7996_dev *dev = phy->dev; 1085 struct sk_buff *skb; 1086 1087 if (mlink->omac_idx >= REPEATER_BSSID_START) { 1088 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 1089 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable); 1090 } 1091 1092 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1093 MT7996_BSS_UPDATE_MAX_SIZE); 1094 if (IS_ERR(skb)) 1095 return PTR_ERR(skb); 1096 1097 /* bss_basic must be first */ 1098 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76, 1099 mlink->wcid->idx, enable); 1100 mt7996_mcu_bss_sec_tlv(skb, mlink); 1101 1102 if (vif->type == NL80211_IFTYPE_MONITOR) 1103 goto out; 1104 1105 if (enable) { 1106 mt7996_mcu_bss_rfch_tlv(skb, phy); 1107 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy); 1108 mt7996_mcu_bss_ra_tlv(skb, phy); 1109 mt7996_mcu_bss_txcmd_tlv(skb, true); 1110 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1111 1112 if (vif->bss_conf.he_support) 1113 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy); 1114 1115 /* this tag is necessary no matter if the vif is MLD */ 1116 mt7996_mcu_bss_mld_tlv(skb, mlink); 1117 } 1118 1119 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable); 1120 1121 out: 1122 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1123 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1124 } 1125 1126 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1127 struct ieee80211_bss_conf *link_conf) 1128 { 1129 struct mt7996_dev *dev = phy->dev; 1130 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 1131 struct sk_buff *skb; 1132 1133 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1134 MT7996_BSS_UPDATE_MAX_SIZE); 1135 if (IS_ERR(skb)) 1136 return PTR_ERR(skb); 1137 1138 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1139 1140 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1141 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1142 } 1143 1144 static int 1145 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1146 struct ieee80211_ampdu_params *params, 1147 bool enable, bool tx) 1148 { 1149 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1150 struct sta_rec_ba_uni *ba; 1151 struct sk_buff *skb; 1152 struct tlv *tlv; 1153 1154 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1155 MT7996_STA_UPDATE_MAX_SIZE); 1156 if (IS_ERR(skb)) 1157 return PTR_ERR(skb); 1158 1159 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1160 1161 ba = (struct sta_rec_ba_uni *)tlv; 1162 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1163 ba->winsize = cpu_to_le16(params->buf_size); 1164 ba->ssn = cpu_to_le16(params->ssn); 1165 ba->ba_en = enable << params->tid; 1166 ba->amsdu = params->amsdu; 1167 ba->tid = params->tid; 1168 ba->ba_rdd_rro = !tx && enable && dev->has_rro; 1169 1170 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1171 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1172 } 1173 1174 /** starec & wtbl **/ 1175 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1176 struct ieee80211_ampdu_params *params, 1177 bool enable) 1178 { 1179 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1180 struct mt7996_vif *mvif = msta->vif; 1181 1182 if (enable && !params->amsdu) 1183 msta->wcid.amsdu = false; 1184 1185 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, true); 1186 } 1187 1188 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1189 struct ieee80211_ampdu_params *params, 1190 bool enable) 1191 { 1192 struct mt7996_sta *msta = (struct mt7996_sta *)params->sta->drv_priv; 1193 struct mt7996_vif *mvif = msta->vif; 1194 1195 return mt7996_mcu_sta_ba(dev, &mvif->deflink.mt76, params, enable, false); 1196 } 1197 1198 static void 1199 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1200 { 1201 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1202 struct ieee80211_he_mcs_nss_supp mcs_map; 1203 struct sta_rec_he_v2 *he; 1204 struct tlv *tlv; 1205 int i = 0; 1206 1207 if (!sta->deflink.he_cap.has_he) 1208 return; 1209 1210 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1211 1212 he = (struct sta_rec_he_v2 *)tlv; 1213 for (i = 0; i < 11; i++) { 1214 if (i < 6) 1215 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1216 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1217 } 1218 1219 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 1220 switch (sta->deflink.bandwidth) { 1221 case IEEE80211_STA_RX_BW_160: 1222 if (elem->phy_cap_info[0] & 1223 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1224 mt7996_mcu_set_sta_he_mcs(sta, 1225 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1226 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1227 1228 mt7996_mcu_set_sta_he_mcs(sta, 1229 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1230 le16_to_cpu(mcs_map.rx_mcs_160)); 1231 fallthrough; 1232 default: 1233 mt7996_mcu_set_sta_he_mcs(sta, 1234 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1235 le16_to_cpu(mcs_map.rx_mcs_80)); 1236 break; 1237 } 1238 1239 he->pkt_ext = 2; 1240 } 1241 1242 static void 1243 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1244 { 1245 struct sta_rec_he_6g_capa *he_6g; 1246 struct tlv *tlv; 1247 1248 if (!sta->deflink.he_6ghz_capa.capa) 1249 return; 1250 1251 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1252 1253 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1254 he_6g->capa = sta->deflink.he_6ghz_capa.capa; 1255 } 1256 1257 static void 1258 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1259 { 1260 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1261 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1262 struct ieee80211_vif, drv_priv); 1263 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1264 struct ieee80211_eht_cap_elem_fixed *elem; 1265 struct sta_rec_eht *eht; 1266 struct tlv *tlv; 1267 1268 if (!sta->deflink.eht_cap.has_eht) 1269 return; 1270 1271 mcs_map = &sta->deflink.eht_cap.eht_mcs_nss_supp; 1272 elem = &sta->deflink.eht_cap.eht_cap_elem; 1273 1274 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1275 1276 eht = (struct sta_rec_eht *)tlv; 1277 eht->tid_bitmap = 0xff; 1278 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1279 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1280 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1281 1282 if (vif->type != NL80211_IFTYPE_STATION && 1283 (sta->deflink.he_cap.he_cap_elem.phy_cap_info[0] & 1284 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1285 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1286 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1287 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1288 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1289 sizeof(eht->mcs_map_bw20)); 1290 return; 1291 } 1292 1293 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1294 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1295 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1296 } 1297 1298 static void 1299 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1300 { 1301 struct sta_rec_ht_uni *ht; 1302 struct tlv *tlv; 1303 1304 if (!sta->deflink.ht_cap.ht_supported) 1305 return; 1306 1307 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1308 1309 ht = (struct sta_rec_ht_uni *)tlv; 1310 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 1311 ht->ampdu_param = u8_encode_bits(sta->deflink.ht_cap.ampdu_factor, 1312 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1313 u8_encode_bits(sta->deflink.ht_cap.ampdu_density, 1314 IEEE80211_HT_AMPDU_PARM_DENSITY); 1315 } 1316 1317 static void 1318 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 1319 { 1320 struct sta_rec_vht *vht; 1321 struct tlv *tlv; 1322 1323 /* For 6G band, this tlv is necessary to let hw work normally */ 1324 if (!sta->deflink.he_6ghz_capa.capa && !sta->deflink.vht_cap.vht_supported) 1325 return; 1326 1327 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1328 1329 vht = (struct sta_rec_vht *)tlv; 1330 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 1331 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 1332 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 1333 } 1334 1335 static void 1336 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1337 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1338 { 1339 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1340 struct sta_rec_amsdu *amsdu; 1341 struct tlv *tlv; 1342 1343 if (vif->type != NL80211_IFTYPE_STATION && 1344 vif->type != NL80211_IFTYPE_MESH_POINT && 1345 vif->type != NL80211_IFTYPE_AP) 1346 return; 1347 1348 if (!sta->deflink.agg.max_amsdu_len) 1349 return; 1350 1351 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1352 amsdu = (struct sta_rec_amsdu *)tlv; 1353 amsdu->max_amsdu_num = 8; 1354 amsdu->amsdu_en = true; 1355 msta->wcid.amsdu = true; 1356 1357 switch (sta->deflink.agg.max_amsdu_len) { 1358 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1359 amsdu->max_mpdu_size = 1360 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1361 return; 1362 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1363 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1364 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1365 return; 1366 default: 1367 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1368 return; 1369 } 1370 } 1371 1372 static void 1373 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1374 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1375 { 1376 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 1377 struct sta_rec_muru *muru; 1378 struct tlv *tlv; 1379 1380 if (vif->type != NL80211_IFTYPE_STATION && 1381 vif->type != NL80211_IFTYPE_AP) 1382 return; 1383 1384 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1385 1386 muru = (struct sta_rec_muru *)tlv; 1387 muru->cfg.mimo_dl_en = vif->bss_conf.eht_mu_beamformer || 1388 vif->bss_conf.he_mu_beamformer || 1389 vif->bss_conf.vht_mu_beamformer || 1390 vif->bss_conf.vht_mu_beamformee; 1391 muru->cfg.ofdma_dl_en = true; 1392 1393 if (sta->deflink.vht_cap.vht_supported) 1394 muru->mimo_dl.vht_mu_bfee = 1395 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1396 1397 if (!sta->deflink.he_cap.has_he) 1398 return; 1399 1400 muru->mimo_dl.partial_bw_dl_mimo = 1401 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1402 1403 muru->mimo_ul.full_ul_mimo = 1404 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1405 muru->mimo_ul.partial_ul_mimo = 1406 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1407 1408 muru->ofdma_dl.punc_pream_rx = 1409 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1410 muru->ofdma_dl.he_20m_in_40m_2g = 1411 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1412 muru->ofdma_dl.he_20m_in_160m = 1413 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1414 muru->ofdma_dl.he_80m_in_160m = 1415 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1416 1417 muru->ofdma_ul.t_frame_dur = 1418 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1419 muru->ofdma_ul.mu_cascading = 1420 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1421 muru->ofdma_ul.uo_ra = 1422 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1423 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1424 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1425 } 1426 1427 static inline bool 1428 mt7996_is_ebf_supported(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1429 struct ieee80211_sta *sta, bool bfee) 1430 { 1431 int sts = hweight16(phy->mt76->chainmask); 1432 1433 if (vif->type != NL80211_IFTYPE_STATION && 1434 vif->type != NL80211_IFTYPE_AP) 1435 return false; 1436 1437 if (!bfee && sts < 2) 1438 return false; 1439 1440 if (sta->deflink.eht_cap.has_eht) { 1441 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1442 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1443 1444 if (bfee) 1445 return vif->bss_conf.eht_su_beamformee && 1446 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1447 else 1448 return vif->bss_conf.eht_su_beamformer && 1449 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1450 } 1451 1452 if (sta->deflink.he_cap.has_he) { 1453 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1454 1455 if (bfee) 1456 return vif->bss_conf.he_su_beamformee && 1457 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1458 else 1459 return vif->bss_conf.he_su_beamformer && 1460 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1461 } 1462 1463 if (sta->deflink.vht_cap.vht_supported) { 1464 u32 cap = sta->deflink.vht_cap.cap; 1465 1466 if (bfee) 1467 return vif->bss_conf.vht_su_beamformee && 1468 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1469 else 1470 return vif->bss_conf.vht_su_beamformer && 1471 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1472 } 1473 1474 return false; 1475 } 1476 1477 static void 1478 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf, struct mt7996_phy *phy) 1479 { 1480 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1481 bf->ndp_rate = 0; /* mcs0 */ 1482 if (is_mt7996(phy->mt76->dev)) 1483 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1484 else 1485 bf->ndpa_rate = MT7992_CFEND_RATE_DEFAULT; /* ofdm 6m */ 1486 1487 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1488 } 1489 1490 static void 1491 mt7996_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1492 struct sta_rec_bf *bf, bool explicit) 1493 { 1494 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1495 u8 n = 0; 1496 1497 bf->tx_mode = MT_PHY_TYPE_HT; 1498 1499 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1500 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1501 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1502 mcs->tx_params); 1503 else if (mcs->rx_mask[3]) 1504 n = 3; 1505 else if (mcs->rx_mask[2]) 1506 n = 2; 1507 else if (mcs->rx_mask[1]) 1508 n = 1; 1509 1510 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1511 bf->ncol = min_t(u8, bf->nrow, n); 1512 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1513 min_t(u8, MT7996_IBF_MAX_NC, n); 1514 } 1515 1516 static void 1517 mt7996_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7996_phy *phy, 1518 struct sta_rec_bf *bf, bool explicit) 1519 { 1520 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1521 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1522 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1523 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1524 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1525 1526 bf->tx_mode = MT_PHY_TYPE_VHT; 1527 1528 if (explicit) { 1529 u8 sts, snd_dim; 1530 1531 mt7996_mcu_sta_sounding_rate(bf, phy); 1532 1533 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1534 pc->cap); 1535 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1536 vc->cap); 1537 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1538 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1539 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, bf->ncol); 1540 1541 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1542 bf->nrow = 1; 1543 } else { 1544 bf->nrow = tx_ant; 1545 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1546 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1547 1548 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1549 bf->ibf_nrow = 1; 1550 } 1551 } 1552 1553 static void 1554 mt7996_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1555 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1556 bool explicit) 1557 { 1558 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1559 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1560 const struct ieee80211_sta_he_cap *vc = 1561 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1562 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1563 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1564 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1565 u8 snd_dim, sts; 1566 1567 if (!vc) 1568 return; 1569 1570 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1571 1572 mt7996_mcu_sta_sounding_rate(bf, phy); 1573 1574 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1575 pe->phy_cap_info[6]); 1576 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1577 pe->phy_cap_info[6]); 1578 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1579 ve->phy_cap_info[5]); 1580 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1581 pe->phy_cap_info[4]); 1582 bf->nrow = min_t(u8, snd_dim, sts); 1583 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1584 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1585 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1586 1587 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1588 return; 1589 1590 /* go over for 160MHz and 80p80 */ 1591 if (pe->phy_cap_info[0] & 1592 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1593 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1594 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1595 1596 bf->ncol_gt_bw80 = nss_mcs; 1597 } 1598 1599 if (pe->phy_cap_info[0] & 1600 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1601 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1602 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1603 1604 if (bf->ncol_gt_bw80) 1605 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1606 else 1607 bf->ncol_gt_bw80 = nss_mcs; 1608 } 1609 1610 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1611 ve->phy_cap_info[5]); 1612 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1613 pe->phy_cap_info[4]); 1614 1615 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1616 } 1617 1618 static void 1619 mt7996_mcu_sta_bfer_eht(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1620 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1621 bool explicit) 1622 { 1623 struct ieee80211_sta_eht_cap *pc = &sta->deflink.eht_cap; 1624 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1625 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1626 const struct ieee80211_sta_eht_cap *vc = 1627 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1628 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1629 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1630 IEEE80211_EHT_MCS_NSS_RX) - 1; 1631 u8 snd_dim, sts; 1632 1633 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1634 1635 mt7996_mcu_sta_sounding_rate(bf, phy); 1636 1637 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1638 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1639 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1640 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1641 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1642 bf->nrow = min_t(u8, snd_dim, sts); 1643 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1644 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1645 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1646 1647 if (sta->deflink.bandwidth < IEEE80211_STA_RX_BW_160) 1648 return; 1649 1650 switch (sta->deflink.bandwidth) { 1651 case IEEE80211_STA_RX_BW_160: 1652 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1653 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1654 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1655 IEEE80211_EHT_MCS_NSS_RX) - 1; 1656 1657 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1658 bf->ncol_gt_bw80 = nss_mcs; 1659 break; 1660 case IEEE80211_STA_RX_BW_320: 1661 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1662 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1663 ve->phy_cap_info[3]) << 1); 1664 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1665 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1666 IEEE80211_EHT_MCS_NSS_RX) - 1; 1667 1668 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1669 bf->ncol_gt_bw80 = nss_mcs << 4; 1670 break; 1671 default: 1672 break; 1673 } 1674 } 1675 1676 static void 1677 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1678 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1679 { 1680 #define EBF_MODE BIT(0) 1681 #define IBF_MODE BIT(1) 1682 #define BF_MAT_ORDER 4 1683 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1684 struct mt7996_phy *phy = mvif->deflink.phy; 1685 int tx_ant = hweight16(phy->mt76->chainmask) - 1; 1686 struct sta_rec_bf *bf; 1687 struct tlv *tlv; 1688 static const u8 matrix[BF_MAT_ORDER][BF_MAT_ORDER] = { 1689 {0, 0, 0, 0}, 1690 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1691 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1692 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1693 }; 1694 bool ebf; 1695 1696 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1697 return; 1698 1699 ebf = mt7996_is_ebf_supported(phy, vif, sta, false); 1700 if (!ebf && !dev->ibf) 1701 return; 1702 1703 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1704 bf = (struct sta_rec_bf *)tlv; 1705 1706 /* he/eht: eBF only, except mt7992 that has 5T on 5GHz also supports iBF 1707 * vht: support eBF and iBF 1708 * ht: iBF only, since mac80211 lacks of eBF support 1709 */ 1710 if (sta->deflink.eht_cap.has_eht) 1711 mt7996_mcu_sta_bfer_eht(sta, vif, phy, bf, ebf); 1712 else if (sta->deflink.he_cap.has_he) 1713 mt7996_mcu_sta_bfer_he(sta, vif, phy, bf, ebf); 1714 else if (sta->deflink.vht_cap.vht_supported) 1715 mt7996_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1716 else if (sta->deflink.ht_cap.ht_supported) 1717 mt7996_mcu_sta_bfer_ht(sta, phy, bf, ebf); 1718 else 1719 return; 1720 1721 bf->bf_cap = ebf ? EBF_MODE : (dev->ibf ? IBF_MODE : 0); 1722 if (is_mt7992(&dev->mt76) && tx_ant == 4) 1723 bf->bf_cap |= IBF_MODE; 1724 bf->bw = sta->deflink.bandwidth; 1725 bf->ibf_dbw = sta->deflink.bandwidth; 1726 bf->ibf_nrow = tx_ant; 1727 1728 if (sta->deflink.eht_cap.has_eht || sta->deflink.he_cap.has_he) 1729 bf->ibf_timeout = is_mt7996(&dev->mt76) ? MT7996_IBF_TIMEOUT : 1730 MT7992_IBF_TIMEOUT; 1731 else if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1732 bf->ibf_timeout = MT7996_IBF_TIMEOUT_LEGACY; 1733 else 1734 bf->ibf_timeout = MT7996_IBF_TIMEOUT; 1735 1736 if (bf->ncol < BF_MAT_ORDER) { 1737 if (ebf) 1738 bf->mem_20m = tx_ant < BF_MAT_ORDER ? 1739 matrix[tx_ant][bf->ncol] : 0; 1740 else 1741 bf->mem_20m = bf->nrow < BF_MAT_ORDER ? 1742 matrix[bf->nrow][bf->ncol] : 0; 1743 } 1744 1745 switch (sta->deflink.bandwidth) { 1746 case IEEE80211_STA_RX_BW_160: 1747 case IEEE80211_STA_RX_BW_80: 1748 bf->mem_total = bf->mem_20m * 2; 1749 break; 1750 case IEEE80211_STA_RX_BW_40: 1751 bf->mem_total = bf->mem_20m; 1752 break; 1753 case IEEE80211_STA_RX_BW_20: 1754 default: 1755 break; 1756 } 1757 } 1758 1759 static void 1760 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1761 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1762 { 1763 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1764 struct mt7996_phy *phy = mvif->deflink.phy; 1765 int tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1766 struct sta_rec_bfee *bfee; 1767 struct tlv *tlv; 1768 u8 nrow = 0; 1769 1770 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1771 return; 1772 1773 if (!mt7996_is_ebf_supported(phy, vif, sta, true)) 1774 return; 1775 1776 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1777 bfee = (struct sta_rec_bfee *)tlv; 1778 1779 if (sta->deflink.he_cap.has_he) { 1780 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1781 1782 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1783 pe->phy_cap_info[5]); 1784 } else if (sta->deflink.vht_cap.vht_supported) { 1785 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1786 1787 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1788 pc->cap); 1789 } 1790 1791 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1792 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1793 } 1794 1795 static void 1796 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 1797 { 1798 struct sta_rec_tx_proc *tx_proc; 1799 struct tlv *tlv; 1800 1801 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 1802 1803 tx_proc = (struct sta_rec_tx_proc *)tlv; 1804 tx_proc->flag = cpu_to_le32(0); 1805 } 1806 1807 static void 1808 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 1809 { 1810 struct sta_rec_hdrt *hdrt; 1811 struct tlv *tlv; 1812 1813 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 1814 1815 hdrt = (struct sta_rec_hdrt *)tlv; 1816 hdrt->hdrt_mode = 1; 1817 } 1818 1819 static void 1820 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1821 struct ieee80211_vif *vif, struct mt76_wcid *wcid) 1822 { 1823 struct sta_rec_hdr_trans *hdr_trans; 1824 struct tlv *tlv; 1825 1826 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 1827 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 1828 hdr_trans->dis_rx_hdr_tran = true; 1829 1830 if (vif->type == NL80211_IFTYPE_STATION) 1831 hdr_trans->to_ds = true; 1832 else 1833 hdr_trans->from_ds = true; 1834 1835 if (!wcid) 1836 return; 1837 1838 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 1839 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 1840 hdr_trans->to_ds = true; 1841 hdr_trans->from_ds = true; 1842 } 1843 1844 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 1845 hdr_trans->to_ds = true; 1846 hdr_trans->from_ds = true; 1847 hdr_trans->mesh = true; 1848 } 1849 } 1850 1851 static enum mcu_mmps_mode 1852 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1853 { 1854 switch (smps) { 1855 case IEEE80211_SMPS_OFF: 1856 return MCU_MMPS_DISABLE; 1857 case IEEE80211_SMPS_STATIC: 1858 return MCU_MMPS_STATIC; 1859 case IEEE80211_SMPS_DYNAMIC: 1860 return MCU_MMPS_DYNAMIC; 1861 default: 1862 return MCU_MMPS_DISABLE; 1863 } 1864 } 1865 1866 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 1867 void *data, u16 version) 1868 { 1869 struct ra_fixed_rate *req; 1870 struct uni_header hdr; 1871 struct sk_buff *skb; 1872 struct tlv *tlv; 1873 int len; 1874 1875 len = sizeof(hdr) + sizeof(*req); 1876 1877 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 1878 if (!skb) 1879 return -ENOMEM; 1880 1881 skb_put_data(skb, &hdr, sizeof(hdr)); 1882 1883 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 1884 req = (struct ra_fixed_rate *)tlv; 1885 req->version = cpu_to_le16(version); 1886 memcpy(&req->rate, data, sizeof(req->rate)); 1887 1888 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1889 MCU_WM_UNI_CMD(RA), true); 1890 } 1891 1892 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1893 struct ieee80211_sta *sta, void *data, u32 field) 1894 { 1895 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1896 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1897 struct sta_phy_uni *phy = data; 1898 struct sta_rec_ra_fixed_uni *ra; 1899 struct sk_buff *skb; 1900 struct tlv *tlv; 1901 1902 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 1903 &msta->wcid, 1904 MT7996_STA_UPDATE_MAX_SIZE); 1905 if (IS_ERR(skb)) 1906 return PTR_ERR(skb); 1907 1908 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1909 ra = (struct sta_rec_ra_fixed_uni *)tlv; 1910 1911 switch (field) { 1912 case RATE_PARAM_AUTO: 1913 break; 1914 case RATE_PARAM_FIXED: 1915 case RATE_PARAM_FIXED_MCS: 1916 case RATE_PARAM_FIXED_GI: 1917 case RATE_PARAM_FIXED_HE_LTF: 1918 if (phy) 1919 ra->phy = *phy; 1920 break; 1921 case RATE_PARAM_MMPS_UPDATE: 1922 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 1923 break; 1924 default: 1925 break; 1926 } 1927 ra->field = cpu_to_le32(field); 1928 1929 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1930 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1931 } 1932 1933 static int 1934 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct ieee80211_vif *vif, 1935 struct ieee80211_sta *sta) 1936 { 1937 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1938 struct cfg80211_chan_def *chandef = &mvif->deflink.phy->mt76->chandef; 1939 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask; 1940 enum nl80211_band band = chandef->chan->band; 1941 struct sta_phy_uni phy = {}; 1942 int ret, nrates = 0; 1943 1944 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1945 do { \ 1946 u8 i, gi = mask->control[band]._gi; \ 1947 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1948 phy.sgi = gi; \ 1949 phy.he_ltf = mask->control[band].he_ltf; \ 1950 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1951 if (!mask->control[band]._mcs[i]) \ 1952 continue; \ 1953 nrates += hweight16(mask->control[band]._mcs[i]); \ 1954 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1955 if (_ht) \ 1956 phy.mcs += 8 * i; \ 1957 } \ 1958 } while (0) 1959 1960 if (sta->deflink.he_cap.has_he) { 1961 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1962 } else if (sta->deflink.vht_cap.vht_supported) { 1963 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1964 } else if (sta->deflink.ht_cap.ht_supported) { 1965 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1966 } else { 1967 nrates = hweight32(mask->control[band].legacy); 1968 phy.mcs = ffs(mask->control[band].legacy) - 1; 1969 } 1970 #undef __sta_phy_bitrate_mask_check 1971 1972 /* fall back to auto rate control */ 1973 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1974 mask->control[band].he_gi == GENMASK(7, 0) && 1975 mask->control[band].he_ltf == GENMASK(7, 0) && 1976 nrates != 1) 1977 return 0; 1978 1979 /* fixed single rate */ 1980 if (nrates == 1) { 1981 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 1982 RATE_PARAM_FIXED_MCS); 1983 if (ret) 1984 return ret; 1985 } 1986 1987 /* fixed GI */ 1988 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1989 mask->control[band].he_gi != GENMASK(7, 0)) { 1990 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1991 u32 addr; 1992 1993 /* firmware updates only TXCMD but doesn't take WTBL into 1994 * account, so driver should update here to reflect the 1995 * actual txrate hardware sends out. 1996 */ 1997 addr = mt7996_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1998 if (sta->deflink.he_cap.has_he) 1999 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 2000 else 2001 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 2002 2003 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 2004 RATE_PARAM_FIXED_GI); 2005 if (ret) 2006 return ret; 2007 } 2008 2009 /* fixed HE_LTF */ 2010 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 2011 ret = mt7996_mcu_set_fixed_field(dev, vif, sta, &phy, 2012 RATE_PARAM_FIXED_HE_LTF); 2013 if (ret) 2014 return ret; 2015 } 2016 2017 return 0; 2018 } 2019 2020 static void 2021 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 2022 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 2023 { 2024 #define INIT_RCPI 180 2025 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2026 struct mt76_phy *mphy = mvif->deflink.phy->mt76; 2027 struct cfg80211_chan_def *chandef = &mphy->chandef; 2028 struct cfg80211_bitrate_mask *mask = &mvif->deflink.bitrate_mask; 2029 enum nl80211_band band = chandef->chan->band; 2030 struct sta_rec_ra_uni *ra; 2031 struct tlv *tlv; 2032 u32 supp_rate = sta->deflink.supp_rates[band]; 2033 u32 cap = sta->wme ? STA_CAP_WMM : 0; 2034 2035 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2036 ra = (struct sta_rec_ra_uni *)tlv; 2037 2038 ra->valid = true; 2039 ra->auto_rate = true; 2040 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink); 2041 ra->channel = chandef->chan->hw_value; 2042 ra->bw = (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_320) ? 2043 CMD_CBW_320MHZ : sta->deflink.bandwidth; 2044 ra->phy.bw = ra->bw; 2045 ra->mmps_mode = mt7996_mcu_get_mmps_mode(sta->deflink.smps_mode); 2046 2047 if (supp_rate) { 2048 supp_rate &= mask->control[band].legacy; 2049 ra->rate_len = hweight32(supp_rate); 2050 2051 if (band == NL80211_BAND_2GHZ) { 2052 ra->supp_mode = MODE_CCK; 2053 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2054 2055 if (ra->rate_len > 4) { 2056 ra->supp_mode |= MODE_OFDM; 2057 ra->supp_ofdm_rate = supp_rate >> 4; 2058 } 2059 } else { 2060 ra->supp_mode = MODE_OFDM; 2061 ra->supp_ofdm_rate = supp_rate; 2062 } 2063 } 2064 2065 if (sta->deflink.ht_cap.ht_supported) { 2066 ra->supp_mode |= MODE_HT; 2067 ra->af = sta->deflink.ht_cap.ampdu_factor; 2068 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2069 2070 cap |= STA_CAP_HT; 2071 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2072 cap |= STA_CAP_SGI_20; 2073 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2074 cap |= STA_CAP_SGI_40; 2075 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2076 cap |= STA_CAP_TX_STBC; 2077 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2078 cap |= STA_CAP_RX_STBC; 2079 if (vif->bss_conf.ht_ldpc && 2080 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2081 cap |= STA_CAP_LDPC; 2082 2083 mt7996_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 2084 mask->control[band].ht_mcs); 2085 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2086 } 2087 2088 if (sta->deflink.vht_cap.vht_supported) { 2089 u8 af; 2090 2091 ra->supp_mode |= MODE_VHT; 2092 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2093 sta->deflink.vht_cap.cap); 2094 ra->af = max_t(u8, ra->af, af); 2095 2096 cap |= STA_CAP_VHT; 2097 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2098 cap |= STA_CAP_VHT_SGI_80; 2099 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2100 cap |= STA_CAP_VHT_SGI_160; 2101 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2102 cap |= STA_CAP_VHT_TX_STBC; 2103 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2104 cap |= STA_CAP_VHT_RX_STBC; 2105 if ((vif->type != NL80211_IFTYPE_AP || vif->bss_conf.vht_ldpc) && 2106 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2107 cap |= STA_CAP_VHT_LDPC; 2108 2109 mt7996_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 2110 mask->control[band].vht_mcs); 2111 } 2112 2113 if (sta->deflink.he_cap.has_he) { 2114 ra->supp_mode |= MODE_HE; 2115 cap |= STA_CAP_HE; 2116 2117 if (sta->deflink.he_6ghz_capa.capa) 2118 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 2119 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2120 } 2121 ra->sta_cap = cpu_to_le32(cap); 2122 2123 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2124 } 2125 2126 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2127 struct ieee80211_sta *sta, bool changed) 2128 { 2129 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2130 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2131 struct sk_buff *skb; 2132 int ret; 2133 2134 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 2135 &msta->wcid, 2136 MT7996_STA_UPDATE_MAX_SIZE); 2137 if (IS_ERR(skb)) 2138 return PTR_ERR(skb); 2139 2140 /* firmware rc algorithm refers to sta_rec_he for HE control. 2141 * once dev->rc_work changes the settings driver should also 2142 * update sta_rec_he here. 2143 */ 2144 if (changed) 2145 mt7996_mcu_sta_he_tlv(skb, sta); 2146 2147 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2148 * i.e 0-{7,8,9} for VHT. 2149 */ 2150 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 2151 2152 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2153 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2154 if (ret) 2155 return ret; 2156 2157 return mt7996_mcu_add_rate_ctrl_fixed(dev, vif, sta); 2158 } 2159 2160 static int 2161 mt7996_mcu_add_group(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2162 struct ieee80211_sta *sta) 2163 { 2164 #define MT_STA_BSS_GROUP 1 2165 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2166 struct mt7996_sta *msta; 2167 struct { 2168 u8 __rsv1[4]; 2169 2170 __le16 tag; 2171 __le16 len; 2172 __le16 wlan_idx; 2173 u8 __rsv2[2]; 2174 __le32 action; 2175 __le32 val; 2176 u8 __rsv3[8]; 2177 } __packed req = { 2178 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2179 .len = cpu_to_le16(sizeof(req) - 4), 2180 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2181 .val = cpu_to_le32(mvif->deflink.mt76.idx % 16), 2182 }; 2183 2184 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta; 2185 req.wlan_idx = cpu_to_le16(msta->wcid.idx); 2186 2187 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2188 sizeof(req), true); 2189 } 2190 2191 int mt7996_mcu_add_sta(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2192 struct mt76_vif_link *mlink, 2193 struct ieee80211_sta *sta, int conn_state, bool newly) 2194 { 2195 struct ieee80211_link_sta *link_sta = NULL; 2196 struct mt76_wcid *wcid = mlink->wcid; 2197 struct sk_buff *skb; 2198 int ret; 2199 2200 if (sta) { 2201 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2202 2203 wcid = &msta->wcid; 2204 link_sta = &sta->deflink; 2205 } 2206 2207 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mlink, wcid, 2208 MT7996_STA_UPDATE_MAX_SIZE); 2209 if (IS_ERR(skb)) 2210 return PTR_ERR(skb); 2211 2212 /* starec basic */ 2213 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta, 2214 conn_state, newly); 2215 2216 if (conn_state == CONN_STATE_DISCONNECT) 2217 goto out; 2218 2219 /* starec hdr trans */ 2220 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, wcid); 2221 /* starec tx proc */ 2222 mt7996_mcu_sta_tx_proc_tlv(skb); 2223 2224 /* tag order is in accordance with firmware dependency. */ 2225 if (sta) { 2226 /* starec hdrt mode */ 2227 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2228 /* starec bfer */ 2229 mt7996_mcu_sta_bfer_tlv(dev, skb, vif, sta); 2230 /* starec ht */ 2231 mt7996_mcu_sta_ht_tlv(skb, sta); 2232 /* starec vht */ 2233 mt7996_mcu_sta_vht_tlv(skb, sta); 2234 /* starec uapsd */ 2235 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 2236 /* starec amsdu */ 2237 mt7996_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 2238 /* starec he */ 2239 mt7996_mcu_sta_he_tlv(skb, sta); 2240 /* starec he 6g*/ 2241 mt7996_mcu_sta_he_6g_tlv(skb, sta); 2242 /* starec eht */ 2243 mt7996_mcu_sta_eht_tlv(skb, sta); 2244 /* starec muru */ 2245 mt7996_mcu_sta_muru_tlv(dev, skb, vif, sta); 2246 /* starec bfee */ 2247 mt7996_mcu_sta_bfee_tlv(dev, skb, vif, sta); 2248 } 2249 2250 ret = mt7996_mcu_add_group(dev, vif, sta); 2251 if (ret) { 2252 dev_kfree_skb(skb); 2253 return ret; 2254 } 2255 out: 2256 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2257 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2258 } 2259 2260 static int 2261 mt7996_mcu_sta_key_tlv(struct mt76_wcid *wcid, 2262 struct sk_buff *skb, 2263 struct ieee80211_key_conf *key, 2264 enum set_key_cmd cmd) 2265 { 2266 struct sta_rec_sec_uni *sec; 2267 struct tlv *tlv; 2268 2269 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2270 sec = (struct sta_rec_sec_uni *)tlv; 2271 sec->add = cmd; 2272 2273 if (cmd == SET_KEY) { 2274 struct sec_key_uni *sec_key; 2275 u8 cipher; 2276 2277 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2278 if (cipher == MCU_CIPHER_NONE) 2279 return -EOPNOTSUPP; 2280 2281 sec_key = &sec->key[0]; 2282 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2283 sec_key->mgmt_prot = 0; 2284 sec_key->cipher_id = cipher; 2285 sec_key->cipher_len = sizeof(*sec_key); 2286 sec_key->key_id = key->keyidx; 2287 sec_key->key_len = key->keylen; 2288 sec_key->need_resp = 0; 2289 memcpy(sec_key->key, key->key, key->keylen); 2290 2291 if (cipher == MCU_CIPHER_TKIP) { 2292 /* Rx/Tx MIC keys are swapped */ 2293 memcpy(sec_key->key + 16, key->key + 24, 8); 2294 memcpy(sec_key->key + 24, key->key + 16, 8); 2295 } 2296 2297 sec->n_cipher = 1; 2298 } else { 2299 sec->n_cipher = 0; 2300 } 2301 2302 return 0; 2303 } 2304 2305 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2306 struct ieee80211_key_conf *key, int mcu_cmd, 2307 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2308 { 2309 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2310 struct sk_buff *skb; 2311 int ret; 2312 2313 skb = __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, 2314 MT7996_STA_UPDATE_MAX_SIZE); 2315 if (IS_ERR(skb)) 2316 return PTR_ERR(skb); 2317 2318 ret = mt7996_mcu_sta_key_tlv(wcid, skb, key, cmd); 2319 if (ret) 2320 return ret; 2321 2322 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2323 } 2324 2325 static int mt7996_mcu_get_pn(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2326 u8 *pn) 2327 { 2328 #define TSC_TYPE_BIGTK_PN 2 2329 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2330 struct sta_rec_pn_info *pn_info; 2331 struct sk_buff *skb, *rskb; 2332 struct tlv *tlv; 2333 int ret; 2334 2335 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, &mvif->deflink.sta.wcid); 2336 if (IS_ERR(skb)) 2337 return PTR_ERR(skb); 2338 2339 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PN_INFO, sizeof(*pn_info)); 2340 pn_info = (struct sta_rec_pn_info *)tlv; 2341 2342 pn_info->tsc_type = TSC_TYPE_BIGTK_PN; 2343 ret = mt76_mcu_skb_send_and_get_msg(&dev->mt76, skb, 2344 MCU_WM_UNI_CMD_QUERY(STA_REC_UPDATE), 2345 true, &rskb); 2346 if (ret) 2347 return ret; 2348 2349 skb_pull(rskb, 4); 2350 2351 pn_info = (struct sta_rec_pn_info *)rskb->data; 2352 if (le16_to_cpu(pn_info->tag) == STA_REC_PN_INFO) 2353 memcpy(pn, pn_info->pn, 6); 2354 2355 dev_kfree_skb(rskb); 2356 return 0; 2357 } 2358 2359 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev, struct ieee80211_vif *vif, 2360 struct ieee80211_key_conf *key) 2361 { 2362 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2363 struct mt7996_mcu_bcn_prot_tlv *bcn_prot; 2364 struct sk_buff *skb; 2365 struct tlv *tlv; 2366 u8 pn[6] = {}; 2367 int len = sizeof(struct bss_req_hdr) + 2368 sizeof(struct mt7996_mcu_bcn_prot_tlv); 2369 int ret; 2370 2371 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76, len); 2372 if (IS_ERR(skb)) 2373 return PTR_ERR(skb); 2374 2375 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BCN_PROT, sizeof(*bcn_prot)); 2376 2377 bcn_prot = (struct mt7996_mcu_bcn_prot_tlv *)tlv; 2378 2379 ret = mt7996_mcu_get_pn(dev, vif, pn); 2380 if (ret) { 2381 dev_kfree_skb(skb); 2382 return ret; 2383 } 2384 2385 switch (key->cipher) { 2386 case WLAN_CIPHER_SUITE_AES_CMAC: 2387 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2388 break; 2389 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2390 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2391 break; 2392 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2393 bcn_prot->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2394 break; 2395 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2396 default: 2397 dev_err(dev->mt76.dev, "Not supported Bigtk Cipher\n"); 2398 dev_kfree_skb(skb); 2399 return -EOPNOTSUPP; 2400 } 2401 2402 pn[0]++; 2403 memcpy(bcn_prot->pn, pn, 6); 2404 bcn_prot->enable = BP_SW_MODE; 2405 memcpy(bcn_prot->key, key->key, WLAN_MAX_KEY_LEN); 2406 bcn_prot->key_id = key->keyidx; 2407 2408 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2409 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2410 } 2411 2412 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 2413 struct ieee80211_bss_conf *link_conf, 2414 struct mt76_vif_link *mlink, bool enable) 2415 { 2416 struct mt7996_dev *dev = phy->dev; 2417 struct { 2418 struct req_hdr { 2419 u8 omac_idx; 2420 u8 band_idx; 2421 u8 __rsv[2]; 2422 } __packed hdr; 2423 struct req_tlv { 2424 __le16 tag; 2425 __le16 len; 2426 u8 active; 2427 u8 __rsv; 2428 u8 omac_addr[ETH_ALEN]; 2429 } __packed tlv; 2430 } data = { 2431 .hdr = { 2432 .omac_idx = mlink->omac_idx, 2433 .band_idx = mlink->band_idx, 2434 }, 2435 .tlv = { 2436 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2437 .len = cpu_to_le16(sizeof(struct req_tlv)), 2438 .active = enable, 2439 }, 2440 }; 2441 2442 if (mlink->omac_idx >= REPEATER_BSSID_START) 2443 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 2444 2445 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN); 2446 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2447 &data, sizeof(data), true); 2448 } 2449 2450 static void 2451 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb, 2452 struct ieee80211_mutable_offsets *offs, 2453 bool csa) 2454 { 2455 struct bss_bcn_cntdwn_tlv *info; 2456 struct tlv *tlv; 2457 u16 tag; 2458 2459 if (!offs->cntdwn_counter_offs[0]) 2460 return; 2461 2462 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 2463 2464 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 2465 2466 info = (struct bss_bcn_cntdwn_tlv *)tlv; 2467 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 2468 } 2469 2470 static void 2471 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 2472 struct bss_bcn_content_tlv *bcn, 2473 struct ieee80211_mutable_offsets *offs) 2474 { 2475 struct bss_bcn_mbss_tlv *mbss; 2476 const struct element *elem; 2477 struct tlv *tlv; 2478 2479 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 2480 2481 mbss = (struct bss_bcn_mbss_tlv *)tlv; 2482 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 2483 mbss->bitmap = cpu_to_le32(1); 2484 2485 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 2486 &skb->data[offs->mbssid_off], 2487 skb->len - offs->mbssid_off) { 2488 const struct element *sub_elem; 2489 2490 if (elem->datalen < 2) 2491 continue; 2492 2493 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 2494 const struct ieee80211_bssid_index *idx; 2495 const u8 *idx_ie; 2496 2497 /* not a valid BSS profile */ 2498 if (sub_elem->id || sub_elem->datalen < 4) 2499 continue; 2500 2501 /* Find WLAN_EID_MULTI_BSSID_IDX 2502 * in the merged nontransmitted profile 2503 */ 2504 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 2505 sub_elem->data, sub_elem->datalen); 2506 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 2507 continue; 2508 2509 #if defined(__linux__) 2510 idx = (void *)(idx_ie + 2); 2511 #elif defined(__FreeBSD__) 2512 idx = (const void *)(idx_ie + 2); 2513 #endif 2514 if (!idx->bssid_index || idx->bssid_index > 31) 2515 continue; 2516 2517 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 2518 skb->data); 2519 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 2520 } 2521 } 2522 } 2523 2524 static void 2525 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, 2526 struct ieee80211_bss_conf *link_conf, 2527 struct sk_buff *rskb, struct sk_buff *skb, 2528 struct bss_bcn_content_tlv *bcn, 2529 struct ieee80211_mutable_offsets *offs) 2530 { 2531 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2532 u8 *buf; 2533 2534 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2535 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 2536 2537 if (offs->cntdwn_counter_offs[0]) { 2538 u16 offset = offs->cntdwn_counter_offs[0]; 2539 2540 if (link_conf->csa_active) 2541 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 2542 if (link_conf->color_change_active) 2543 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 2544 } 2545 2546 buf = (u8 *)bcn + sizeof(*bcn); 2547 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 2548 BSS_CHANGED_BEACON); 2549 2550 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2551 } 2552 2553 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2554 struct ieee80211_bss_conf *link_conf) 2555 { 2556 struct mt7996_dev *dev = mt7996_hw_dev(hw); 2557 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 2558 struct ieee80211_mutable_offsets offs; 2559 struct ieee80211_tx_info *info; 2560 struct sk_buff *skb, *rskb; 2561 struct tlv *tlv; 2562 struct bss_bcn_content_tlv *bcn; 2563 int len, extra_len = 0; 2564 2565 if (link_conf->nontransmitted) 2566 return 0; 2567 2568 if (!mlink) 2569 return -EINVAL; 2570 2571 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 2572 MT7996_MAX_BSS_OFFLOAD_SIZE); 2573 if (IS_ERR(rskb)) 2574 return PTR_ERR(rskb); 2575 2576 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id); 2577 if (link_conf->enable_beacon && !skb) { 2578 dev_kfree_skb(rskb); 2579 return -EINVAL; 2580 } 2581 2582 if (skb) { 2583 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2584 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2585 dev_kfree_skb(rskb); 2586 dev_kfree_skb(skb); 2587 return -EINVAL; 2588 } 2589 2590 extra_len = skb->len; 2591 } 2592 2593 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + extra_len, 4); 2594 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 2595 bcn = (struct bss_bcn_content_tlv *)tlv; 2596 bcn->enable = link_conf->enable_beacon; 2597 if (!bcn->enable) 2598 goto out; 2599 2600 info = IEEE80211_SKB_CB(skb); 2601 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx); 2602 2603 mt7996_mcu_beacon_cont(dev, link_conf, rskb, skb, bcn, &offs); 2604 if (link_conf->bssid_indicator) 2605 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs); 2606 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active); 2607 out: 2608 dev_kfree_skb(skb); 2609 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2610 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2611 } 2612 2613 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 2614 struct ieee80211_vif *vif, u32 changed) 2615 { 2616 #define OFFLOAD_TX_MODE_SU BIT(0) 2617 #define OFFLOAD_TX_MODE_MU BIT(1) 2618 struct ieee80211_hw *hw = mt76_hw(dev); 2619 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2620 struct mt7996_phy *phy = mt7996_vif_link_phy(&mvif->deflink); 2621 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2622 struct bss_inband_discovery_tlv *discov; 2623 struct ieee80211_tx_info *info; 2624 struct sk_buff *rskb, *skb = NULL; 2625 struct cfg80211_chan_def *chandef; 2626 enum nl80211_band band; 2627 struct tlv *tlv; 2628 u8 *buf, interval; 2629 int len; 2630 2631 if (!phy) 2632 return -EINVAL; 2633 2634 chandef = &phy->mt76->chandef; 2635 band = chandef->chan->band; 2636 2637 if (vif->bss_conf.nontransmitted) 2638 return 0; 2639 2640 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &mvif->deflink.mt76, 2641 MT7996_MAX_BSS_OFFLOAD_SIZE); 2642 if (IS_ERR(rskb)) 2643 return PTR_ERR(rskb); 2644 2645 if (changed & BSS_CHANGED_FILS_DISCOVERY && 2646 vif->bss_conf.fils_discovery.max_interval) { 2647 interval = vif->bss_conf.fils_discovery.max_interval; 2648 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 2649 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 2650 vif->bss_conf.unsol_bcast_probe_resp_interval) { 2651 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 2652 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 2653 } 2654 2655 if (!skb) { 2656 dev_kfree_skb(rskb); 2657 return -EINVAL; 2658 } 2659 2660 if (skb->len > MT7996_MAX_BEACON_SIZE) { 2661 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2662 dev_kfree_skb(rskb); 2663 dev_kfree_skb(skb); 2664 return -EINVAL; 2665 } 2666 2667 info = IEEE80211_SKB_CB(skb); 2668 info->control.vif = vif; 2669 info->band = band; 2670 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx); 2671 2672 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 2673 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 2674 2675 discov = (struct bss_inband_discovery_tlv *)tlv; 2676 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2677 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2678 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2679 discov->tx_interval = interval; 2680 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2681 discov->enable = true; 2682 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 2683 2684 buf = (u8 *)tlv + sizeof(*discov); 2685 2686 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 2687 2688 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2689 2690 dev_kfree_skb(skb); 2691 2692 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 2693 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2694 } 2695 2696 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 2697 { 2698 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2699 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2700 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2701 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2702 return -EIO; 2703 } 2704 2705 /* clear irq when the driver own success */ 2706 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2707 MT_TOP_LPCR_HOST_BAND_STAT); 2708 2709 return 0; 2710 } 2711 2712 static u32 mt7996_patch_sec_mode(u32 key_info) 2713 { 2714 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 2715 2716 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 2717 return 0; 2718 2719 if (sec == MT7996_SEC_MODE_AES) 2720 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 2721 else 2722 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 2723 2724 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 2725 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 2726 } 2727 2728 static int mt7996_load_patch(struct mt7996_dev *dev) 2729 { 2730 const struct mt7996_patch_hdr *hdr; 2731 const struct firmware *fw = NULL; 2732 int i, ret, sem; 2733 2734 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 2735 switch (sem) { 2736 case PATCH_IS_DL: 2737 return 0; 2738 case PATCH_NOT_DL_SEM_SUCCESS: 2739 break; 2740 default: 2741 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 2742 return -EAGAIN; 2743 } 2744 2745 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 2746 if (ret) 2747 goto out; 2748 2749 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2750 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2751 ret = -EINVAL; 2752 goto out; 2753 } 2754 2755 hdr = (const struct mt7996_patch_hdr *)(fw->data); 2756 2757 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 2758 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 2759 2760 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 2761 #if defined(__linux__) 2762 struct mt7996_patch_sec *sec; 2763 #elif defined(__FreeBSD__) 2764 const struct mt7996_patch_sec *sec; 2765 #endif 2766 const u8 *dl; 2767 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 2768 2769 #if defined(__linux__) 2770 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2771 #elif defined(__FreeBSD__) 2772 sec = (const struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 2773 #endif 2774 i * sizeof(*sec)); 2775 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 2776 PATCH_SEC_TYPE_INFO) { 2777 ret = -EINVAL; 2778 goto out; 2779 } 2780 2781 addr = be32_to_cpu(sec->info.addr); 2782 len = be32_to_cpu(sec->info.len); 2783 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 2784 dl = fw->data + be32_to_cpu(sec->offs); 2785 2786 mode |= mt7996_patch_sec_mode(sec_key_idx); 2787 2788 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2789 mode); 2790 if (ret) { 2791 dev_err(dev->mt76.dev, "Download request failed\n"); 2792 goto out; 2793 } 2794 2795 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2796 dl, len, 4096); 2797 if (ret) { 2798 dev_err(dev->mt76.dev, "Failed to send patch\n"); 2799 goto out; 2800 } 2801 } 2802 2803 ret = mt76_connac_mcu_start_patch(&dev->mt76); 2804 if (ret) 2805 dev_err(dev->mt76.dev, "Failed to start patch\n"); 2806 2807 out: 2808 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 2809 switch (sem) { 2810 case PATCH_REL_SEM_SUCCESS: 2811 break; 2812 default: 2813 ret = -EAGAIN; 2814 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 2815 break; 2816 } 2817 release_firmware(fw); 2818 2819 return ret; 2820 } 2821 2822 static int 2823 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 2824 const struct mt7996_fw_trailer *hdr, 2825 const u8 *data, enum mt7996_ram_type type) 2826 { 2827 int i, offset = 0; 2828 u32 override = 0, option = 0; 2829 2830 for (i = 0; i < hdr->n_region; i++) { 2831 const struct mt7996_fw_region *region; 2832 int err; 2833 u32 len, addr, mode; 2834 2835 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 2836 (hdr->n_region - i) * sizeof(*region)); 2837 /* DSP and WA use same mode */ 2838 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 2839 region->feature_set, 2840 type != MT7996_RAM_TYPE_WM); 2841 len = le32_to_cpu(region->len); 2842 addr = le32_to_cpu(region->addr); 2843 2844 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 2845 override = addr; 2846 2847 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 2848 mode); 2849 if (err) { 2850 dev_err(dev->mt76.dev, "Download request failed\n"); 2851 return err; 2852 } 2853 2854 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 2855 data + offset, len, 4096); 2856 if (err) { 2857 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 2858 return err; 2859 } 2860 2861 offset += len; 2862 } 2863 2864 if (override) 2865 option |= FW_START_OVERRIDE; 2866 2867 if (type == MT7996_RAM_TYPE_WA) 2868 option |= FW_START_WORKING_PDA_CR4; 2869 else if (type == MT7996_RAM_TYPE_DSP) 2870 option |= FW_START_WORKING_PDA_DSP; 2871 2872 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 2873 } 2874 2875 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 2876 const char *fw_file, enum mt7996_ram_type ram_type) 2877 { 2878 const struct mt7996_fw_trailer *hdr; 2879 const struct firmware *fw; 2880 int ret; 2881 2882 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 2883 if (ret) 2884 return ret; 2885 2886 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 2887 dev_err(dev->mt76.dev, "Invalid firmware\n"); 2888 ret = -EINVAL; 2889 goto out; 2890 } 2891 2892 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 2893 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 2894 fw_type, hdr->fw_ver, hdr->build_date); 2895 2896 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 2897 if (ret) { 2898 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 2899 goto out; 2900 } 2901 2902 snprintf(dev->mt76.hw->wiphy->fw_version, 2903 sizeof(dev->mt76.hw->wiphy->fw_version), 2904 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 2905 2906 out: 2907 release_firmware(fw); 2908 2909 return ret; 2910 } 2911 2912 static int mt7996_load_ram(struct mt7996_dev *dev) 2913 { 2914 int ret; 2915 2916 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 2917 MT7996_RAM_TYPE_WM); 2918 if (ret) 2919 return ret; 2920 2921 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 2922 MT7996_RAM_TYPE_DSP); 2923 if (ret) 2924 return ret; 2925 2926 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 2927 MT7996_RAM_TYPE_WA); 2928 } 2929 2930 static int 2931 mt7996_firmware_state(struct mt7996_dev *dev, bool wa) 2932 { 2933 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2934 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2935 2936 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2937 state, 1000)) { 2938 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2939 return -EIO; 2940 } 2941 return 0; 2942 } 2943 2944 static int 2945 mt7996_mcu_restart(struct mt76_dev *dev) 2946 { 2947 struct { 2948 u8 __rsv1[4]; 2949 2950 __le16 tag; 2951 __le16 len; 2952 u8 power_mode; 2953 u8 __rsv2[3]; 2954 } __packed req = { 2955 .tag = cpu_to_le16(UNI_POWER_OFF), 2956 .len = cpu_to_le16(sizeof(req) - 4), 2957 .power_mode = 1, 2958 }; 2959 2960 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 2961 sizeof(req), false); 2962 } 2963 2964 static int mt7996_load_firmware(struct mt7996_dev *dev) 2965 { 2966 int ret; 2967 2968 /* make sure fw is download state */ 2969 if (mt7996_firmware_state(dev, false)) { 2970 /* restart firmware once */ 2971 mt7996_mcu_restart(&dev->mt76); 2972 ret = mt7996_firmware_state(dev, false); 2973 if (ret) { 2974 dev_err(dev->mt76.dev, 2975 "Firmware is not ready for download\n"); 2976 return ret; 2977 } 2978 } 2979 2980 ret = mt7996_load_patch(dev); 2981 if (ret) 2982 return ret; 2983 2984 ret = mt7996_load_ram(dev); 2985 if (ret) 2986 return ret; 2987 2988 ret = mt7996_firmware_state(dev, true); 2989 if (ret) 2990 return ret; 2991 2992 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2993 2994 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2995 2996 return 0; 2997 } 2998 2999 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 3000 { 3001 struct { 3002 u8 _rsv[4]; 3003 3004 __le16 tag; 3005 __le16 len; 3006 u8 ctrl; 3007 u8 interval; 3008 u8 _rsv2[2]; 3009 } __packed data = { 3010 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 3011 .len = cpu_to_le16(sizeof(data) - 4), 3012 .ctrl = ctrl, 3013 }; 3014 3015 if (type == MCU_FW_LOG_WA) 3016 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 3017 &data, sizeof(data), true); 3018 3019 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3020 sizeof(data), true); 3021 } 3022 3023 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 3024 { 3025 struct { 3026 u8 _rsv[4]; 3027 3028 __le16 tag; 3029 __le16 len; 3030 __le32 module_idx; 3031 u8 level; 3032 u8 _rsv2[3]; 3033 } data = { 3034 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 3035 .len = cpu_to_le16(sizeof(data) - 4), 3036 .module_idx = cpu_to_le32(module), 3037 .level = level, 3038 }; 3039 3040 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3041 sizeof(data), false); 3042 } 3043 3044 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 3045 { 3046 struct { 3047 u8 enable; 3048 u8 _rsv[3]; 3049 } __packed req = { 3050 .enable = enabled 3051 }; 3052 3053 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3054 sizeof(req), false); 3055 } 3056 3057 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3058 { 3059 struct vow_rx_airtime *req; 3060 struct tlv *tlv; 3061 3062 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3063 req = (struct vow_rx_airtime *)tlv; 3064 req->enable = true; 3065 req->band = band_idx; 3066 3067 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3068 req = (struct vow_rx_airtime *)tlv; 3069 req->enable = true; 3070 req->band = band_idx; 3071 } 3072 3073 static int 3074 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3075 { 3076 struct uni_header hdr = {}; 3077 struct sk_buff *skb; 3078 int len, num, i; 3079 3080 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3081 mt7996_band_valid(dev, MT_BAND2)); 3082 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3083 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3084 if (!skb) 3085 return -ENOMEM; 3086 3087 skb_put_data(skb, &hdr, sizeof(hdr)); 3088 3089 for (i = 0; i < __MT_MAX_BAND; i++) { 3090 if (mt7996_band_valid(dev, i)) 3091 mt7996_add_rx_airtime_tlv(skb, i); 3092 } 3093 3094 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3095 MCU_WM_UNI_CMD(VOW), true); 3096 } 3097 3098 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3099 { 3100 int ret; 3101 3102 /* force firmware operation mode into normal state, 3103 * which should be set before firmware download stage. 3104 */ 3105 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3106 3107 ret = mt7996_driver_own(dev, 0); 3108 if (ret) 3109 return ret; 3110 /* set driver own for band1 when two hif exist */ 3111 if (dev->hif2) { 3112 ret = mt7996_driver_own(dev, 1); 3113 if (ret) 3114 return ret; 3115 } 3116 3117 ret = mt7996_load_firmware(dev); 3118 if (ret) 3119 return ret; 3120 3121 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3122 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3123 if (ret) 3124 return ret; 3125 3126 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3127 if (ret) 3128 return ret; 3129 3130 ret = mt7996_mcu_set_mwds(dev, 1); 3131 if (ret) 3132 return ret; 3133 3134 ret = mt7996_mcu_init_rx_airtime(dev); 3135 if (ret) 3136 return ret; 3137 3138 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3139 MCU_WA_PARAM_RED, 0, 0); 3140 } 3141 3142 int mt7996_mcu_init(struct mt7996_dev *dev) 3143 { 3144 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3145 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3146 .mcu_skb_send_msg = mt7996_mcu_send_message, 3147 .mcu_parse_response = mt7996_mcu_parse_response, 3148 }; 3149 3150 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3151 3152 return mt7996_mcu_init_firmware(dev); 3153 } 3154 3155 void mt7996_mcu_exit(struct mt7996_dev *dev) 3156 { 3157 mt7996_mcu_restart(&dev->mt76); 3158 if (mt7996_firmware_state(dev, false)) { 3159 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3160 goto out; 3161 } 3162 3163 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3164 if (dev->hif2) 3165 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3166 MT_TOP_LPCR_HOST_FW_OWN); 3167 out: 3168 skb_queue_purge(&dev->mt76.mcu.res_q); 3169 } 3170 3171 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3172 { 3173 struct { 3174 u8 __rsv[4]; 3175 } __packed hdr; 3176 struct hdr_trans_blacklist *req_blacklist; 3177 struct hdr_trans_en *req_en; 3178 struct sk_buff *skb; 3179 struct tlv *tlv; 3180 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3181 3182 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3183 if (!skb) 3184 return -ENOMEM; 3185 3186 skb_put_data(skb, &hdr, sizeof(hdr)); 3187 3188 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3189 req_en = (struct hdr_trans_en *)tlv; 3190 req_en->enable = hdr_trans; 3191 3192 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3193 sizeof(struct hdr_trans_vlan)); 3194 3195 if (hdr_trans) { 3196 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3197 sizeof(*req_blacklist)); 3198 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3199 req_blacklist->enable = 1; 3200 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3201 } 3202 3203 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3204 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3205 } 3206 3207 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3208 struct ieee80211_bss_conf *link_conf) 3209 { 3210 #define MCU_EDCA_AC_PARAM 0 3211 #define WMM_AIFS_SET BIT(0) 3212 #define WMM_CW_MIN_SET BIT(1) 3213 #define WMM_CW_MAX_SET BIT(2) 3214 #define WMM_TXOP_SET BIT(3) 3215 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3216 WMM_CW_MAX_SET | WMM_TXOP_SET) 3217 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3218 struct { 3219 u8 bss_idx; 3220 u8 __rsv[3]; 3221 } __packed hdr = { 3222 .bss_idx = link->mt76.idx, 3223 }; 3224 struct sk_buff *skb; 3225 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3226 int ac; 3227 3228 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3229 if (!skb) 3230 return -ENOMEM; 3231 3232 skb_put_data(skb, &hdr, sizeof(hdr)); 3233 3234 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3235 struct ieee80211_tx_queue_params *q = &link->queue_params[ac]; 3236 struct edca *e; 3237 struct tlv *tlv; 3238 3239 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3240 3241 e = (struct edca *)tlv; 3242 e->set = WMM_PARAM_SET; 3243 e->queue = ac; 3244 e->aifs = q->aifs; 3245 e->txop = cpu_to_le16(q->txop); 3246 3247 if (q->cw_min) 3248 e->cw_min = fls(q->cw_min); 3249 else 3250 e->cw_min = 5; 3251 3252 if (q->cw_max) 3253 e->cw_max = fls(q->cw_max); 3254 else 3255 e->cw_max = 10; 3256 } 3257 3258 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3259 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3260 } 3261 3262 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3263 { 3264 struct { 3265 u8 _rsv[4]; 3266 3267 __le16 tag; 3268 __le16 len; 3269 3270 __le32 ctrl; 3271 __le16 min_lpn; 3272 u8 rsv[2]; 3273 } __packed req = { 3274 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3275 .len = cpu_to_le16(sizeof(req) - 4), 3276 3277 .ctrl = cpu_to_le32(0x1), 3278 .min_lpn = cpu_to_le16(val), 3279 }; 3280 3281 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3282 &req, sizeof(req), true); 3283 } 3284 3285 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3286 const struct mt7996_dfs_pulse *pulse) 3287 { 3288 struct { 3289 u8 _rsv[4]; 3290 3291 __le16 tag; 3292 __le16 len; 3293 3294 __le32 ctrl; 3295 3296 __le32 max_width; /* us */ 3297 __le32 max_pwr; /* dbm */ 3298 __le32 min_pwr; /* dbm */ 3299 __le32 min_stgr_pri; /* us */ 3300 __le32 max_stgr_pri; /* us */ 3301 __le32 min_cr_pri; /* us */ 3302 __le32 max_cr_pri; /* us */ 3303 } __packed req = { 3304 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3305 .len = cpu_to_le16(sizeof(req) - 4), 3306 3307 .ctrl = cpu_to_le32(0x3), 3308 3309 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3310 __req_field(max_width), 3311 __req_field(max_pwr), 3312 __req_field(min_pwr), 3313 __req_field(min_stgr_pri), 3314 __req_field(max_stgr_pri), 3315 __req_field(min_cr_pri), 3316 __req_field(max_cr_pri), 3317 #undef __req_field 3318 }; 3319 3320 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3321 &req, sizeof(req), true); 3322 } 3323 3324 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3325 const struct mt7996_dfs_pattern *pattern) 3326 { 3327 struct { 3328 u8 _rsv[4]; 3329 3330 __le16 tag; 3331 __le16 len; 3332 3333 __le32 ctrl; 3334 __le16 radar_type; 3335 3336 u8 enb; 3337 u8 stgr; 3338 u8 min_crpn; 3339 u8 max_crpn; 3340 u8 min_crpr; 3341 u8 min_pw; 3342 __le32 min_pri; 3343 __le32 max_pri; 3344 u8 max_pw; 3345 u8 min_crbn; 3346 u8 max_crbn; 3347 u8 min_stgpn; 3348 u8 max_stgpn; 3349 u8 min_stgpr; 3350 u8 rsv[2]; 3351 __le32 min_stgpr_diff; 3352 } __packed req = { 3353 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3354 .len = cpu_to_le16(sizeof(req) - 4), 3355 3356 .ctrl = cpu_to_le32(0x2), 3357 .radar_type = cpu_to_le16(index), 3358 3359 #define __req_field_u8(field) .field = pattern->field 3360 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3361 __req_field_u8(enb), 3362 __req_field_u8(stgr), 3363 __req_field_u8(min_crpn), 3364 __req_field_u8(max_crpn), 3365 __req_field_u8(min_crpr), 3366 __req_field_u8(min_pw), 3367 __req_field_u32(min_pri), 3368 __req_field_u32(max_pri), 3369 __req_field_u8(max_pw), 3370 __req_field_u8(min_crbn), 3371 __req_field_u8(max_crbn), 3372 __req_field_u8(min_stgpn), 3373 __req_field_u8(max_stgpn), 3374 __req_field_u8(min_stgpr), 3375 __req_field_u32(min_stgpr_diff), 3376 #undef __req_field_u8 3377 #undef __req_field_u32 3378 }; 3379 3380 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3381 &req, sizeof(req), true); 3382 } 3383 3384 static int 3385 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3386 struct cfg80211_chan_def *chandef, 3387 int cmd) 3388 { 3389 struct mt7996_dev *dev = phy->dev; 3390 struct mt76_phy *mphy = phy->mt76; 3391 struct ieee80211_channel *chan = mphy->chandef.chan; 3392 int freq = mphy->chandef.center_freq1; 3393 struct mt7996_mcu_background_chain_ctrl req = { 3394 .tag = cpu_to_le16(0), 3395 .len = cpu_to_le16(sizeof(req) - 4), 3396 .monitor_scan_type = 2, /* simple rx */ 3397 }; 3398 3399 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3400 return -EINVAL; 3401 3402 if (!cfg80211_chandef_valid(&mphy->chandef)) 3403 return -EINVAL; 3404 3405 switch (cmd) { 3406 case CH_SWITCH_BACKGROUND_SCAN_START: { 3407 req.chan = chan->hw_value; 3408 req.central_chan = ieee80211_frequency_to_channel(freq); 3409 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3410 req.monitor_chan = chandef->chan->hw_value; 3411 req.monitor_central_chan = 3412 ieee80211_frequency_to_channel(chandef->center_freq1); 3413 req.monitor_bw = mt76_connac_chan_bw(chandef); 3414 req.band_idx = phy->mt76->band_idx; 3415 req.scan_mode = 1; 3416 break; 3417 } 3418 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3419 req.monitor_chan = chandef->chan->hw_value; 3420 req.monitor_central_chan = 3421 ieee80211_frequency_to_channel(chandef->center_freq1); 3422 req.band_idx = phy->mt76->band_idx; 3423 req.scan_mode = 2; 3424 break; 3425 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3426 req.chan = chan->hw_value; 3427 req.central_chan = ieee80211_frequency_to_channel(freq); 3428 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3429 req.tx_stream = hweight8(mphy->antenna_mask); 3430 req.rx_stream = mphy->antenna_mask; 3431 break; 3432 default: 3433 return -EINVAL; 3434 } 3435 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3436 3437 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 3438 &req, sizeof(req), false); 3439 } 3440 3441 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 3442 struct cfg80211_chan_def *chandef) 3443 { 3444 struct mt7996_dev *dev = phy->dev; 3445 int err, region; 3446 3447 if (!chandef) { /* disable offchain */ 3448 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, MT_RX_SEL2, 3449 0, 0); 3450 if (err) 3451 return err; 3452 3453 return mt7996_mcu_background_chain_ctrl(phy, NULL, 3454 CH_SWITCH_BACKGROUND_SCAN_STOP); 3455 } 3456 3457 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 3458 CH_SWITCH_BACKGROUND_SCAN_START); 3459 if (err) 3460 return err; 3461 3462 switch (dev->mt76.region) { 3463 case NL80211_DFS_ETSI: 3464 region = 0; 3465 break; 3466 case NL80211_DFS_JP: 3467 region = 2; 3468 break; 3469 case NL80211_DFS_FCC: 3470 default: 3471 region = 1; 3472 break; 3473 } 3474 3475 return mt7996_mcu_rdd_cmd(dev, RDD_START, MT_RX_SEL2, 3476 0, region); 3477 } 3478 3479 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 3480 { 3481 static const u8 ch_band[] = { 3482 [NL80211_BAND_2GHZ] = 0, 3483 [NL80211_BAND_5GHZ] = 1, 3484 [NL80211_BAND_6GHZ] = 2, 3485 }; 3486 struct mt7996_dev *dev = phy->dev; 3487 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3488 int freq1 = chandef->center_freq1; 3489 u8 band_idx = phy->mt76->band_idx; 3490 struct { 3491 /* fixed field */ 3492 u8 __rsv[4]; 3493 3494 __le16 tag; 3495 __le16 len; 3496 u8 control_ch; 3497 u8 center_ch; 3498 u8 bw; 3499 u8 tx_path_num; 3500 u8 rx_path; /* mask or num */ 3501 u8 switch_reason; 3502 u8 band_idx; 3503 u8 center_ch2; /* for 80+80 only */ 3504 __le16 cac_case; 3505 u8 channel_band; 3506 u8 rsv0; 3507 __le32 outband_freq; 3508 u8 txpower_drop; 3509 u8 ap_bw; 3510 u8 ap_center_ch; 3511 u8 rsv1[53]; 3512 } __packed req = { 3513 .tag = cpu_to_le16(tag), 3514 .len = cpu_to_le16(sizeof(req) - 4), 3515 .control_ch = chandef->chan->hw_value, 3516 .center_ch = ieee80211_frequency_to_channel(freq1), 3517 .bw = mt76_connac_chan_bw(chandef), 3518 .tx_path_num = hweight16(phy->mt76->chainmask), 3519 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 3520 .band_idx = band_idx, 3521 .channel_band = ch_band[chandef->chan->band], 3522 }; 3523 3524 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 3525 req.switch_reason = CH_SWITCH_NORMAL; 3526 else if (phy->mt76->offchannel || 3527 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 3528 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 3529 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 3530 NL80211_IFTYPE_AP)) 3531 req.switch_reason = CH_SWITCH_DFS; 3532 else 3533 req.switch_reason = CH_SWITCH_NORMAL; 3534 3535 if (tag == UNI_CHANNEL_SWITCH) 3536 req.rx_path = hweight8(req.rx_path); 3537 3538 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 3539 int freq2 = chandef->center_freq2; 3540 3541 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 3542 } 3543 3544 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 3545 &req, sizeof(req), true); 3546 } 3547 3548 static int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) 3549 { 3550 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 3551 #define PAGE_IDX_MASK GENMASK(4, 2) 3552 #define PER_PAGE_SIZE 0x400 3553 struct mt7996_mcu_eeprom req = { 3554 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3555 .buffer_mode = EE_MODE_BUFFER 3556 }; 3557 u16 eeprom_size = MT7996_EEPROM_SIZE; 3558 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 3559 u8 *eep = (u8 *)dev->mt76.eeprom.data; 3560 int eep_len, i; 3561 3562 for (i = 0; i < total; i++, eep += eep_len) { 3563 struct sk_buff *skb; 3564 int ret, msg_len; 3565 3566 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 3567 eep_len = eeprom_size % PER_PAGE_SIZE; 3568 else 3569 eep_len = PER_PAGE_SIZE; 3570 3571 msg_len = sizeof(req) + eep_len; 3572 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 3573 if (!skb) 3574 return -ENOMEM; 3575 3576 req.len = cpu_to_le16(msg_len - 4); 3577 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 3578 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 3579 req.buf_len = cpu_to_le16(eep_len); 3580 3581 skb_put_data(skb, &req, sizeof(req)); 3582 skb_put_data(skb, eep, eep_len); 3583 3584 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 3585 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 3586 if (ret) 3587 return ret; 3588 } 3589 3590 return 0; 3591 } 3592 3593 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 3594 { 3595 struct mt7996_mcu_eeprom req = { 3596 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 3597 .len = cpu_to_le16(sizeof(req) - 4), 3598 .buffer_mode = EE_MODE_EFUSE, 3599 .format = EE_FORMAT_WHOLE 3600 }; 3601 3602 if (dev->flash_mode) 3603 return mt7996_mcu_set_eeprom_flash(dev); 3604 3605 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), 3606 &req, sizeof(req), true); 3607 } 3608 3609 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len) 3610 { 3611 struct { 3612 u8 _rsv[4]; 3613 3614 __le16 tag; 3615 __le16 len; 3616 __le32 addr; 3617 __le32 valid; 3618 u8 data[16]; 3619 } __packed req = { 3620 .tag = cpu_to_le16(UNI_EFUSE_ACCESS), 3621 .len = cpu_to_le16(sizeof(req) - 4), 3622 .addr = cpu_to_le32(round_down(offset, 3623 MT7996_EEPROM_BLOCK_SIZE)), 3624 }; 3625 struct sk_buff *skb; 3626 bool valid; 3627 int ret; 3628 3629 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3630 MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), 3631 &req, sizeof(req), true, &skb); 3632 if (ret) 3633 return ret; 3634 3635 valid = le32_to_cpu(*(__le32 *)(skb->data + 16)); 3636 if (valid) { 3637 u32 addr = le32_to_cpu(*(__le32 *)(skb->data + 12)); 3638 3639 if (!buf) 3640 buf = (u8 *)dev->mt76.eeprom.data + addr; 3641 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 3642 buf_len = MT7996_EEPROM_BLOCK_SIZE; 3643 3644 skb_pull(skb, 48); 3645 memcpy(buf, skb->data, buf_len); 3646 } else { 3647 ret = -EINVAL; 3648 } 3649 3650 dev_kfree_skb(skb); 3651 3652 return ret; 3653 } 3654 3655 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num) 3656 { 3657 struct { 3658 u8 _rsv[4]; 3659 3660 __le16 tag; 3661 __le16 len; 3662 u8 num; 3663 u8 version; 3664 u8 die_idx; 3665 u8 _rsv2; 3666 } __packed req = { 3667 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 3668 .len = cpu_to_le16(sizeof(req) - 4), 3669 .version = 2, 3670 }; 3671 struct sk_buff *skb; 3672 int ret; 3673 3674 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 3675 sizeof(req), true, &skb); 3676 if (ret) 3677 return ret; 3678 3679 *block_num = *(u8 *)(skb->data + 8); 3680 dev_kfree_skb(skb); 3681 3682 return 0; 3683 } 3684 3685 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 3686 { 3687 #define NIC_CAP 3 3688 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 3689 struct { 3690 u8 _rsv[4]; 3691 3692 __le16 tag; 3693 __le16 len; 3694 } __packed req = { 3695 .tag = cpu_to_le16(NIC_CAP), 3696 .len = cpu_to_le16(sizeof(req) - 4), 3697 }; 3698 struct sk_buff *skb; 3699 u8 *buf; 3700 int ret; 3701 3702 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3703 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 3704 sizeof(req), true, &skb); 3705 if (ret) 3706 return ret; 3707 3708 /* fixed field */ 3709 skb_pull(skb, 4); 3710 3711 buf = skb->data; 3712 while (buf - skb->data < skb->len) { 3713 struct tlv *tlv = (struct tlv *)buf; 3714 3715 switch (le16_to_cpu(tlv->tag)) { 3716 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 3717 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 3718 break; 3719 default: 3720 break; 3721 } 3722 3723 buf += le16_to_cpu(tlv->len); 3724 } 3725 3726 dev_kfree_skb(skb); 3727 3728 return 0; 3729 } 3730 3731 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 3732 { 3733 enum { 3734 IDX_TX_TIME, 3735 IDX_RX_TIME, 3736 IDX_OBSS_AIRTIME, 3737 IDX_NON_WIFI_TIME, 3738 IDX_NUM 3739 }; 3740 struct { 3741 struct { 3742 u8 band; 3743 u8 __rsv[3]; 3744 } hdr; 3745 struct { 3746 __le16 tag; 3747 __le16 len; 3748 __le32 offs; 3749 } data[IDX_NUM]; 3750 } __packed req = { 3751 .hdr.band = phy->mt76->band_idx, 3752 }; 3753 static const u32 offs[] = { 3754 [IDX_TX_TIME] = UNI_MIB_TX_TIME, 3755 [IDX_RX_TIME] = UNI_MIB_RX_TIME, 3756 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME, 3757 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME, 3758 }; 3759 struct mt76_channel_state *state = phy->mt76->chan_state; 3760 struct mt76_channel_state *state_ts = &phy->state_ts; 3761 struct mt7996_dev *dev = phy->dev; 3762 struct mt7996_mcu_mib *res; 3763 struct sk_buff *skb; 3764 int i, ret; 3765 3766 for (i = 0; i < IDX_NUM; i++) { 3767 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 3768 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 3769 req.data[i].offs = cpu_to_le32(offs[i]); 3770 } 3771 3772 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 3773 &req, sizeof(req), true, &skb); 3774 if (ret) 3775 return ret; 3776 3777 skb_pull(skb, sizeof(req.hdr)); 3778 3779 res = (struct mt7996_mcu_mib *)(skb->data); 3780 3781 if (chan_switch) 3782 goto out; 3783 3784 #define __res_u64(s) le64_to_cpu(res[s].data) 3785 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx; 3786 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx; 3787 state->cc_rx += __res_u64(IDX_RX_TIME) + 3788 __res_u64(IDX_OBSS_AIRTIME) - 3789 state_ts->cc_rx; 3790 state->cc_busy += __res_u64(IDX_TX_TIME) + 3791 __res_u64(IDX_RX_TIME) + 3792 __res_u64(IDX_OBSS_AIRTIME) + 3793 __res_u64(IDX_NON_WIFI_TIME) - 3794 state_ts->cc_busy; 3795 out: 3796 state_ts->cc_tx = __res_u64(IDX_TX_TIME); 3797 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME); 3798 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME); 3799 state_ts->cc_busy = __res_u64(IDX_TX_TIME) + 3800 __res_u64(IDX_RX_TIME) + 3801 __res_u64(IDX_OBSS_AIRTIME) + 3802 __res_u64(IDX_NON_WIFI_TIME); 3803 #undef __res_u64 3804 3805 dev_kfree_skb(skb); 3806 3807 return 0; 3808 } 3809 3810 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 3811 { 3812 #define TEMPERATURE_QUERY 0 3813 #define GET_TEMPERATURE 0 3814 struct { 3815 u8 _rsv[4]; 3816 3817 __le16 tag; 3818 __le16 len; 3819 3820 u8 rsv1; 3821 u8 action; 3822 u8 band_idx; 3823 u8 rsv2; 3824 } req = { 3825 .tag = cpu_to_le16(TEMPERATURE_QUERY), 3826 .len = cpu_to_le16(sizeof(req) - 4), 3827 .action = GET_TEMPERATURE, 3828 .band_idx = phy->mt76->band_idx, 3829 }; 3830 struct mt7996_mcu_thermal { 3831 u8 _rsv[4]; 3832 3833 __le16 tag; 3834 __le16 len; 3835 3836 __le32 rsv; 3837 __le32 temperature; 3838 } __packed * res; 3839 struct sk_buff *skb; 3840 int ret; 3841 u32 temp; 3842 3843 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3844 &req, sizeof(req), true, &skb); 3845 if (ret) 3846 return ret; 3847 3848 res = (void *)skb->data; 3849 temp = le32_to_cpu(res->temperature); 3850 dev_kfree_skb(skb); 3851 3852 return temp; 3853 } 3854 3855 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 3856 { 3857 struct { 3858 u8 _rsv[4]; 3859 3860 __le16 tag; 3861 __le16 len; 3862 3863 struct mt7996_mcu_thermal_ctrl ctrl; 3864 } __packed req = { 3865 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 3866 .len = cpu_to_le16(sizeof(req) - 4), 3867 .ctrl = { 3868 .band_idx = phy->mt76->band_idx, 3869 }, 3870 }; 3871 int level, ret; 3872 3873 /* set duty cycle and level */ 3874 for (level = 0; level < 4; level++) { 3875 req.ctrl.duty.duty_level = level; 3876 req.ctrl.duty.duty_cycle = state; 3877 state /= 2; 3878 3879 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3880 &req, sizeof(req), false); 3881 if (ret) 3882 return ret; 3883 } 3884 3885 return 0; 3886 } 3887 3888 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 3889 { 3890 #define SUSTAIN_PERIOD 10 3891 struct { 3892 u8 _rsv[4]; 3893 3894 __le16 tag; 3895 __le16 len; 3896 3897 struct mt7996_mcu_thermal_ctrl ctrl; 3898 struct mt7996_mcu_thermal_enable enable; 3899 } __packed req = { 3900 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 3901 .ctrl = { 3902 .band_idx = phy->mt76->band_idx, 3903 .type.protect_type = 1, 3904 .type.trigger_type = 1, 3905 }, 3906 }; 3907 int ret; 3908 3909 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 3910 3911 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3912 &req, sizeof(req) - sizeof(req.enable), false); 3913 if (ret || !enable) 3914 return ret; 3915 3916 /* set high-temperature trigger threshold */ 3917 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 3918 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 3919 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 3920 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 3921 3922 req.len = cpu_to_le16(sizeof(req) - 4); 3923 3924 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 3925 &req, sizeof(req), false); 3926 } 3927 3928 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 3929 { 3930 struct { 3931 u8 rsv[4]; 3932 3933 __le16 tag; 3934 __le16 len; 3935 3936 union { 3937 struct { 3938 __le32 mask; 3939 } __packed set; 3940 3941 struct { 3942 u8 method; 3943 u8 band; 3944 u8 rsv2[2]; 3945 } __packed trigger; 3946 }; 3947 } __packed req = { 3948 .tag = cpu_to_le16(action), 3949 .len = cpu_to_le16(sizeof(req) - 4), 3950 }; 3951 3952 switch (action) { 3953 case UNI_CMD_SER_SET: 3954 req.set.mask = cpu_to_le32(val); 3955 break; 3956 case UNI_CMD_SER_TRIGGER: 3957 req.trigger.method = val; 3958 req.trigger.band = band; 3959 break; 3960 default: 3961 return -EINVAL; 3962 } 3963 3964 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 3965 &req, sizeof(req), false); 3966 } 3967 3968 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 3969 { 3970 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 3971 #define BF_PROCESSING 4 3972 struct uni_header hdr; 3973 struct sk_buff *skb; 3974 struct tlv *tlv; 3975 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 3976 3977 memset(&hdr, 0, sizeof(hdr)); 3978 3979 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3980 if (!skb) 3981 return -ENOMEM; 3982 3983 skb_put_data(skb, &hdr, sizeof(hdr)); 3984 3985 switch (action) { 3986 case BF_SOUNDING_ON: { 3987 struct bf_sounding_on *req_snd_on; 3988 3989 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 3990 req_snd_on = (struct bf_sounding_on *)tlv; 3991 req_snd_on->snd_mode = BF_PROCESSING; 3992 break; 3993 } 3994 case BF_HW_EN_UPDATE: { 3995 struct bf_hw_en_status_update *req_hw_en; 3996 3997 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 3998 req_hw_en = (struct bf_hw_en_status_update *)tlv; 3999 req_hw_en->ebf = true; 4000 req_hw_en->ibf = dev->ibf; 4001 break; 4002 } 4003 case BF_MOD_EN_CTRL: { 4004 struct bf_mod_en_ctrl *req_mod_en; 4005 4006 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 4007 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 4008 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 4009 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 4010 GENMASK(2, 0) : GENMASK(1, 0); 4011 break; 4012 } 4013 default: 4014 return -EINVAL; 4015 } 4016 4017 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 4018 } 4019 4020 static int 4021 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 4022 { 4023 struct mt7996_dev *dev = phy->dev; 4024 struct { 4025 u8 band_idx; 4026 u8 __rsv[3]; 4027 4028 __le16 tag; 4029 __le16 len; 4030 4031 __le32 val; 4032 } __packed req = { 4033 .band_idx = phy->mt76->band_idx, 4034 .tag = cpu_to_le16(action), 4035 .len = cpu_to_le16(sizeof(req) - 4), 4036 .val = cpu_to_le32(val), 4037 }; 4038 4039 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4040 &req, sizeof(req), true); 4041 } 4042 4043 static int 4044 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 4045 struct ieee80211_he_obss_pd *he_obss_pd) 4046 { 4047 struct mt7996_dev *dev = phy->dev; 4048 u8 max_th = 82, non_srg_max_th = 62; 4049 struct { 4050 u8 band_idx; 4051 u8 __rsv[3]; 4052 4053 __le16 tag; 4054 __le16 len; 4055 4056 u8 pd_th_non_srg; 4057 u8 pd_th_srg; 4058 u8 period_offs; 4059 u8 rcpi_src; 4060 __le16 obss_pd_min; 4061 __le16 obss_pd_min_srg; 4062 u8 resp_txpwr_mode; 4063 u8 txpwr_restrict_mode; 4064 u8 txpwr_ref; 4065 u8 __rsv2[3]; 4066 } __packed req = { 4067 .band_idx = phy->mt76->band_idx, 4068 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4069 .len = cpu_to_le16(sizeof(req) - 4), 4070 .obss_pd_min = cpu_to_le16(max_th), 4071 .obss_pd_min_srg = cpu_to_le16(max_th), 4072 .txpwr_restrict_mode = 2, 4073 .txpwr_ref = 21 4074 }; 4075 int ret; 4076 4077 /* disable firmware dynamical PD asjustment */ 4078 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4079 if (ret) 4080 return ret; 4081 4082 if (he_obss_pd->sr_ctrl & 4083 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4084 req.pd_th_non_srg = max_th; 4085 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4086 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4087 else 4088 req.pd_th_non_srg = non_srg_max_th; 4089 4090 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4091 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4092 4093 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4094 &req, sizeof(req), true); 4095 } 4096 4097 static int 4098 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4099 struct ieee80211_he_obss_pd *he_obss_pd) 4100 { 4101 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4102 struct mt7996_dev *dev = phy->dev; 4103 u8 omac = mvif->deflink.mt76.omac_idx; 4104 struct { 4105 u8 band_idx; 4106 u8 __rsv[3]; 4107 4108 __le16 tag; 4109 __le16 len; 4110 4111 u8 omac; 4112 u8 __rsv2[3]; 4113 u8 flag[20]; 4114 } __packed req = { 4115 .band_idx = phy->mt76->band_idx, 4116 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4117 .len = cpu_to_le16(sizeof(req) - 4), 4118 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4119 }; 4120 int ret; 4121 4122 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4123 req.flag[req.omac] = 0xf; 4124 else 4125 return 0; 4126 4127 /* switch to normal AP mode */ 4128 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4129 if (ret) 4130 return ret; 4131 4132 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4133 &req, sizeof(req), true); 4134 } 4135 4136 static int 4137 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4138 struct ieee80211_he_obss_pd *he_obss_pd) 4139 { 4140 struct mt7996_dev *dev = phy->dev; 4141 struct { 4142 u8 band_idx; 4143 u8 __rsv[3]; 4144 4145 __le16 tag; 4146 __le16 len; 4147 4148 __le32 color_l[2]; 4149 __le32 color_h[2]; 4150 __le32 bssid_l[2]; 4151 __le32 bssid_h[2]; 4152 } __packed req = { 4153 .band_idx = phy->mt76->band_idx, 4154 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4155 .len = cpu_to_le16(sizeof(req) - 4), 4156 }; 4157 u32 bitmap; 4158 4159 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4160 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4161 4162 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4163 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4164 4165 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4166 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4167 4168 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4169 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4170 4171 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4172 sizeof(req), true); 4173 } 4174 4175 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, struct ieee80211_vif *vif, 4176 struct ieee80211_he_obss_pd *he_obss_pd) 4177 { 4178 int ret; 4179 4180 /* enable firmware scene detection algorithms */ 4181 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4182 sr_scene_detect); 4183 if (ret) 4184 return ret; 4185 4186 /* firmware dynamically adjusts PD threshold so skip manual control */ 4187 if (sr_scene_detect && !he_obss_pd->enable) 4188 return 0; 4189 4190 /* enable spatial reuse */ 4191 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4192 he_obss_pd->enable); 4193 if (ret) 4194 return ret; 4195 4196 if (sr_scene_detect || !he_obss_pd->enable) 4197 return 0; 4198 4199 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4200 if (ret) 4201 return ret; 4202 4203 /* set SRG/non-SRG OBSS PD threshold */ 4204 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4205 if (ret) 4206 return ret; 4207 4208 /* Set SR prohibit */ 4209 ret = mt7996_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 4210 if (ret) 4211 return ret; 4212 4213 /* set SRG BSS color/BSSID bitmap */ 4214 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4215 } 4216 4217 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 4218 struct mt76_vif_link *mlink, 4219 struct cfg80211_he_bss_color *he_bss_color) 4220 { 4221 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4222 struct bss_color_tlv *bss_color; 4223 struct sk_buff *skb; 4224 struct tlv *tlv; 4225 4226 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len); 4227 if (IS_ERR(skb)) 4228 return PTR_ERR(skb); 4229 4230 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4231 sizeof(*bss_color)); 4232 bss_color = (struct bss_color_tlv *)tlv; 4233 bss_color->enable = he_bss_color->enabled; 4234 bss_color->color = he_bss_color->color; 4235 4236 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4237 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4238 } 4239 4240 #define TWT_AGRT_TRIGGER BIT(0) 4241 #define TWT_AGRT_ANNOUNCE BIT(1) 4242 #define TWT_AGRT_PROTECT BIT(2) 4243 4244 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4245 struct mt7996_vif *mvif, 4246 struct mt7996_twt_flow *flow, 4247 int cmd) 4248 { 4249 struct { 4250 /* fixed field */ 4251 u8 bss; 4252 u8 _rsv[3]; 4253 4254 __le16 tag; 4255 __le16 len; 4256 u8 tbl_idx; 4257 u8 cmd; 4258 u8 own_mac_idx; 4259 u8 flowid; /* 0xff for group id */ 4260 __le16 peer_id; /* specify the peer_id (msb=0) 4261 * or group_id (msb=1) 4262 */ 4263 u8 duration; /* 256 us */ 4264 u8 bss_idx; 4265 __le64 start_tsf; 4266 __le16 mantissa; 4267 u8 exponent; 4268 u8 is_ap; 4269 u8 agrt_params; 4270 u8 __rsv2[23]; 4271 } __packed req = { 4272 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4273 .len = cpu_to_le16(sizeof(req) - 4), 4274 .tbl_idx = flow->table_id, 4275 .cmd = cmd, 4276 .own_mac_idx = mvif->deflink.mt76.omac_idx, 4277 .flowid = flow->id, 4278 .peer_id = cpu_to_le16(flow->wcid), 4279 .duration = flow->duration, 4280 .bss = mvif->deflink.mt76.idx, 4281 .bss_idx = mvif->deflink.mt76.idx, 4282 .start_tsf = cpu_to_le64(flow->tsf), 4283 .mantissa = flow->mantissa, 4284 .exponent = flow->exp, 4285 .is_ap = true, 4286 }; 4287 4288 if (flow->protection) 4289 req.agrt_params |= TWT_AGRT_PROTECT; 4290 if (!flow->flowtype) 4291 req.agrt_params |= TWT_AGRT_ANNOUNCE; 4292 if (flow->trigger) 4293 req.agrt_params |= TWT_AGRT_TRIGGER; 4294 4295 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 4296 &req, sizeof(req), true); 4297 } 4298 4299 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 4300 { 4301 struct { 4302 u8 band_idx; 4303 u8 _rsv[3]; 4304 4305 __le16 tag; 4306 __le16 len; 4307 __le32 len_thresh; 4308 __le32 pkt_thresh; 4309 } __packed req = { 4310 .band_idx = phy->mt76->band_idx, 4311 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 4312 .len = cpu_to_le16(sizeof(req) - 4), 4313 .len_thresh = cpu_to_le32(val), 4314 .pkt_thresh = cpu_to_le32(0x2), 4315 }; 4316 4317 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4318 &req, sizeof(req), true); 4319 } 4320 4321 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 4322 { 4323 struct { 4324 u8 band_idx; 4325 u8 _rsv[3]; 4326 4327 __le16 tag; 4328 __le16 len; 4329 u8 enable; 4330 u8 _rsv2[3]; 4331 } __packed req = { 4332 .band_idx = phy->mt76->band_idx, 4333 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 4334 .len = cpu_to_le16(sizeof(req) - 4), 4335 .enable = enable, 4336 }; 4337 4338 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 4339 &req, sizeof(req), true); 4340 } 4341 4342 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 index, 4343 u8 rx_sel, u8 val) 4344 { 4345 struct { 4346 u8 _rsv[4]; 4347 4348 __le16 tag; 4349 __le16 len; 4350 4351 u8 ctrl; 4352 u8 rdd_idx; 4353 u8 rdd_rx_sel; 4354 u8 val; 4355 u8 rsv[4]; 4356 } __packed req = { 4357 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 4358 .len = cpu_to_le16(sizeof(req) - 4), 4359 .ctrl = cmd, 4360 .rdd_idx = index, 4361 .rdd_rx_sel = rx_sel, 4362 .val = val, 4363 }; 4364 4365 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 4366 &req, sizeof(req), true); 4367 } 4368 4369 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 4370 struct ieee80211_vif *vif, 4371 struct ieee80211_sta *sta) 4372 { 4373 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 4374 struct mt7996_sta *msta; 4375 struct sk_buff *skb; 4376 4377 msta = sta ? (struct mt7996_sta *)sta->drv_priv : &mvif->deflink.sta; 4378 4379 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->deflink.mt76, 4380 &msta->wcid, 4381 MT7996_STA_UPDATE_MAX_SIZE); 4382 if (IS_ERR(skb)) 4383 return PTR_ERR(skb); 4384 4385 /* starec hdr trans */ 4386 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta->wcid); 4387 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4388 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 4389 } 4390 4391 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 4392 u16 rate_idx, bool beacon) 4393 { 4394 #define UNI_FIXED_RATE_TABLE_SET 0 4395 #define SPE_IXD_SELECT_TXD 0 4396 #define SPE_IXD_SELECT_BMC_WTBL 1 4397 struct mt7996_dev *dev = phy->dev; 4398 struct fixed_rate_table_ctrl req = { 4399 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 4400 .len = cpu_to_le16(sizeof(req) - 4), 4401 .table_idx = table_idx, 4402 .rate_idx = cpu_to_le16(rate_idx), 4403 .gi = 1, 4404 .he_ltf = 1, 4405 }; 4406 u8 band_idx = phy->mt76->band_idx; 4407 4408 if (beacon) { 4409 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 4410 req.spe_idx = 24 + band_idx; 4411 phy->beacon_rate = rate_idx; 4412 } else { 4413 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 4414 } 4415 4416 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 4417 &req, sizeof(req), false); 4418 } 4419 4420 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 4421 { 4422 struct { 4423 u8 __rsv1[4]; 4424 4425 __le16 tag; 4426 __le16 len; 4427 __le16 idx; 4428 u8 __rsv2[2]; 4429 __le32 ofs; 4430 __le32 data; 4431 } __packed *res, req = { 4432 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 4433 .len = cpu_to_le16(sizeof(req) - 4), 4434 4435 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 4436 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4437 .data = set ? cpu_to_le32(*val) : 0, 4438 }; 4439 struct sk_buff *skb; 4440 int ret; 4441 4442 if (set) 4443 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 4444 &req, sizeof(req), true); 4445 4446 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4447 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 4448 &req, sizeof(req), true, &skb); 4449 if (ret) 4450 return ret; 4451 4452 res = (void *)skb->data; 4453 *val = le32_to_cpu(res->data); 4454 dev_kfree_skb(skb); 4455 4456 return 0; 4457 } 4458 4459 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 4460 { 4461 struct { 4462 __le16 tag; 4463 __le16 len; 4464 u8 enable; 4465 u8 rsv[3]; 4466 } __packed req = { 4467 .len = cpu_to_le16(sizeof(req) - 4), 4468 .enable = true, 4469 }; 4470 4471 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 4472 &req, sizeof(req), false); 4473 } 4474 4475 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 4476 { 4477 struct { 4478 u8 __rsv1[4]; 4479 __le16 tag; 4480 __le16 len; 4481 union { 4482 struct { 4483 u8 type; 4484 u8 __rsv2[3]; 4485 } __packed platform_type; 4486 struct { 4487 u8 type; 4488 u8 dest; 4489 u8 __rsv2[2]; 4490 } __packed bypass_mode; 4491 struct { 4492 u8 path; 4493 u8 __rsv2[3]; 4494 } __packed txfree_path; 4495 struct { 4496 __le16 flush_one; 4497 __le16 flush_all; 4498 u8 __rsv2[4]; 4499 } __packed timeout; 4500 }; 4501 } __packed req = { 4502 .tag = cpu_to_le16(tag), 4503 .len = cpu_to_le16(sizeof(req) - 4), 4504 }; 4505 4506 switch (tag) { 4507 case UNI_RRO_SET_PLATFORM_TYPE: 4508 req.platform_type.type = val; 4509 break; 4510 case UNI_RRO_SET_BYPASS_MODE: 4511 req.bypass_mode.type = val; 4512 break; 4513 case UNI_RRO_SET_TXFREE_PATH: 4514 req.txfree_path.path = val; 4515 break; 4516 case UNI_RRO_SET_FLUSH_TIMEOUT: 4517 req.timeout.flush_one = cpu_to_le16(val); 4518 req.timeout.flush_all = cpu_to_le16(2 * val); 4519 break; 4520 default: 4521 return -EINVAL; 4522 } 4523 4524 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4525 sizeof(req), true); 4526 } 4527 4528 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 4529 { 4530 struct mt7996_dev *dev = phy->dev; 4531 struct { 4532 u8 _rsv[4]; 4533 4534 __le16 tag; 4535 __le16 len; 4536 } __packed req = { 4537 .tag = cpu_to_le16(tag), 4538 .len = cpu_to_le16(sizeof(req) - 4), 4539 }; 4540 4541 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 4542 &req, sizeof(req), false); 4543 } 4544 4545 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 4546 { 4547 struct { 4548 u8 __rsv[4]; 4549 4550 __le16 tag; 4551 __le16 len; 4552 __le16 session_id; 4553 u8 pad[4]; 4554 } __packed req = { 4555 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 4556 .len = cpu_to_le16(sizeof(req) - 4), 4557 .session_id = cpu_to_le16(id), 4558 }; 4559 4560 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 4561 sizeof(req), true); 4562 } 4563 4564 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled) 4565 { 4566 struct mt7996_dev *dev = phy->dev; 4567 struct { 4568 u8 band_idx; 4569 u8 _rsv[3]; 4570 __le16 tag; 4571 __le16 len; 4572 u8 enable; 4573 u8 _pad[3]; 4574 } __packed req = { 4575 .band_idx = phy->mt76->band_idx, 4576 .tag = 0, 4577 .len = cpu_to_le16(sizeof(req) - 4), 4578 .enable = enabled, 4579 }; 4580 4581 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req, 4582 sizeof(req), true); 4583 } 4584 4585 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 4586 { 4587 #define TX_POWER_LIMIT_TABLE_RATE 0 4588 struct mt7996_dev *dev = phy->dev; 4589 struct mt76_phy *mphy = phy->mt76; 4590 struct tx_power_limit_table_ctrl { 4591 u8 __rsv1[4]; 4592 4593 __le16 tag; 4594 __le16 len; 4595 u8 power_ctrl_id; 4596 u8 power_limit_type; 4597 u8 band_idx; 4598 } __packed req = { 4599 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 4600 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 4601 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 4602 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 4603 .band_idx = phy->mt76->band_idx, 4604 }; 4605 struct mt76_power_limits la = {}; 4606 struct sk_buff *skb; 4607 int i, tx_power; 4608 4609 tx_power = mt7996_get_power_bound(phy, phy->txpower); 4610 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 4611 &la, tx_power); 4612 mphy->txpower_cur = tx_power; 4613 4614 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 4615 sizeof(req) + MT7996_SKU_PATH_NUM); 4616 if (!skb) 4617 return -ENOMEM; 4618 4619 skb_put_data(skb, &req, sizeof(req)); 4620 /* cck and ofdm */ 4621 skb_put_data(skb, &la.cck, sizeof(la.cck)); 4622 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 4623 /* ht20 */ 4624 skb_put_data(skb, &la.mcs[0], 8); 4625 /* ht40 */ 4626 skb_put_data(skb, &la.mcs[1], 9); 4627 4628 /* vht */ 4629 for (i = 0; i < 4; i++) { 4630 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 4631 skb_put_zero(skb, 2); /* padding */ 4632 } 4633 4634 /* he */ 4635 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 4636 /* eht */ 4637 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 4638 4639 /* padding */ 4640 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 4641 4642 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4643 MCU_WM_UNI_CMD(TXPOWER), true); 4644 } 4645 4646 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 4647 { 4648 __le32 cp_mode; 4649 4650 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 4651 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 4652 return -EINVAL; 4653 4654 cp_mode = cpu_to_le32(mode); 4655 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 4656 &cp_mode, sizeof(cp_mode), true); 4657 } 4658