1*cbb3ec25SBjoern A. Zeeb /* SPDX-License-Identifier: ISC */ 2*cbb3ec25SBjoern A. Zeeb /* 3*cbb3ec25SBjoern A. Zeeb * Copyright (C) 2022 MediaTek Inc. 4*cbb3ec25SBjoern A. Zeeb */ 5*cbb3ec25SBjoern A. Zeeb 6*cbb3ec25SBjoern A. Zeeb #ifndef __MT7996_MAC_H 7*cbb3ec25SBjoern A. Zeeb #define __MT7996_MAC_H 8*cbb3ec25SBjoern A. Zeeb 9*cbb3ec25SBjoern A. Zeeb #include "../mt76_connac3_mac.h" 10*cbb3ec25SBjoern A. Zeeb 11*cbb3ec25SBjoern A. Zeeb struct mt7996_dfs_pulse { 12*cbb3ec25SBjoern A. Zeeb u32 max_width; /* us */ 13*cbb3ec25SBjoern A. Zeeb int max_pwr; /* dbm */ 14*cbb3ec25SBjoern A. Zeeb int min_pwr; /* dbm */ 15*cbb3ec25SBjoern A. Zeeb u32 min_stgr_pri; /* us */ 16*cbb3ec25SBjoern A. Zeeb u32 max_stgr_pri; /* us */ 17*cbb3ec25SBjoern A. Zeeb u32 min_cr_pri; /* us */ 18*cbb3ec25SBjoern A. Zeeb u32 max_cr_pri; /* us */ 19*cbb3ec25SBjoern A. Zeeb }; 20*cbb3ec25SBjoern A. Zeeb 21*cbb3ec25SBjoern A. Zeeb struct mt7996_dfs_pattern { 22*cbb3ec25SBjoern A. Zeeb u8 enb; 23*cbb3ec25SBjoern A. Zeeb u8 stgr; 24*cbb3ec25SBjoern A. Zeeb u8 min_crpn; 25*cbb3ec25SBjoern A. Zeeb u8 max_crpn; 26*cbb3ec25SBjoern A. Zeeb u8 min_crpr; 27*cbb3ec25SBjoern A. Zeeb u8 min_pw; 28*cbb3ec25SBjoern A. Zeeb u32 min_pri; 29*cbb3ec25SBjoern A. Zeeb u32 max_pri; 30*cbb3ec25SBjoern A. Zeeb u8 max_pw; 31*cbb3ec25SBjoern A. Zeeb u8 min_crbn; 32*cbb3ec25SBjoern A. Zeeb u8 max_crbn; 33*cbb3ec25SBjoern A. Zeeb u8 min_stgpn; 34*cbb3ec25SBjoern A. Zeeb u8 max_stgpn; 35*cbb3ec25SBjoern A. Zeeb u8 min_stgpr; 36*cbb3ec25SBjoern A. Zeeb u8 rsv[2]; 37*cbb3ec25SBjoern A. Zeeb u32 min_stgpr_diff; 38*cbb3ec25SBjoern A. Zeeb } __packed; 39*cbb3ec25SBjoern A. Zeeb 40*cbb3ec25SBjoern A. Zeeb struct mt7996_dfs_radar_spec { 41*cbb3ec25SBjoern A. Zeeb struct mt7996_dfs_pulse pulse_th; 42*cbb3ec25SBjoern A. Zeeb struct mt7996_dfs_pattern radar_pattern[16]; 43*cbb3ec25SBjoern A. Zeeb }; 44*cbb3ec25SBjoern A. Zeeb 45*cbb3ec25SBjoern A. Zeeb #endif 46