1*cbb3ec25SBjoern A. Zeeb /* SPDX-License-Identifier: ISC */ 2*cbb3ec25SBjoern A. Zeeb /* 3*cbb3ec25SBjoern A. Zeeb * Copyright (C) 2022 MediaTek Inc. 4*cbb3ec25SBjoern A. Zeeb */ 5*cbb3ec25SBjoern A. Zeeb 6*cbb3ec25SBjoern A. Zeeb #ifndef __MT7996_EEPROM_H 7*cbb3ec25SBjoern A. Zeeb #define __MT7996_EEPROM_H 8*cbb3ec25SBjoern A. Zeeb 9*cbb3ec25SBjoern A. Zeeb #include "mt7996.h" 10*cbb3ec25SBjoern A. Zeeb 11*cbb3ec25SBjoern A. Zeeb enum mt7996_eeprom_field { 12*cbb3ec25SBjoern A. Zeeb MT_EE_CHIP_ID = 0x000, 13*cbb3ec25SBjoern A. Zeeb MT_EE_VERSION = 0x002, 14*cbb3ec25SBjoern A. Zeeb MT_EE_MAC_ADDR = 0x004, 15*cbb3ec25SBjoern A. Zeeb MT_EE_MAC_ADDR2 = 0x00a, 16*cbb3ec25SBjoern A. Zeeb MT_EE_WIFI_CONF = 0x190, 17*cbb3ec25SBjoern A. Zeeb MT_EE_MAC_ADDR3 = 0x2c0, 18*cbb3ec25SBjoern A. Zeeb MT_EE_RATE_DELTA_2G = 0x1400, 19*cbb3ec25SBjoern A. Zeeb MT_EE_RATE_DELTA_5G = 0x147d, 20*cbb3ec25SBjoern A. Zeeb MT_EE_RATE_DELTA_6G = 0x154a, 21*cbb3ec25SBjoern A. Zeeb MT_EE_TX0_POWER_2G = 0x1300, 22*cbb3ec25SBjoern A. Zeeb MT_EE_TX0_POWER_5G = 0x1301, 23*cbb3ec25SBjoern A. Zeeb MT_EE_TX0_POWER_6G = 0x1310, 24*cbb3ec25SBjoern A. Zeeb 25*cbb3ec25SBjoern A. Zeeb __MT_EE_MAX = 0x1dff, 26*cbb3ec25SBjoern A. Zeeb }; 27*cbb3ec25SBjoern A. Zeeb 28*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF0_TX_PATH GENMASK(2, 0) 29*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(2, 0) 30*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(5, 3) 31*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF2_BAND_SEL GENMASK(2, 0) 32*cbb3ec25SBjoern A. Zeeb 33*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF1_TX_PATH_BAND0 GENMASK(5, 3) 34*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF2_TX_PATH_BAND1 GENMASK(2, 0) 35*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF2_TX_PATH_BAND2 GENMASK(5, 3) 36*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF4_STREAM_NUM_BAND0 GENMASK(5, 3) 37*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF5_STREAM_NUM_BAND1 GENMASK(2, 0) 38*cbb3ec25SBjoern A. Zeeb #define MT_EE_WIFI_CONF5_STREAM_NUM_BAND2 GENMASK(5, 3) 39*cbb3ec25SBjoern A. Zeeb 40*cbb3ec25SBjoern A. Zeeb #define MT_EE_RATE_DELTA_MASK GENMASK(5, 0) 41*cbb3ec25SBjoern A. Zeeb #define MT_EE_RATE_DELTA_SIGN BIT(6) 42*cbb3ec25SBjoern A. Zeeb #define MT_EE_RATE_DELTA_EN BIT(7) 43*cbb3ec25SBjoern A. Zeeb 44*cbb3ec25SBjoern A. Zeeb enum mt7996_eeprom_band { 45*cbb3ec25SBjoern A. Zeeb MT_EE_BAND_SEL_DEFAULT, 46*cbb3ec25SBjoern A. Zeeb MT_EE_BAND_SEL_2GHZ, 47*cbb3ec25SBjoern A. Zeeb MT_EE_BAND_SEL_5GHZ, 48*cbb3ec25SBjoern A. Zeeb MT_EE_BAND_SEL_6GHZ, 49*cbb3ec25SBjoern A. Zeeb }; 50*cbb3ec25SBjoern A. Zeeb 51*cbb3ec25SBjoern A. Zeeb static inline int 52*cbb3ec25SBjoern A. Zeeb mt7996_get_channel_group_5g(int channel) 53*cbb3ec25SBjoern A. Zeeb { 54*cbb3ec25SBjoern A. Zeeb if (channel <= 64) 55*cbb3ec25SBjoern A. Zeeb return 0; 56*cbb3ec25SBjoern A. Zeeb if (channel <= 96) 57*cbb3ec25SBjoern A. Zeeb return 1; 58*cbb3ec25SBjoern A. Zeeb if (channel <= 128) 59*cbb3ec25SBjoern A. Zeeb return 2; 60*cbb3ec25SBjoern A. Zeeb if (channel <= 144) 61*cbb3ec25SBjoern A. Zeeb return 3; 62*cbb3ec25SBjoern A. Zeeb return 4; 63*cbb3ec25SBjoern A. Zeeb } 64*cbb3ec25SBjoern A. Zeeb 65*cbb3ec25SBjoern A. Zeeb static inline int 66*cbb3ec25SBjoern A. Zeeb mt7996_get_channel_group_6g(int channel) 67*cbb3ec25SBjoern A. Zeeb { 68*cbb3ec25SBjoern A. Zeeb if (channel <= 29) 69*cbb3ec25SBjoern A. Zeeb return 0; 70*cbb3ec25SBjoern A. Zeeb 71*cbb3ec25SBjoern A. Zeeb return DIV_ROUND_UP(channel - 29, 32); 72*cbb3ec25SBjoern A. Zeeb } 73*cbb3ec25SBjoern A. Zeeb 74*cbb3ec25SBjoern A. Zeeb #endif 75