1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/fs.h> 5 #include "mt7915.h" 6 #include "mcu.h" 7 #include "mac.h" 8 #include "eeprom.h" 9 10 #define fw_name(_dev, name, ...) ({ \ 11 char *_fw; \ 12 switch (mt76_chip(&(_dev)->mt76)) { \ 13 case 0x7915: \ 14 _fw = MT7915_##name; \ 15 break; \ 16 case 0x7981: \ 17 _fw = MT7981_##name; \ 18 break; \ 19 case 0x7986: \ 20 _fw = MT7986_##name##__VA_ARGS__; \ 21 break; \ 22 default: \ 23 _fw = MT7916_##name; \ 24 break; \ 25 } \ 26 _fw; \ 27 }) 28 29 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \ 30 fw_name(_dev, name) : \ 31 fw_name(_dev, name, _MT7975)) 32 33 #define MCU_PATCH_ADDRESS 0x200000 34 35 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 36 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 37 38 static bool sr_scene_detect = true; 39 module_param(sr_scene_detect, bool, 0644); 40 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 41 42 static u8 43 mt7915_mcu_get_sta_nss(u16 mcs_map) 44 { 45 u8 nss; 46 47 for (nss = 8; nss > 0; nss--) { 48 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 49 50 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 51 break; 52 } 53 54 return nss - 1; 55 } 56 57 static void 58 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, 59 u16 mcs_map) 60 { 61 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 62 struct mt7915_dev *dev = msta->vif->phy->dev; 63 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; 64 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; 65 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 66 67 for (nss = 0; nss < max_nss; nss++) { 68 int mcs; 69 70 switch ((mcs_map >> (2 * nss)) & 0x3) { 71 case IEEE80211_HE_MCS_SUPPORT_0_11: 72 mcs = GENMASK(11, 0); 73 break; 74 case IEEE80211_HE_MCS_SUPPORT_0_9: 75 mcs = GENMASK(9, 0); 76 break; 77 case IEEE80211_HE_MCS_SUPPORT_0_7: 78 mcs = GENMASK(7, 0); 79 break; 80 default: 81 mcs = 0; 82 } 83 84 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 85 86 switch (mcs) { 87 case 0 ... 7: 88 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 89 break; 90 case 8 ... 9: 91 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 92 break; 93 case 10 ... 11: 94 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 95 break; 96 default: 97 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 98 break; 99 } 100 mcs_map &= ~(0x3 << (nss * 2)); 101 mcs_map |= mcs << (nss * 2); 102 103 /* only support 2ss on 160MHz for mt7915 */ 104 if (is_mt7915(&dev->mt76) && nss > 1 && 105 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 106 break; 107 } 108 109 *he_mcs = cpu_to_le16(mcs_map); 110 } 111 112 static void 113 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, 114 const u16 *mask) 115 { 116 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 117 struct mt7915_dev *dev = msta->vif->phy->dev; 118 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); 119 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 120 u16 mcs; 121 122 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 123 switch (mcs_map & 0x3) { 124 case IEEE80211_VHT_MCS_SUPPORT_0_9: 125 mcs = GENMASK(9, 0); 126 break; 127 case IEEE80211_VHT_MCS_SUPPORT_0_8: 128 mcs = GENMASK(8, 0); 129 break; 130 case IEEE80211_VHT_MCS_SUPPORT_0_7: 131 mcs = GENMASK(7, 0); 132 break; 133 default: 134 mcs = 0; 135 } 136 137 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 138 139 /* only support 2ss on 160MHz for mt7915 */ 140 if (is_mt7915(&dev->mt76) && nss > 1 && 141 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 142 break; 143 } 144 } 145 146 static void 147 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs, 148 const u8 *mask) 149 { 150 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss; 151 152 for (nss = 0; nss < max_nss; nss++) 153 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss]; 154 } 155 156 static int 157 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd, 158 struct sk_buff *skb, int seq) 159 { 160 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 161 struct mt76_connac2_mcu_rxd *rxd; 162 int ret = 0; 163 164 if (!skb) { 165 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 166 cmd, seq); 167 168 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) { 169 dev->recovery.restart = true; 170 wake_up(&dev->mt76.mcu.wait); 171 queue_work(dev->mt76.wq, &dev->reset_work); 172 wake_up(&dev->reset_wait); 173 } 174 175 return -ETIMEDOUT; 176 } 177 178 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 179 if (seq != rxd->seq && 180 !(rxd->eid == MCU_CMD_EXT_CID && 181 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) 182 return -EAGAIN; 183 184 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 185 skb_pull(skb, sizeof(*rxd) - 4); 186 ret = *skb->data; 187 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) { 188 skb_pull(skb, sizeof(*rxd) + 4); 189 ret = le32_to_cpu(*(__le32 *)skb->data); 190 } else { 191 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); 192 } 193 194 return ret; 195 } 196 197 static void 198 mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd) 199 { 200 mdev->mcu.timeout = 5 * HZ; 201 202 if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID) 203 return; 204 205 switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) { 206 case MCU_EXT_CMD_THERMAL_CTRL: 207 case MCU_EXT_CMD_GET_MIB_INFO: 208 case MCU_EXT_CMD_PHY_STAT_INFO: 209 case MCU_EXT_CMD_STA_REC_UPDATE: 210 case MCU_EXT_CMD_BSS_INFO_UPDATE: 211 mdev->mcu.timeout = 2 * HZ; 212 return; 213 case MCU_EXT_CMD_EFUSE_BUFFER_MODE: 214 mdev->mcu.timeout = 10 * HZ; 215 return; 216 default: 217 break; 218 } 219 } 220 221 static int 222 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 223 int cmd, int *wait_seq) 224 { 225 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); 226 enum mt76_mcuq_id qid; 227 228 if (cmd == MCU_CMD(FW_SCATTER)) 229 qid = MT_MCUQ_FWDL; 230 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 231 qid = MT_MCUQ_WA; 232 else 233 qid = MT_MCUQ_WM; 234 235 mt7915_mcu_set_timeout(mdev, cmd); 236 237 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 238 } 239 240 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 241 { 242 struct { 243 __le32 args[3]; 244 } req = { 245 .args = { 246 cpu_to_le32(a1), 247 cpu_to_le32(a2), 248 cpu_to_le32(a3), 249 }, 250 }; 251 252 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false); 253 } 254 255 static void 256 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 257 { 258 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION) 259 return; 260 261 ieee80211_csa_finish(vif, 0); 262 } 263 264 static void 265 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb) 266 { 267 struct mt76_phy *mphy = &dev->mt76.phy; 268 struct mt7915_mcu_csa_notify *c; 269 270 c = (struct mt7915_mcu_csa_notify *)skb->data; 271 272 if (c->band_idx > MT_BAND1) 273 return; 274 275 if ((c->band_idx && !dev->phy.mt76->band_idx) && 276 dev->mt76.phys[MT_BAND1]) 277 mphy = dev->mt76.phys[MT_BAND1]; 278 279 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 280 IEEE80211_IFACE_ITER_RESUME_ALL, 281 mt7915_mcu_csa_finish, mphy->hw); 282 } 283 284 static void 285 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb) 286 { 287 struct mt76_phy *mphy = &dev->mt76.phy; 288 struct mt7915_mcu_thermal_notify *t; 289 struct mt7915_phy *phy; 290 291 t = (struct mt7915_mcu_thermal_notify *)skb->data; 292 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE) 293 return; 294 295 if (t->ctrl.band_idx > MT_BAND1) 296 return; 297 298 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) && 299 dev->mt76.phys[MT_BAND1]) 300 mphy = dev->mt76.phys[MT_BAND1]; 301 302 phy = mphy->priv; 303 phy->throttle_state = t->ctrl.duty.duty_cycle; 304 } 305 306 static void 307 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb) 308 { 309 struct mt76_phy *mphy = &dev->mt76.phy; 310 struct mt7915_mcu_rdd_report *r; 311 u32 sku; 312 313 r = (struct mt7915_mcu_rdd_report *)skb->data; 314 315 switch (r->rdd_idx) { 316 case MT_RDD_IDX_BAND0: 317 break; 318 case MT_RDD_IDX_BAND1: 319 sku = mt7915_check_adie(dev, true); 320 /* the main phy is bound to band 1 for this sku */ 321 if (is_mt7986(&dev->mt76) && 322 (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE)) 323 break; 324 mphy = dev->mt76.phys[MT_BAND1]; 325 break; 326 case MT_RDD_IDX_BACKGROUND: 327 if (!dev->rdd2_phy) 328 return; 329 mphy = dev->rdd2_phy->mt76; 330 break; 331 default: 332 dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx); 333 return; 334 } 335 336 if (!mphy) 337 return; 338 339 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND) 340 cfg80211_background_radar_event(mphy->hw->wiphy, 341 &dev->rdd2_chandef, 342 GFP_ATOMIC); 343 else 344 ieee80211_radar_detected(mphy->hw, NULL); 345 dev->hw_pattern++; 346 } 347 348 static void 349 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb) 350 { 351 struct mt76_connac2_mcu_rxd *rxd; 352 int len = skb->len - sizeof(*rxd); 353 const char *data, *type; 354 355 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 356 data = (char *)&rxd[1]; 357 358 switch (rxd->s2d_index) { 359 case 0: 360 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS) 361 if (mt7915_debugfs_rx_log(dev, data, len)) 362 return; 363 #endif 364 365 type = "WM"; 366 break; 367 case 2: 368 type = "WA"; 369 break; 370 default: 371 type = "unknown"; 372 break; 373 } 374 375 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 376 } 377 378 static void 379 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 380 { 381 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION) 382 return; 383 384 ieee80211_color_change_finish(vif, 0); 385 } 386 387 static void 388 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb) 389 { 390 struct mt76_phy *mphy = &dev->mt76.phy; 391 struct mt7915_mcu_bcc_notify *b; 392 393 b = (struct mt7915_mcu_bcc_notify *)skb->data; 394 395 if (b->band_idx > MT_BAND1) 396 return; 397 398 if ((b->band_idx && !dev->phy.mt76->band_idx) && 399 dev->mt76.phys[MT_BAND1]) 400 mphy = dev->mt76.phys[MT_BAND1]; 401 402 ieee80211_iterate_active_interfaces_atomic(mphy->hw, 403 IEEE80211_IFACE_ITER_RESUME_ALL, 404 mt7915_mcu_cca_finish, mphy->hw); 405 } 406 407 static void 408 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) 409 { 410 struct mt76_connac2_mcu_rxd *rxd; 411 412 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 413 switch (rxd->ext_eid) { 414 case MCU_EXT_EVENT_THERMAL_PROTECT: 415 mt7915_mcu_rx_thermal_notify(dev, skb); 416 break; 417 case MCU_EXT_EVENT_RDD_REPORT: 418 mt7915_mcu_rx_radar_detected(dev, skb); 419 break; 420 case MCU_EXT_EVENT_CSA_NOTIFY: 421 mt7915_mcu_rx_csa_notify(dev, skb); 422 break; 423 case MCU_EXT_EVENT_FW_LOG_2_HOST: 424 mt7915_mcu_rx_log_message(dev, skb); 425 break; 426 case MCU_EXT_EVENT_BCC_NOTIFY: 427 mt7915_mcu_rx_bcc_notify(dev, skb); 428 break; 429 default: 430 break; 431 } 432 } 433 434 static void 435 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb) 436 { 437 struct mt76_connac2_mcu_rxd *rxd; 438 439 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 440 switch (rxd->eid) { 441 case MCU_EVENT_EXT: 442 mt7915_mcu_rx_ext_event(dev, skb); 443 break; 444 default: 445 break; 446 } 447 dev_kfree_skb(skb); 448 } 449 450 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb) 451 { 452 struct mt76_connac2_mcu_rxd *rxd; 453 454 rxd = (struct mt76_connac2_mcu_rxd *)skb->data; 455 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT || 456 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 457 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || 458 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || 459 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY || 460 !rxd->seq) && 461 !(rxd->eid == MCU_CMD_EXT_CID && 462 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) 463 mt7915_mcu_rx_unsolicited_event(dev, skb); 464 else 465 mt76_mcu_rx_event(&dev->mt76, skb); 466 } 467 468 static struct tlv * 469 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len, 470 __le16 *sub_ntlv, __le16 *len) 471 { 472 struct tlv *ptlv, tlv = { 473 .tag = cpu_to_le16(sub_tag), 474 .len = cpu_to_le16(sub_len), 475 }; 476 477 ptlv = skb_put_zero(skb, sub_len); 478 memcpy(ptlv, &tlv, sizeof(tlv)); 479 480 le16_add_cpu(sub_ntlv, 1); 481 le16_add_cpu(len, sub_len); 482 483 return ptlv; 484 } 485 486 /** bss info **/ 487 struct mt7915_he_obss_narrow_bw_ru_data { 488 bool tolerated; 489 }; 490 491 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy, 492 struct cfg80211_bss *bss, 493 void *_data) 494 { 495 struct mt7915_he_obss_narrow_bw_ru_data *data = _data; 496 const struct element *elem; 497 498 rcu_read_lock(); 499 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY); 500 501 if (!elem || elem->datalen <= 10 || 502 !(elem->data[10] & 503 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT)) 504 data->tolerated = false; 505 506 rcu_read_unlock(); 507 } 508 509 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw, 510 struct ieee80211_vif *vif) 511 { 512 struct mt7915_he_obss_narrow_bw_ru_data iter_data = { 513 .tolerated = true, 514 }; 515 516 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR)) 517 return false; 518 519 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper, 520 mt7915_check_he_obss_narrow_bw_ru_iter, 521 &iter_data); 522 523 /* 524 * If there is at least one AP on radar channel that cannot 525 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU. 526 */ 527 return !iter_data.tolerated; 528 } 529 530 static void 531 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 532 struct mt7915_phy *phy) 533 { 534 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 535 struct bss_info_rf_ch *ch; 536 struct tlv *tlv; 537 int freq1 = chandef->center_freq1; 538 539 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch)); 540 541 ch = (struct bss_info_rf_ch *)tlv; 542 ch->pri_ch = chandef->chan->hw_value; 543 ch->center_ch0 = ieee80211_frequency_to_channel(freq1); 544 ch->bw = mt76_connac_chan_bw(chandef); 545 546 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 547 int freq2 = chandef->center_freq2; 548 549 ch->center_ch1 = ieee80211_frequency_to_channel(freq2); 550 } 551 552 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) { 553 struct mt76_phy *mphy = phy->mt76; 554 555 ch->he_ru26_block = 556 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif); 557 ch->he_all_disable = false; 558 } else { 559 ch->he_all_disable = true; 560 } 561 } 562 563 static void 564 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 565 struct mt7915_phy *phy) 566 { 567 int max_nss = hweight8(phy->mt76->antenna_mask); 568 struct bss_info_ra *ra; 569 struct tlv *tlv; 570 571 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra)); 572 573 ra = (struct bss_info_ra *)tlv; 574 ra->op_mode = vif->type == NL80211_IFTYPE_AP; 575 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC; 576 ra->short_preamble = true; 577 ra->tx_streams = max_nss; 578 ra->rx_streams = max_nss; 579 ra->algo = 4; 580 ra->train_up_rule = 2; 581 ra->train_up_high_thres = 110; 582 ra->train_up_rule_rssi = -70; 583 ra->low_traffic_thres = 2; 584 ra->phy_cap = cpu_to_le32(0xfdf); 585 ra->interval = cpu_to_le32(500); 586 ra->fast_interval = cpu_to_le32(100); 587 } 588 589 static void 590 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 591 struct mt7915_phy *phy) 592 { 593 #define DEFAULT_HE_PE_DURATION 4 594 #define DEFAULT_HE_DURATION_RTS_THRES 1023 595 const struct ieee80211_sta_he_cap *cap; 596 struct bss_info_he *he; 597 struct tlv *tlv; 598 599 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 600 601 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he)); 602 603 he = (struct bss_info_he *)tlv; 604 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 605 if (!he->he_pe_duration) 606 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 607 608 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 609 if (!he->he_rts_thres) 610 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 611 612 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 613 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 614 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 615 } 616 617 static void 618 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb) 619 { 620 #define TXD_CMP_MAP1 GENMASK(15, 0) 621 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23)) 622 struct bss_info_hw_amsdu *amsdu; 623 struct tlv *tlv; 624 625 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu)); 626 627 amsdu = (struct bss_info_hw_amsdu *)tlv; 628 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1); 629 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2); 630 amsdu->trig_thres = cpu_to_le16(2); 631 amsdu->enable = true; 632 } 633 634 static void 635 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy) 636 { 637 struct bss_info_bmc_rate *bmc; 638 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 639 enum nl80211_band band = chandef->chan->band; 640 struct tlv *tlv; 641 642 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc)); 643 644 bmc = (struct bss_info_bmc_rate *)tlv; 645 if (band == NL80211_BAND_2GHZ) { 646 bmc->short_preamble = true; 647 } else { 648 bmc->bc_trans = cpu_to_le16(0x2000); 649 bmc->mc_trans = cpu_to_le16(0x2080); 650 } 651 } 652 653 static int 654 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif, 655 bool bssid, bool enable) 656 { 657 struct mt7915_dev *dev = phy->dev; 658 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 659 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START; 660 u32 mask = phy->omac_mask >> 32 & ~BIT(idx); 661 const u8 *addr = vif->addr; 662 struct { 663 u8 mode; 664 u8 force_clear; 665 u8 clear_bitmap[8]; 666 u8 entry_count; 667 u8 write; 668 u8 band; 669 670 u8 index; 671 u8 bssid; 672 u8 addr[ETH_ALEN]; 673 } __packed req = { 674 .mode = !!mask || enable, 675 .entry_count = 1, 676 .write = 1, 677 .band = phy->mt76->band_idx, 678 .index = idx * 2 + bssid, 679 }; 680 681 if (bssid) 682 addr = vif->bss_conf.bssid; 683 684 if (enable) 685 ether_addr_copy(req.addr, addr); 686 687 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req, 688 sizeof(req), true); 689 } 690 691 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, 692 struct ieee80211_vif *vif, int enable) 693 { 694 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 695 struct mt7915_dev *dev = phy->dev; 696 struct sk_buff *skb; 697 698 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { 699 mt7915_mcu_muar_config(phy, vif, false, enable); 700 mt7915_mcu_muar_config(phy, vif, true, enable); 701 } 702 703 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL, 704 MT7915_BSS_UPDATE_MAX_SIZE); 705 if (IS_ERR(skb)) 706 return PTR_ERR(skb); 707 708 /* bss_omac must be first */ 709 if (enable) 710 mt76_connac_mcu_bss_omac_tlv(skb, vif); 711 712 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, 713 mvif->sta.wcid.idx, enable); 714 715 if (vif->type == NL80211_IFTYPE_MONITOR) 716 goto out; 717 718 if (enable) { 719 mt7915_mcu_bss_rfch_tlv(skb, vif, phy); 720 mt7915_mcu_bss_bmc_tlv(skb, phy); 721 mt7915_mcu_bss_ra_tlv(skb, vif, phy); 722 mt7915_mcu_bss_hw_amsdu_tlv(skb); 723 724 if (vif->bss_conf.he_support) 725 mt7915_mcu_bss_he_tlv(skb, vif, phy); 726 727 if (mvif->mt76.omac_idx >= EXT_BSSID_START && 728 mvif->mt76.omac_idx < REPEATER_BSSID_START) 729 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76); 730 } 731 out: 732 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 733 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 734 } 735 736 /** starec & wtbl **/ 737 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, 738 struct ieee80211_ampdu_params *params, 739 bool enable) 740 { 741 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; 742 struct mt7915_vif *mvif = msta->vif; 743 int ret; 744 745 mt76_worker_disable(&dev->mt76.tx_worker); 746 if (enable && !params->amsdu) 747 msta->wcid.amsdu = false; 748 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 749 MCU_EXT_CMD(STA_REC_UPDATE), 750 enable, true); 751 mt76_worker_enable(&dev->mt76.tx_worker); 752 753 return ret; 754 } 755 756 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, 757 struct ieee80211_ampdu_params *params, 758 bool enable) 759 { 760 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; 761 struct mt7915_vif *mvif = msta->vif; 762 763 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, 764 MCU_EXT_CMD(STA_REC_UPDATE), 765 enable, false); 766 } 767 768 static void 769 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 770 struct ieee80211_vif *vif) 771 { 772 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 773 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 774 struct ieee80211_he_mcs_nss_supp mcs_map; 775 struct sta_rec_he *he; 776 struct tlv *tlv; 777 u32 cap = 0; 778 779 if (!sta->deflink.he_cap.has_he) 780 return; 781 782 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); 783 784 he = (struct sta_rec_he *)tlv; 785 786 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE) 787 cap |= STA_REC_HE_CAP_HTC; 788 789 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR) 790 cap |= STA_REC_HE_CAP_BSR; 791 792 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL) 793 cap |= STA_REC_HE_CAP_OM; 794 795 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU) 796 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU; 797 798 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR) 799 cap |= STA_REC_HE_CAP_BQR; 800 801 if (elem->phy_cap_info[0] & 802 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G | 803 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) 804 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; 805 806 if (mvif->cap.he_ldpc && 807 (elem->phy_cap_info[1] & 808 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)) 809 cap |= STA_REC_HE_CAP_LDPC; 810 811 if (elem->phy_cap_info[1] & 812 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US) 813 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI; 814 815 if (elem->phy_cap_info[2] & 816 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US) 817 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI; 818 819 if (elem->phy_cap_info[2] & 820 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ) 821 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC; 822 823 if (elem->phy_cap_info[2] & 824 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) 825 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC; 826 827 if (elem->phy_cap_info[6] & 828 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB) 829 cap |= STA_REC_HE_CAP_TRIG_CQI_FK; 830 831 if (elem->phy_cap_info[6] & 832 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE) 833 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE; 834 835 if (elem->phy_cap_info[7] & 836 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI) 837 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI; 838 839 if (elem->phy_cap_info[7] & 840 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ) 841 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC; 842 843 if (elem->phy_cap_info[7] & 844 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) 845 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC; 846 847 if (elem->phy_cap_info[8] & 848 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI) 849 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI; 850 851 if (elem->phy_cap_info[8] & 852 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI) 853 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI; 854 855 if (elem->phy_cap_info[9] & 856 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU) 857 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242; 858 859 if (elem->phy_cap_info[9] & 860 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU) 861 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242; 862 863 he->he_cap = cpu_to_le32(cap); 864 865 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp; 866 switch (sta->deflink.bandwidth) { 867 case IEEE80211_STA_RX_BW_160: 868 if (elem->phy_cap_info[0] & 869 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 870 mt7915_mcu_set_sta_he_mcs(sta, 871 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 872 le16_to_cpu(mcs_map.rx_mcs_80p80)); 873 874 mt7915_mcu_set_sta_he_mcs(sta, 875 &he->max_nss_mcs[CMD_HE_MCS_BW160], 876 le16_to_cpu(mcs_map.rx_mcs_160)); 877 fallthrough; 878 default: 879 mt7915_mcu_set_sta_he_mcs(sta, 880 &he->max_nss_mcs[CMD_HE_MCS_BW80], 881 le16_to_cpu(mcs_map.rx_mcs_80)); 882 break; 883 } 884 885 he->t_frame_dur = 886 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 887 he->max_ampdu_exp = 888 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]); 889 890 he->bw_set = 891 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]); 892 he->device_class = 893 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]); 894 he->punc_pream_rx = 895 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 896 897 he->dcm_tx_mode = 898 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]); 899 he->dcm_tx_max_nss = 900 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]); 901 he->dcm_rx_mode = 902 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]); 903 he->dcm_rx_max_nss = 904 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]); 905 he->dcm_rx_max_nss = 906 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]); 907 908 he->pkt_ext = 2; 909 } 910 911 static void 912 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 913 struct ieee80211_sta *sta, struct ieee80211_vif *vif) 914 { 915 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 916 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; 917 struct sta_rec_muru *muru; 918 struct tlv *tlv; 919 920 if (vif->type != NL80211_IFTYPE_STATION && 921 vif->type != NL80211_IFTYPE_AP) 922 return; 923 924 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 925 926 muru = (struct sta_rec_muru *)tlv; 927 928 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || 929 mvif->cap.vht_mu_ebfer || 930 mvif->cap.vht_mu_ebfee; 931 if (!is_mt7915(&dev->mt76)) 932 muru->cfg.mimo_ul_en = true; 933 muru->cfg.ofdma_dl_en = true; 934 935 if (sta->deflink.vht_cap.vht_supported) 936 muru->mimo_dl.vht_mu_bfee = 937 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 938 939 if (!sta->deflink.he_cap.has_he) 940 return; 941 942 muru->mimo_dl.partial_bw_dl_mimo = 943 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 944 945 muru->mimo_ul.full_ul_mimo = 946 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 947 muru->mimo_ul.partial_ul_mimo = 948 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 949 950 muru->ofdma_dl.punc_pream_rx = 951 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 952 muru->ofdma_dl.he_20m_in_40m_2g = 953 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 954 muru->ofdma_dl.he_20m_in_160m = 955 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 956 muru->ofdma_dl.he_80m_in_160m = 957 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 958 959 muru->ofdma_ul.t_frame_dur = 960 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 961 muru->ofdma_ul.mu_cascading = 962 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 963 muru->ofdma_ul.uo_ra = 964 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 965 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 966 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 967 } 968 969 static void 970 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 971 { 972 struct sta_rec_ht *ht; 973 struct tlv *tlv; 974 975 if (!sta->deflink.ht_cap.ht_supported) 976 return; 977 978 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 979 980 ht = (struct sta_rec_ht *)tlv; 981 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 982 } 983 984 static void 985 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 986 { 987 struct sta_rec_vht *vht; 988 struct tlv *tlv; 989 990 if (!sta->deflink.vht_cap.vht_supported) 991 return; 992 993 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 994 995 vht = (struct sta_rec_vht *)tlv; 996 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 997 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 998 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 999 } 1000 1001 static void 1002 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1003 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1004 { 1005 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1006 struct sta_rec_amsdu *amsdu; 1007 struct tlv *tlv; 1008 1009 if (vif->type != NL80211_IFTYPE_STATION && 1010 vif->type != NL80211_IFTYPE_AP) 1011 return; 1012 1013 if (!sta->deflink.agg.max_amsdu_len) 1014 return; 1015 1016 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1017 amsdu = (struct sta_rec_amsdu *)tlv; 1018 amsdu->max_amsdu_num = 8; 1019 amsdu->amsdu_en = true; 1020 msta->wcid.amsdu = true; 1021 1022 switch (sta->deflink.agg.max_amsdu_len) { 1023 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1024 if (!is_mt7915(&dev->mt76)) { 1025 amsdu->max_mpdu_size = 1026 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1027 return; 1028 } 1029 fallthrough; 1030 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1031 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1032 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1033 return; 1034 default: 1035 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1036 return; 1037 } 1038 } 1039 1040 static int 1041 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1042 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1043 { 1044 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1045 struct mt7915_sta *msta; 1046 struct wtbl_req_hdr *wtbl_hdr; 1047 struct mt76_wcid *wcid; 1048 struct tlv *tlv; 1049 1050 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1051 wcid = sta ? &msta->wcid : NULL; 1052 1053 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1054 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, 1055 WTBL_RESET_AND_SET, tlv, 1056 &skb); 1057 if (IS_ERR(wtbl_hdr)) 1058 return PTR_ERR(wtbl_hdr); 1059 1060 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv, 1061 wtbl_hdr); 1062 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr); 1063 if (sta) 1064 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv, 1065 wtbl_hdr, mvif->cap.ht_ldpc, 1066 mvif->cap.vht_ldpc); 1067 1068 return 0; 1069 } 1070 1071 static inline bool 1072 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif, 1073 struct ieee80211_sta *sta, bool bfee) 1074 { 1075 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1076 int sts = hweight16(phy->mt76->chainmask); 1077 1078 if (vif->type != NL80211_IFTYPE_STATION && 1079 vif->type != NL80211_IFTYPE_AP) 1080 return false; 1081 1082 if (!bfee && sts < 2) 1083 return false; 1084 1085 if (sta->deflink.he_cap.has_he) { 1086 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1087 1088 if (bfee) 1089 return mvif->cap.he_su_ebfee && 1090 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1091 else 1092 return mvif->cap.he_su_ebfer && 1093 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1094 } 1095 1096 if (sta->deflink.vht_cap.vht_supported) { 1097 u32 cap = sta->deflink.vht_cap.cap; 1098 1099 if (bfee) 1100 return mvif->cap.vht_su_ebfee && 1101 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1102 else 1103 return mvif->cap.vht_su_ebfer && 1104 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1105 } 1106 1107 return false; 1108 } 1109 1110 static void 1111 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf) 1112 { 1113 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1114 bf->ndp_rate = 0; /* mcs0 */ 1115 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1116 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1117 } 1118 1119 static void 1120 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy, 1121 struct sta_rec_bf *bf) 1122 { 1123 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs; 1124 u8 n = 0; 1125 1126 bf->tx_mode = MT_PHY_TYPE_HT; 1127 1128 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1129 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1130 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1131 mcs->tx_params); 1132 else if (mcs->rx_mask[3]) 1133 n = 3; 1134 else if (mcs->rx_mask[2]) 1135 n = 2; 1136 else if (mcs->rx_mask[1]) 1137 n = 1; 1138 1139 bf->nrow = hweight8(phy->mt76->chainmask) - 1; 1140 bf->ncol = min_t(u8, bf->nrow, n); 1141 bf->ibf_ncol = n; 1142 } 1143 1144 static void 1145 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy, 1146 struct sta_rec_bf *bf, bool explicit) 1147 { 1148 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1149 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1150 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1151 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1152 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1; 1153 1154 bf->tx_mode = MT_PHY_TYPE_VHT; 1155 1156 if (explicit) { 1157 u8 sts, snd_dim; 1158 1159 mt7915_mcu_sta_sounding_rate(bf); 1160 1161 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1162 pc->cap); 1163 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1164 vc->cap); 1165 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1166 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1167 bf->ibf_ncol = bf->ncol; 1168 1169 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1170 bf->nrow = 1; 1171 } else { 1172 bf->nrow = tx_ant; 1173 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1174 bf->ibf_ncol = nss_mcs; 1175 1176 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160) 1177 bf->ibf_nrow = 1; 1178 } 1179 } 1180 1181 static void 1182 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, 1183 struct mt7915_phy *phy, struct sta_rec_bf *bf) 1184 { 1185 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap; 1186 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1187 const struct ieee80211_sta_he_cap *vc = 1188 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1189 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1190 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1191 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1192 u8 snd_dim, sts; 1193 1194 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1195 1196 mt7915_mcu_sta_sounding_rate(bf); 1197 1198 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1199 pe->phy_cap_info[6]); 1200 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1201 pe->phy_cap_info[6]); 1202 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1203 ve->phy_cap_info[5]); 1204 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1205 pe->phy_cap_info[4]); 1206 bf->nrow = min_t(u8, snd_dim, sts); 1207 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1208 bf->ibf_ncol = bf->ncol; 1209 1210 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160) 1211 return; 1212 1213 /* go over for 160MHz and 80p80 */ 1214 if (pe->phy_cap_info[0] & 1215 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1216 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1217 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1218 1219 bf->ncol_gt_bw80 = nss_mcs; 1220 } 1221 1222 if (pe->phy_cap_info[0] & 1223 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1224 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1225 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); 1226 1227 if (bf->ncol_gt_bw80) 1228 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1229 else 1230 bf->ncol_gt_bw80 = nss_mcs; 1231 } 1232 1233 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1234 ve->phy_cap_info[5]); 1235 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1236 pe->phy_cap_info[4]); 1237 1238 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1239 } 1240 1241 static void 1242 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1243 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1244 { 1245 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1246 struct mt7915_phy *phy = mvif->phy; 1247 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1248 struct sta_rec_bf *bf; 1249 struct tlv *tlv; 1250 static const u8 matrix[4][4] = { 1251 {0, 0, 0, 0}, 1252 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1253 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1254 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1255 }; 1256 bool ebf; 1257 1258 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)) 1259 return; 1260 1261 ebf = mt7915_is_ebf_supported(phy, vif, sta, false); 1262 if (!ebf && !dev->ibf) 1263 return; 1264 1265 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 1266 bf = (struct sta_rec_bf *)tlv; 1267 1268 /* he: eBF only, in accordance with spec 1269 * vht: support eBF and iBF 1270 * ht: iBF only, since mac80211 lacks of eBF support 1271 */ 1272 if (sta->deflink.he_cap.has_he && ebf) 1273 mt7915_mcu_sta_bfer_he(sta, vif, phy, bf); 1274 else if (sta->deflink.vht_cap.vht_supported) 1275 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf); 1276 else if (sta->deflink.ht_cap.ht_supported) 1277 mt7915_mcu_sta_bfer_ht(sta, phy, bf); 1278 else 1279 return; 1280 1281 bf->bf_cap = ebf ? ebf : dev->ibf << 1; 1282 bf->bw = sta->deflink.bandwidth; 1283 bf->ibf_dbw = sta->deflink.bandwidth; 1284 bf->ibf_nrow = tx_ant; 1285 1286 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 1287 bf->ibf_timeout = 0x48; 1288 else 1289 bf->ibf_timeout = 0x18; 1290 1291 if (ebf && bf->nrow != tx_ant) 1292 bf->mem_20m = matrix[tx_ant][bf->ncol]; 1293 else 1294 bf->mem_20m = matrix[bf->nrow][bf->ncol]; 1295 1296 switch (sta->deflink.bandwidth) { 1297 case IEEE80211_STA_RX_BW_160: 1298 case IEEE80211_STA_RX_BW_80: 1299 bf->mem_total = bf->mem_20m * 2; 1300 break; 1301 case IEEE80211_STA_RX_BW_40: 1302 bf->mem_total = bf->mem_20m; 1303 break; 1304 case IEEE80211_STA_RX_BW_20: 1305 default: 1306 break; 1307 } 1308 } 1309 1310 static void 1311 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb, 1312 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1313 { 1314 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1315 struct mt7915_phy *phy = mvif->phy; 1316 int tx_ant = hweight8(phy->mt76->chainmask) - 1; 1317 struct sta_rec_bfee *bfee; 1318 struct tlv *tlv; 1319 u8 nrow = 0; 1320 1321 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he)) 1322 return; 1323 1324 if (!mt7915_is_ebf_supported(phy, vif, sta, true)) 1325 return; 1326 1327 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 1328 bfee = (struct sta_rec_bfee *)tlv; 1329 1330 if (sta->deflink.he_cap.has_he) { 1331 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem; 1332 1333 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1334 pe->phy_cap_info[5]); 1335 } else if (sta->deflink.vht_cap.vht_supported) { 1336 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap; 1337 1338 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1339 pc->cap); 1340 } 1341 1342 /* reply with identity matrix to avoid 2x2 BF negative gain */ 1343 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 1344 } 1345 1346 static enum mcu_mmps_mode 1347 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 1348 { 1349 switch (smps) { 1350 case IEEE80211_SMPS_OFF: 1351 return MCU_MMPS_DISABLE; 1352 case IEEE80211_SMPS_STATIC: 1353 return MCU_MMPS_STATIC; 1354 case IEEE80211_SMPS_DYNAMIC: 1355 return MCU_MMPS_DYNAMIC; 1356 default: 1357 return MCU_MMPS_DISABLE; 1358 } 1359 } 1360 1361 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, 1362 struct ieee80211_vif *vif, 1363 struct ieee80211_sta *sta, 1364 void *data, u32 field) 1365 { 1366 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1367 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1368 struct sta_phy *phy = data; 1369 struct sta_rec_ra_fixed *ra; 1370 struct sk_buff *skb; 1371 struct tlv *tlv; 1372 1373 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1374 &msta->wcid); 1375 if (IS_ERR(skb)) 1376 return PTR_ERR(skb); 1377 1378 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 1379 ra = (struct sta_rec_ra_fixed *)tlv; 1380 1381 switch (field) { 1382 case RATE_PARAM_AUTO: 1383 break; 1384 case RATE_PARAM_FIXED: 1385 case RATE_PARAM_FIXED_MCS: 1386 case RATE_PARAM_FIXED_GI: 1387 case RATE_PARAM_FIXED_HE_LTF: 1388 if (phy) 1389 ra->phy = *phy; 1390 break; 1391 case RATE_PARAM_MMPS_UPDATE: 1392 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode); 1393 break; 1394 case RATE_PARAM_SPE_UPDATE: 1395 ra->spe_idx = *(u8 *)data; 1396 break; 1397 default: 1398 break; 1399 } 1400 ra->field = cpu_to_le32(field); 1401 1402 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1403 MCU_EXT_CMD(STA_REC_UPDATE), true); 1404 } 1405 1406 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1407 struct ieee80211_sta *sta) 1408 { 1409 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1410 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1411 struct wtbl_req_hdr *wtbl_hdr; 1412 struct tlv *sta_wtbl; 1413 struct sk_buff *skb; 1414 int ret; 1415 1416 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1417 &msta->wcid); 1418 if (IS_ERR(skb)) 1419 return PTR_ERR(skb); 1420 1421 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1422 sizeof(struct tlv)); 1423 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, 1424 WTBL_SET, sta_wtbl, &skb); 1425 if (IS_ERR(wtbl_hdr)) 1426 return PTR_ERR(wtbl_hdr); 1427 1428 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr); 1429 1430 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1431 MCU_EXT_CMD(STA_REC_UPDATE), true); 1432 if (ret) 1433 return ret; 1434 1435 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL, 1436 RATE_PARAM_MMPS_UPDATE); 1437 } 1438 1439 static int 1440 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1441 struct ieee80211_sta *sta) 1442 { 1443 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1444 struct mt76_phy *mphy = mvif->phy->mt76; 1445 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask); 1446 1447 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx, 1448 RATE_PARAM_SPE_UPDATE); 1449 } 1450 1451 static int 1452 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev, 1453 struct ieee80211_vif *vif, 1454 struct ieee80211_sta *sta) 1455 { 1456 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1457 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1458 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1459 enum nl80211_band band = chandef->chan->band; 1460 struct sta_phy phy = {}; 1461 int ret, nrates = 0; 1462 1463 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 1464 do { \ 1465 u8 i, gi = mask->control[band]._gi; \ 1466 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 1467 for (i = 0; i <= sta->deflink.bandwidth; i++) { \ 1468 phy.sgi |= gi << (i << (_he)); \ 1469 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\ 1470 } \ 1471 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ 1472 if (!mask->control[band]._mcs[i]) \ 1473 continue; \ 1474 nrates += hweight16(mask->control[band]._mcs[i]); \ 1475 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ 1476 if (_ht) \ 1477 phy.mcs += 8 * i; \ 1478 } \ 1479 } while (0) 1480 1481 if (sta->deflink.he_cap.has_he) { 1482 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 1483 } else if (sta->deflink.vht_cap.vht_supported) { 1484 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 1485 } else if (sta->deflink.ht_cap.ht_supported) { 1486 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 1487 } else { 1488 nrates = hweight32(mask->control[band].legacy); 1489 phy.mcs = ffs(mask->control[band].legacy) - 1; 1490 } 1491 #undef __sta_phy_bitrate_mask_check 1492 1493 /* fall back to auto rate control */ 1494 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI && 1495 mask->control[band].he_gi == GENMASK(7, 0) && 1496 mask->control[band].he_ltf == GENMASK(7, 0) && 1497 nrates != 1) 1498 return 0; 1499 1500 /* fixed single rate */ 1501 if (nrates == 1) { 1502 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1503 RATE_PARAM_FIXED_MCS); 1504 if (ret) 1505 return ret; 1506 } 1507 1508 /* fixed GI */ 1509 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI || 1510 mask->control[band].he_gi != GENMASK(7, 0)) { 1511 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1512 u32 addr; 1513 1514 /* firmware updates only TXCMD but doesn't take WTBL into 1515 * account, so driver should update here to reflect the 1516 * actual txrate hardware sends out. 1517 */ 1518 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7); 1519 if (sta->deflink.he_cap.has_he) 1520 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 1521 else 1522 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 1523 1524 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1525 RATE_PARAM_FIXED_GI); 1526 if (ret) 1527 return ret; 1528 } 1529 1530 /* fixed HE_LTF */ 1531 if (mask->control[band].he_ltf != GENMASK(7, 0)) { 1532 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy, 1533 RATE_PARAM_FIXED_HE_LTF); 1534 if (ret) 1535 return ret; 1536 } 1537 1538 return mt7915_mcu_set_spe_idx(dev, vif, sta); 1539 } 1540 1541 static void 1542 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, 1543 struct ieee80211_vif *vif, struct ieee80211_sta *sta) 1544 { 1545 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1546 struct mt76_phy *mphy = mvif->phy->mt76; 1547 struct cfg80211_chan_def *chandef = &mphy->chandef; 1548 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; 1549 enum nl80211_band band = chandef->chan->band; 1550 struct sta_rec_ra *ra; 1551 struct tlv *tlv; 1552 u32 supp_rate = sta->deflink.supp_rates[band]; 1553 u32 cap = sta->wme ? STA_CAP_WMM : 0; 1554 1555 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 1556 ra = (struct sta_rec_ra *)tlv; 1557 1558 ra->valid = true; 1559 ra->auto_rate = true; 1560 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink); 1561 ra->channel = chandef->chan->hw_value; 1562 ra->bw = sta->deflink.bandwidth; 1563 ra->phy.bw = sta->deflink.bandwidth; 1564 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode); 1565 1566 if (supp_rate) { 1567 supp_rate &= mask->control[band].legacy; 1568 ra->rate_len = hweight32(supp_rate); 1569 1570 if (band == NL80211_BAND_2GHZ) { 1571 ra->supp_mode = MODE_CCK; 1572 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 1573 1574 if (ra->rate_len > 4) { 1575 ra->supp_mode |= MODE_OFDM; 1576 ra->supp_ofdm_rate = supp_rate >> 4; 1577 } 1578 } else { 1579 ra->supp_mode = MODE_OFDM; 1580 ra->supp_ofdm_rate = supp_rate; 1581 } 1582 } 1583 1584 if (sta->deflink.ht_cap.ht_supported) { 1585 ra->supp_mode |= MODE_HT; 1586 ra->af = sta->deflink.ht_cap.ampdu_factor; 1587 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 1588 1589 cap |= STA_CAP_HT; 1590 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1591 cap |= STA_CAP_SGI_20; 1592 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1593 cap |= STA_CAP_SGI_40; 1594 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 1595 cap |= STA_CAP_TX_STBC; 1596 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 1597 cap |= STA_CAP_RX_STBC; 1598 if (mvif->cap.ht_ldpc && 1599 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 1600 cap |= STA_CAP_LDPC; 1601 1602 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs, 1603 mask->control[band].ht_mcs); 1604 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 1605 } 1606 1607 if (sta->deflink.vht_cap.vht_supported) { 1608 u8 af; 1609 1610 ra->supp_mode |= MODE_VHT; 1611 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1612 sta->deflink.vht_cap.cap); 1613 ra->af = max_t(u8, ra->af, af); 1614 1615 cap |= STA_CAP_VHT; 1616 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1617 cap |= STA_CAP_VHT_SGI_80; 1618 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1619 cap |= STA_CAP_VHT_SGI_160; 1620 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 1621 cap |= STA_CAP_VHT_TX_STBC; 1622 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 1623 cap |= STA_CAP_VHT_RX_STBC; 1624 if (mvif->cap.vht_ldpc && 1625 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 1626 cap |= STA_CAP_VHT_LDPC; 1627 1628 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs, 1629 mask->control[band].vht_mcs); 1630 } 1631 1632 if (sta->deflink.he_cap.has_he) { 1633 ra->supp_mode |= MODE_HE; 1634 cap |= STA_CAP_HE; 1635 1636 if (sta->deflink.he_6ghz_capa.capa) 1637 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1638 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1639 } 1640 1641 ra->sta_cap = cpu_to_le32(cap); 1642 } 1643 1644 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1645 struct ieee80211_sta *sta, bool changed) 1646 { 1647 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1648 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 1649 struct sk_buff *skb; 1650 int ret; 1651 1652 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1653 &msta->wcid); 1654 if (IS_ERR(skb)) 1655 return PTR_ERR(skb); 1656 1657 /* firmware rc algorithm refers to sta_rec_he for HE control. 1658 * once dev->rc_work changes the settings driver should also 1659 * update sta_rec_he here. 1660 */ 1661 if (changed) 1662 mt7915_mcu_sta_he_tlv(skb, sta, vif); 1663 1664 /* sta_rec_ra accommodates BW, NSS and only MCS range format 1665 * i.e 0-{7,8,9} for VHT. 1666 */ 1667 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta); 1668 1669 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1670 MCU_EXT_CMD(STA_REC_UPDATE), true); 1671 if (ret) 1672 return ret; 1673 1674 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE, 1675 * and updates as peer fixed rate parameters, which overrides 1676 * sta_rec_ra and firmware rate control algorithm. 1677 */ 1678 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta); 1679 } 1680 1681 static int 1682 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1683 struct ieee80211_sta *sta) 1684 { 1685 #define MT_STA_BSS_GROUP 1 1686 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1687 struct mt7915_sta *msta; 1688 struct { 1689 __le32 action; 1690 u8 wlan_idx_lo; 1691 u8 status; 1692 u8 wlan_idx_hi; 1693 u8 rsv0[5]; 1694 __le32 val; 1695 u8 rsv1[8]; 1696 } __packed req = { 1697 .action = cpu_to_le32(MT_STA_BSS_GROUP), 1698 .val = cpu_to_le32(mvif->mt76.idx % 16), 1699 }; 1700 1701 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1702 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx); 1703 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx); 1704 1705 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req, 1706 sizeof(req), true); 1707 } 1708 1709 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1710 struct ieee80211_sta *sta, int conn_state, bool newly) 1711 { 1712 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1713 struct ieee80211_link_sta *link_sta; 1714 struct mt7915_sta *msta; 1715 struct sk_buff *skb; 1716 int ret; 1717 1718 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; 1719 link_sta = sta ? &sta->deflink : NULL; 1720 1721 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 1722 &msta->wcid); 1723 if (IS_ERR(skb)) 1724 return PTR_ERR(skb); 1725 1726 /* starec basic */ 1727 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta, 1728 conn_state, newly); 1729 /* tag order is in accordance with firmware dependency. */ 1730 if (sta && conn_state != CONN_STATE_DISCONNECT) { 1731 /* starec bfer */ 1732 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta); 1733 /* starec ht */ 1734 mt7915_mcu_sta_ht_tlv(skb, sta); 1735 /* starec vht */ 1736 mt7915_mcu_sta_vht_tlv(skb, sta); 1737 /* starec uapsd */ 1738 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 1739 } 1740 1741 if (newly || conn_state != CONN_STATE_DISCONNECT) { 1742 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta); 1743 if (ret) { 1744 dev_kfree_skb(skb); 1745 return ret; 1746 } 1747 } 1748 1749 if (conn_state == CONN_STATE_DISCONNECT) 1750 goto out; 1751 1752 if (sta) { 1753 /* starec amsdu */ 1754 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta); 1755 /* starec he */ 1756 mt7915_mcu_sta_he_tlv(skb, sta, vif); 1757 /* starec muru */ 1758 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif); 1759 /* starec bfee */ 1760 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta); 1761 } 1762 1763 ret = mt7915_mcu_add_group(dev, vif, sta); 1764 if (ret) { 1765 dev_kfree_skb(skb); 1766 return ret; 1767 } 1768 out: 1769 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb); 1770 if (ret) 1771 return ret; 1772 1773 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1774 MCU_EXT_CMD(STA_REC_UPDATE), true); 1775 } 1776 1777 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev) 1778 { 1779 #ifdef CONFIG_NET_MEDIATEK_SOC_WED 1780 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; 1781 struct { 1782 __le32 args[2]; 1783 } req = { 1784 .args[0] = cpu_to_le32(1), 1785 .args[1] = cpu_to_le32(6), 1786 }; 1787 1788 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL, 1789 &req, sizeof(req)); 1790 #else 1791 return 0; 1792 #endif 1793 } 1794 1795 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy, 1796 struct ieee80211_vif *vif, bool enable) 1797 { 1798 struct mt7915_dev *dev = phy->dev; 1799 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1800 struct { 1801 struct req_hdr { 1802 u8 omac_idx; 1803 u8 band_idx; 1804 __le16 tlv_num; 1805 u8 is_tlv_append; 1806 u8 rsv[3]; 1807 } __packed hdr; 1808 struct req_tlv { 1809 __le16 tag; 1810 __le16 len; 1811 u8 active; 1812 u8 band_idx; 1813 u8 omac_addr[ETH_ALEN]; 1814 } __packed tlv; 1815 } data = { 1816 .hdr = { 1817 .omac_idx = mvif->mt76.omac_idx, 1818 .band_idx = mvif->mt76.band_idx, 1819 .tlv_num = cpu_to_le16(1), 1820 .is_tlv_append = 1, 1821 }, 1822 .tlv = { 1823 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1824 .len = cpu_to_le16(sizeof(struct req_tlv)), 1825 .active = enable, 1826 .band_idx = mvif->mt76.band_idx, 1827 }, 1828 }; 1829 1830 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) 1831 return mt7915_mcu_muar_config(phy, vif, false, enable); 1832 1833 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 1834 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE), 1835 &data, sizeof(data), true); 1836 } 1837 1838 static void 1839 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, 1840 struct sk_buff *skb, struct bss_info_bcn *bcn, 1841 struct ieee80211_mutable_offsets *offs) 1842 { 1843 struct bss_info_bcn_cntdwn *info; 1844 struct tlv *tlv; 1845 int sub_tag; 1846 1847 if (!offs->cntdwn_counter_offs[0]) 1848 return; 1849 1850 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC; 1851 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info), 1852 &bcn->sub_ntlv, &bcn->len); 1853 info = (struct bss_info_bcn_cntdwn *)tlv; 1854 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 1855 } 1856 1857 static void 1858 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 1859 struct ieee80211_vif *vif, struct bss_info_bcn *bcn, 1860 struct ieee80211_mutable_offsets *offs) 1861 { 1862 struct bss_info_bcn_mbss *mbss; 1863 const struct element *elem; 1864 struct tlv *tlv; 1865 1866 if (!vif->bss_conf.bssid_indicator) 1867 return; 1868 1869 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID, 1870 sizeof(*mbss), &bcn->sub_ntlv, 1871 &bcn->len); 1872 1873 mbss = (struct bss_info_bcn_mbss *)tlv; 1874 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 1875 mbss->bitmap = cpu_to_le32(1); 1876 1877 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 1878 &skb->data[offs->mbssid_off], 1879 skb->len - offs->mbssid_off) { 1880 const struct element *sub_elem; 1881 1882 if (elem->datalen < 2) 1883 continue; 1884 1885 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 1886 const struct ieee80211_bssid_index *idx; 1887 const u8 *idx_ie; 1888 1889 if (sub_elem->id || sub_elem->datalen < 4) 1890 continue; /* not a valid BSS profile */ 1891 1892 /* Find WLAN_EID_MULTI_BSSID_IDX 1893 * in the merged nontransmitted profile 1894 */ 1895 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 1896 sub_elem->data, 1897 sub_elem->datalen); 1898 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 1899 continue; 1900 1901 #if defined(__linux__) 1902 idx = (void *)(idx_ie + 2); 1903 #elif defined(__FreeBSD__) 1904 idx = (const void *)(idx_ie + 2); 1905 #endif 1906 if (!idx->bssid_index || idx->bssid_index > 31) 1907 continue; 1908 1909 mbss->offset[idx->bssid_index] = 1910 cpu_to_le16(idx_ie - skb->data); 1911 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 1912 } 1913 } 1914 } 1915 1916 static void 1917 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1918 struct sk_buff *rskb, struct sk_buff *skb, 1919 struct bss_info_bcn *bcn, 1920 struct ieee80211_mutable_offsets *offs) 1921 { 1922 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1923 struct bss_info_bcn_cont *cont; 1924 struct tlv *tlv; 1925 u8 *buf; 1926 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len; 1927 1928 len = (len & 0x3) ? ((len | 0x3) + 1) : len; 1929 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT, 1930 len, &bcn->sub_ntlv, &bcn->len); 1931 1932 cont = (struct bss_info_bcn_cont *)tlv; 1933 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1934 cont->tim_ofs = cpu_to_le16(offs->tim_offset); 1935 1936 if (offs->cntdwn_counter_offs[0]) { 1937 u16 offset = offs->cntdwn_counter_offs[0]; 1938 1939 if (vif->bss_conf.csa_active) 1940 cont->csa_ofs = cpu_to_le16(offset - 4); 1941 if (vif->bss_conf.color_change_active) 1942 cont->bcc_ofs = cpu_to_le16(offset - 3); 1943 } 1944 1945 buf = (u8 *)tlv + sizeof(*cont); 1946 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL, 1947 0, BSS_CHANGED_BEACON); 1948 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 1949 } 1950 1951 int 1952 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif, 1953 u32 changed) 1954 { 1955 #define OFFLOAD_TX_MODE_SU BIT(0) 1956 #define OFFLOAD_TX_MODE_MU BIT(1) 1957 struct ieee80211_hw *hw = mt76_hw(dev); 1958 struct mt7915_phy *phy = mt7915_hw_phy(hw); 1959 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 1960 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; 1961 enum nl80211_band band = chandef->chan->band; 1962 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1963 struct bss_info_bcn *bcn; 1964 struct bss_info_inband_discovery *discov; 1965 struct ieee80211_tx_info *info; 1966 struct sk_buff *rskb, *skb = NULL; 1967 struct tlv *tlv, *sub_tlv; 1968 bool ext_phy = phy != &dev->phy; 1969 u8 *buf, interval; 1970 int len; 1971 1972 if (vif->bss_conf.nontransmitted) 1973 return 0; 1974 1975 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL, 1976 MT7915_MAX_BSS_OFFLOAD_SIZE); 1977 if (IS_ERR(rskb)) 1978 return PTR_ERR(rskb); 1979 1980 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); 1981 bcn = (struct bss_info_bcn *)tlv; 1982 bcn->enable = true; 1983 1984 if (changed & BSS_CHANGED_FILS_DISCOVERY) { 1985 interval = vif->bss_conf.fils_discovery.max_interval; 1986 skb = ieee80211_get_fils_discovery_tmpl(hw, vif); 1987 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 1988 vif->bss_conf.unsol_bcast_probe_resp_interval) { 1989 interval = vif->bss_conf.unsol_bcast_probe_resp_interval; 1990 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif); 1991 } 1992 1993 if (!skb) { 1994 dev_kfree_skb(rskb); 1995 return -EINVAL; 1996 } 1997 1998 info = IEEE80211_SKB_CB(skb); 1999 info->control.vif = vif; 2000 info->band = band; 2001 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy); 2002 2003 len = sizeof(*discov) + MT_TXD_SIZE + skb->len; 2004 len = (len & 0x3) ? ((len | 0x3) + 1) : len; 2005 2006 if (skb->len > MT7915_MAX_BEACON_SIZE) { 2007 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 2008 dev_kfree_skb(rskb); 2009 dev_kfree_skb(skb); 2010 return -EINVAL; 2011 } 2012 2013 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV, 2014 len, &bcn->sub_ntlv, &bcn->len); 2015 discov = (struct bss_info_inband_discovery *)sub_tlv; 2016 discov->tx_mode = OFFLOAD_TX_MODE_SU; 2017 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 2018 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 2019 discov->tx_interval = interval; 2020 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2021 discov->enable = !!interval; 2022 2023 buf = (u8 *)sub_tlv + sizeof(*discov); 2024 2025 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL, 2026 0, changed); 2027 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 2028 2029 dev_kfree_skb(skb); 2030 2031 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2032 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 2033 } 2034 2035 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2036 int en, u32 changed) 2037 { 2038 struct mt7915_dev *dev = mt7915_hw_dev(hw); 2039 struct mt7915_phy *phy = mt7915_hw_phy(hw); 2040 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 2041 struct ieee80211_mutable_offsets offs; 2042 struct ieee80211_tx_info *info; 2043 struct sk_buff *skb, *rskb; 2044 struct tlv *tlv; 2045 struct bss_info_bcn *bcn; 2046 int len = MT7915_MAX_BSS_OFFLOAD_SIZE; 2047 bool ext_phy = phy != &dev->phy; 2048 2049 if (vif->bss_conf.nontransmitted) 2050 return 0; 2051 2052 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 2053 NULL, len); 2054 if (IS_ERR(rskb)) 2055 return PTR_ERR(rskb); 2056 2057 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); 2058 bcn = (struct bss_info_bcn *)tlv; 2059 bcn->enable = en; 2060 2061 if (!en) 2062 goto out; 2063 2064 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0); 2065 if (!skb) { 2066 dev_kfree_skb(rskb); 2067 return -EINVAL; 2068 } 2069 2070 if (skb->len > MT7915_MAX_BEACON_SIZE) { 2071 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2072 dev_kfree_skb(rskb); 2073 dev_kfree_skb(skb); 2074 return -EINVAL; 2075 } 2076 2077 info = IEEE80211_SKB_CB(skb); 2078 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy); 2079 2080 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs); 2081 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs); 2082 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); 2083 dev_kfree_skb(skb); 2084 2085 out: 2086 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb, 2087 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 2088 } 2089 2090 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band) 2091 { 2092 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 2093 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 2094 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 2095 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 2096 return -EIO; 2097 } 2098 2099 /* clear irq when the driver own success */ 2100 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 2101 MT_TOP_LPCR_HOST_BAND_STAT); 2102 2103 return 0; 2104 } 2105 2106 static int 2107 mt7915_firmware_state(struct mt7915_dev *dev, bool wa) 2108 { 2109 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, 2110 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); 2111 2112 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 2113 state, 1000)) { 2114 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 2115 return -EIO; 2116 } 2117 return 0; 2118 } 2119 2120 static int mt7915_load_firmware(struct mt7915_dev *dev) 2121 { 2122 int ret; 2123 2124 /* Release Semaphore if taken by previous failed attempt */ 2125 ret = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false); 2126 if (ret != PATCH_REL_SEM_SUCCESS) { 2127 dev_err(dev->mt76.dev, "Could not release semaphore\n"); 2128 /* Continue anyways */ 2129 } 2130 2131 /* Always restart MCU firmware */ 2132 mt76_connac_mcu_restart(&dev->mt76); 2133 2134 /* Check if MCU is ready */ 2135 ret = mt7915_firmware_state(dev, false); 2136 if (ret) { 2137 dev_err(dev->mt76.dev, "Firmware did not enter download state\n"); 2138 return ret; 2139 } 2140 2141 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH)); 2142 if (ret) 2143 return ret; 2144 2145 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM), 2146 fw_name(dev, FIRMWARE_WA)); 2147 if (ret) 2148 return ret; 2149 2150 ret = mt7915_firmware_state(dev, true); 2151 if (ret) 2152 return ret; 2153 2154 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 2155 2156 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 2157 2158 return 0; 2159 } 2160 2161 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl) 2162 { 2163 struct { 2164 u8 ctrl_val; 2165 u8 pad[3]; 2166 } data = { 2167 .ctrl_val = ctrl 2168 }; 2169 2170 if (type == MCU_FW_LOG_WA) 2171 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST), 2172 &data, sizeof(data), true); 2173 2174 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data, 2175 sizeof(data), true); 2176 } 2177 2178 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level) 2179 { 2180 struct { 2181 u8 ver; 2182 u8 pad; 2183 __le16 len; 2184 u8 level; 2185 u8 rsv[3]; 2186 __le32 module_idx; 2187 } data = { 2188 .module_idx = cpu_to_le32(module), 2189 .level = level, 2190 }; 2191 2192 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data, 2193 sizeof(data), false); 2194 } 2195 2196 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled) 2197 { 2198 struct { 2199 __le32 cmd; 2200 u8 enable; 2201 } data = { 2202 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN), 2203 .enable = enabled, 2204 }; 2205 2206 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data, 2207 sizeof(data), false); 2208 } 2209 2210 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy) 2211 { 2212 struct mt7915_dev *dev = phy->dev; 2213 struct sk_buff *skb; 2214 struct mt7915_mcu_muru_stats *mu_stats; 2215 int ret; 2216 2217 struct { 2218 __le32 cmd; 2219 u8 band_idx; 2220 } req = { 2221 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS), 2222 .band_idx = phy->mt76->band_idx, 2223 }; 2224 2225 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), 2226 &req, sizeof(req), true, &skb); 2227 if (ret) 2228 return ret; 2229 2230 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data); 2231 2232 /* accumulate stats, these are clear-on-read */ 2233 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s) 2234 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s) 2235 __dl_u32(cck_cnt); 2236 __dl_u32(ofdm_cnt); 2237 __dl_u32(htmix_cnt); 2238 __dl_u32(htgf_cnt); 2239 __dl_u32(vht_su_cnt); 2240 __dl_u32(vht_2mu_cnt); 2241 __dl_u32(vht_3mu_cnt); 2242 __dl_u32(vht_4mu_cnt); 2243 __dl_u32(he_su_cnt); 2244 __dl_u32(he_2ru_cnt); 2245 __dl_u32(he_2mu_cnt); 2246 __dl_u32(he_3ru_cnt); 2247 __dl_u32(he_3mu_cnt); 2248 __dl_u32(he_4ru_cnt); 2249 __dl_u32(he_4mu_cnt); 2250 __dl_u32(he_5to8ru_cnt); 2251 __dl_u32(he_9to16ru_cnt); 2252 __dl_u32(he_gtr16ru_cnt); 2253 2254 __ul_u32(hetrig_su_cnt); 2255 __ul_u32(hetrig_2ru_cnt); 2256 __ul_u32(hetrig_3ru_cnt); 2257 __ul_u32(hetrig_4ru_cnt); 2258 __ul_u32(hetrig_5to8ru_cnt); 2259 __ul_u32(hetrig_9to16ru_cnt); 2260 __ul_u32(hetrig_gtr16ru_cnt); 2261 __ul_u32(hetrig_2mu_cnt); 2262 __ul_u32(hetrig_3mu_cnt); 2263 __ul_u32(hetrig_4mu_cnt); 2264 #undef __dl_u32 2265 #undef __ul_u32 2266 2267 dev_kfree_skb(skb); 2268 2269 return 0; 2270 } 2271 2272 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled) 2273 { 2274 struct { 2275 u8 enable; 2276 u8 _rsv[3]; 2277 } __packed req = { 2278 .enable = enabled 2279 }; 2280 2281 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 2282 sizeof(req), false); 2283 } 2284 2285 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val) 2286 { 2287 struct { 2288 __le32 cmd; 2289 u8 val[4]; 2290 } __packed req = { 2291 .cmd = cpu_to_le32(cmd), 2292 }; 2293 2294 put_unaligned_le32(val, req.val); 2295 2296 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, 2297 sizeof(req), false); 2298 } 2299 2300 static int 2301 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev) 2302 { 2303 #define RX_AIRTIME_FEATURE_CTRL 1 2304 #define RX_AIRTIME_BITWISE_CTRL 2 2305 #define RX_AIRTIME_CLEAR_EN 1 2306 struct { 2307 __le16 field; 2308 __le16 sub_field; 2309 __le32 set_status; 2310 __le32 get_status; 2311 u8 _rsv[12]; 2312 2313 bool airtime_en; 2314 bool mibtime_en; 2315 bool earlyend_en; 2316 u8 _rsv1[9]; 2317 2318 bool airtime_clear; 2319 bool mibtime_clear; 2320 u8 _rsv2[98]; 2321 } __packed req = { 2322 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL), 2323 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN), 2324 .airtime_clear = true, 2325 }; 2326 int ret; 2327 2328 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, 2329 sizeof(req), true); 2330 if (ret) 2331 return ret; 2332 2333 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL); 2334 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN); 2335 req.airtime_en = true; 2336 2337 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req, 2338 sizeof(req), true); 2339 } 2340 2341 static int mt7915_red_set_watermark(struct mt7915_dev *dev) 2342 { 2343 #define RED_GLOBAL_TOKEN_WATERMARK 2 2344 struct { 2345 __le32 args[3]; 2346 u8 cmd; 2347 u8 version; 2348 u8 __rsv1[4]; 2349 __le16 len; 2350 __le16 high_mark; 2351 __le16 low_mark; 2352 u8 __rsv2[12]; 2353 } __packed req = { 2354 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING), 2355 .cmd = RED_GLOBAL_TOKEN_WATERMARK, 2356 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)), 2357 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256), 2358 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536), 2359 }; 2360 2361 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req, 2362 sizeof(req), false); 2363 } 2364 2365 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled) 2366 { 2367 #define RED_DISABLE 0 2368 #define RED_BY_WA_ENABLE 2 2369 int ret; 2370 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE; 2371 __le32 req = cpu_to_le32(red_type); 2372 2373 if (enabled) { 2374 ret = mt7915_red_set_watermark(dev); 2375 if (ret < 0) 2376 return ret; 2377 } 2378 2379 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req, 2380 sizeof(req), false); 2381 if (ret < 0) 2382 return ret; 2383 2384 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 2385 MCU_WA_PARAM_RED, enabled, 0); 2386 } 2387 2388 int mt7915_mcu_init_firmware(struct mt7915_dev *dev) 2389 { 2390 int ret; 2391 2392 /* force firmware operation mode into normal state, 2393 * which should be set before firmware download stage. 2394 */ 2395 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 2396 2397 ret = mt7915_driver_own(dev, 0); 2398 if (ret) 2399 return ret; 2400 /* set driver own for band1 when two hif exist */ 2401 if (dev->hif2) { 2402 ret = mt7915_driver_own(dev, 1); 2403 if (ret) 2404 return ret; 2405 } 2406 2407 ret = mt7915_load_firmware(dev); 2408 if (ret) 2409 return ret; 2410 2411 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 2412 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 2413 if (ret) 2414 return ret; 2415 2416 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 2417 if (ret) 2418 return ret; 2419 2420 mt76_connac_mcu_del_wtbl_all(&dev->mt76); 2421 2422 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) && 2423 is_mt7915(&dev->mt76)) || 2424 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) 2425 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0); 2426 2427 ret = mt7915_mcu_set_mwds(dev, 1); 2428 if (ret) 2429 return ret; 2430 2431 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE, 2432 MURU_PLATFORM_TYPE_PERF_LEVEL_2); 2433 if (ret) 2434 return ret; 2435 2436 ret = mt7915_mcu_init_rx_airtime(dev); 2437 if (ret) 2438 return ret; 2439 2440 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed)); 2441 } 2442 2443 int mt7915_mcu_init(struct mt7915_dev *dev) 2444 { 2445 static const struct mt76_mcu_ops mt7915_mcu_ops = { 2446 .max_retry = 1, 2447 .headroom = sizeof(struct mt76_connac2_mcu_txd), 2448 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message, 2449 .mcu_skb_send_msg = mt7915_mcu_send_message, 2450 .mcu_parse_response = mt7915_mcu_parse_response, 2451 }; 2452 2453 dev->mt76.mcu_ops = &mt7915_mcu_ops; 2454 2455 return mt7915_mcu_init_firmware(dev); 2456 } 2457 2458 void mt7915_mcu_exit(struct mt7915_dev *dev) 2459 { 2460 mt76_connac_mcu_restart(&dev->mt76); 2461 if (mt7915_firmware_state(dev, false)) { 2462 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 2463 goto out; 2464 } 2465 2466 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 2467 if (dev->hif2) 2468 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 2469 MT_TOP_LPCR_HOST_FW_OWN); 2470 out: 2471 skb_queue_purge(&dev->mt76.mcu.res_q); 2472 } 2473 2474 static int 2475 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band) 2476 { 2477 struct { 2478 u8 operation; 2479 u8 count; 2480 u8 _rsv[2]; 2481 u8 index; 2482 u8 enable; 2483 __le16 etype; 2484 } req = { 2485 .operation = 1, 2486 .count = 1, 2487 .enable = 1, 2488 .etype = cpu_to_le16(ETH_P_PAE), 2489 }; 2490 2491 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS), 2492 &req, sizeof(req), false); 2493 } 2494 2495 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, 2496 bool enable, bool hdr_trans) 2497 { 2498 struct { 2499 u8 operation; 2500 u8 enable; 2501 u8 check_bssid; 2502 u8 insert_vlan; 2503 u8 remove_vlan; 2504 u8 tid; 2505 u8 mode; 2506 u8 rsv; 2507 } __packed req_trans = { 2508 .enable = hdr_trans, 2509 }; 2510 struct { 2511 u8 enable; 2512 u8 band; 2513 u8 rsv[2]; 2514 } __packed req_mac = { 2515 .enable = enable, 2516 .band = band, 2517 }; 2518 int ret; 2519 2520 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS), 2521 &req_trans, sizeof(req_trans), false); 2522 if (ret) 2523 return ret; 2524 2525 if (hdr_trans) 2526 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band); 2527 2528 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL), 2529 &req_mac, sizeof(req_mac), true); 2530 } 2531 2532 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param) 2533 { 2534 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param; 2535 u8 num = req->total; 2536 size_t len = sizeof(*req) - 2537 (IEEE80211_NUM_ACS - num) * sizeof(struct edca); 2538 2539 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req, 2540 len, true); 2541 } 2542 2543 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif) 2544 { 2545 #define TX_CMD_MODE 1 2546 struct mt7915_mcu_tx req = { 2547 .valid = true, 2548 .mode = TX_CMD_MODE, 2549 .total = IEEE80211_NUM_ACS, 2550 }; 2551 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 2552 int ac; 2553 2554 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 2555 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; 2556 struct edca *e = &req.edca[ac]; 2557 2558 e->set = WMM_PARAM_SET; 2559 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS; 2560 e->aifs = q->aifs; 2561 e->txop = cpu_to_le16(q->txop); 2562 2563 if (q->cw_min) 2564 e->cw_min = fls(q->cw_min); 2565 else 2566 e->cw_min = 5; 2567 2568 if (q->cw_max) 2569 e->cw_max = cpu_to_le16(fls(q->cw_max)); 2570 else 2571 e->cw_max = cpu_to_le16(10); 2572 } 2573 2574 return mt7915_mcu_update_edca(dev, &req); 2575 } 2576 2577 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val) 2578 { 2579 struct { 2580 __le32 tag; 2581 __le16 min_lpn; 2582 u8 rsv[2]; 2583 } __packed req = { 2584 .tag = cpu_to_le32(0x1), 2585 .min_lpn = cpu_to_le16(val), 2586 }; 2587 2588 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2589 sizeof(req), true); 2590 } 2591 2592 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, 2593 const struct mt7915_dfs_pulse *pulse) 2594 { 2595 struct { 2596 __le32 tag; 2597 2598 __le32 max_width; /* us */ 2599 __le32 max_pwr; /* dbm */ 2600 __le32 min_pwr; /* dbm */ 2601 __le32 min_stgr_pri; /* us */ 2602 __le32 max_stgr_pri; /* us */ 2603 __le32 min_cr_pri; /* us */ 2604 __le32 max_cr_pri; /* us */ 2605 } __packed req = { 2606 .tag = cpu_to_le32(0x3), 2607 2608 #define __req_field(field) .field = cpu_to_le32(pulse->field) 2609 __req_field(max_width), 2610 __req_field(max_pwr), 2611 __req_field(min_pwr), 2612 __req_field(min_stgr_pri), 2613 __req_field(max_stgr_pri), 2614 __req_field(min_cr_pri), 2615 __req_field(max_cr_pri), 2616 #undef __req_field 2617 }; 2618 2619 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2620 sizeof(req), true); 2621 } 2622 2623 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, 2624 const struct mt7915_dfs_pattern *pattern) 2625 { 2626 struct { 2627 __le32 tag; 2628 __le16 radar_type; 2629 2630 u8 enb; 2631 u8 stgr; 2632 u8 min_crpn; 2633 u8 max_crpn; 2634 u8 min_crpr; 2635 u8 min_pw; 2636 __le32 min_pri; 2637 __le32 max_pri; 2638 u8 max_pw; 2639 u8 min_crbn; 2640 u8 max_crbn; 2641 u8 min_stgpn; 2642 u8 max_stgpn; 2643 u8 min_stgpr; 2644 u8 rsv[2]; 2645 __le32 min_stgpr_diff; 2646 } __packed req = { 2647 .tag = cpu_to_le32(0x2), 2648 .radar_type = cpu_to_le16(index), 2649 2650 #define __req_field_u8(field) .field = pattern->field 2651 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 2652 __req_field_u8(enb), 2653 __req_field_u8(stgr), 2654 __req_field_u8(min_crpn), 2655 __req_field_u8(max_crpn), 2656 __req_field_u8(min_crpr), 2657 __req_field_u8(min_pw), 2658 __req_field_u32(min_pri), 2659 __req_field_u32(max_pri), 2660 __req_field_u8(max_pw), 2661 __req_field_u8(min_crbn), 2662 __req_field_u8(max_crbn), 2663 __req_field_u8(min_stgpn), 2664 __req_field_u8(max_stgpn), 2665 __req_field_u8(min_stgpr), 2666 __req_field_u32(min_stgpr_diff), 2667 #undef __req_field_u8 2668 #undef __req_field_u32 2669 }; 2670 2671 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req, 2672 sizeof(req), true); 2673 } 2674 2675 static int 2676 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy, 2677 struct cfg80211_chan_def *chandef, 2678 int cmd) 2679 { 2680 struct mt7915_dev *dev = phy->dev; 2681 struct mt76_phy *mphy = phy->mt76; 2682 struct ieee80211_channel *chan = mphy->chandef.chan; 2683 int freq = mphy->chandef.center_freq1; 2684 struct mt7915_mcu_background_chain_ctrl req = { 2685 .monitor_scan_type = 2, /* simple rx */ 2686 }; 2687 2688 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 2689 return -EINVAL; 2690 2691 if (!cfg80211_chandef_valid(&mphy->chandef)) 2692 return -EINVAL; 2693 2694 switch (cmd) { 2695 case CH_SWITCH_BACKGROUND_SCAN_START: { 2696 req.chan = chan->hw_value; 2697 req.central_chan = ieee80211_frequency_to_channel(freq); 2698 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2699 req.monitor_chan = chandef->chan->hw_value; 2700 req.monitor_central_chan = 2701 ieee80211_frequency_to_channel(chandef->center_freq1); 2702 req.monitor_bw = mt76_connac_chan_bw(chandef); 2703 req.band_idx = phy->mt76->band_idx; 2704 req.scan_mode = 1; 2705 break; 2706 } 2707 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 2708 req.monitor_chan = chandef->chan->hw_value; 2709 req.monitor_central_chan = 2710 ieee80211_frequency_to_channel(chandef->center_freq1); 2711 req.band_idx = phy->mt76->band_idx; 2712 req.scan_mode = 2; 2713 break; 2714 case CH_SWITCH_BACKGROUND_SCAN_STOP: 2715 req.chan = chan->hw_value; 2716 req.central_chan = ieee80211_frequency_to_channel(freq); 2717 req.bw = mt76_connac_chan_bw(&mphy->chandef); 2718 req.tx_stream = hweight8(mphy->antenna_mask); 2719 req.rx_stream = mphy->antenna_mask; 2720 break; 2721 default: 2722 return -EINVAL; 2723 } 2724 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 2725 2726 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL), 2727 &req, sizeof(req), false); 2728 } 2729 2730 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, 2731 struct cfg80211_chan_def *chandef) 2732 { 2733 struct mt7915_dev *dev = phy->dev; 2734 int err, region, rdd_idx; 2735 2736 rdd_idx = mt7915_get_rdd_idx(phy, true); 2737 if (rdd_idx < 0) 2738 return -EINVAL; 2739 2740 if (!chandef) { /* disable offchain */ 2741 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, rdd_idx, 0, 0); 2742 if (err) 2743 return err; 2744 2745 return mt7915_mcu_background_chain_ctrl(phy, NULL, 2746 CH_SWITCH_BACKGROUND_SCAN_STOP); 2747 } 2748 2749 err = mt7915_mcu_background_chain_ctrl(phy, chandef, 2750 CH_SWITCH_BACKGROUND_SCAN_START); 2751 if (err) 2752 return err; 2753 2754 switch (dev->mt76.region) { 2755 case NL80211_DFS_ETSI: 2756 region = 0; 2757 break; 2758 case NL80211_DFS_JP: 2759 region = 2; 2760 break; 2761 case NL80211_DFS_FCC: 2762 default: 2763 region = 1; 2764 break; 2765 } 2766 2767 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, rdd_idx, 0, region); 2768 } 2769 2770 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) 2771 { 2772 static const u8 ch_band[] = { 2773 [NL80211_BAND_2GHZ] = 0, 2774 [NL80211_BAND_5GHZ] = 1, 2775 [NL80211_BAND_6GHZ] = 2, 2776 }; 2777 struct mt7915_dev *dev = phy->dev; 2778 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 2779 int freq1 = chandef->center_freq1; 2780 u8 band = phy->mt76->band_idx; 2781 struct { 2782 u8 control_ch; 2783 u8 center_ch; 2784 u8 bw; 2785 u8 tx_path_num; 2786 u8 rx_path; /* mask or num */ 2787 u8 switch_reason; 2788 u8 band_idx; 2789 u8 center_ch2; /* for 80+80 only */ 2790 __le16 cac_case; 2791 u8 channel_band; 2792 u8 rsv0; 2793 __le32 outband_freq; 2794 u8 txpower_drop; 2795 u8 ap_bw; 2796 u8 ap_center_ch; 2797 u8 rsv1[57]; 2798 } __packed req = { 2799 .control_ch = chandef->chan->hw_value, 2800 .center_ch = ieee80211_frequency_to_channel(freq1), 2801 .bw = mt76_connac_chan_bw(chandef), 2802 .tx_path_num = hweight16(phy->mt76->chainmask), 2803 .rx_path = phy->mt76->chainmask >> (dev->chainshift * band), 2804 .band_idx = band, 2805 .channel_band = ch_band[chandef->chan->band], 2806 }; 2807 2808 #ifdef CONFIG_NL80211_TESTMODE 2809 if (phy->mt76->test.tx_antenna_mask && 2810 mt76_testmode_enabled(phy->mt76)) { 2811 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask); 2812 req.rx_path = phy->mt76->test.tx_antenna_mask; 2813 } 2814 #endif 2815 2816 if (mt76_connac_spe_idx(phy->mt76->antenna_mask)) 2817 req.tx_path_num = fls(phy->mt76->antenna_mask); 2818 2819 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 2820 req.switch_reason = CH_SWITCH_NORMAL; 2821 else if (phy->mt76->offchannel || 2822 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE) 2823 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 2824 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 2825 NL80211_IFTYPE_AP)) 2826 req.switch_reason = CH_SWITCH_DFS; 2827 else 2828 req.switch_reason = CH_SWITCH_NORMAL; 2829 2830 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH)) 2831 req.rx_path = hweight8(req.rx_path); 2832 2833 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 2834 int freq2 = chandef->center_freq2; 2835 2836 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 2837 } 2838 2839 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); 2840 } 2841 2842 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev) 2843 { 2844 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 2845 #define PAGE_IDX_MASK GENMASK(4, 2) 2846 #define PER_PAGE_SIZE 0x400 2847 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER }; 2848 u16 eeprom_size = mt7915_eeprom_size(dev); 2849 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 2850 u8 *eep = (u8 *)dev->mt76.eeprom.data; 2851 int eep_len; 2852 int i; 2853 2854 for (i = 0; i < total; i++, eep += eep_len) { 2855 struct sk_buff *skb; 2856 int ret; 2857 2858 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 2859 eep_len = eeprom_size % PER_PAGE_SIZE; 2860 else 2861 eep_len = PER_PAGE_SIZE; 2862 2863 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 2864 sizeof(req) + eep_len); 2865 if (!skb) 2866 return -ENOMEM; 2867 2868 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 2869 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 2870 req.len = cpu_to_le16(eep_len); 2871 2872 skb_put_data(skb, &req, sizeof(req)); 2873 skb_put_data(skb, eep, eep_len); 2874 2875 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2876 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true); 2877 if (ret) 2878 return ret; 2879 } 2880 2881 return 0; 2882 } 2883 2884 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev) 2885 { 2886 struct mt7915_mcu_eeprom req = { 2887 .buffer_mode = EE_MODE_EFUSE, 2888 .format = EE_FORMAT_WHOLE, 2889 }; 2890 2891 if (dev->flash_mode) 2892 return mt7915_mcu_set_eeprom_flash(dev); 2893 2894 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE), 2895 &req, sizeof(req), true); 2896 } 2897 2898 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf) 2899 { 2900 struct mt7915_mcu_eeprom_info req = { 2901 .addr = cpu_to_le32(round_down(offset, 2902 MT7915_EEPROM_BLOCK_SIZE)), 2903 }; 2904 struct mt7915_mcu_eeprom_info *res; 2905 struct sk_buff *skb; 2906 u8 *buf = read_buf; 2907 int ret; 2908 2909 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 2910 MCU_EXT_QUERY(EFUSE_ACCESS), 2911 &req, sizeof(req), true, &skb); 2912 if (ret) 2913 return ret; 2914 2915 res = (struct mt7915_mcu_eeprom_info *)skb->data; 2916 if (!buf) 2917 #if defined(__linux__) 2918 buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); 2919 #elif defined(__FreeBSD__) 2920 buf = (u8 *)dev->mt76.eeprom.data + le32_to_cpu(res->addr); 2921 #endif 2922 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE); 2923 2924 dev_kfree_skb(skb); 2925 2926 return 0; 2927 } 2928 2929 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num) 2930 { 2931 struct { 2932 u8 _rsv; 2933 u8 version; 2934 u8 die_idx; 2935 u8 _rsv2; 2936 } __packed req = { 2937 .version = 1, 2938 }; 2939 struct sk_buff *skb; 2940 int ret; 2941 2942 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 2943 MCU_EXT_QUERY(EFUSE_FREE_BLOCK), 2944 &req, sizeof(req), true, &skb); 2945 if (ret) 2946 return ret; 2947 2948 *block_num = *(u8 *)skb->data; 2949 dev_kfree_skb(skb); 2950 2951 return 0; 2952 } 2953 2954 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx, 2955 u8 *data, u32 len, int cmd) 2956 { 2957 struct { 2958 u8 dir; 2959 u8 valid; 2960 __le16 bitmap; 2961 s8 precal; 2962 u8 action; 2963 u8 band; 2964 u8 idx; 2965 u8 rsv[4]; 2966 __le32 len; 2967 } req = {}; 2968 struct sk_buff *skb; 2969 2970 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len); 2971 if (!skb) 2972 return -ENOMEM; 2973 2974 req.idx = idx; 2975 req.len = cpu_to_le32(len); 2976 skb_put_data(skb, &req, sizeof(req)); 2977 skb_put_data(skb, data, len); 2978 2979 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false); 2980 } 2981 2982 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev) 2983 { 2984 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data; 2985 u32 total = mt7915_get_cal_group_size(dev); 2986 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; 2987 2988 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP)) 2989 return 0; 2990 2991 /* 2992 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG 2993 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC 2994 */ 2995 while (total > 0) { 2996 int ret, len; 2997 2998 len = min_t(u32, total, MT_EE_CAL_UNIT); 2999 3000 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len, 3001 MCU_EXT_CMD(GROUP_PRE_CAL_INFO)); 3002 if (ret) 3003 return ret; 3004 3005 total -= len; 3006 cal += len; 3007 idx++; 3008 } 3009 3010 return 0; 3011 } 3012 3013 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur) 3014 { 3015 int i; 3016 3017 for (i = 0; i < n_freqs; i++) 3018 if (cur == freqs[i]) 3019 return i; 3020 3021 return -1; 3022 } 3023 3024 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw) 3025 { 3026 static const u16 freq_list_v1[] = { 3027 5180, 5200, 5220, 5240, 3028 5260, 5280, 5300, 5320, 3029 5500, 5520, 5540, 5560, 3030 5580, 5600, 5620, 5640, 3031 5660, 5680, 5700, 5745, 3032 5765, 5785, 5805, 5825 3033 }; 3034 static const u16 freq_list_v2[] = { 3035 /* 6G BW20*/ 3036 5955, 5975, 5995, 6015, 3037 6035, 6055, 6075, 6095, 3038 6115, 6135, 6155, 6175, 3039 6195, 6215, 6235, 6255, 3040 6275, 6295, 6315, 6335, 3041 6355, 6375, 6395, 6415, 3042 6435, 6455, 6475, 6495, 3043 6515, 6535, 6555, 6575, 3044 6595, 6615, 6635, 6655, 3045 6675, 6695, 6715, 6735, 3046 6755, 6775, 6795, 6815, 3047 6835, 6855, 6875, 6895, 3048 6915, 6935, 6955, 6975, 3049 6995, 7015, 7035, 7055, 3050 7075, 7095, 7115, 3051 /* 6G BW160 */ 3052 6025, 6185, 6345, 6505, 3053 6665, 6825, 6985, 3054 /* 5G BW20 */ 3055 5180, 5200, 5220, 5240, 3056 5260, 5280, 5300, 5320, 3057 5500, 5520, 5540, 5560, 3058 5580, 5600, 5620, 5640, 3059 5660, 5680, 5700, 5720, 3060 5745, 5765, 5785, 5805, 3061 5825, 5845, 5865, 5885, 3062 /* 5G BW160 */ 3063 5250, 5570, 5815 3064 }; 3065 static const u16 freq_list_v2_7981[] = { 3066 /* 5G BW20 */ 3067 5180, 5200, 5220, 5240, 3068 5260, 5280, 5300, 5320, 3069 5500, 5520, 5540, 5560, 3070 5580, 5600, 5620, 5640, 3071 5660, 5680, 5700, 5720, 3072 5745, 5765, 5785, 5805, 3073 5825, 5845, 5865, 5885, 3074 /* 5G BW160 */ 3075 5250, 5570, 5815 3076 }; 3077 const u16 *freq_list = freq_list_v1; 3078 int n_freqs = ARRAY_SIZE(freq_list_v1); 3079 int idx; 3080 3081 if (!is_mt7915(&dev->mt76)) { 3082 if (is_mt7981(&dev->mt76)) { 3083 freq_list = freq_list_v2_7981; 3084 n_freqs = ARRAY_SIZE(freq_list_v2_7981); 3085 } else { 3086 freq_list = freq_list_v2; 3087 n_freqs = ARRAY_SIZE(freq_list_v2); 3088 } 3089 } 3090 3091 if (freq < 4000) { 3092 if (freq < 2432) 3093 return n_freqs; 3094 if (freq < 2457) 3095 return n_freqs + 1; 3096 3097 return n_freqs + 2; 3098 } 3099 3100 if (bw == NL80211_CHAN_WIDTH_80P80) 3101 return -1; 3102 3103 if (bw != NL80211_CHAN_WIDTH_20) { 3104 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10); 3105 if (idx >= 0) 3106 return idx; 3107 3108 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10); 3109 if (idx >= 0) 3110 return idx; 3111 } 3112 3113 return mt7915_find_freq_idx(freq_list, n_freqs, freq); 3114 } 3115 3116 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy) 3117 { 3118 struct mt7915_dev *dev = phy->dev; 3119 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 3120 enum nl80211_band band = chandef->chan->band; 3121 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; 3122 u16 center_freq = chandef->center_freq1; 3123 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data; 3124 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3; 3125 int idx; 3126 3127 switch (band) { 3128 case NL80211_BAND_2GHZ: 3129 dpd_mask = MT_EE_WIFI_CAL_DPD_2G; 3130 break; 3131 case NL80211_BAND_5GHZ: 3132 dpd_mask = MT_EE_WIFI_CAL_DPD_5G; 3133 break; 3134 case NL80211_BAND_6GHZ: 3135 dpd_mask = MT_EE_WIFI_CAL_DPD_6G; 3136 break; 3137 default: 3138 dpd_mask = 0; 3139 break; 3140 } 3141 3142 if (!(eep[offs] & dpd_mask)) 3143 return 0; 3144 3145 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width); 3146 if (idx < 0) 3147 return -EINVAL; 3148 3149 /* Items: Tx DPD, Tx Flatness */ 3150 idx = idx * cal_num; 3151 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT); 3152 3153 while (cal_num--) { 3154 int ret; 3155 3156 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT, 3157 MCU_EXT_CMD(DPD_PRE_CAL_INFO)); 3158 if (ret) 3159 return ret; 3160 3161 idx++; 3162 cal += MT_EE_CAL_UNIT; 3163 } 3164 3165 return 0; 3166 } 3167 3168 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch) 3169 { 3170 struct mt76_channel_state *state = phy->mt76->chan_state; 3171 struct mt76_channel_state *state_ts = &phy->state_ts; 3172 struct mt7915_dev *dev = phy->dev; 3173 struct mt7915_mcu_mib *res, req[5]; 3174 struct sk_buff *skb; 3175 static const u32 *offs; 3176 int i, ret, len, offs_cc; 3177 u64 cc_tx; 3178 3179 /* strict order */ 3180 if (is_mt7915(&dev->mt76)) { 3181 static const u32 chip_offs[] = { 3182 MIB_NON_WIFI_TIME, 3183 MIB_TX_TIME, 3184 MIB_RX_TIME, 3185 MIB_OBSS_AIRTIME, 3186 MIB_TXOP_INIT_COUNT, 3187 }; 3188 len = ARRAY_SIZE(chip_offs); 3189 offs = chip_offs; 3190 offs_cc = 20; 3191 } else { 3192 static const u32 chip_offs[] = { 3193 MIB_NON_WIFI_TIME_V2, 3194 MIB_TX_TIME_V2, 3195 MIB_RX_TIME_V2, 3196 MIB_OBSS_AIRTIME_V2 3197 }; 3198 len = ARRAY_SIZE(chip_offs); 3199 offs = chip_offs; 3200 offs_cc = 0; 3201 } 3202 3203 for (i = 0; i < len; i++) { 3204 req[i].band = cpu_to_le32(phy->mt76->band_idx); 3205 req[i].offs = cpu_to_le32(offs[i]); 3206 } 3207 3208 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO), 3209 req, len * sizeof(req[0]), true, &skb); 3210 if (ret) 3211 return ret; 3212 3213 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc); 3214 3215 #define __res_u64(s) le64_to_cpu(res[s].data) 3216 /* subtract Tx backoff time from Tx duration for MT7915 */ 3217 if (is_mt7915(&dev->mt76)) { 3218 u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */ 3219 cc_tx = __res_u64(1) - backoff; 3220 } else { 3221 cc_tx = __res_u64(1); 3222 } 3223 3224 if (chan_switch) 3225 goto out; 3226 3227 state->cc_tx += cc_tx - state_ts->cc_tx; 3228 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx; 3229 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx; 3230 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) - 3231 state_ts->cc_busy; 3232 3233 out: 3234 state_ts->cc_tx = cc_tx; 3235 state_ts->cc_bss_rx = __res_u64(2); 3236 state_ts->cc_rx = __res_u64(2) + __res_u64(3); 3237 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3); 3238 #undef __res_u64 3239 3240 dev_kfree_skb(skb); 3241 3242 return 0; 3243 } 3244 3245 int mt7915_mcu_get_temperature(struct mt7915_phy *phy) 3246 { 3247 struct mt7915_dev *dev = phy->dev; 3248 struct { 3249 u8 ctrl_id; 3250 u8 action; 3251 u8 band_idx; 3252 u8 rsv[5]; 3253 } req = { 3254 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY, 3255 .band_idx = phy->mt76->band_idx, 3256 }; 3257 3258 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req, 3259 sizeof(req), true); 3260 } 3261 3262 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state) 3263 { 3264 struct mt7915_dev *dev = phy->dev; 3265 struct mt7915_mcu_thermal_ctrl req = { 3266 .band_idx = phy->mt76->band_idx, 3267 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG, 3268 }; 3269 int level, ret; 3270 3271 /* set duty cycle and level */ 3272 for (level = 0; level < 4; level++) { 3273 req.duty.duty_level = level; 3274 req.duty.duty_cycle = state; 3275 state /= 2; 3276 3277 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3278 &req, sizeof(req), false); 3279 if (ret) 3280 return ret; 3281 } 3282 return 0; 3283 } 3284 3285 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy) 3286 { 3287 struct mt7915_dev *dev = phy->dev; 3288 struct { 3289 struct mt7915_mcu_thermal_ctrl ctrl; 3290 3291 __le32 trigger_temp; 3292 __le32 restore_temp; 3293 __le16 sustain_time; 3294 u8 rsv[2]; 3295 } __packed req = { 3296 .ctrl = { 3297 .band_idx = phy->mt76->band_idx, 3298 .type.protect_type = 1, 3299 .type.trigger_type = 1, 3300 }, 3301 }; 3302 int ret; 3303 3304 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE; 3305 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3306 &req, sizeof(req.ctrl), false); 3307 3308 if (ret) 3309 return ret; 3310 3311 /* set high-temperature trigger threshold */ 3312 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE; 3313 /* add a safety margin ~10 */ 3314 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10); 3315 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 3316 req.sustain_time = cpu_to_le16(10); 3317 3318 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT), 3319 &req, sizeof(req), false); 3320 } 3321 3322 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower) 3323 { 3324 struct mt7915_dev *dev = phy->dev; 3325 struct { 3326 u8 format_id; 3327 u8 rsv; 3328 u8 band_idx; 3329 s8 txpower_min; 3330 } __packed req = { 3331 .format_id = TX_POWER_LIMIT_FRAME_MIN, 3332 .band_idx = phy->mt76->band_idx, 3333 .txpower_min = txpower * 2, /* 0.5db */ 3334 }; 3335 3336 return mt76_mcu_send_msg(&dev->mt76, 3337 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3338 sizeof(req), true); 3339 } 3340 3341 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, 3342 struct ieee80211_vif *vif, 3343 struct ieee80211_sta *sta, s8 txpower) 3344 { 3345 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 3346 struct mt7915_dev *dev = phy->dev; 3347 struct mt76_phy *mphy = phy->mt76; 3348 struct { 3349 u8 format_id; 3350 u8 rsv[3]; 3351 u8 band_idx; 3352 s8 txpower_max; 3353 __le16 wcid; 3354 s8 txpower_offs[48]; 3355 } __packed req = { 3356 .format_id = TX_POWER_LIMIT_FRAME, 3357 .band_idx = phy->mt76->band_idx, 3358 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2), 3359 .wcid = cpu_to_le16(msta->wcid.idx), 3360 }; 3361 int ret; 3362 s8 txpower_sku[MT7915_SKU_RATE_NUM]; 3363 3364 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku)); 3365 if (ret) 3366 return ret; 3367 3368 txpower = mt76_get_power_bound(mphy, txpower); 3369 if (txpower > mphy->txpower_cur || txpower < 0) 3370 return -EINVAL; 3371 3372 if (txpower) { 3373 u32 offs, len, i; 3374 3375 if (sta->deflink.ht_cap.ht_supported) { 3376 const u8 *sku_len = mt7915_sku_group_len; 3377 3378 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM]; 3379 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40]; 3380 3381 if (sta->deflink.vht_cap.vht_supported) { 3382 offs += len; 3383 len = sku_len[SKU_VHT_BW20] * 4; 3384 3385 if (sta->deflink.he_cap.has_he) { 3386 offs += len + sku_len[SKU_HE_RU26] * 3; 3387 len = sku_len[SKU_HE_RU242] * 4; 3388 } 3389 } 3390 } else { 3391 return -EINVAL; 3392 } 3393 3394 for (i = 0; i < len; i++, offs++) 3395 req.txpower_offs[i] = 3396 DIV_ROUND_UP(txpower - txpower_sku[offs], 2); 3397 } 3398 3399 return mt76_mcu_send_msg(&dev->mt76, 3400 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3401 sizeof(req), true); 3402 } 3403 3404 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) 3405 { 3406 struct mt7915_dev *dev = phy->dev; 3407 struct mt76_phy *mphy = phy->mt76; 3408 struct ieee80211_hw *hw = mphy->hw; 3409 struct mt7915_mcu_txpower_sku req = { 3410 .format_id = TX_POWER_LIMIT_TABLE, 3411 .band_idx = phy->mt76->band_idx, 3412 }; 3413 struct mt76_power_limits limits_array; 3414 s8 *la = (s8 *)&limits_array; 3415 int i, idx; 3416 int tx_power; 3417 3418 tx_power = mt76_get_power_bound(mphy, hw->conf.power_level); 3419 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 3420 &limits_array, tx_power); 3421 mphy->txpower_cur = tx_power; 3422 3423 for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_group_len); i++) { 3424 u8 mcs_num, len = mt7915_sku_group_len[i]; 3425 int j; 3426 3427 if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) { 3428 mcs_num = 10; 3429 3430 if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) 3431 la = (s8 *)&limits_array + 12; 3432 } else { 3433 mcs_num = len; 3434 } 3435 3436 for (j = 0; j < min_t(u8, mcs_num, len); j++) 3437 req.txpower_sku[idx + j] = la[j]; 3438 3439 la += mcs_num; 3440 idx += len; 3441 } 3442 3443 return mt76_mcu_send_msg(&dev->mt76, 3444 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3445 sizeof(req), true); 3446 } 3447 3448 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len) 3449 { 3450 #define RATE_POWER_INFO 2 3451 struct mt7915_dev *dev = phy->dev; 3452 struct { 3453 u8 format_id; 3454 u8 category; 3455 u8 band_idx; 3456 u8 _rsv; 3457 } __packed req = { 3458 .format_id = TX_POWER_LIMIT_INFO, 3459 .category = RATE_POWER_INFO, 3460 .band_idx = phy->mt76->band_idx, 3461 }; 3462 s8 txpower_sku[MT7915_SKU_RATE_NUM][2]; 3463 struct sk_buff *skb; 3464 int ret, i; 3465 3466 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 3467 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), 3468 &req, sizeof(req), true, &skb); 3469 if (ret) 3470 return ret; 3471 3472 memcpy(txpower_sku, skb->data + 4, sizeof(txpower_sku)); 3473 for (i = 0; i < len; i++) 3474 txpower[i] = txpower_sku[i][req.band_idx]; 3475 3476 dev_kfree_skb(skb); 3477 3478 return 0; 3479 } 3480 3481 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, 3482 u8 en) 3483 { 3484 struct { 3485 u8 test_mode_en; 3486 u8 param_idx; 3487 u8 _rsv[2]; 3488 3489 u8 enable; 3490 u8 _rsv2[3]; 3491 3492 u8 pad[8]; 3493 } __packed req = { 3494 .test_mode_en = test_mode, 3495 .param_idx = param, 3496 .enable = en, 3497 }; 3498 3499 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, 3500 sizeof(req), false); 3501 } 3502 3503 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) 3504 { 3505 struct mt7915_dev *dev = phy->dev; 3506 struct mt7915_sku { 3507 u8 format_id; 3508 u8 sku_enable; 3509 u8 band_idx; 3510 u8 rsv; 3511 } __packed req = { 3512 .format_id = TX_POWER_LIMIT_ENABLE, 3513 .band_idx = phy->mt76->band_idx, 3514 .sku_enable = enable, 3515 }; 3516 3517 return mt76_mcu_send_msg(&dev->mt76, 3518 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, 3519 sizeof(req), true); 3520 } 3521 3522 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band) 3523 { 3524 struct { 3525 u8 action; 3526 u8 set; 3527 u8 band; 3528 u8 rsv; 3529 } req = { 3530 .action = action, 3531 .set = set, 3532 .band = band, 3533 }; 3534 3535 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER), 3536 &req, sizeof(req), false); 3537 } 3538 3539 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action) 3540 { 3541 struct { 3542 u8 action; 3543 union { 3544 struct { 3545 u8 snd_mode; 3546 u8 sta_num; 3547 u8 rsv; 3548 u8 wlan_idx[4]; 3549 __le32 snd_period; /* ms */ 3550 } __packed snd; 3551 struct { 3552 bool ebf; 3553 bool ibf; 3554 u8 rsv; 3555 } __packed type; 3556 struct { 3557 u8 bf_num; 3558 u8 bf_bitmap; 3559 u8 bf_sel[8]; 3560 u8 rsv[5]; 3561 } __packed mod; 3562 }; 3563 } __packed req = { 3564 .action = action, 3565 }; 3566 3567 #define MT_BF_PROCESSING 4 3568 switch (action) { 3569 case MT_BF_SOUNDING_ON: 3570 req.snd.snd_mode = MT_BF_PROCESSING; 3571 break; 3572 case MT_BF_TYPE_UPDATE: 3573 req.type.ebf = true; 3574 req.type.ibf = dev->ibf; 3575 break; 3576 case MT_BF_MODULE_UPDATE: 3577 req.mod.bf_num = 2; 3578 req.mod.bf_bitmap = GENMASK(1, 0); 3579 break; 3580 default: 3581 return -EINVAL; 3582 } 3583 3584 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, 3585 sizeof(req), true); 3586 } 3587 3588 static int 3589 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val) 3590 { 3591 struct mt7915_dev *dev = phy->dev; 3592 struct mt7915_mcu_sr_ctrl req = { 3593 .action = action, 3594 .argnum = 1, 3595 .band_idx = phy->mt76->band_idx, 3596 .val = cpu_to_le32(val), 3597 }; 3598 3599 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3600 sizeof(req), true); 3601 } 3602 3603 static int 3604 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy, 3605 struct ieee80211_he_obss_pd *he_obss_pd) 3606 { 3607 struct mt7915_dev *dev = phy->dev; 3608 struct { 3609 struct mt7915_mcu_sr_ctrl ctrl; 3610 struct { 3611 u8 pd_th_non_srg; 3612 u8 pd_th_srg; 3613 u8 period_offs; 3614 u8 rcpi_src; 3615 __le16 obss_pd_min; 3616 __le16 obss_pd_min_srg; 3617 u8 resp_txpwr_mode; 3618 u8 txpwr_restrict_mode; 3619 u8 txpwr_ref; 3620 u8 rsv[3]; 3621 } __packed param; 3622 } __packed req = { 3623 .ctrl = { 3624 .action = SPR_SET_PARAM, 3625 .argnum = 9, 3626 .band_idx = phy->mt76->band_idx, 3627 }, 3628 }; 3629 int ret; 3630 u8 max_th = 82, non_srg_max_th = 62; 3631 3632 /* disable firmware dynamical PD asjustment */ 3633 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false); 3634 if (ret) 3635 return ret; 3636 3637 if (he_obss_pd->sr_ctrl & 3638 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 3639 req.param.pd_th_non_srg = max_th; 3640 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 3641 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 3642 else 3643 req.param.pd_th_non_srg = non_srg_max_th; 3644 3645 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 3646 req.param.pd_th_srg = max_th - he_obss_pd->max_offset; 3647 3648 req.param.obss_pd_min = cpu_to_le16(82); 3649 req.param.obss_pd_min_srg = cpu_to_le16(82); 3650 req.param.txpwr_restrict_mode = 2; 3651 req.param.txpwr_ref = 21; 3652 3653 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3654 sizeof(req), true); 3655 } 3656 3657 static int 3658 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3659 struct ieee80211_he_obss_pd *he_obss_pd) 3660 { 3661 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3662 struct mt7915_dev *dev = phy->dev; 3663 u8 omac = mvif->mt76.omac_idx; 3664 struct { 3665 struct mt7915_mcu_sr_ctrl ctrl; 3666 struct { 3667 u8 omac; 3668 u8 rsv[3]; 3669 u8 flag[20]; 3670 } __packed siga; 3671 } __packed req = { 3672 .ctrl = { 3673 .action = SPR_SET_SIGA, 3674 .argnum = 1, 3675 .band_idx = phy->mt76->band_idx, 3676 }, 3677 .siga = { 3678 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 3679 }, 3680 }; 3681 int ret; 3682 3683 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 3684 req.siga.flag[req.siga.omac] = 0xf; 3685 else 3686 return 0; 3687 3688 /* switch to normal AP mode */ 3689 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0); 3690 if (ret) 3691 return ret; 3692 3693 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3694 sizeof(req), true); 3695 } 3696 3697 static int 3698 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy, 3699 struct ieee80211_he_obss_pd *he_obss_pd) 3700 { 3701 struct mt7915_dev *dev = phy->dev; 3702 struct { 3703 struct mt7915_mcu_sr_ctrl ctrl; 3704 struct { 3705 __le32 color_l[2]; 3706 __le32 color_h[2]; 3707 __le32 bssid_l[2]; 3708 __le32 bssid_h[2]; 3709 } __packed bitmap; 3710 } __packed req = { 3711 .ctrl = { 3712 .action = SPR_SET_SRG_BITMAP, 3713 .argnum = 4, 3714 .band_idx = phy->mt76->band_idx, 3715 }, 3716 }; 3717 u32 bitmap; 3718 3719 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 3720 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3721 3722 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 3723 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3724 3725 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 3726 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3727 3728 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 3729 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap); 3730 3731 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req, 3732 sizeof(req), true); 3733 } 3734 3735 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3736 struct ieee80211_he_obss_pd *he_obss_pd) 3737 { 3738 int ret; 3739 3740 /* enable firmware scene detection algorithms */ 3741 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect); 3742 if (ret) 3743 return ret; 3744 3745 /* firmware dynamically adjusts PD threshold so skip manual control */ 3746 if (sr_scene_detect && !he_obss_pd->enable) 3747 return 0; 3748 3749 /* enable spatial reuse */ 3750 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable); 3751 if (ret) 3752 return ret; 3753 3754 if (sr_scene_detect || !he_obss_pd->enable) 3755 return 0; 3756 3757 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true); 3758 if (ret) 3759 return ret; 3760 3761 /* set SRG/non-SRG OBSS PD threshold */ 3762 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd); 3763 if (ret) 3764 return ret; 3765 3766 /* Set SR prohibit */ 3767 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd); 3768 if (ret) 3769 return ret; 3770 3771 /* set SRG BSS color/BSSID bitmap */ 3772 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 3773 } 3774 3775 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, 3776 struct ieee80211_sta *sta, struct rate_info *rate) 3777 { 3778 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3779 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; 3780 struct mt7915_dev *dev = phy->dev; 3781 struct mt76_phy *mphy = phy->mt76; 3782 struct { 3783 u8 category; 3784 u8 band; 3785 __le16 wcid; 3786 } __packed req = { 3787 .category = MCU_PHY_STATE_CONTENTION_RX_RATE, 3788 .band = mvif->mt76.band_idx, 3789 .wcid = cpu_to_le16(msta->wcid.idx), 3790 }; 3791 struct ieee80211_supported_band *sband; 3792 struct mt7915_mcu_phy_rx_info *res; 3793 struct sk_buff *skb; 3794 int ret; 3795 bool cck = false; 3796 3797 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO), 3798 &req, sizeof(req), true, &skb); 3799 if (ret) 3800 return ret; 3801 3802 res = (struct mt7915_mcu_phy_rx_info *)skb->data; 3803 3804 rate->mcs = res->rate; 3805 rate->nss = res->nsts + 1; 3806 3807 switch (res->mode) { 3808 case MT_PHY_TYPE_CCK: 3809 cck = true; 3810 fallthrough; 3811 case MT_PHY_TYPE_OFDM: 3812 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 3813 sband = &mphy->sband_5g.sband; 3814 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 3815 sband = &mphy->sband_6g.sband; 3816 else 3817 sband = &mphy->sband_2g.sband; 3818 3819 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck); 3820 rate->legacy = sband->bitrates[rate->mcs].bitrate; 3821 break; 3822 case MT_PHY_TYPE_HT: 3823 case MT_PHY_TYPE_HT_GF: 3824 if (rate->mcs > 31) { 3825 ret = -EINVAL; 3826 goto out; 3827 } 3828 3829 rate->flags = RATE_INFO_FLAGS_MCS; 3830 if (res->gi) 3831 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 3832 break; 3833 case MT_PHY_TYPE_VHT: 3834 if (rate->mcs > 9) { 3835 ret = -EINVAL; 3836 goto out; 3837 } 3838 3839 rate->flags = RATE_INFO_FLAGS_VHT_MCS; 3840 if (res->gi) 3841 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 3842 break; 3843 case MT_PHY_TYPE_HE_SU: 3844 case MT_PHY_TYPE_HE_EXT_SU: 3845 case MT_PHY_TYPE_HE_TB: 3846 case MT_PHY_TYPE_HE_MU: 3847 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) { 3848 ret = -EINVAL; 3849 goto out; 3850 } 3851 rate->he_gi = res->gi; 3852 rate->flags = RATE_INFO_FLAGS_HE_MCS; 3853 break; 3854 default: 3855 ret = -EINVAL; 3856 goto out; 3857 } 3858 3859 switch (res->bw) { 3860 case IEEE80211_STA_RX_BW_160: 3861 rate->bw = RATE_INFO_BW_160; 3862 break; 3863 case IEEE80211_STA_RX_BW_80: 3864 rate->bw = RATE_INFO_BW_80; 3865 break; 3866 case IEEE80211_STA_RX_BW_40: 3867 rate->bw = RATE_INFO_BW_40; 3868 break; 3869 default: 3870 rate->bw = RATE_INFO_BW_20; 3871 break; 3872 } 3873 3874 out: 3875 dev_kfree_skb(skb); 3876 3877 return ret; 3878 } 3879 3880 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, 3881 struct cfg80211_he_bss_color *he_bss_color) 3882 { 3883 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color); 3884 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; 3885 struct bss_info_color *bss_color; 3886 struct sk_buff *skb; 3887 struct tlv *tlv; 3888 3889 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, 3890 NULL, len); 3891 if (IS_ERR(skb)) 3892 return PTR_ERR(skb); 3893 3894 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR, 3895 sizeof(*bss_color)); 3896 bss_color = (struct bss_info_color *)tlv; 3897 bss_color->disable = !he_bss_color->enabled; 3898 bss_color->color = he_bss_color->color; 3899 3900 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3901 MCU_EXT_CMD(BSS_INFO_UPDATE), true); 3902 } 3903 3904 #define TWT_AGRT_TRIGGER BIT(0) 3905 #define TWT_AGRT_ANNOUNCE BIT(1) 3906 #define TWT_AGRT_PROTECT BIT(2) 3907 3908 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, 3909 struct mt7915_vif *mvif, 3910 struct mt7915_twt_flow *flow, 3911 int cmd) 3912 { 3913 struct { 3914 u8 tbl_idx; 3915 u8 cmd; 3916 u8 own_mac_idx; 3917 u8 flowid; /* 0xff for group id */ 3918 __le16 peer_id; /* specify the peer_id (msb=0) 3919 * or group_id (msb=1) 3920 */ 3921 u8 duration; /* 256 us */ 3922 u8 bss_idx; 3923 __le64 start_tsf; 3924 __le16 mantissa; 3925 u8 exponent; 3926 u8 is_ap; 3927 u8 agrt_params; 3928 u8 rsv[23]; 3929 } __packed req = { 3930 .tbl_idx = flow->table_id, 3931 .cmd = cmd, 3932 .own_mac_idx = mvif->mt76.omac_idx, 3933 .flowid = flow->id, 3934 .peer_id = cpu_to_le16(flow->wcid), 3935 .duration = flow->duration, 3936 .bss_idx = mvif->mt76.idx, 3937 .start_tsf = cpu_to_le64(flow->tsf), 3938 .mantissa = flow->mantissa, 3939 .exponent = flow->exp, 3940 .is_ap = true, 3941 }; 3942 3943 if (flow->protection) 3944 req.agrt_params |= TWT_AGRT_PROTECT; 3945 if (!flow->flowtype) 3946 req.agrt_params |= TWT_AGRT_ANNOUNCE; 3947 if (flow->trigger) 3948 req.agrt_params |= TWT_AGRT_TRIGGER; 3949 3950 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE), 3951 &req, sizeof(req), true); 3952 } 3953 3954 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx) 3955 { 3956 struct { 3957 __le32 cmd; 3958 __le32 arg0; 3959 __le32 arg1; 3960 __le16 arg2; 3961 } __packed req = { 3962 .cmd = cpu_to_le32(0x15), 3963 }; 3964 struct mt7915_mcu_wa_tx_stat { 3965 __le16 wcid; 3966 u8 __rsv2[2]; 3967 3968 /* tx_bytes is deprecated since WA byte counter uses u32, 3969 * which easily leads to overflow. 3970 */ 3971 __le32 tx_bytes; 3972 __le32 tx_packets; 3973 } __packed *res; 3974 struct mt76_wcid *wcid; 3975 struct sk_buff *skb; 3976 int ret, len; 3977 u16 ret_wcid; 3978 3979 if (is_mt7915(&dev->mt76)) { 3980 req.arg0 = cpu_to_le32(wlan_idx); 3981 len = sizeof(req) - sizeof(req.arg2); 3982 } else { 3983 req.arg0 = cpu_to_le32(1); 3984 req.arg2 = cpu_to_le16(wlan_idx); 3985 len = sizeof(req); 3986 } 3987 3988 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY), 3989 &req, len, true, &skb); 3990 if (ret) 3991 return ret; 3992 3993 if (!is_mt7915(&dev->mt76)) 3994 skb_pull(skb, 4); 3995 3996 res = (struct mt7915_mcu_wa_tx_stat *)skb->data; 3997 3998 ret_wcid = le16_to_cpu(res->wcid); 3999 if (is_mt7915(&dev->mt76)) 4000 ret_wcid &= 0xff; 4001 4002 if (ret_wcid != wlan_idx) { 4003 ret = -EINVAL; 4004 goto out; 4005 } 4006 4007 rcu_read_lock(); 4008 4009 wcid = mt76_wcid_ptr(dev, wlan_idx); 4010 if (wcid) 4011 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets); 4012 else 4013 ret = -EINVAL; 4014 4015 rcu_read_unlock(); 4016 out: 4017 dev_kfree_skb(skb); 4018 4019 return ret; 4020 } 4021 4022 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set) 4023 { 4024 struct { 4025 __le32 idx; 4026 __le32 ofs; 4027 __le32 data; 4028 } __packed req = { 4029 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))), 4030 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 4031 .data = set ? cpu_to_le32(*val) : 0, 4032 }; 4033 struct sk_buff *skb; 4034 int ret; 4035 4036 if (set) 4037 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS), 4038 &req, sizeof(req), false); 4039 4040 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS), 4041 &req, sizeof(req), true, &skb); 4042 if (ret) 4043 return ret; 4044 4045 *val = le32_to_cpu(*(__le32 *)(skb->data + 8)); 4046 dev_kfree_skb(skb); 4047 4048 return 0; 4049 } 4050