1 // SPDX-License-Identifier: ISC 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/etherdevice.h> 5 #if defined(__linux__) 6 #include <linux/hwmon.h> 7 #include <linux/hwmon-sysfs.h> 8 #include <linux/thermal.h> 9 #endif 10 #if defined(__FreeBSD__) 11 #include <linux/delay.h> 12 #endif 13 #include "mt7915.h" 14 #include "mac.h" 15 #include "mcu.h" 16 #include "eeprom.h" 17 18 static const struct ieee80211_iface_limit if_limits[] = { 19 { 20 .max = 1, 21 .types = BIT(NL80211_IFTYPE_ADHOC) 22 }, { 23 .max = 16, 24 .types = BIT(NL80211_IFTYPE_AP) 25 #ifdef CONFIG_MAC80211_MESH 26 | BIT(NL80211_IFTYPE_MESH_POINT) 27 #endif 28 }, { 29 .max = MT7915_MAX_INTERFACES, 30 .types = BIT(NL80211_IFTYPE_STATION) 31 } 32 }; 33 34 static const struct ieee80211_iface_combination if_comb[] = { 35 { 36 .limits = if_limits, 37 .n_limits = ARRAY_SIZE(if_limits), 38 .max_interfaces = MT7915_MAX_INTERFACES, 39 .num_different_channels = 1, 40 .beacon_int_infra_match = true, 41 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 42 BIT(NL80211_CHAN_WIDTH_20) | 43 BIT(NL80211_CHAN_WIDTH_40) | 44 BIT(NL80211_CHAN_WIDTH_80) | 45 BIT(NL80211_CHAN_WIDTH_160) | 46 BIT(NL80211_CHAN_WIDTH_80P80), 47 } 48 }; 49 50 #if defined(__linux__) 51 static ssize_t mt7915_thermal_temp_show(struct device *dev, 52 struct device_attribute *attr, 53 char *buf) 54 { 55 struct mt7915_phy *phy = dev_get_drvdata(dev); 56 int i = to_sensor_dev_attr(attr)->index; 57 int temperature; 58 59 switch (i) { 60 case 0: 61 temperature = mt7915_mcu_get_temperature(phy); 62 if (temperature < 0) 63 return temperature; 64 /* display in millidegree celcius */ 65 return sprintf(buf, "%u\n", temperature * 1000); 66 case 1: 67 case 2: 68 return sprintf(buf, "%u\n", 69 phy->throttle_temp[i - 1] * 1000); 70 case 3: 71 return sprintf(buf, "%hhu\n", phy->throttle_state); 72 default: 73 return -EINVAL; 74 } 75 } 76 77 static ssize_t mt7915_thermal_temp_store(struct device *dev, 78 struct device_attribute *attr, 79 const char *buf, size_t count) 80 { 81 struct mt7915_phy *phy = dev_get_drvdata(dev); 82 int ret, i = to_sensor_dev_attr(attr)->index; 83 long val; 84 85 ret = kstrtol(buf, 10, &val); 86 if (ret < 0) 87 return ret; 88 89 mutex_lock(&phy->dev->mt76.mutex); 90 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130); 91 phy->throttle_temp[i - 1] = val; 92 mutex_unlock(&phy->dev->mt76.mutex); 93 94 return count; 95 } 96 97 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0); 98 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1); 99 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2); 100 static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3); 101 102 static struct attribute *mt7915_hwmon_attrs[] = { 103 &sensor_dev_attr_temp1_input.dev_attr.attr, 104 &sensor_dev_attr_temp1_crit.dev_attr.attr, 105 &sensor_dev_attr_temp1_max.dev_attr.attr, 106 &sensor_dev_attr_throttle1.dev_attr.attr, 107 NULL, 108 }; 109 ATTRIBUTE_GROUPS(mt7915_hwmon); 110 111 static int 112 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev, 113 unsigned long *state) 114 { 115 *state = MT7915_CDEV_THROTTLE_MAX; 116 117 return 0; 118 } 119 120 static int 121 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev, 122 unsigned long *state) 123 { 124 struct mt7915_phy *phy = cdev->devdata; 125 126 *state = phy->cdev_state; 127 128 return 0; 129 } 130 131 static int 132 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev, 133 unsigned long state) 134 { 135 struct mt7915_phy *phy = cdev->devdata; 136 u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state; 137 int ret; 138 139 if (state > MT7915_CDEV_THROTTLE_MAX) 140 return -EINVAL; 141 142 if (phy->throttle_temp[0] > phy->throttle_temp[1]) 143 return 0; 144 145 if (state == phy->cdev_state) 146 return 0; 147 148 /* 149 * cooling_device convention: 0 = no cooling, more = more cooling 150 * mcu convention: 1 = max cooling, more = less cooling 151 */ 152 ret = mt7915_mcu_set_thermal_throttling(phy, throttling); 153 if (ret) 154 return ret; 155 156 phy->cdev_state = state; 157 158 return 0; 159 } 160 161 static const struct thermal_cooling_device_ops mt7915_thermal_ops = { 162 .get_max_state = mt7915_thermal_get_max_throttle_state, 163 .get_cur_state = mt7915_thermal_get_cur_throttle_state, 164 .set_cur_state = mt7915_thermal_set_cur_throttle_state, 165 }; 166 167 static void mt7915_unregister_thermal(struct mt7915_phy *phy) 168 { 169 struct wiphy *wiphy = phy->mt76->hw->wiphy; 170 171 if (!phy->cdev) 172 return; 173 174 sysfs_remove_link(&wiphy->dev.kobj, "cooling_device"); 175 thermal_cooling_device_unregister(phy->cdev); 176 } 177 #endif 178 179 static int mt7915_thermal_init(struct mt7915_phy *phy) 180 { 181 #if defined(__linux__) 182 struct wiphy *wiphy = phy->mt76->hw->wiphy; 183 struct thermal_cooling_device *cdev; 184 struct device *hwmon; 185 const char *name; 186 187 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s", 188 wiphy_name(wiphy)); 189 190 cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops); 191 if (!IS_ERR(cdev)) { 192 if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj, 193 "cooling_device") < 0) 194 thermal_cooling_device_unregister(cdev); 195 else 196 phy->cdev = cdev; 197 } 198 199 if (!IS_REACHABLE(CONFIG_HWMON)) 200 return 0; 201 202 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy, 203 mt7915_hwmon_groups); 204 if (IS_ERR(hwmon)) 205 return PTR_ERR(hwmon); 206 207 /* initialize critical/maximum high temperature */ 208 phy->throttle_temp[0] = 110; 209 phy->throttle_temp[1] = 120; 210 211 return mt7915_mcu_set_thermal_throttling(phy, 212 MT7915_THERMAL_THROTTLE_MAX); 213 #elif defined(__FreeBSD__) 214 return (0); 215 #endif 216 } 217 218 #if defined(CONFIG_MT76_LEDS) 219 static void mt7915_led_set_config(struct led_classdev *led_cdev, 220 u8 delay_on, u8 delay_off) 221 { 222 struct mt7915_dev *dev; 223 struct mt76_dev *mt76; 224 u32 val; 225 226 mt76 = container_of(led_cdev, struct mt76_dev, led_cdev); 227 dev = container_of(mt76, struct mt7915_dev, mt76); 228 229 /* select TX blink mode, 2: only data frames */ 230 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2); 231 232 /* enable LED */ 233 mt76_wr(dev, MT_LED_EN(0), 1); 234 235 /* set LED Tx blink on/off time */ 236 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) | 237 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off); 238 mt76_wr(dev, MT_LED_TX_BLINK(0), val); 239 240 /* control LED */ 241 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK; 242 if (dev->mt76.led_al) 243 val |= MT_LED_CTRL_POLARITY; 244 245 mt76_wr(dev, MT_LED_CTRL(0), val); 246 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK); 247 } 248 #endif 249 250 static int mt7915_led_set_blink(struct led_classdev *led_cdev, 251 unsigned long *delay_on, 252 unsigned long *delay_off) 253 { 254 #if defined(CONFIG_MT76_LEDS) 255 u16 delta_on = 0, delta_off = 0; 256 257 #define HW_TICK 10 258 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK) 259 260 if (*delay_on) 261 delta_on = TO_HW_TICK(*delay_on); 262 if (*delay_off) 263 delta_off = TO_HW_TICK(*delay_off); 264 265 mt7915_led_set_config(led_cdev, delta_on, delta_off); 266 #endif 267 268 return 0; 269 } 270 271 static void mt7915_led_set_brightness(struct led_classdev *led_cdev, 272 enum led_brightness brightness) 273 { 274 #if defined(CONFIG_MT76_LEDS) 275 if (!brightness) 276 mt7915_led_set_config(led_cdev, 0, 0xff); 277 else 278 mt7915_led_set_config(led_cdev, 0xff, 0); 279 #endif 280 } 281 282 static void 283 mt7915_init_txpower(struct mt7915_dev *dev, 284 struct ieee80211_supported_band *sband) 285 { 286 int i, n_chains = hweight8(dev->mphy.antenna_mask); 287 int nss_delta = mt76_tx_power_nss_delta(n_chains); 288 int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band); 289 struct mt76_power_limits limits; 290 291 for (i = 0; i < sband->n_channels; i++) { 292 struct ieee80211_channel *chan = &sband->channels[i]; 293 u32 target_power = 0; 294 int j; 295 296 for (j = 0; j < n_chains; j++) { 297 u32 val; 298 299 val = mt7915_eeprom_get_target_power(dev, chan, j); 300 target_power = max(target_power, val); 301 } 302 303 target_power += pwr_delta; 304 target_power = mt76_get_rate_power_limits(&dev->mphy, chan, 305 &limits, 306 target_power); 307 target_power += nss_delta; 308 target_power = DIV_ROUND_UP(target_power, 2); 309 chan->max_power = min_t(int, chan->max_reg_power, 310 target_power); 311 chan->orig_mpwr = target_power; 312 } 313 } 314 315 static void 316 mt7915_regd_notifier(struct wiphy *wiphy, 317 struct regulatory_request *request) 318 { 319 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 320 struct mt7915_dev *dev = mt7915_hw_dev(hw); 321 struct mt76_phy *mphy = hw->priv; 322 struct mt7915_phy *phy = mphy->priv; 323 324 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 325 dev->mt76.region = request->dfs_region; 326 327 if (dev->mt76.region == NL80211_DFS_UNSET) 328 mt7915_mcu_rdd_background_enable(phy, NULL); 329 330 mt7915_init_txpower(dev, &mphy->sband_2g.sband); 331 mt7915_init_txpower(dev, &mphy->sband_5g.sband); 332 mt7915_init_txpower(dev, &mphy->sband_6g.sband); 333 334 mphy->dfs_state = MT_DFS_STATE_UNKNOWN; 335 mt7915_dfs_init_radar_detector(phy); 336 } 337 338 static void 339 mt7915_init_wiphy(struct ieee80211_hw *hw) 340 { 341 struct mt7915_phy *phy = mt7915_hw_phy(hw); 342 #if defined(CONFIG_OF) 343 struct mt76_dev *mdev = &phy->dev->mt76; 344 #endif 345 struct wiphy *wiphy = hw->wiphy; 346 struct mt7915_dev *dev = phy->dev; 347 348 hw->queues = 4; 349 hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; 350 hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; 351 hw->netdev_features = NETIF_F_RXCSUM; 352 353 hw->radiotap_timestamp.units_pos = 354 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; 355 356 phy->slottime = 9; 357 358 hw->sta_data_size = sizeof(struct mt7915_sta); 359 hw->vif_data_size = sizeof(struct mt7915_vif); 360 361 wiphy->iface_combinations = if_comb; 362 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 363 wiphy->reg_notifier = mt7915_regd_notifier; 364 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 365 wiphy->mbssid_max_interfaces = 16; 366 367 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); 368 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 369 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); 370 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); 371 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); 372 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); 373 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP); 374 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY); 375 376 #if defined(CONFIG_OF) 377 if (!mdev->dev->of_node || 378 !of_property_read_bool(mdev->dev->of_node, 379 "mediatek,disable-radar-background")) 380 #endif 381 wiphy_ext_feature_set(wiphy, 382 NL80211_EXT_FEATURE_RADAR_BACKGROUND); 383 384 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 385 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); 386 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); 387 ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); 388 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 389 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW); 390 391 hw->max_tx_fragments = 4; 392 393 if (phy->mt76->cap.has_2ghz) { 394 phy->mt76->sband_2g.sband.ht_cap.cap |= 395 IEEE80211_HT_CAP_LDPC_CODING | 396 IEEE80211_HT_CAP_MAX_AMSDU; 397 phy->mt76->sband_2g.sband.ht_cap.ampdu_density = 398 IEEE80211_HT_MPDU_DENSITY_4; 399 } 400 401 if (phy->mt76->cap.has_5ghz) { 402 phy->mt76->sband_5g.sband.ht_cap.cap |= 403 IEEE80211_HT_CAP_LDPC_CODING | 404 IEEE80211_HT_CAP_MAX_AMSDU; 405 phy->mt76->sband_5g.sband.ht_cap.ampdu_density = 406 IEEE80211_HT_MPDU_DENSITY_4; 407 408 if (is_mt7915(&dev->mt76)) { 409 phy->mt76->sband_5g.sband.vht_cap.cap |= 410 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | 411 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 412 413 if (!dev->dbdc_support) 414 phy->mt76->sband_5g.sband.vht_cap.cap |= 415 IEEE80211_VHT_CAP_SHORT_GI_160 | 416 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 417 } else { 418 phy->mt76->sband_5g.sband.vht_cap.cap |= 419 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 420 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 421 422 /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */ 423 phy->mt76->sband_5g.sband.vht_cap.cap |= 424 IEEE80211_VHT_CAP_SHORT_GI_160 | 425 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; 426 } 427 } 428 429 mt76_set_stream_caps(phy->mt76, true); 430 mt7915_set_stream_vht_txbf_caps(phy); 431 mt7915_set_stream_he_caps(phy); 432 433 wiphy->available_antennas_rx = phy->mt76->antenna_mask; 434 wiphy->available_antennas_tx = phy->mt76->antenna_mask; 435 } 436 437 static void 438 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band) 439 { 440 u32 mask, set; 441 442 mt76_rmw_field(dev, MT_TMAC_CTCR0(band), 443 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); 444 mt76_set(dev, MT_TMAC_CTCR0(band), 445 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | 446 MT_TMAC_CTCR0_INS_DDLMT_EN); 447 448 mask = MT_MDP_RCFR0_MCU_RX_MGMT | 449 MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR | 450 MT_MDP_RCFR0_MCU_RX_CTL_BAR; 451 set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) | 452 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) | 453 FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF); 454 mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set); 455 456 mask = MT_MDP_RCFR1_MCU_RX_BYPASS | 457 MT_MDP_RCFR1_RX_DROPPED_UCAST | 458 MT_MDP_RCFR1_RX_DROPPED_MCAST; 459 set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) | 460 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) | 461 FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF); 462 mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set); 463 464 mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680); 465 466 /* mt7915: disable rx rate report by default due to hw issues */ 467 mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); 468 } 469 470 static void mt7915_mac_init(struct mt7915_dev *dev) 471 { 472 int i; 473 u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680; 474 475 /* config pse qid6 wfdma port selection */ 476 if (!is_mt7915(&dev->mt76) && dev->hif2) 477 mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0, 478 MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK); 479 480 mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len); 481 482 if (!is_mt7915(&dev->mt76)) 483 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); 484 485 /* enable hardware de-agg */ 486 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN); 487 488 for (i = 0; i < mt7915_wtbl_size(dev); i++) 489 mt7915_mac_wtbl_update(dev, i, 490 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 491 for (i = 0; i < 2; i++) 492 mt7915_mac_init_band(dev, i); 493 494 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 495 i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 496 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 497 } 498 } 499 500 static int mt7915_txbf_init(struct mt7915_dev *dev) 501 { 502 int ret; 503 504 if (dev->dbdc_support) { 505 ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE); 506 if (ret) 507 return ret; 508 } 509 510 /* trigger sounding packets */ 511 ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON); 512 if (ret) 513 return ret; 514 515 /* enable eBF */ 516 return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); 517 } 518 519 static struct mt7915_phy * 520 mt7915_alloc_ext_phy(struct mt7915_dev *dev) 521 { 522 struct mt7915_phy *phy; 523 struct mt76_phy *mphy; 524 525 if (!dev->dbdc_support) 526 return NULL; 527 528 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1); 529 if (!mphy) 530 return ERR_PTR(-ENOMEM); 531 532 phy = mphy->priv; 533 phy->dev = dev; 534 phy->mt76 = mphy; 535 536 /* Bind main phy to band0 and ext_phy to band1 for dbdc case */ 537 phy->band_idx = 1; 538 539 return phy; 540 } 541 542 static int 543 mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy) 544 { 545 struct mt76_phy *mphy = phy->mt76; 546 int ret; 547 548 INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work); 549 550 mt7915_eeprom_parse_hw_cap(dev, phy); 551 552 #if defined(__linux__) 553 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2, 554 #elif defined(__FreeBSD__) 555 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR2, 556 #endif 557 ETH_ALEN); 558 /* Make the secondary PHY MAC address local without overlapping with 559 * the usual MAC address allocation scheme on multiple virtual interfaces 560 */ 561 if (!is_valid_ether_addr(mphy->macaddr)) { 562 #if defined(__linux__) 563 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 564 #elif defined(__FreeBSD__) 565 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 566 #endif 567 ETH_ALEN); 568 mphy->macaddr[0] |= 2; 569 mphy->macaddr[0] ^= BIT(7); 570 } 571 mt76_eeprom_override(mphy); 572 573 /* init wiphy according to mphy and phy */ 574 mt7915_init_wiphy(mphy->hw); 575 576 ret = mt76_register_phy(mphy, true, mt76_rates, 577 ARRAY_SIZE(mt76_rates)); 578 if (ret) 579 return ret; 580 581 ret = mt7915_thermal_init(phy); 582 if (ret) 583 goto unreg; 584 585 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS) 586 mt7915_init_debugfs(phy); 587 #endif 588 589 return 0; 590 591 unreg: 592 mt76_unregister_phy(mphy); 593 return ret; 594 } 595 596 static void mt7915_init_work(struct work_struct *work) 597 { 598 struct mt7915_dev *dev = container_of(work, struct mt7915_dev, 599 init_work); 600 601 mt7915_mcu_set_eeprom(dev); 602 mt7915_mac_init(dev); 603 mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband); 604 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband); 605 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband); 606 mt7915_txbf_init(dev); 607 } 608 609 void mt7915_wfsys_reset(struct mt7915_dev *dev) 610 { 611 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0) 612 #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16) 613 614 if (is_mt7915(&dev->mt76)) { 615 u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON; 616 617 mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM); 618 619 /* change to software control */ 620 val |= MT_TOP_PWR_SW_RST; 621 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 622 623 /* reset wfsys */ 624 val &= ~MT_TOP_PWR_SW_RST; 625 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 626 627 /* release wfsys then mcu re-executes romcode */ 628 val |= MT_TOP_PWR_SW_RST; 629 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 630 631 /* switch to hw control */ 632 val &= ~MT_TOP_PWR_SW_RST; 633 val |= MT_TOP_PWR_HW_CTRL; 634 mt76_wr(dev, MT_TOP_PWR_CTRL, val); 635 636 /* check whether mcu resets to default */ 637 if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR, 638 MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT, 639 1000)) { 640 dev_err(dev->mt76.dev, "wifi subsystem reset failure\n"); 641 return; 642 } 643 644 /* wfsys reset won't clear host registers */ 645 mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE); 646 647 msleep(100); 648 } else if (is_mt7986(&dev->mt76)) { 649 mt7986_wmac_disable(dev); 650 msleep(20); 651 652 mt7986_wmac_enable(dev); 653 msleep(20); 654 } else { 655 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); 656 msleep(20); 657 658 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); 659 msleep(20); 660 } 661 } 662 663 static bool mt7915_band_config(struct mt7915_dev *dev) 664 { 665 bool ret = true; 666 667 dev->phy.band_idx = 0; 668 669 if (is_mt7986(&dev->mt76)) { 670 u32 sku = mt7915_check_adie(dev, true); 671 672 /* 673 * for mt7986, dbdc support is determined by the number 674 * of adie chips and the main phy is bound to band1 when 675 * dbdc is disabled. 676 */ 677 if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) { 678 dev->phy.band_idx = 1; 679 ret = false; 680 } 681 } else { 682 ret = is_mt7915(&dev->mt76) ? 683 !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true; 684 } 685 686 return ret; 687 } 688 689 static int 690 mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2) 691 { 692 int ret, idx; 693 694 mt76_wr(dev, MT_INT_MASK_CSR, 0); 695 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 696 697 INIT_WORK(&dev->init_work, mt7915_init_work); 698 699 ret = mt7915_dma_init(dev, phy2); 700 if (ret) 701 return ret; 702 703 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 704 705 ret = mt7915_mcu_init(dev); 706 if (ret) 707 return ret; 708 709 ret = mt7915_eeprom_init(dev); 710 if (ret < 0) 711 return ret; 712 713 if (dev->flash_mode) { 714 ret = mt7915_mcu_apply_group_cal(dev); 715 if (ret) 716 return ret; 717 } 718 719 /* Beacon and mgmt frames should occupy wcid 0 */ 720 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA); 721 if (idx) 722 return -ENOSPC; 723 724 dev->mt76.global_wcid.idx = idx; 725 dev->mt76.global_wcid.hw_key_idx = -1; 726 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; 727 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 728 729 return 0; 730 } 731 732 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy) 733 { 734 int nss; 735 u32 *cap; 736 737 if (!phy->mt76->cap.has_5ghz) 738 return; 739 740 nss = hweight8(phy->mt76->chainmask); 741 cap = &phy->mt76->sband_5g.sband.vht_cap.cap; 742 743 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 744 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 745 (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT); 746 747 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK | 748 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 749 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); 750 751 if (nss < 2) 752 return; 753 754 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 755 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE | 756 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 757 nss - 1); 758 } 759 760 static void 761 mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev, 762 struct ieee80211_sta_he_cap *he_cap, 763 int vif, int nss) 764 { 765 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 766 u8 c, nss_160; 767 768 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */ 769 if (is_mt7915(&dev->mt76) && !dev->dbdc_support) 770 nss_160 = nss / 2; 771 else 772 nss_160 = nss; 773 774 #ifdef CONFIG_MAC80211_MESH 775 if (vif == NL80211_IFTYPE_MESH_POINT) 776 return; 777 #endif 778 779 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 780 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 781 782 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK | 783 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK; 784 elem->phy_cap_info[5] &= ~c; 785 786 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 787 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 788 elem->phy_cap_info[6] &= ~c; 789 790 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; 791 792 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US; 793 if (!is_mt7915(&dev->mt76)) 794 c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | 795 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; 796 elem->phy_cap_info[2] |= c; 797 798 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 799 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 | 800 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4; 801 elem->phy_cap_info[4] |= c; 802 803 /* do not support NG16 due to spec D4.0 changes subcarrier idx */ 804 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 805 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU; 806 807 if (vif == NL80211_IFTYPE_STATION) 808 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO; 809 810 elem->phy_cap_info[6] |= c; 811 812 if (nss < 2) 813 return; 814 815 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 816 elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3; 817 818 if (vif != NL80211_IFTYPE_AP) 819 return; 820 821 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 822 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 823 824 /* num_snd_dim 825 * for mt7915, max supported nss is 2 for bw > 80MHz 826 */ 827 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 828 nss - 1) | 829 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 830 nss_160 - 1); 831 elem->phy_cap_info[5] |= c; 832 833 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 834 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 835 elem->phy_cap_info[6] |= c; 836 837 if (!is_mt7915(&dev->mt76)) { 838 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ | 839 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 840 elem->phy_cap_info[7] |= c; 841 } 842 } 843 844 static void 845 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss) 846 { 847 u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */ 848 static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71}; 849 850 he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) | 851 FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, 852 ru_bit_mask); 853 854 ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE * 855 nss * hweight8(ru_bit_mask) * 2; 856 ppet_size = DIV_ROUND_UP(ppet_bits, 8); 857 858 for (i = 0; i < ppet_size - 1; i++) 859 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3]; 860 861 he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] & 862 (0xff >> (8 - (ppet_bits - 1) % 8)); 863 } 864 865 static int 866 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, 867 struct ieee80211_sband_iftype_data *data) 868 { 869 struct mt7915_dev *dev = phy->dev; 870 int i, idx = 0, nss = hweight8(phy->mt76->chainmask); 871 u16 mcs_map = 0; 872 u16 mcs_map_160 = 0; 873 u8 nss_160; 874 875 /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */ 876 if (is_mt7915(&dev->mt76) && !dev->dbdc_support) 877 nss_160 = nss / 2; 878 else 879 nss_160 = nss; 880 881 for (i = 0; i < 8; i++) { 882 if (i < nss) 883 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 884 else 885 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 886 887 if (i < nss_160) 888 mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 889 else 890 mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 891 } 892 893 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 894 struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap; 895 struct ieee80211_he_cap_elem *he_cap_elem = 896 &he_cap->he_cap_elem; 897 struct ieee80211_he_mcs_nss_supp *he_mcs = 898 &he_cap->he_mcs_nss_supp; 899 900 switch (i) { 901 case NL80211_IFTYPE_STATION: 902 case NL80211_IFTYPE_AP: 903 #ifdef CONFIG_MAC80211_MESH 904 case NL80211_IFTYPE_MESH_POINT: 905 #endif 906 break; 907 default: 908 continue; 909 } 910 911 data[idx].types_mask = BIT(i); 912 he_cap->has_he = true; 913 914 he_cap_elem->mac_cap_info[0] = 915 IEEE80211_HE_MAC_CAP0_HTC_HE; 916 he_cap_elem->mac_cap_info[3] = 917 IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 918 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 919 he_cap_elem->mac_cap_info[4] = 920 IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 921 922 if (band == NL80211_BAND_2GHZ) 923 he_cap_elem->phy_cap_info[0] = 924 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 925 else 926 he_cap_elem->phy_cap_info[0] = 927 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 928 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 929 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G; 930 931 he_cap_elem->phy_cap_info[1] = 932 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD; 933 he_cap_elem->phy_cap_info[2] = 934 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 935 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 936 937 switch (i) { 938 case NL80211_IFTYPE_AP: 939 he_cap_elem->mac_cap_info[0] |= 940 IEEE80211_HE_MAC_CAP0_TWT_RES; 941 he_cap_elem->mac_cap_info[2] |= 942 IEEE80211_HE_MAC_CAP2_BSR; 943 he_cap_elem->mac_cap_info[4] |= 944 IEEE80211_HE_MAC_CAP4_BQR; 945 he_cap_elem->mac_cap_info[5] |= 946 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX; 947 he_cap_elem->phy_cap_info[3] |= 948 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 949 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 950 he_cap_elem->phy_cap_info[6] |= 951 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 952 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 953 he_cap_elem->phy_cap_info[9] |= 954 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 955 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 956 break; 957 case NL80211_IFTYPE_STATION: 958 he_cap_elem->mac_cap_info[1] |= 959 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 960 961 if (band == NL80211_BAND_2GHZ) 962 he_cap_elem->phy_cap_info[0] |= 963 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; 964 else 965 he_cap_elem->phy_cap_info[0] |= 966 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; 967 968 he_cap_elem->phy_cap_info[1] |= 969 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 970 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 971 he_cap_elem->phy_cap_info[3] |= 972 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 973 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 974 he_cap_elem->phy_cap_info[6] |= 975 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB | 976 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 977 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 978 he_cap_elem->phy_cap_info[7] |= 979 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 980 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI; 981 he_cap_elem->phy_cap_info[8] |= 982 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 983 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 984 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 985 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484; 986 he_cap_elem->phy_cap_info[9] |= 987 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 988 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK | 989 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 990 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 991 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 992 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB; 993 break; 994 } 995 996 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); 997 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); 998 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160); 999 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160); 1000 he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160); 1001 he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160); 1002 1003 mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss); 1004 1005 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); 1006 if (he_cap_elem->phy_cap_info[6] & 1007 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { 1008 mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss); 1009 } else { 1010 he_cap_elem->phy_cap_info[9] |= 1011 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 1012 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 1013 } 1014 1015 if (band == NL80211_BAND_6GHZ) { 1016 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | 1017 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 1018 1019 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2, 1020 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | 1021 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, 1022 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | 1023 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, 1024 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 1025 1026 data[idx].he_6ghz_capa.capa = cpu_to_le16(cap); 1027 } 1028 1029 idx++; 1030 } 1031 1032 return idx; 1033 } 1034 1035 void mt7915_set_stream_he_caps(struct mt7915_phy *phy) 1036 { 1037 struct ieee80211_sband_iftype_data *data; 1038 struct ieee80211_supported_band *band; 1039 int n; 1040 1041 if (phy->mt76->cap.has_2ghz) { 1042 data = phy->iftype[NL80211_BAND_2GHZ]; 1043 n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data); 1044 1045 band = &phy->mt76->sband_2g.sband; 1046 band->iftype_data = data; 1047 band->n_iftype_data = n; 1048 } 1049 1050 if (phy->mt76->cap.has_5ghz) { 1051 data = phy->iftype[NL80211_BAND_5GHZ]; 1052 n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data); 1053 1054 band = &phy->mt76->sband_5g.sband; 1055 band->iftype_data = data; 1056 band->n_iftype_data = n; 1057 } 1058 1059 if (phy->mt76->cap.has_6ghz) { 1060 data = phy->iftype[NL80211_BAND_6GHZ]; 1061 n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data); 1062 1063 band = &phy->mt76->sband_6g.sband; 1064 band->iftype_data = data; 1065 band->n_iftype_data = n; 1066 } 1067 } 1068 1069 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) 1070 { 1071 struct mt7915_phy *phy = mt7915_ext_phy(dev); 1072 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1]; 1073 1074 if (!phy) 1075 return; 1076 1077 #if defined(__linux__) 1078 mt7915_unregister_thermal(phy); 1079 #endif 1080 mt76_unregister_phy(mphy); 1081 ieee80211_free_hw(mphy->hw); 1082 } 1083 1084 static void mt7915_stop_hardware(struct mt7915_dev *dev) 1085 { 1086 mt7915_mcu_exit(dev); 1087 mt7915_tx_token_put(dev); 1088 mt7915_dma_cleanup(dev); 1089 tasklet_disable(&dev->irq_tasklet); 1090 1091 if (is_mt7986(&dev->mt76)) 1092 mt7986_wmac_disable(dev); 1093 } 1094 1095 1096 int mt7915_register_device(struct mt7915_dev *dev) 1097 { 1098 struct ieee80211_hw *hw = mt76_hw(dev); 1099 struct mt7915_phy *phy2; 1100 int ret; 1101 1102 dev->phy.dev = dev; 1103 dev->phy.mt76 = &dev->mt76.phy; 1104 dev->mt76.phy.priv = &dev->phy; 1105 INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work); 1106 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work); 1107 INIT_LIST_HEAD(&dev->sta_rc_list); 1108 INIT_LIST_HEAD(&dev->sta_poll_list); 1109 INIT_LIST_HEAD(&dev->twt_list); 1110 spin_lock_init(&dev->sta_poll_lock); 1111 1112 init_waitqueue_head(&dev->reset_wait); 1113 INIT_WORK(&dev->reset_work, mt7915_mac_reset_work); 1114 1115 dev->dbdc_support = mt7915_band_config(dev); 1116 1117 phy2 = mt7915_alloc_ext_phy(dev); 1118 if (IS_ERR(phy2)) 1119 return PTR_ERR(phy2); 1120 1121 ret = mt7915_init_hardware(dev, phy2); 1122 if (ret) 1123 goto free_phy2; 1124 1125 mt7915_init_wiphy(hw); 1126 1127 #ifdef CONFIG_NL80211_TESTMODE 1128 dev->mt76.test_ops = &mt7915_testmode_ops; 1129 #endif 1130 1131 /* init led callbacks */ 1132 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 1133 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness; 1134 dev->mt76.led_cdev.blink_set = mt7915_led_set_blink; 1135 } 1136 1137 ret = mt76_register_device(&dev->mt76, true, mt76_rates, 1138 ARRAY_SIZE(mt76_rates)); 1139 if (ret) 1140 goto stop_hw; 1141 1142 ret = mt7915_thermal_init(&dev->phy); 1143 if (ret) 1144 goto unreg_dev; 1145 1146 ieee80211_queue_work(mt76_hw(dev), &dev->init_work); 1147 1148 if (phy2) { 1149 ret = mt7915_register_ext_phy(dev, phy2); 1150 if (ret) 1151 goto unreg_thermal; 1152 } 1153 1154 #if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS) 1155 mt7915_init_debugfs(&dev->phy); 1156 #endif 1157 1158 return 0; 1159 1160 unreg_thermal: 1161 #if defined(__linux__) 1162 mt7915_unregister_thermal(&dev->phy); 1163 #endif 1164 unreg_dev: 1165 mt76_unregister_device(&dev->mt76); 1166 stop_hw: 1167 mt7915_stop_hardware(dev); 1168 free_phy2: 1169 if (phy2) 1170 ieee80211_free_hw(phy2->mt76->hw); 1171 return ret; 1172 } 1173 1174 void mt7915_unregister_device(struct mt7915_dev *dev) 1175 { 1176 mt7915_unregister_ext_phy(dev); 1177 #if defined(__linux__) 1178 mt7915_unregister_thermal(&dev->phy); 1179 #endif 1180 mt76_unregister_device(&dev->mt76); 1181 mt7915_stop_hardware(dev); 1182 1183 mt76_free_device(&dev->mt76); 1184 } 1185