xref: /freebsd/sys/contrib/dev/mediatek/mt76/mt76x02_phy.h (revision 19fae0f66023a97a9b464b3beeeabb2081f575b3)
1 /* SPDX-License-Identifier: ISC */
2 /*
3  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4  */
5 
6 #ifndef __MT76x02_PHY_H
7 #define __MT76x02_PHY_H
8 
9 #include "mt76x02_regs.h"
10 
11 static inline int
12 mt76x02_get_rssi_gain_thresh(struct mt76x02_dev *dev)
13 {
14 	switch (dev->mphy.chandef.width) {
15 	case NL80211_CHAN_WIDTH_80:
16 		return -62;
17 	case NL80211_CHAN_WIDTH_40:
18 		return -65;
19 	default:
20 		return -68;
21 	}
22 }
23 
24 static inline int
25 mt76x02_get_low_rssi_gain_thresh(struct mt76x02_dev *dev)
26 {
27 	switch (dev->mphy.chandef.width) {
28 	case NL80211_CHAN_WIDTH_80:
29 		return -76;
30 	case NL80211_CHAN_WIDTH_40:
31 		return -79;
32 	default:
33 		return -82;
34 	}
35 }
36 
37 void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset);
38 void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_2);
39 void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
40 int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
41 void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev);
42 void mt76x02_phy_set_txdac(struct mt76x02_dev *dev);
43 void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
44 void mt76x02_phy_set_band(struct mt76x02_dev *dev, int band,
45 			  bool primary_upper);
46 bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev);
47 void mt76x02_init_agc_gain(struct mt76x02_dev *dev);
48 
49 #endif /* __MT76x02_PHY_H */
50