xref: /freebsd/sys/contrib/dev/mediatek/mt76/mt76x02_phy.h (revision cbb3ec25236ba72f91cbdf23f8b78b9d1af0cedf)
16c92544dSBjoern A. Zeeb /* SPDX-License-Identifier: ISC */
26c92544dSBjoern A. Zeeb /*
36c92544dSBjoern A. Zeeb  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
46c92544dSBjoern A. Zeeb  */
56c92544dSBjoern A. Zeeb 
66c92544dSBjoern A. Zeeb #ifndef __MT76x02_PHY_H
76c92544dSBjoern A. Zeeb #define __MT76x02_PHY_H
86c92544dSBjoern A. Zeeb 
96c92544dSBjoern A. Zeeb #include "mt76x02_regs.h"
106c92544dSBjoern A. Zeeb 
116c92544dSBjoern A. Zeeb static inline int
mt76x02_get_rssi_gain_thresh(struct mt76x02_dev * dev)126c92544dSBjoern A. Zeeb mt76x02_get_rssi_gain_thresh(struct mt76x02_dev *dev)
136c92544dSBjoern A. Zeeb {
146c92544dSBjoern A. Zeeb 	switch (dev->mphy.chandef.width) {
156c92544dSBjoern A. Zeeb 	case NL80211_CHAN_WIDTH_80:
166c92544dSBjoern A. Zeeb 		return -62;
176c92544dSBjoern A. Zeeb 	case NL80211_CHAN_WIDTH_40:
186c92544dSBjoern A. Zeeb 		return -65;
196c92544dSBjoern A. Zeeb 	default:
206c92544dSBjoern A. Zeeb 		return -68;
216c92544dSBjoern A. Zeeb 	}
226c92544dSBjoern A. Zeeb }
236c92544dSBjoern A. Zeeb 
246c92544dSBjoern A. Zeeb static inline int
mt76x02_get_low_rssi_gain_thresh(struct mt76x02_dev * dev)256c92544dSBjoern A. Zeeb mt76x02_get_low_rssi_gain_thresh(struct mt76x02_dev *dev)
266c92544dSBjoern A. Zeeb {
276c92544dSBjoern A. Zeeb 	switch (dev->mphy.chandef.width) {
286c92544dSBjoern A. Zeeb 	case NL80211_CHAN_WIDTH_80:
296c92544dSBjoern A. Zeeb 		return -76;
306c92544dSBjoern A. Zeeb 	case NL80211_CHAN_WIDTH_40:
316c92544dSBjoern A. Zeeb 		return -79;
326c92544dSBjoern A. Zeeb 	default:
336c92544dSBjoern A. Zeeb 		return -82;
346c92544dSBjoern A. Zeeb 	}
356c92544dSBjoern A. Zeeb }
366c92544dSBjoern A. Zeeb 
37*cbb3ec25SBjoern A. Zeeb void mt76x02_add_rate_power_offset(struct mt76x02_rate_power *r, int offset);
386c92544dSBjoern A. Zeeb void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_2);
39*cbb3ec25SBjoern A. Zeeb void mt76x02_limit_rate_power(struct mt76x02_rate_power *r, int limit);
40*cbb3ec25SBjoern A. Zeeb int mt76x02_get_max_rate_power(struct mt76x02_rate_power *r);
416c92544dSBjoern A. Zeeb void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev);
426c92544dSBjoern A. Zeeb void mt76x02_phy_set_txdac(struct mt76x02_dev *dev);
436c92544dSBjoern A. Zeeb void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
446c92544dSBjoern A. Zeeb void mt76x02_phy_set_band(struct mt76x02_dev *dev, int band,
456c92544dSBjoern A. Zeeb 			  bool primary_upper);
466c92544dSBjoern A. Zeeb bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev);
476c92544dSBjoern A. Zeeb void mt76x02_init_agc_gain(struct mt76x02_dev *dev);
486c92544dSBjoern A. Zeeb 
496c92544dSBjoern A. Zeeb #endif /* __MT76x02_PHY_H */
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