1 /* SPDX-License-Identifier: ISC */ 2 /* Copyright (C) 2019 MediaTek Inc. */ 3 4 #ifndef __MT7615_H 5 #define __MT7615_H 6 7 #include <linux/completion.h> 8 #include <linux/interrupt.h> 9 #include <linux/ktime.h> 10 #include <linux/regmap.h> 11 #include "../mt76_connac_mcu.h" 12 #include "regs.h" 13 14 #define MT7615_MAX_INTERFACES 16 15 #define MT7615_MAX_WMM_SETS 4 16 #define MT7663_WTBL_SIZE 32 17 #define MT7615_WTBL_SIZE 128 18 #define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1) 19 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \ 20 MT7615_MAX_INTERFACES) 21 22 #define MT7615_PM_TIMEOUT (HZ / 12) 23 #define MT7615_HW_SCAN_TIMEOUT (HZ / 10) 24 #define MT7615_RESET_TIMEOUT (30 * HZ) 25 #define MT7615_RATE_RETRY 2 26 27 #define MT7615_TX_RING_SIZE 1024 28 #define MT7615_TX_MGMT_RING_SIZE 128 29 #define MT7615_TX_MCU_RING_SIZE 128 30 #define MT7615_TX_FWDL_RING_SIZE 128 31 32 #define MT7615_RX_RING_SIZE 1024 33 #define MT7615_RX_MCU_RING_SIZE 512 34 35 #define MT7615_DRV_OWN_RETRY_COUNT 10 36 37 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin" 38 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin" 39 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin" 40 41 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin" 42 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin" 43 44 #define MT7615_FIRMWARE_V1 1 45 #define MT7615_FIRMWARE_V2 2 46 #define MT7615_FIRMWARE_V3 3 47 48 #define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin" 49 #define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin" 50 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin" 51 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin" 52 53 #define MT7615_EEPROM_SIZE 1024 54 #define MT7615_TOKEN_SIZE 4096 55 56 #define MT_FRAC_SCALE 12 57 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div)) 58 59 #define MT_CHFREQ_VALID BIT(7) 60 #define MT_CHFREQ_DBDC_IDX BIT(6) 61 #define MT_CHFREQ_SEQ GENMASK(5, 0) 62 63 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */ 64 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ 65 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ 66 67 struct mt7615_vif; 68 struct mt7615_sta; 69 struct mt7615_dfs_pulse; 70 struct mt7615_dfs_pattern; 71 enum mt7615_cipher_type; 72 73 enum mt7615_hw_txq_id { 74 MT7615_TXQ_MAIN, 75 MT7615_TXQ_EXT, 76 MT7615_TXQ_MCU, 77 MT7615_TXQ_FWDL, 78 }; 79 80 enum mt7622_hw_txq_id { 81 MT7622_TXQ_AC0, 82 MT7622_TXQ_AC1, 83 MT7622_TXQ_AC2, 84 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL, 85 MT7622_TXQ_AC3, 86 MT7622_TXQ_MGMT, 87 MT7622_TXQ_MCU = 15, 88 }; 89 90 struct mt7615_rate_set { 91 struct ieee80211_tx_rate probe_rate; 92 struct ieee80211_tx_rate rates[4]; 93 }; 94 95 struct mt7615_rate_desc { 96 bool rateset; 97 u16 probe_val; 98 u16 val[4]; 99 u8 bw_idx; 100 u8 bw; 101 }; 102 103 struct mt7615_wtbl_rate_desc { 104 struct list_head node; 105 106 struct mt7615_rate_desc rate; 107 struct mt7615_sta *sta; 108 }; 109 110 struct mt7663s_intr { 111 u32 isr; 112 struct { 113 u32 wtqcr[8]; 114 } tx; 115 struct { 116 u16 num[2]; 117 u16 len[2][16]; 118 } rx; 119 u32 rec_mb[2]; 120 } __packed; 121 122 struct mt7615_sta { 123 struct mt76_wcid wcid; /* must be first */ 124 125 struct mt7615_vif *vif; 126 127 struct list_head poll_list; 128 u32 airtime_ac[8]; 129 130 struct ieee80211_tx_rate rates[4]; 131 132 struct mt7615_rate_set rateset[2]; 133 u32 rate_set_tsf; 134 135 u8 rate_count; 136 u8 n_rates; 137 138 u8 rate_probe; 139 }; 140 141 struct mt7615_vif { 142 struct mt76_vif mt76; /* must be first */ 143 struct mt7615_sta sta; 144 bool sta_added; 145 }; 146 147 struct mib_stats { 148 u32 ack_fail_cnt; 149 u32 fcs_err_cnt; 150 u32 rts_cnt; 151 u32 rts_retries_cnt; 152 u32 ba_miss_cnt; 153 unsigned long aggr_per; 154 }; 155 156 struct mt7615_phy { 157 struct mt76_phy *mt76; 158 struct mt7615_dev *dev; 159 160 struct ieee80211_vif *monitor_vif; 161 162 u8 n_beacon_vif; 163 164 u32 rxfilter; 165 u64 omac_mask; 166 167 u16 noise; 168 169 bool scs_en; 170 171 unsigned long last_cca_adj; 172 int false_cca_ofdm, false_cca_cck; 173 s8 ofdm_sensitivity; 174 s8 cck_sensitivity; 175 176 s16 coverage_class; 177 u8 slottime; 178 179 u8 chfreq; 180 u8 rdd_state; 181 182 u32 rx_ampdu_ts; 183 u32 ampdu_ref; 184 185 struct mib_stats mib; 186 187 struct sk_buff_head scan_event_list; 188 struct delayed_work scan_work; 189 190 struct work_struct roc_work; 191 struct timer_list roc_timer; 192 wait_queue_head_t roc_wait; 193 bool roc_grant; 194 195 #ifdef CONFIG_NL80211_TESTMODE 196 struct { 197 u32 *reg_backup; 198 199 s16 last_freq_offset; 200 u8 last_rcpi[4]; 201 s8 last_ib_rssi[4]; 202 s8 last_wb_rssi[4]; 203 } test; 204 #endif 205 }; 206 207 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__) 208 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__) 209 #define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__) 210 #define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__) 211 #define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__) 212 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__) 213 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__) 214 #define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev)) 215 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev)) 216 #define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__) 217 struct mt7615_mcu_ops { 218 int (*add_tx_ba)(struct mt7615_dev *dev, 219 struct ieee80211_ampdu_params *params, 220 bool enable); 221 int (*add_rx_ba)(struct mt7615_dev *dev, 222 struct ieee80211_ampdu_params *params, 223 bool enable); 224 int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 225 struct ieee80211_sta *sta, bool enable); 226 int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 227 bool enable); 228 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif, 229 struct ieee80211_sta *sta, bool enable); 230 int (*add_beacon_offload)(struct mt7615_dev *dev, 231 struct ieee80211_hw *hw, 232 struct ieee80211_vif *vif, bool enable); 233 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state); 234 int (*set_drv_ctrl)(struct mt7615_dev *dev); 235 int (*set_fw_ctrl)(struct mt7615_dev *dev); 236 int (*set_sta_decap_offload)(struct mt7615_dev *dev, 237 struct ieee80211_vif *vif, 238 struct ieee80211_sta *sta); 239 }; 240 241 struct mt7615_dev { 242 union { /* must be first */ 243 struct mt76_dev mt76; 244 struct mt76_phy mphy; 245 }; 246 247 const struct mt76_bus_ops *bus_ops; 248 struct tasklet_struct irq_tasklet; 249 250 struct mt7615_phy phy; 251 u64 omac_mask; 252 253 u16 chainmask; 254 255 struct ieee80211_ops *ops; 256 const struct mt7615_mcu_ops *mcu_ops; 257 struct regmap *infracfg; 258 const u32 *reg_map; 259 260 struct work_struct mcu_work; 261 262 struct work_struct reset_work; 263 wait_queue_head_t reset_wait; 264 u32 reset_state; 265 266 struct list_head sta_poll_list; 267 spinlock_t sta_poll_lock; 268 269 struct { 270 u8 n_pulses; 271 u32 period; 272 u16 width; 273 s16 power; 274 } radar_pattern; 275 u32 hw_pattern; 276 277 bool fw_debug; 278 bool flash_eeprom; 279 bool dbdc_support; 280 281 u8 fw_ver; 282 283 struct work_struct rate_work; 284 struct list_head wrd_head; 285 286 u32 debugfs_rf_wf; 287 u32 debugfs_rf_reg; 288 289 u32 muar_mask; 290 291 struct mt76_connac_pm pm; 292 struct mt76_connac_coredump coredump; 293 }; 294 295 enum tx_pkt_queue_idx { 296 MT_LMAC_AC00, 297 MT_LMAC_AC01, 298 MT_LMAC_AC02, 299 MT_LMAC_AC03, 300 MT_LMAC_ALTX0 = 0x10, 301 MT_LMAC_BMC0, 302 MT_LMAC_BCN0, 303 MT_LMAC_PSMP0, 304 MT_LMAC_ALTX1, 305 MT_LMAC_BMC1, 306 MT_LMAC_BCN1, 307 MT_LMAC_PSMP1, 308 }; 309 310 enum { 311 MT_RX_SEL0, 312 MT_RX_SEL1, 313 }; 314 315 enum mt7615_rdd_cmd { 316 RDD_STOP, 317 RDD_START, 318 RDD_DET_MODE, 319 RDD_DET_STOP, 320 RDD_CAC_START, 321 RDD_CAC_END, 322 RDD_NORMAL_START, 323 RDD_DISABLE_DFS_CAL, 324 RDD_PULSE_DBG, 325 RDD_READ_PULSE, 326 RDD_RESUME_BF, 327 }; 328 329 static inline struct mt7615_phy * 330 mt7615_hw_phy(struct ieee80211_hw *hw) 331 { 332 struct mt76_phy *phy = hw->priv; 333 334 return phy->priv; 335 } 336 337 static inline struct mt7615_dev * 338 mt7615_hw_dev(struct ieee80211_hw *hw) 339 { 340 struct mt76_phy *phy = hw->priv; 341 342 return container_of(phy->dev, struct mt7615_dev, mt76); 343 } 344 345 static inline struct mt7615_phy * 346 mt7615_ext_phy(struct mt7615_dev *dev) 347 { 348 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1]; 349 350 if (!phy) 351 return NULL; 352 353 return phy->priv; 354 } 355 356 extern struct ieee80211_rate mt7615_rates[12]; 357 extern const struct ieee80211_ops mt7615_ops; 358 extern const u32 mt7615e_reg_map[__MT_BASE_MAX]; 359 extern const u32 mt7663e_reg_map[__MT_BASE_MAX]; 360 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX]; 361 extern struct pci_driver mt7615_pci_driver; 362 extern struct platform_driver mt7622_wmac_driver; 363 extern const struct mt76_testmode_ops mt7615_testmode_ops; 364 365 #ifdef CONFIG_MT7622_WMAC 366 int mt7622_wmac_init(struct mt7615_dev *dev); 367 #else 368 static inline int mt7622_wmac_init(struct mt7615_dev *dev) 369 { 370 return 0; 371 } 372 #endif 373 374 int mt7615_thermal_init(struct mt7615_dev *dev); 375 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, 376 int irq, const u32 *map); 377 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); 378 379 void mt7615_init_device(struct mt7615_dev *dev); 380 int mt7615_register_device(struct mt7615_dev *dev); 381 void mt7615_unregister_device(struct mt7615_dev *dev); 382 int mt7615_register_ext_phy(struct mt7615_dev *dev); 383 void mt7615_unregister_ext_phy(struct mt7615_dev *dev); 384 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr); 385 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev, 386 struct ieee80211_channel *chan, 387 u8 chain_idx); 388 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev, 389 enum nl80211_band band); 390 int mt7615_wait_pdma_busy(struct mt7615_dev *dev); 391 int mt7615_dma_init(struct mt7615_dev *dev); 392 void mt7615_dma_start(struct mt7615_dev *dev); 393 void mt7615_dma_cleanup(struct mt7615_dev *dev); 394 int mt7615_mcu_init(struct mt7615_dev *dev); 395 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev); 396 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, 397 struct ieee80211_tx_rate *probe_rate, 398 struct ieee80211_tx_rate *rates); 399 void mt7615_pm_wake_work(struct work_struct *work); 400 void mt7615_pm_power_save_work(struct work_struct *work); 401 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev); 402 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); 403 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 404 const struct ieee80211_tx_queue_params *params); 405 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); 406 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev); 407 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl); 408 409 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) 410 { 411 mt76_set_irq_mask(&dev->mt76, 0, 0, mask); 412 413 tasklet_schedule(&dev->irq_tasklet); 414 } 415 416 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev) 417 { 418 return dev->fw_ver > MT7615_FIRMWARE_V2; 419 } 420 421 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev) 422 { 423 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev)) 424 return MT7663_WTBL_SIZE; 425 else 426 return MT7615_WTBL_SIZE; 427 } 428 429 #define mt7615_mutex_acquire(dev) \ 430 mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm) 431 #define mt7615_mutex_release(dev) \ 432 mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm) 433 434 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac) 435 { 436 static const u8 lmac_queue_map[] = { 437 [IEEE80211_AC_BK] = MT_LMAC_AC00, 438 [IEEE80211_AC_BE] = MT_LMAC_AC01, 439 [IEEE80211_AC_VI] = MT_LMAC_AC02, 440 [IEEE80211_AC_VO] = MT_LMAC_AC03, 441 }; 442 443 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map))) 444 return MT_LMAC_AC01; /* BE */ 445 446 return lmac_queue_map[ac]; 447 } 448 449 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev) 450 { 451 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx); 452 } 453 454 static inline unsigned long 455 mt7615_get_macwork_timeout(struct mt7615_dev *dev) 456 { 457 return dev->pm.enable ? HZ / 3 : HZ / 10; 458 } 459 460 void mt7615_dma_reset(struct mt7615_dev *dev); 461 void mt7615_scan_work(struct work_struct *work); 462 void mt7615_roc_work(struct work_struct *work); 463 void mt7615_roc_timer(struct timer_list *timer); 464 void mt7615_init_txpower(struct mt7615_dev *dev, 465 struct ieee80211_supported_band *sband); 466 int mt7615_set_channel(struct mt7615_phy *phy); 467 void mt7615_init_work(struct mt7615_dev *dev); 468 469 int mt7615_mcu_restart(struct mt76_dev *dev); 470 void mt7615_update_channel(struct mt76_phy *mphy); 471 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask); 472 void mt7615_mac_reset_counters(struct mt7615_dev *dev); 473 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy); 474 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable); 475 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy); 476 void mt7615_mac_sta_poll(struct mt7615_dev *dev); 477 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 478 struct sk_buff *skb, struct mt76_wcid *wcid, 479 struct ieee80211_sta *sta, int pid, 480 struct ieee80211_key_conf *key, 481 enum mt76_txq_id qid, bool beacon); 482 void mt7615_mac_set_timing(struct mt7615_phy *phy); 483 int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, 484 struct mt76_wcid *wcid, 485 struct ieee80211_key_conf *key, 486 enum set_key_cmd cmd); 487 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, 488 struct ieee80211_key_conf *key, 489 enum set_key_cmd cmd); 490 void mt7615_mac_reset_work(struct work_struct *work); 491 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid); 492 493 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd, 494 struct sk_buff *skb, int seq); 495 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg); 496 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val); 497 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev); 498 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev); 499 int mt7615_mcu_get_temperature(struct mt7615_dev *dev); 500 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy); 501 void mt7615_mcu_exit(struct mt7615_dev *dev); 502 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, 503 int cmd, int *wait_seq); 504 505 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 506 enum mt76_txq_id qid, struct mt76_wcid *wcid, 507 struct ieee80211_sta *sta, 508 struct mt76_tx_info *tx_info); 509 510 void mt7615_tx_worker(struct mt76_worker *w); 511 void mt7615_tx_token_put(struct mt7615_dev *dev); 512 bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len); 513 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 514 struct sk_buff *skb); 515 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); 516 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, 517 struct ieee80211_sta *sta); 518 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, 519 struct ieee80211_sta *sta); 520 void mt7615_mac_work(struct work_struct *work); 521 int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev); 522 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val); 523 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, 524 const struct mt7615_dfs_pulse *pulse); 525 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index, 526 const struct mt7615_dfs_pattern *pattern); 527 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode, 528 u32 val); 529 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable); 530 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy); 531 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy); 532 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy); 533 534 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif, 535 struct ieee80211_channel *chan, int duration); 536 537 int mt7615_init_debugfs(struct mt7615_dev *dev); 538 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq); 539 540 int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy, 541 struct ieee80211_vif *vif, 542 bool enable); 543 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif, 544 bool enable); 545 int __mt7663_load_firmware(struct mt7615_dev *dev); 546 void mt7615_coredump_work(struct work_struct *work); 547 548 void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en); 549 550 /* usb */ 551 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 552 enum mt76_txq_id qid, struct mt76_wcid *wcid, 553 struct ieee80211_sta *sta, 554 struct mt76_tx_info *tx_info); 555 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update); 556 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 557 struct mt76_queue_entry *e); 558 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev); 559 int mt7663u_mcu_init(struct mt7615_dev *dev); 560 int mt7663u_mcu_power_on(struct mt7615_dev *dev); 561 562 /* sdio */ 563 int mt7663s_mcu_init(struct mt7615_dev *dev); 564 565 #endif 566