xref: /freebsd/sys/contrib/dev/iwlwifi/iwl-trans.h (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_trans_h__
8 #define __iwl_trans_h__
9 
10 #include <linux/ieee80211.h>
11 #include <linux/mm.h> /* for page_address */
12 #include <linux/lockdep.h>
13 #include <linux/kernel.h>
14 
15 #include "iwl-debug.h"
16 #include "iwl-config.h"
17 #include "fw/img.h"
18 #include "iwl-op-mode.h"
19 #include <linux/firmware.h>
20 #include "fw/api/cmdhdr.h"
21 #include "fw/api/txq.h"
22 #include "fw/api/dbg-tlv.h"
23 #include "iwl-dbg-tlv.h"
24 #if defined(__FreeBSD__)
25 #include <linux/skbuff.h>
26 #include "iwl-modparams.h"
27 #endif
28 
29 /**
30  * DOC: Transport layer - what is it ?
31  *
32  * The transport layer is the layer that deals with the HW directly. It provides
33  * an abstraction of the underlying HW to the upper layer. The transport layer
34  * doesn't provide any policy, algorithm or anything of this kind, but only
35  * mechanisms to make the HW do something. It is not completely stateless but
36  * close to it.
37  * We will have an implementation for each different supported bus.
38  */
39 
40 /**
41  * DOC: Life cycle of the transport layer
42  *
43  * The transport layer has a very precise life cycle.
44  *
45  *	1) A helper function is called during the module initialization and
46  *	   registers the bus driver's ops with the transport's alloc function.
47  *	2) Bus's probe calls to the transport layer's allocation functions.
48  *	   Of course this function is bus specific.
49  *	3) This allocation functions will spawn the upper layer which will
50  *	   register mac80211.
51  *
52  *	4) At some point (i.e. mac80211's start call), the op_mode will call
53  *	   the following sequence:
54  *	   start_hw
55  *	   start_fw
56  *
57  *	5) Then when finished (or reset):
58  *	   stop_device
59  *
60  *	6) Eventually, the free function will be called.
61  */
62 
63 #define IWL_TRANS_FW_DBG_DOMAIN(trans)	IWL_FW_INI_DOMAIN_ALWAYS_ON
64 
65 #define FH_RSCSR_FRAME_SIZE_MSK		0x00003FFF	/* bits 0-13 */
66 #define FH_RSCSR_FRAME_INVALID		0x55550000
67 #define FH_RSCSR_FRAME_ALIGN		0x40
68 #define FH_RSCSR_RPA_EN			BIT(25)
69 #define FH_RSCSR_RADA_EN		BIT(26)
70 #define FH_RSCSR_RXQ_POS		16
71 #define FH_RSCSR_RXQ_MASK		0x3F0000
72 
73 struct iwl_rx_packet {
74 	/*
75 	 * The first 4 bytes of the RX frame header contain both the RX frame
76 	 * size and some flags.
77 	 * Bit fields:
78 	 * 31:    flag flush RB request
79 	 * 30:    flag ignore TC (terminal counter) request
80 	 * 29:    flag fast IRQ request
81 	 * 28-27: Reserved
82 	 * 26:    RADA enabled
83 	 * 25:    Offload enabled
84 	 * 24:    RPF enabled
85 	 * 23:    RSS enabled
86 	 * 22:    Checksum enabled
87 	 * 21-16: RX queue
88 	 * 15-14: Reserved
89 	 * 13-00: RX frame size
90 	 */
91 	__le32 len_n_flags;
92 	struct iwl_cmd_header hdr;
93 	u8 data[];
94 } __packed;
95 
96 static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt)
97 {
98 	return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
99 }
100 
101 static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt)
102 {
103 	return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr);
104 }
105 
106 /**
107  * enum CMD_MODE - how to send the host commands ?
108  *
109  * @CMD_ASYNC: Return right away and don't wait for the response
110  * @CMD_WANT_SKB: Not valid with CMD_ASYNC. The caller needs the buffer of
111  *	the response. The caller needs to call iwl_free_resp when done.
112  * @CMD_WANT_ASYNC_CALLBACK: the op_mode's async callback function must be
113  *	called after this command completes. Valid only with CMD_ASYNC.
114  * @CMD_SEND_IN_D3: Allow the command to be sent in D3 mode, relevant to
115  *	SUSPEND and RESUME commands. We are in D3 mode when we set
116  *	trans->system_pm_mode to IWL_PLAT_PM_MODE_D3.
117  */
118 enum CMD_MODE {
119 	CMD_ASYNC		= BIT(0),
120 	CMD_WANT_SKB		= BIT(1),
121 	CMD_SEND_IN_RFKILL	= BIT(2),
122 	CMD_WANT_ASYNC_CALLBACK	= BIT(3),
123 	CMD_SEND_IN_D3          = BIT(4),
124 };
125 
126 #define DEF_CMD_PAYLOAD_SIZE 320
127 
128 /**
129  * struct iwl_device_cmd
130  *
131  * For allocation of the command and tx queues, this establishes the overall
132  * size of the largest command we send to uCode, except for commands that
133  * aren't fully copied and use other TFD space.
134  */
135 struct iwl_device_cmd {
136 	union {
137 		struct {
138 			struct iwl_cmd_header hdr;	/* uCode API */
139 			u8 payload[DEF_CMD_PAYLOAD_SIZE];
140 		};
141 		struct {
142 			struct iwl_cmd_header_wide hdr_wide;
143 			u8 payload_wide[DEF_CMD_PAYLOAD_SIZE -
144 					sizeof(struct iwl_cmd_header_wide) +
145 					sizeof(struct iwl_cmd_header)];
146 		};
147 	};
148 } __packed;
149 
150 /**
151  * struct iwl_device_tx_cmd - buffer for TX command
152  * @hdr: the header
153  * @payload: the payload placeholder
154  *
155  * The actual structure is sized dynamically according to need.
156  */
157 struct iwl_device_tx_cmd {
158 	struct iwl_cmd_header hdr;
159 	u8 payload[];
160 } __packed;
161 
162 #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
163 
164 /*
165  * number of transfer buffers (fragments) per transmit frame descriptor;
166  * this is just the driver's idea, the hardware supports 20
167  */
168 #define IWL_MAX_CMD_TBS_PER_TFD	2
169 
170 /* We need 2 entries for the TX command and header, and another one might
171  * be needed for potential data in the SKB's head. The remaining ones can
172  * be used for frags.
173  */
174 #define IWL_TRANS_MAX_FRAGS(trans) ((trans)->txqs.tfd.max_tbs - 3)
175 
176 /**
177  * enum iwl_hcmd_dataflag - flag for each one of the chunks of the command
178  *
179  * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's
180  *	ring. The transport layer doesn't map the command's buffer to DMA, but
181  *	rather copies it to a previously allocated DMA buffer. This flag tells
182  *	the transport layer not to copy the command, but to map the existing
183  *	buffer (that is passed in) instead. This saves the memcpy and allows
184  *	commands that are bigger than the fixed buffer to be submitted.
185  *	Note that a TFD entry after a NOCOPY one cannot be a normal copied one.
186  * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this
187  *	chunk internally and free it again after the command completes. This
188  *	can (currently) be used only once per command.
189  *	Note that a TFD entry after a DUP one cannot be a normal copied one.
190  */
191 enum iwl_hcmd_dataflag {
192 	IWL_HCMD_DFL_NOCOPY	= BIT(0),
193 	IWL_HCMD_DFL_DUP	= BIT(1),
194 };
195 
196 enum iwl_error_event_table_status {
197 	IWL_ERROR_EVENT_TABLE_LMAC1 = BIT(0),
198 	IWL_ERROR_EVENT_TABLE_LMAC2 = BIT(1),
199 	IWL_ERROR_EVENT_TABLE_UMAC = BIT(2),
200 	IWL_ERROR_EVENT_TABLE_TCM = BIT(3),
201 };
202 
203 /**
204  * struct iwl_host_cmd - Host command to the uCode
205  *
206  * @data: array of chunks that composes the data of the host command
207  * @resp_pkt: response packet, if %CMD_WANT_SKB was set
208  * @_rx_page_order: (internally used to free response packet);
209  *      FreeBSD uses _page instead.
210  * @_rx_page_addr: (internally used to free response packet)
211  * @flags: can be CMD_*
212  * @len: array of the lengths of the chunks in data
213  * @dataflags: IWL_HCMD_DFL_*
214  * @id: command id of the host command, for wide commands encoding the
215  *	version and group as well
216  */
217 struct iwl_host_cmd {
218 	const void *data[IWL_MAX_CMD_TBS_PER_TFD];
219 	struct iwl_rx_packet *resp_pkt;
220 #if defined(__linux__)
221 	unsigned long _rx_page_addr;
222 #elif defined(__FreeBSD__)
223 	struct page *_page;
224 #endif
225 	u32 _rx_page_order;
226 
227 	u32 flags;
228 	u32 id;
229 	u16 len[IWL_MAX_CMD_TBS_PER_TFD];
230 	u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD];
231 };
232 
233 static inline void iwl_free_resp(struct iwl_host_cmd *cmd)
234 {
235 #if defined(__linux__)
236 	free_pages(cmd->_rx_page_addr, cmd->_rx_page_order);
237 #elif defined(__FreeBSD__)
238 	__free_pages(cmd->_page, cmd->_rx_page_order);
239 #endif
240 }
241 
242 struct iwl_rx_cmd_buffer {
243 	struct page *_page;
244 	int _offset;
245 	bool _page_stolen;
246 	u32 _rx_page_order;
247 	unsigned int truesize;
248 };
249 
250 static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r)
251 {
252 	return (void *)((unsigned long)page_address(r->_page) + r->_offset);
253 }
254 
255 static inline int rxb_offset(struct iwl_rx_cmd_buffer *r)
256 {
257 	return r->_offset;
258 }
259 
260 static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r)
261 {
262 	r->_page_stolen = true;
263 	get_page(r->_page);
264 	return r->_page;
265 }
266 
267 static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r)
268 {
269 	__free_pages(r->_page, r->_rx_page_order);
270 }
271 
272 #define MAX_NO_RECLAIM_CMDS	6
273 
274 #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
275 
276 /*
277  * Maximum number of HW queues the transport layer
278  * currently supports
279  */
280 #define IWL_MAX_HW_QUEUES		32
281 #define IWL_MAX_TVQM_QUEUES		512
282 
283 #define IWL_MAX_TID_COUNT	8
284 #define IWL_MGMT_TID		15
285 #define IWL_FRAME_LIMIT	64
286 #define IWL_MAX_RX_HW_QUEUES	16
287 #define IWL_9000_MAX_RX_HW_QUEUES	6
288 
289 /**
290  * enum iwl_wowlan_status - WoWLAN image/device status
291  * @IWL_D3_STATUS_ALIVE: firmware is still running after resume
292  * @IWL_D3_STATUS_RESET: device was reset while suspended
293  */
294 enum iwl_d3_status {
295 	IWL_D3_STATUS_ALIVE,
296 	IWL_D3_STATUS_RESET,
297 };
298 
299 /**
300  * enum iwl_trans_status: transport status flags
301  * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed
302  * @STATUS_DEVICE_ENABLED: APM is enabled
303  * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up)
304  * @STATUS_INT_ENABLED: interrupts are enabled
305  * @STATUS_RFKILL_HW: the actual HW state of the RF-kill switch
306  * @STATUS_RFKILL_OPMODE: RF-kill state reported to opmode
307  * @STATUS_FW_ERROR: the fw is in error state
308  * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands
309  *	are sent
310  * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent
311  * @STATUS_TRANS_DEAD: trans is dead - avoid any read/write operation
312  */
313 enum iwl_trans_status {
314 	STATUS_SYNC_HCMD_ACTIVE,
315 	STATUS_DEVICE_ENABLED,
316 	STATUS_TPOWER_PMI,
317 	STATUS_INT_ENABLED,
318 	STATUS_RFKILL_HW,
319 	STATUS_RFKILL_OPMODE,
320 	STATUS_FW_ERROR,
321 	STATUS_TRANS_GOING_IDLE,
322 	STATUS_TRANS_IDLE,
323 	STATUS_TRANS_DEAD,
324 };
325 
326 static inline int
327 iwl_trans_get_rb_size_order(enum iwl_amsdu_size rb_size)
328 {
329 	switch (rb_size) {
330 	case IWL_AMSDU_2K:
331 		return get_order(2 * 1024);
332 	case IWL_AMSDU_4K:
333 		return get_order(4 * 1024);
334 	case IWL_AMSDU_8K:
335 		return get_order(8 * 1024);
336 	case IWL_AMSDU_12K:
337 		return get_order(16 * 1024);
338 	default:
339 		WARN_ON(1);
340 		return -1;
341 	}
342 }
343 
344 static inline int
345 iwl_trans_get_rb_size(enum iwl_amsdu_size rb_size)
346 {
347 	switch (rb_size) {
348 	case IWL_AMSDU_2K:
349 		return 2 * 1024;
350 	case IWL_AMSDU_4K:
351 		return 4 * 1024;
352 	case IWL_AMSDU_8K:
353 		return 8 * 1024;
354 	case IWL_AMSDU_12K:
355 		return 16 * 1024;
356 	default:
357 		WARN_ON(1);
358 		return 0;
359 	}
360 }
361 
362 struct iwl_hcmd_names {
363 	u8 cmd_id;
364 	const char *const cmd_name;
365 };
366 
367 #define HCMD_NAME(x)	\
368 	{ .cmd_id = x, .cmd_name = #x }
369 
370 struct iwl_hcmd_arr {
371 	const struct iwl_hcmd_names *arr;
372 	int size;
373 };
374 
375 #define HCMD_ARR(x)	\
376 	{ .arr = x, .size = ARRAY_SIZE(x) }
377 
378 /**
379  * struct iwl_dump_sanitize_ops - dump sanitization operations
380  * @frob_txf: Scrub the TX FIFO data
381  * @frob_hcmd: Scrub a host command, the %hcmd pointer is to the header
382  *	but that might be short or long (&struct iwl_cmd_header or
383  *	&struct iwl_cmd_header_wide)
384  * @frob_mem: Scrub memory data
385  */
386 struct iwl_dump_sanitize_ops {
387 	void (*frob_txf)(void *ctx, void *buf, size_t buflen);
388 	void (*frob_hcmd)(void *ctx, void *hcmd, size_t buflen);
389 	void (*frob_mem)(void *ctx, u32 mem_addr, void *mem, size_t buflen);
390 };
391 
392 /**
393  * struct iwl_trans_config - transport configuration
394  *
395  * @op_mode: pointer to the upper layer.
396  * @cmd_queue: the index of the command queue.
397  *	Must be set before start_fw.
398  * @cmd_fifo: the fifo for host commands
399  * @cmd_q_wdg_timeout: the timeout of the watchdog timer for the command queue.
400  * @no_reclaim_cmds: Some devices erroneously don't set the
401  *	SEQ_RX_FRAME bit on some notifications, this is the
402  *	list of such notifications to filter. Max length is
403  *	%MAX_NO_RECLAIM_CMDS.
404  * @n_no_reclaim_cmds: # of commands in list
405  * @rx_buf_size: RX buffer size needed for A-MSDUs
406  *	if unset 4k will be the RX buffer size
407  * @bc_table_dword: set to true if the BC table expects the byte count to be
408  *	in DWORD (as opposed to bytes)
409  * @scd_set_active: should the transport configure the SCD for HCMD queue
410  * @command_groups: array of command groups, each member is an array of the
411  *	commands in the group; for debugging only
412  * @command_groups_size: number of command groups, to avoid illegal access
413  * @cb_data_offs: offset inside skb->cb to store transport data at, must have
414  *	space for at least two pointers
415  * @fw_reset_handshake: firmware supports reset flow handshake
416  */
417 struct iwl_trans_config {
418 	struct iwl_op_mode *op_mode;
419 
420 	u8 cmd_queue;
421 	u8 cmd_fifo;
422 	unsigned int cmd_q_wdg_timeout;
423 	const u8 *no_reclaim_cmds;
424 	unsigned int n_no_reclaim_cmds;
425 
426 	enum iwl_amsdu_size rx_buf_size;
427 	bool bc_table_dword;
428 	bool scd_set_active;
429 	const struct iwl_hcmd_arr *command_groups;
430 	int command_groups_size;
431 
432 	u8 cb_data_offs;
433 	bool fw_reset_handshake;
434 };
435 
436 struct iwl_trans_dump_data {
437 	u32 len;
438 	u8 data[];
439 };
440 
441 struct iwl_trans;
442 
443 struct iwl_trans_txq_scd_cfg {
444 	u8 fifo;
445 	u8 sta_id;
446 	u8 tid;
447 	bool aggregate;
448 	int frame_limit;
449 };
450 
451 /**
452  * struct iwl_trans_rxq_dma_data - RX queue DMA data
453  * @fr_bd_cb: DMA address of free BD cyclic buffer
454  * @fr_bd_wid: Initial write index of the free BD cyclic buffer
455  * @urbd_stts_wrptr: DMA address of urbd_stts_wrptr
456  * @ur_bd_cb: DMA address of used BD cyclic buffer
457  */
458 struct iwl_trans_rxq_dma_data {
459 	u64 fr_bd_cb;
460 	u32 fr_bd_wid;
461 	u64 urbd_stts_wrptr;
462 	u64 ur_bd_cb;
463 };
464 
465 /**
466  * struct iwl_trans_ops - transport specific operations
467  *
468  * All the handlers MUST be implemented
469  *
470  * @start_hw: starts the HW. From that point on, the HW can send interrupts.
471  *	May sleep.
472  * @op_mode_leave: Turn off the HW RF kill indication if on
473  *	May sleep
474  * @start_fw: allocates and inits all the resources for the transport
475  *	layer. Also kick a fw image.
476  *	May sleep
477  * @fw_alive: called when the fw sends alive notification. If the fw provides
478  *	the SCD base address in SRAM, then provide it here, or 0 otherwise.
479  *	May sleep
480  * @stop_device: stops the whole device (embedded CPU put to reset) and stops
481  *	the HW. From that point on, the HW will be stopped but will still issue
482  *	an interrupt if the HW RF kill switch is triggered.
483  *	This callback must do the right thing and not crash even if %start_hw()
484  *	was called but not &start_fw(). May sleep.
485  * @d3_suspend: put the device into the correct mode for WoWLAN during
486  *	suspend. This is optional, if not implemented WoWLAN will not be
487  *	supported. This callback may sleep.
488  * @d3_resume: resume the device after WoWLAN, enabling the opmode to
489  *	talk to the WoWLAN image to get its status. This is optional, if not
490  *	implemented WoWLAN will not be supported. This callback may sleep.
491  * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted.
492  *	If RFkill is asserted in the middle of a SYNC host command, it must
493  *	return -ERFKILL straight away.
494  *	May sleep only if CMD_ASYNC is not set
495  * @tx: send an skb. The transport relies on the op_mode to zero the
496  *	the ieee80211_tx_info->driver_data. If the MPDU is an A-MSDU, all
497  *	the CSUM will be taken care of (TCP CSUM and IP header in case of
498  *	IPv4). If the MPDU is a single MSDU, the op_mode must compute the IP
499  *	header if it is IPv4.
500  *	Must be atomic
501  * @reclaim: free packet until ssn. Returns a list of freed packets.
502  *	Must be atomic
503  * @txq_enable: setup a queue. To setup an AC queue, use the
504  *	iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before
505  *	this one. The op_mode must not configure the HCMD queue. The scheduler
506  *	configuration may be %NULL, in which case the hardware will not be
507  *	configured. If true is returned, the operation mode needs to increment
508  *	the sequence number of the packets routed to this queue because of a
509  *	hardware scheduler bug. May sleep.
510  * @txq_disable: de-configure a Tx queue to send AMPDUs
511  *	Must be atomic
512  * @txq_set_shared_mode: change Tx queue shared/unshared marking
513  * @wait_tx_queues_empty: wait until tx queues are empty. May sleep.
514  * @wait_txq_empty: wait until specific tx queue is empty. May sleep.
515  * @freeze_txq_timer: prevents the timer of the queue from firing until the
516  *	queue is set to awake. Must be atomic.
517  * @block_txq_ptrs: stop updating the write pointers of the Tx queues. Note
518  *	that the transport needs to refcount the calls since this function
519  *	will be called several times with block = true, and then the queues
520  *	need to be unblocked only after the same number of calls with
521  *	block = false.
522  * @write8: write a u8 to a register at offset ofs from the BAR
523  * @write32: write a u32 to a register at offset ofs from the BAR
524  * @read32: read a u32 register at offset ofs from the BAR
525  * @read_prph: read a DWORD from a periphery register
526  * @write_prph: write a DWORD to a periphery register
527  * @read_mem: read device's SRAM in DWORD
528  * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory
529  *	will be zeroed.
530  * @read_config32: read a u32 value from the device's config space at
531  *	the given offset.
532  * @configure: configure parameters required by the transport layer from
533  *	the op_mode. May be called several times before start_fw, can't be
534  *	called after that.
535  * @set_pmi: set the power pmi state
536  * @grab_nic_access: wake the NIC to be able to access non-HBUS regs.
537  *	Sleeping is not allowed between grab_nic_access and
538  *	release_nic_access.
539  * @release_nic_access: let the NIC go to sleep. The "flags" parameter
540  *	must be the same one that was sent before to the grab_nic_access.
541  * @set_bits_mask - set SRAM register according to value and mask.
542  * @dump_data: return a vmalloc'ed buffer with debug data, maybe containing last
543  *	TX'ed commands and similar. The buffer will be vfree'd by the caller.
544  *	Note that the transport must fill in the proper file headers.
545  * @debugfs_cleanup: used in the driver unload flow to make a proper cleanup
546  *	of the trans debugfs
547  * @set_pnvm: set the pnvm data in the prph scratch buffer, inside the
548  *	context info.
549  * @interrupts: disable/enable interrupts to transport
550  */
551 struct iwl_trans_ops {
552 
553 	int (*start_hw)(struct iwl_trans *iwl_trans);
554 	void (*op_mode_leave)(struct iwl_trans *iwl_trans);
555 	int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw,
556 			bool run_in_rfkill);
557 	void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr);
558 	void (*stop_device)(struct iwl_trans *trans);
559 
560 	int (*d3_suspend)(struct iwl_trans *trans, bool test, bool reset);
561 	int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status,
562 			 bool test, bool reset);
563 
564 	int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
565 
566 	int (*tx)(struct iwl_trans *trans, struct sk_buff *skb,
567 		  struct iwl_device_tx_cmd *dev_cmd, int queue);
568 	void (*reclaim)(struct iwl_trans *trans, int queue, int ssn,
569 			struct sk_buff_head *skbs);
570 
571 	void (*set_q_ptrs)(struct iwl_trans *trans, int queue, int ptr);
572 
573 	bool (*txq_enable)(struct iwl_trans *trans, int queue, u16 ssn,
574 			   const struct iwl_trans_txq_scd_cfg *cfg,
575 			   unsigned int queue_wdg_timeout);
576 	void (*txq_disable)(struct iwl_trans *trans, int queue,
577 			    bool configure_scd);
578 	/* 22000 functions */
579 	int (*txq_alloc)(struct iwl_trans *trans,
580 			 __le16 flags, u8 sta_id, u8 tid,
581 			 int cmd_id, int size,
582 			 unsigned int queue_wdg_timeout);
583 	void (*txq_free)(struct iwl_trans *trans, int queue);
584 	int (*rxq_dma_data)(struct iwl_trans *trans, int queue,
585 			    struct iwl_trans_rxq_dma_data *data);
586 
587 	void (*txq_set_shared_mode)(struct iwl_trans *trans, u32 txq_id,
588 				    bool shared);
589 
590 	int (*wait_tx_queues_empty)(struct iwl_trans *trans, u32 txq_bm);
591 	int (*wait_txq_empty)(struct iwl_trans *trans, int queue);
592 	void (*freeze_txq_timer)(struct iwl_trans *trans, unsigned long txqs,
593 				 bool freeze);
594 	void (*block_txq_ptrs)(struct iwl_trans *trans, bool block);
595 
596 	void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
597 	void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
598 	u32 (*read32)(struct iwl_trans *trans, u32 ofs);
599 	u32 (*read_prph)(struct iwl_trans *trans, u32 ofs);
600 	void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val);
601 	int (*read_mem)(struct iwl_trans *trans, u32 addr,
602 			void *buf, int dwords);
603 	int (*write_mem)(struct iwl_trans *trans, u32 addr,
604 			 const void *buf, int dwords);
605 	int (*read_config32)(struct iwl_trans *trans, u32 ofs, u32 *val);
606 	void (*configure)(struct iwl_trans *trans,
607 			  const struct iwl_trans_config *trans_cfg);
608 	void (*set_pmi)(struct iwl_trans *trans, bool state);
609 	void (*sw_reset)(struct iwl_trans *trans);
610 	bool (*grab_nic_access)(struct iwl_trans *trans);
611 	void (*release_nic_access)(struct iwl_trans *trans);
612 	void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask,
613 			      u32 value);
614 
615 	struct iwl_trans_dump_data *(*dump_data)(struct iwl_trans *trans,
616 						 u32 dump_mask,
617 						 const struct iwl_dump_sanitize_ops *sanitize_ops,
618 						 void *sanitize_ctx);
619 	void (*debugfs_cleanup)(struct iwl_trans *trans);
620 	void (*sync_nmi)(struct iwl_trans *trans);
621 	int (*set_pnvm)(struct iwl_trans *trans, const void *data, u32 len);
622 	int (*set_reduce_power)(struct iwl_trans *trans,
623 				const void *data, u32 len);
624 	void (*interrupts)(struct iwl_trans *trans, bool enable);
625 };
626 
627 /**
628  * enum iwl_trans_state - state of the transport layer
629  *
630  * @IWL_TRANS_NO_FW: firmware wasn't started yet, or crashed
631  * @IWL_TRANS_FW_STARTED: FW was started, but not alive yet
632  * @IWL_TRANS_FW_ALIVE: FW has sent an alive response
633  */
634 enum iwl_trans_state {
635 	IWL_TRANS_NO_FW,
636 	IWL_TRANS_FW_STARTED,
637 	IWL_TRANS_FW_ALIVE,
638 };
639 
640 /**
641  * DOC: Platform power management
642  *
643  * In system-wide power management the entire platform goes into a low
644  * power state (e.g. idle or suspend to RAM) at the same time and the
645  * device is configured as a wakeup source for the entire platform.
646  * This is usually triggered by userspace activity (e.g. the user
647  * presses the suspend button or a power management daemon decides to
648  * put the platform in low power mode).  The device's behavior in this
649  * mode is dictated by the wake-on-WLAN configuration.
650  *
651  * The terms used for the device's behavior are as follows:
652  *
653  *	- D0: the device is fully powered and the host is awake;
654  *	- D3: the device is in low power mode and only reacts to
655  *		specific events (e.g. magic-packet received or scan
656  *		results found);
657  *
658  * These terms reflect the power modes in the firmware and are not to
659  * be confused with the physical device power state.
660  */
661 
662 /**
663  * enum iwl_plat_pm_mode - platform power management mode
664  *
665  * This enumeration describes the device's platform power management
666  * behavior when in system-wide suspend (i.e WoWLAN).
667  *
668  * @IWL_PLAT_PM_MODE_DISABLED: power management is disabled for this
669  *	device.  In system-wide suspend mode, it means that the all
670  *	connections will be closed automatically by mac80211 before
671  *	the platform is suspended.
672  * @IWL_PLAT_PM_MODE_D3: the device goes into D3 mode (i.e. WoWLAN).
673  */
674 enum iwl_plat_pm_mode {
675 	IWL_PLAT_PM_MODE_DISABLED,
676 	IWL_PLAT_PM_MODE_D3,
677 };
678 
679 /**
680  * enum iwl_ini_cfg_state
681  * @IWL_INI_CFG_STATE_NOT_LOADED: no debug cfg was given
682  * @IWL_INI_CFG_STATE_LOADED: debug cfg was found and loaded
683  * @IWL_INI_CFG_STATE_CORRUPTED: debug cfg was found and some of the TLVs
684  *	are corrupted. The rest of the debug TLVs will still be used
685  */
686 enum iwl_ini_cfg_state {
687 	IWL_INI_CFG_STATE_NOT_LOADED,
688 	IWL_INI_CFG_STATE_LOADED,
689 	IWL_INI_CFG_STATE_CORRUPTED,
690 };
691 
692 /* Max time to wait for nmi interrupt */
693 #define IWL_TRANS_NMI_TIMEOUT (HZ / 4)
694 
695 /**
696  * struct iwl_dram_data
697  * @physical: page phy pointer
698  * @block: pointer to the allocated block/page
699  * @size: size of the block/page
700  */
701 struct iwl_dram_data {
702 	dma_addr_t physical;
703 	void *block;
704 	int size;
705 };
706 
707 /**
708  * struct iwl_fw_mon - fw monitor per allocation id
709  * @num_frags: number of fragments
710  * @frags: an array of DRAM buffer fragments
711  */
712 struct iwl_fw_mon {
713 	u32 num_frags;
714 	struct iwl_dram_data *frags;
715 };
716 
717 /**
718  * struct iwl_self_init_dram - dram data used by self init process
719  * @fw: lmac and umac dram data
720  * @fw_cnt: total number of items in array
721  * @paging: paging dram data
722  * @paging_cnt: total number of items in array
723  */
724 struct iwl_self_init_dram {
725 	struct iwl_dram_data *fw;
726 	int fw_cnt;
727 	struct iwl_dram_data *paging;
728 	int paging_cnt;
729 };
730 
731 /**
732  * struct iwl_trans_debug - transport debug related data
733  *
734  * @n_dest_reg: num of reg_ops in %dbg_dest_tlv
735  * @rec_on: true iff there is a fw debug recording currently active
736  * @dest_tlv: points to the destination TLV for debug
737  * @conf_tlv: array of pointers to configuration TLVs for debug
738  * @trigger_tlv: array of pointers to triggers TLVs for debug
739  * @lmac_error_event_table: addrs of lmacs error tables
740  * @umac_error_event_table: addr of umac error table
741  * @tcm_error_event_table: address of TCM error table
742  * @error_event_table_tlv_status: bitmap that indicates what error table
743  *	pointers was recevied via TLV. uses enum &iwl_error_event_table_status
744  * @internal_ini_cfg: internal debug cfg state. Uses &enum iwl_ini_cfg_state
745  * @external_ini_cfg: external debug cfg state. Uses &enum iwl_ini_cfg_state
746  * @fw_mon_cfg: debug buffer allocation configuration
747  * @fw_mon_ini: DRAM buffer fragments per allocation id
748  * @fw_mon: DRAM buffer for firmware monitor
749  * @hw_error: equals true if hw error interrupt was received from the FW
750  * @ini_dest: debug monitor destination uses &enum iwl_fw_ini_buffer_location
751  * @active_regions: active regions
752  * @debug_info_tlv_list: list of debug info TLVs
753  * @time_point: array of debug time points
754  * @periodic_trig_list: periodic triggers list
755  * @domains_bitmap: bitmap of active domains other than &IWL_FW_INI_DOMAIN_ALWAYS_ON
756  * @ucode_preset: preset based on ucode
757  */
758 struct iwl_trans_debug {
759 	u8 n_dest_reg;
760 	bool rec_on;
761 
762 	const struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv;
763 	const struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX];
764 	struct iwl_fw_dbg_trigger_tlv * const *trigger_tlv;
765 
766 	u32 lmac_error_event_table[2];
767 	u32 umac_error_event_table;
768 	u32 tcm_error_event_table;
769 	unsigned int error_event_table_tlv_status;
770 
771 	enum iwl_ini_cfg_state internal_ini_cfg;
772 	enum iwl_ini_cfg_state external_ini_cfg;
773 
774 	struct iwl_fw_ini_allocation_tlv fw_mon_cfg[IWL_FW_INI_ALLOCATION_NUM];
775 	struct iwl_fw_mon fw_mon_ini[IWL_FW_INI_ALLOCATION_NUM];
776 
777 	struct iwl_dram_data fw_mon;
778 
779 	bool hw_error;
780 	enum iwl_fw_ini_buffer_location ini_dest;
781 
782 	u64 unsupported_region_msk;
783 	struct iwl_ucode_tlv *active_regions[IWL_FW_INI_MAX_REGION_ID];
784 	struct list_head debug_info_tlv_list;
785 	struct iwl_dbg_tlv_time_point_data
786 		time_point[IWL_FW_INI_TIME_POINT_NUM];
787 	struct list_head periodic_trig_list;
788 
789 	u32 domains_bitmap;
790 	u32 ucode_preset;
791 };
792 
793 struct iwl_dma_ptr {
794 	dma_addr_t dma;
795 	void *addr;
796 	size_t size;
797 };
798 
799 struct iwl_cmd_meta {
800 	/* only for SYNC commands, iff the reply skb is wanted */
801 	struct iwl_host_cmd *source;
802 	u32 flags;
803 	u32 tbs;
804 };
805 
806 /*
807  * The FH will write back to the first TB only, so we need to copy some data
808  * into the buffer regardless of whether it should be mapped or not.
809  * This indicates how big the first TB must be to include the scratch buffer
810  * and the assigned PN.
811  * Since PN location is 8 bytes at offset 12, it's 20 now.
812  * If we make it bigger then allocations will be bigger and copy slower, so
813  * that's probably not useful.
814  */
815 #define IWL_FIRST_TB_SIZE	20
816 #define IWL_FIRST_TB_SIZE_ALIGN ALIGN(IWL_FIRST_TB_SIZE, 64)
817 
818 struct iwl_pcie_txq_entry {
819 	void *cmd;
820 	struct sk_buff *skb;
821 	/* buffer to free after command completes */
822 	const void *free_buf;
823 	struct iwl_cmd_meta meta;
824 };
825 
826 struct iwl_pcie_first_tb_buf {
827 	u8 buf[IWL_FIRST_TB_SIZE_ALIGN];
828 };
829 
830 /**
831  * struct iwl_txq - Tx Queue for DMA
832  * @q: generic Rx/Tx queue descriptor
833  * @tfds: transmit frame descriptors (DMA memory)
834  * @first_tb_bufs: start of command headers, including scratch buffers, for
835  *	the writeback -- this is DMA memory and an array holding one buffer
836  *	for each command on the queue
837  * @first_tb_dma: DMA address for the first_tb_bufs start
838  * @entries: transmit entries (driver state)
839  * @lock: queue lock
840  * @stuck_timer: timer that fires if queue gets stuck
841  * @trans: pointer back to transport (for timer)
842  * @need_update: indicates need to update read/write index
843  * @ampdu: true if this queue is an ampdu queue for an specific RA/TID
844  * @wd_timeout: queue watchdog timeout (jiffies) - per queue
845  * @frozen: tx stuck queue timer is frozen
846  * @frozen_expiry_remainder: remember how long until the timer fires
847  * @bc_tbl: byte count table of the queue (relevant only for gen2 transport)
848  * @write_ptr: 1-st empty entry (index) host_w
849  * @read_ptr: last used entry (index) host_r
850  * @dma_addr:  physical addr for BD's
851  * @n_window: safe queue window
852  * @id: queue id
853  * @low_mark: low watermark, resume queue if free space more than this
854  * @high_mark: high watermark, stop queue if free space less than this
855  *
856  * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
857  * descriptors) and required locking structures.
858  *
859  * Note the difference between TFD_QUEUE_SIZE_MAX and n_window: the hardware
860  * always assumes 256 descriptors, so TFD_QUEUE_SIZE_MAX is always 256 (unless
861  * there might be HW changes in the future). For the normal TX
862  * queues, n_window, which is the size of the software queue data
863  * is also 256; however, for the command queue, n_window is only
864  * 32 since we don't need so many commands pending. Since the HW
865  * still uses 256 BDs for DMA though, TFD_QUEUE_SIZE_MAX stays 256.
866  * This means that we end up with the following:
867  *  HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 |
868  *  SW entries:           | 0      | ... | 31          |
869  * where N is a number between 0 and 7. This means that the SW
870  * data is a window overlayed over the HW queue.
871  */
872 struct iwl_txq {
873 	void *tfds;
874 	struct iwl_pcie_first_tb_buf *first_tb_bufs;
875 	dma_addr_t first_tb_dma;
876 	struct iwl_pcie_txq_entry *entries;
877 	/* lock for syncing changes on the queue */
878 	spinlock_t lock;
879 	unsigned long frozen_expiry_remainder;
880 	struct timer_list stuck_timer;
881 	struct iwl_trans *trans;
882 	bool need_update;
883 	bool frozen;
884 	bool ampdu;
885 	int block;
886 	unsigned long wd_timeout;
887 	struct sk_buff_head overflow_q;
888 	struct iwl_dma_ptr bc_tbl;
889 
890 	int write_ptr;
891 	int read_ptr;
892 	dma_addr_t dma_addr;
893 	int n_window;
894 	u32 id;
895 	int low_mark;
896 	int high_mark;
897 
898 	bool overflow_tx;
899 };
900 
901 /**
902  * struct iwl_trans_txqs - transport tx queues data
903  *
904  * @bc_table_dword: true if the BC table expects DWORD (as opposed to bytes)
905  * @page_offs: offset from skb->cb to mac header page pointer
906  * @dev_cmd_offs: offset from skb->cb to iwl_device_tx_cmd pointer
907  * @queue_used - bit mask of used queues
908  * @queue_stopped - bit mask of stopped queues
909  * @scd_bc_tbls: gen1 pointer to the byte count table of the scheduler
910  */
911 struct iwl_trans_txqs {
912 	unsigned long queue_used[BITS_TO_LONGS(IWL_MAX_TVQM_QUEUES)];
913 	unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_TVQM_QUEUES)];
914 	struct iwl_txq *txq[IWL_MAX_TVQM_QUEUES];
915 	struct dma_pool *bc_pool;
916 	size_t bc_tbl_size;
917 	bool bc_table_dword;
918 	u8 page_offs;
919 	u8 dev_cmd_offs;
920 	struct iwl_tso_hdr_page __percpu *tso_hdr_page;
921 
922 	struct {
923 		u8 fifo;
924 		u8 q_id;
925 		unsigned int wdg_timeout;
926 	} cmd;
927 
928 	struct {
929 		u8 max_tbs;
930 		u16 size;
931 		u8 addr_size;
932 	} tfd;
933 
934 	struct iwl_dma_ptr scd_bc_tbls;
935 };
936 
937 /**
938  * struct iwl_trans - transport common data
939  *
940  * @ops - pointer to iwl_trans_ops
941  * @op_mode - pointer to the op_mode
942  * @trans_cfg: the trans-specific configuration part
943  * @cfg - pointer to the configuration
944  * @drv - pointer to iwl_drv
945  * @status: a bit-mask of transport status flags
946  * @dev - pointer to struct device * that represents the device
947  * @max_skb_frags: maximum number of fragments an SKB can have when transmitted.
948  *	0 indicates that frag SKBs (NETIF_F_SG) aren't supported.
949  * @hw_rf_id a u32 with the device RF ID
950  * @hw_id: a u32 with the ID of the device / sub-device.
951  *	Set during transport allocation.
952  * @hw_id_str: a string with info about HW ID. Set during transport allocation.
953  * @pm_support: set to true in start_hw if link pm is supported
954  * @ltr_enabled: set to true if the LTR is enabled
955  * @wide_cmd_header: true when ucode supports wide command header format
956  * @wait_command_queue: wait queue for sync commands
957  * @num_rx_queues: number of RX queues allocated by the transport;
958  *	the transport must set this before calling iwl_drv_start()
959  * @iml_len: the length of the image loader
960  * @iml: a pointer to the image loader itself
961  * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only.
962  *	The user should use iwl_trans_{alloc,free}_tx_cmd.
963  * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before
964  *	starting the firmware, used for tracing
965  * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the
966  *	start of the 802.11 header in the @rx_mpdu_cmd
967  * @dflt_pwr_limit: default power limit fetched from the platform (ACPI)
968  * @system_pm_mode: the system-wide power management mode in use.
969  *	This mode is set dynamically, depending on the WoWLAN values
970  *	configured from the userspace at runtime.
971  * @iwl_trans_txqs: transport tx queues data.
972  */
973 struct iwl_trans {
974 	const struct iwl_trans_ops *ops;
975 	struct iwl_op_mode *op_mode;
976 	const struct iwl_cfg_trans_params *trans_cfg;
977 	const struct iwl_cfg *cfg;
978 	struct iwl_drv *drv;
979 	enum iwl_trans_state state;
980 	unsigned long status;
981 
982 	struct device *dev;
983 	u32 max_skb_frags;
984 	u32 hw_rev;
985 	u32 hw_rf_id;
986 	u32 hw_id;
987 	char hw_id_str[52];
988 	u32 sku_id[3];
989 
990 	u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size;
991 
992 	bool pm_support;
993 	bool ltr_enabled;
994 	u8 pnvm_loaded:1;
995 	u8 reduce_power_loaded:1;
996 
997 	const struct iwl_hcmd_arr *command_groups;
998 	int command_groups_size;
999 	bool wide_cmd_header;
1000 
1001 	wait_queue_head_t wait_command_queue;
1002 	u8 num_rx_queues;
1003 
1004 	size_t iml_len;
1005 	u8 *iml;
1006 
1007 	/* The following fields are internal only */
1008 	struct kmem_cache *dev_cmd_pool;
1009 	char dev_cmd_pool_name[50];
1010 
1011 	struct dentry *dbgfs_dir;
1012 
1013 #ifdef CONFIG_LOCKDEP
1014 	struct lockdep_map sync_cmd_lockdep_map;
1015 #endif
1016 
1017 	struct iwl_trans_debug dbg;
1018 	struct iwl_self_init_dram init_dram;
1019 
1020 	enum iwl_plat_pm_mode system_pm_mode;
1021 
1022 	const char *name;
1023 	struct iwl_trans_txqs txqs;
1024 
1025 	/* pointer to trans specific struct */
1026 	/*Ensure that this pointer will always be aligned to sizeof pointer */
1027 	char trans_specific[] __aligned(sizeof(void *));
1028 };
1029 
1030 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id);
1031 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans);
1032 
1033 static inline void iwl_trans_configure(struct iwl_trans *trans,
1034 				       const struct iwl_trans_config *trans_cfg)
1035 {
1036 	trans->op_mode = trans_cfg->op_mode;
1037 
1038 	trans->ops->configure(trans, trans_cfg);
1039 	WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg));
1040 }
1041 
1042 static inline int iwl_trans_start_hw(struct iwl_trans *trans)
1043 {
1044 	might_sleep();
1045 
1046 	return trans->ops->start_hw(trans);
1047 }
1048 
1049 static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans)
1050 {
1051 	might_sleep();
1052 
1053 	if (trans->ops->op_mode_leave)
1054 		trans->ops->op_mode_leave(trans);
1055 
1056 	trans->op_mode = NULL;
1057 
1058 	trans->state = IWL_TRANS_NO_FW;
1059 }
1060 
1061 static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
1062 {
1063 	might_sleep();
1064 
1065 	trans->state = IWL_TRANS_FW_ALIVE;
1066 
1067 	trans->ops->fw_alive(trans, scd_addr);
1068 }
1069 
1070 static inline int iwl_trans_start_fw(struct iwl_trans *trans,
1071 				     const struct fw_img *fw,
1072 				     bool run_in_rfkill)
1073 {
1074 	int ret;
1075 
1076 	might_sleep();
1077 
1078 	WARN_ON_ONCE(!trans->rx_mpdu_cmd);
1079 
1080 	clear_bit(STATUS_FW_ERROR, &trans->status);
1081 	ret = trans->ops->start_fw(trans, fw, run_in_rfkill);
1082 	if (ret == 0)
1083 		trans->state = IWL_TRANS_FW_STARTED;
1084 
1085 	return ret;
1086 }
1087 
1088 static inline void iwl_trans_stop_device(struct iwl_trans *trans)
1089 {
1090 	might_sleep();
1091 
1092 	trans->ops->stop_device(trans);
1093 
1094 	trans->state = IWL_TRANS_NO_FW;
1095 }
1096 
1097 static inline int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test,
1098 				       bool reset)
1099 {
1100 	might_sleep();
1101 	if (!trans->ops->d3_suspend)
1102 		return 0;
1103 
1104 	return trans->ops->d3_suspend(trans, test, reset);
1105 }
1106 
1107 static inline int iwl_trans_d3_resume(struct iwl_trans *trans,
1108 				      enum iwl_d3_status *status,
1109 				      bool test, bool reset)
1110 {
1111 	might_sleep();
1112 	if (!trans->ops->d3_resume)
1113 		return 0;
1114 
1115 	return trans->ops->d3_resume(trans, status, test, reset);
1116 }
1117 
1118 static inline struct iwl_trans_dump_data *
1119 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask,
1120 		    const struct iwl_dump_sanitize_ops *sanitize_ops,
1121 		    void *sanitize_ctx)
1122 {
1123 	if (!trans->ops->dump_data)
1124 		return NULL;
1125 	return trans->ops->dump_data(trans, dump_mask,
1126 				     sanitize_ops, sanitize_ctx);
1127 }
1128 
1129 static inline struct iwl_device_tx_cmd *
1130 iwl_trans_alloc_tx_cmd(struct iwl_trans *trans)
1131 {
1132 	return kmem_cache_zalloc(trans->dev_cmd_pool, GFP_ATOMIC);
1133 }
1134 
1135 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
1136 
1137 static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans,
1138 					 struct iwl_device_tx_cmd *dev_cmd)
1139 {
1140 	kmem_cache_free(trans->dev_cmd_pool, dev_cmd);
1141 }
1142 
1143 static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
1144 			       struct iwl_device_tx_cmd *dev_cmd, int queue)
1145 {
1146 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
1147 		return -EIO;
1148 
1149 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1150 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1151 		return -EIO;
1152 	}
1153 
1154 	return trans->ops->tx(trans, skb, dev_cmd, queue);
1155 }
1156 
1157 static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue,
1158 				     int ssn, struct sk_buff_head *skbs)
1159 {
1160 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1161 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1162 		return;
1163 	}
1164 
1165 	trans->ops->reclaim(trans, queue, ssn, skbs);
1166 }
1167 
1168 static inline void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue,
1169 					int ptr)
1170 {
1171 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1172 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1173 		return;
1174 	}
1175 
1176 	trans->ops->set_q_ptrs(trans, queue, ptr);
1177 }
1178 
1179 static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
1180 					 bool configure_scd)
1181 {
1182 	trans->ops->txq_disable(trans, queue, configure_scd);
1183 }
1184 
1185 static inline bool
1186 iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
1187 			 const struct iwl_trans_txq_scd_cfg *cfg,
1188 			 unsigned int queue_wdg_timeout)
1189 {
1190 	might_sleep();
1191 
1192 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1193 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1194 		return false;
1195 	}
1196 
1197 	return trans->ops->txq_enable(trans, queue, ssn,
1198 				      cfg, queue_wdg_timeout);
1199 }
1200 
1201 static inline int
1202 iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue,
1203 			   struct iwl_trans_rxq_dma_data *data)
1204 {
1205 	if (WARN_ON_ONCE(!trans->ops->rxq_dma_data))
1206 		return -ENOTSUPP;
1207 
1208 	return trans->ops->rxq_dma_data(trans, queue, data);
1209 }
1210 
1211 static inline void
1212 iwl_trans_txq_free(struct iwl_trans *trans, int queue)
1213 {
1214 	if (WARN_ON_ONCE(!trans->ops->txq_free))
1215 		return;
1216 
1217 	trans->ops->txq_free(trans, queue);
1218 }
1219 
1220 static inline int
1221 iwl_trans_txq_alloc(struct iwl_trans *trans,
1222 		    __le16 flags, u8 sta_id, u8 tid,
1223 		    int cmd_id, int size,
1224 		    unsigned int wdg_timeout)
1225 {
1226 	might_sleep();
1227 
1228 	if (WARN_ON_ONCE(!trans->ops->txq_alloc))
1229 		return -ENOTSUPP;
1230 
1231 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1232 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1233 		return -EIO;
1234 	}
1235 
1236 	return trans->ops->txq_alloc(trans, flags, sta_id, tid,
1237 				     cmd_id, size, wdg_timeout);
1238 }
1239 
1240 static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
1241 						 int queue, bool shared_mode)
1242 {
1243 	if (trans->ops->txq_set_shared_mode)
1244 		trans->ops->txq_set_shared_mode(trans, queue, shared_mode);
1245 }
1246 
1247 static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue,
1248 					int fifo, int sta_id, int tid,
1249 					int frame_limit, u16 ssn,
1250 					unsigned int queue_wdg_timeout)
1251 {
1252 	struct iwl_trans_txq_scd_cfg cfg = {
1253 		.fifo = fifo,
1254 		.sta_id = sta_id,
1255 		.tid = tid,
1256 		.frame_limit = frame_limit,
1257 		.aggregate = sta_id >= 0,
1258 	};
1259 
1260 	iwl_trans_txq_enable_cfg(trans, queue, ssn, &cfg, queue_wdg_timeout);
1261 }
1262 
1263 static inline
1264 void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, int fifo,
1265 			     unsigned int queue_wdg_timeout)
1266 {
1267 	struct iwl_trans_txq_scd_cfg cfg = {
1268 		.fifo = fifo,
1269 		.sta_id = -1,
1270 		.tid = IWL_MAX_TID_COUNT,
1271 		.frame_limit = IWL_FRAME_LIMIT,
1272 		.aggregate = false,
1273 	};
1274 
1275 	iwl_trans_txq_enable_cfg(trans, queue, 0, &cfg, queue_wdg_timeout);
1276 }
1277 
1278 static inline void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
1279 					      unsigned long txqs,
1280 					      bool freeze)
1281 {
1282 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1283 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1284 		return;
1285 	}
1286 
1287 	if (trans->ops->freeze_txq_timer)
1288 		trans->ops->freeze_txq_timer(trans, txqs, freeze);
1289 }
1290 
1291 static inline void iwl_trans_block_txq_ptrs(struct iwl_trans *trans,
1292 					    bool block)
1293 {
1294 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1295 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1296 		return;
1297 	}
1298 
1299 	if (trans->ops->block_txq_ptrs)
1300 		trans->ops->block_txq_ptrs(trans, block);
1301 }
1302 
1303 static inline int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans,
1304 						 u32 txqs)
1305 {
1306 	if (WARN_ON_ONCE(!trans->ops->wait_tx_queues_empty))
1307 		return -ENOTSUPP;
1308 
1309 	/* No need to wait if the firmware is not alive */
1310 	if (trans->state != IWL_TRANS_FW_ALIVE) {
1311 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1312 		return -EIO;
1313 	}
1314 
1315 	return trans->ops->wait_tx_queues_empty(trans, txqs);
1316 }
1317 
1318 static inline int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
1319 {
1320 	if (WARN_ON_ONCE(!trans->ops->wait_txq_empty))
1321 		return -ENOTSUPP;
1322 
1323 	if (WARN_ON_ONCE(trans->state != IWL_TRANS_FW_ALIVE)) {
1324 		IWL_ERR(trans, "%s bad state = %d\n", __func__, trans->state);
1325 		return -EIO;
1326 	}
1327 
1328 	return trans->ops->wait_txq_empty(trans, queue);
1329 }
1330 
1331 static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
1332 {
1333 	trans->ops->write8(trans, ofs, val);
1334 }
1335 
1336 static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
1337 {
1338 	trans->ops->write32(trans, ofs, val);
1339 }
1340 
1341 static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
1342 {
1343 	return trans->ops->read32(trans, ofs);
1344 }
1345 
1346 static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
1347 {
1348 	return trans->ops->read_prph(trans, ofs);
1349 }
1350 
1351 static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs,
1352 					u32 val)
1353 {
1354 	return trans->ops->write_prph(trans, ofs, val);
1355 }
1356 
1357 static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
1358 				     void *buf, int dwords)
1359 {
1360 	return trans->ops->read_mem(trans, addr, buf, dwords);
1361 }
1362 
1363 #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize)		      \
1364 	do {								      \
1365 		if (__builtin_constant_p(bufsize))			      \
1366 			BUILD_BUG_ON((bufsize) % sizeof(u32));		      \
1367 		iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\
1368 	} while (0)
1369 
1370 static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr)
1371 {
1372 	u32 value;
1373 
1374 	if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1)))
1375 		return 0xa5a5a5a5;
1376 
1377 	return value;
1378 }
1379 
1380 static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
1381 				      const void *buf, int dwords)
1382 {
1383 	return trans->ops->write_mem(trans, addr, buf, dwords);
1384 }
1385 
1386 static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr,
1387 					u32 val)
1388 {
1389 	return iwl_trans_write_mem(trans, addr, &val, 1);
1390 }
1391 
1392 static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
1393 {
1394 	if (trans->ops->set_pmi)
1395 		trans->ops->set_pmi(trans, state);
1396 }
1397 
1398 static inline void iwl_trans_sw_reset(struct iwl_trans *trans)
1399 {
1400 	if (trans->ops->sw_reset)
1401 		trans->ops->sw_reset(trans);
1402 }
1403 
1404 static inline void
1405 iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
1406 {
1407 	trans->ops->set_bits_mask(trans, reg, mask, value);
1408 }
1409 
1410 #define iwl_trans_grab_nic_access(trans)		\
1411 	__cond_lock(nic_access,				\
1412 		    likely((trans)->ops->grab_nic_access(trans)))
1413 
1414 static inline void __releases(nic_access)
1415 iwl_trans_release_nic_access(struct iwl_trans *trans)
1416 {
1417 	trans->ops->release_nic_access(trans);
1418 	__release(nic_access);
1419 }
1420 
1421 static inline void iwl_trans_fw_error(struct iwl_trans *trans, bool sync)
1422 {
1423 	if (WARN_ON_ONCE(!trans->op_mode))
1424 		return;
1425 
1426 	/* prevent double restarts due to the same erroneous FW */
1427 	if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) {
1428 		iwl_op_mode_nic_error(trans->op_mode, sync);
1429 		trans->state = IWL_TRANS_NO_FW;
1430 	}
1431 }
1432 
1433 static inline bool iwl_trans_fw_running(struct iwl_trans *trans)
1434 {
1435 	return trans->state == IWL_TRANS_FW_ALIVE;
1436 }
1437 
1438 static inline void iwl_trans_sync_nmi(struct iwl_trans *trans)
1439 {
1440 	if (trans->ops->sync_nmi)
1441 		trans->ops->sync_nmi(trans);
1442 }
1443 
1444 void iwl_trans_sync_nmi_with_addr(struct iwl_trans *trans, u32 inta_addr,
1445 				  u32 sw_err_bit);
1446 
1447 static inline int iwl_trans_set_pnvm(struct iwl_trans *trans,
1448 				     const void *data, u32 len)
1449 {
1450 	if (trans->ops->set_pnvm) {
1451 		int ret = trans->ops->set_pnvm(trans, data, len);
1452 
1453 		if (ret)
1454 			return ret;
1455 	}
1456 
1457 	trans->pnvm_loaded = true;
1458 
1459 	return 0;
1460 }
1461 
1462 static inline int iwl_trans_set_reduce_power(struct iwl_trans *trans,
1463 					     const void *data, u32 len)
1464 {
1465 	if (trans->ops->set_reduce_power) {
1466 		int ret = trans->ops->set_reduce_power(trans, data, len);
1467 
1468 		if (ret)
1469 			return ret;
1470 	}
1471 
1472 	trans->reduce_power_loaded = true;
1473 	return 0;
1474 }
1475 
1476 static inline bool iwl_trans_dbg_ini_valid(struct iwl_trans *trans)
1477 {
1478 	return trans->dbg.internal_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED ||
1479 		trans->dbg.external_ini_cfg != IWL_INI_CFG_STATE_NOT_LOADED;
1480 }
1481 
1482 static inline void iwl_trans_interrupts(struct iwl_trans *trans, bool enable)
1483 {
1484 	if (trans->ops->interrupts)
1485 		trans->ops->interrupts(trans, enable);
1486 }
1487 
1488 /*****************************************************
1489  * transport helper functions
1490  *****************************************************/
1491 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
1492 			  struct device *dev,
1493 			  const struct iwl_trans_ops *ops,
1494 			  const struct iwl_cfg_trans_params *cfg_trans);
1495 int iwl_trans_init(struct iwl_trans *trans);
1496 void iwl_trans_free(struct iwl_trans *trans);
1497 
1498 /*****************************************************
1499 * driver (transport) register/unregister functions
1500 ******************************************************/
1501 int __must_check iwl_pci_register_driver(void);
1502 void iwl_pci_unregister_driver(void);
1503 
1504 #endif /* __iwl_trans_h__ */
1505