1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation 4 * Copyright (C) 2016-2017 Intel Deutschland GmbH 5 * Copyright (C) 2018-2024 Intel Corporation 6 */ 7 #ifndef __IWL_CONFIG_H__ 8 #define __IWL_CONFIG_H__ 9 10 #include <linux/types.h> 11 #include <linux/netdevice.h> 12 #include <linux/ieee80211.h> 13 #include <linux/nl80211.h> 14 #include <linux/mod_devicetable.h> 15 #include "iwl-csr.h" 16 #include "iwl-drv.h" 17 18 enum iwl_device_family { 19 IWL_DEVICE_FAMILY_UNDEFINED, 20 IWL_DEVICE_FAMILY_1000, 21 IWL_DEVICE_FAMILY_100, 22 IWL_DEVICE_FAMILY_2000, 23 IWL_DEVICE_FAMILY_2030, 24 IWL_DEVICE_FAMILY_105, 25 IWL_DEVICE_FAMILY_135, 26 IWL_DEVICE_FAMILY_5000, 27 IWL_DEVICE_FAMILY_5150, 28 IWL_DEVICE_FAMILY_6000, 29 IWL_DEVICE_FAMILY_6000i, 30 IWL_DEVICE_FAMILY_6005, 31 IWL_DEVICE_FAMILY_6030, 32 IWL_DEVICE_FAMILY_6050, 33 IWL_DEVICE_FAMILY_6150, 34 IWL_DEVICE_FAMILY_7000, 35 IWL_DEVICE_FAMILY_8000, 36 IWL_DEVICE_FAMILY_9000, 37 IWL_DEVICE_FAMILY_22000, 38 IWL_DEVICE_FAMILY_AX210, 39 IWL_DEVICE_FAMILY_BZ, 40 IWL_DEVICE_FAMILY_SC, 41 }; 42 43 #if defined(__FreeBSD__) 44 static const char *iwl_device_family_str[] = { 45 [IWL_DEVICE_FAMILY_UNDEFINED] = "undefined", 46 [IWL_DEVICE_FAMILY_1000] = "1000", 47 [IWL_DEVICE_FAMILY_100] = "100", 48 [IWL_DEVICE_FAMILY_2000] = "2000", 49 [IWL_DEVICE_FAMILY_2030] = "2030", 50 [IWL_DEVICE_FAMILY_105] = "105", 51 [IWL_DEVICE_FAMILY_135] = "135", 52 [IWL_DEVICE_FAMILY_5000] = "5000", 53 [IWL_DEVICE_FAMILY_5150] = "5150", 54 [IWL_DEVICE_FAMILY_6000] = "6000", 55 [IWL_DEVICE_FAMILY_6000i] = "6000i", 56 [IWL_DEVICE_FAMILY_6005] = "6005", 57 [IWL_DEVICE_FAMILY_6030] = "6030", 58 [IWL_DEVICE_FAMILY_6050] = "6050", 59 [IWL_DEVICE_FAMILY_6150] = "6150", 60 [IWL_DEVICE_FAMILY_7000] = "7000", 61 [IWL_DEVICE_FAMILY_8000] = "8000", 62 [IWL_DEVICE_FAMILY_9000] = "9000", 63 [IWL_DEVICE_FAMILY_22000] = "22000", 64 [IWL_DEVICE_FAMILY_AX210] = "AX210", 65 [IWL_DEVICE_FAMILY_BZ] = "BZ", 66 [IWL_DEVICE_FAMILY_SC] = "SC", 67 }; 68 69 static inline const char * 70 iwl_device_family_name(enum iwl_device_family devive_family) 71 { 72 if (devive_family < 0 || 73 devive_family >= ARRAY_SIZE(iwl_device_family_str)) 74 return "unknown"; 75 return (iwl_device_family_str[devive_family]); 76 } 77 #endif 78 79 /* 80 * LED mode 81 * IWL_LED_DEFAULT: use device default 82 * IWL_LED_RF_STATE: turn LED on/off based on RF state 83 * LED ON = RF ON 84 * LED OFF = RF OFF 85 * IWL_LED_BLINK: adjust led blink rate based on blink table 86 * IWL_LED_DISABLE: led disabled 87 */ 88 enum iwl_led_mode { 89 IWL_LED_DEFAULT, 90 IWL_LED_RF_STATE, 91 IWL_LED_BLINK, 92 IWL_LED_DISABLE, 93 }; 94 95 /** 96 * enum iwl_nvm_type - nvm formats 97 * @IWL_NVM: the regular format 98 * @IWL_NVM_EXT: extended NVM format 99 * @IWL_NVM_SDP: NVM format used by 3168 series 100 */ 101 enum iwl_nvm_type { 102 IWL_NVM, 103 IWL_NVM_EXT, 104 IWL_NVM_SDP, 105 }; 106 107 /* 108 * This is the threshold value of plcp error rate per 100mSecs. It is 109 * used to set and check for the validity of plcp_delta. 110 */ 111 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1 112 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50 113 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100 114 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200 115 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255 116 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0 117 118 /* TX queue watchdog timeouts in mSecs */ 119 #define IWL_WATCHDOG_DISABLED 0 120 #define IWL_DEF_WD_TIMEOUT 2500 121 #define IWL_LONG_WD_TIMEOUT 10000 122 #define IWL_MAX_WD_TIMEOUT 120000 123 124 #define IWL_DEFAULT_MAX_TX_POWER 22 125 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\ 126 NETIF_F_TSO | NETIF_F_TSO6) 127 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM) 128 129 /* Antenna presence definitions */ 130 #define ANT_NONE 0x0 131 #define ANT_INVALID 0xff 132 #define ANT_A BIT(0) 133 #define ANT_B BIT(1) 134 #define ANT_C BIT(2) 135 #define ANT_AB (ANT_A | ANT_B) 136 #define ANT_AC (ANT_A | ANT_C) 137 #define ANT_BC (ANT_B | ANT_C) 138 #define ANT_ABC (ANT_A | ANT_B | ANT_C) 139 140 141 static inline u8 num_of_ant(u8 mask) 142 { 143 return !!((mask) & ANT_A) + 144 !!((mask) & ANT_B) + 145 !!((mask) & ANT_C); 146 } 147 148 /** 149 * struct iwl_base_params - params not likely to change within a device family 150 * @max_ll_items: max number of OTP blocks 151 * @shadow_ram_support: shadow support for OTP memory 152 * @led_compensation: compensate on the led on/off time per HW according 153 * to the deviation to achieve the desired led frequency. 154 * The detail algorithm is described in iwl-led.c 155 * @wd_timeout: TX queues watchdog timeout 156 * @max_event_log_size: size of event log buffer size for ucode event logging 157 * @shadow_reg_enable: HW shadow register support 158 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command 159 * is in flight. This is due to a HW bug in 7260, 3160 and 7265. 160 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled. 161 * @max_tfd_queue_size: max number of entries in tfd queue. 162 */ 163 struct iwl_base_params { 164 unsigned int wd_timeout; 165 166 u16 eeprom_size; 167 u16 max_event_log_size; 168 169 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */ 170 shadow_ram_support:1, 171 shadow_reg_enable:1, 172 pcie_l1_allowed:1, 173 apmg_wake_up_wa:1, 174 scd_chain_ext_wa:1; 175 176 u16 num_of_queues; /* def: HW dependent */ 177 u32 max_tfd_queue_size; /* def: HW dependent */ 178 179 u8 max_ll_items; 180 u8 led_compensation; 181 }; 182 183 /* 184 * @stbc: support Tx STBC and 1*SS Rx STBC 185 * @ldpc: support Tx/Rx with LDPC 186 * @use_rts_for_aggregation: use rts/cts protection for HT traffic 187 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40 188 */ 189 struct iwl_ht_params { 190 u8 ht_greenfield_support:1, 191 stbc:1, 192 ldpc:1, 193 use_rts_for_aggregation:1; 194 u8 ht40_bands; 195 }; 196 197 /* 198 * Tx-backoff threshold 199 * @temperature: The threshold in Celsius 200 * @backoff: The tx-backoff in uSec 201 */ 202 struct iwl_tt_tx_backoff { 203 s32 temperature; 204 u32 backoff; 205 }; 206 207 #define TT_TX_BACKOFF_SIZE 6 208 209 /** 210 * struct iwl_tt_params - thermal throttling parameters 211 * @ct_kill_entry: CT Kill entry threshold 212 * @ct_kill_exit: CT Kill exit threshold 213 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs 214 * to checks whether to exit CT Kill. 215 * @dynamic_smps_entry: Dynamic SMPS entry threshold 216 * @dynamic_smps_exit: Dynamic SMPS exit threshold 217 * @tx_protection_entry: TX protection entry threshold 218 * @tx_protection_exit: TX protection exit threshold 219 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order. 220 * @support_ct_kill: Support CT Kill? 221 * @support_dynamic_smps: Support dynamic SMPS? 222 * @support_tx_protection: Support tx protection? 223 * @support_tx_backoff: Support tx-backoff? 224 */ 225 struct iwl_tt_params { 226 u32 ct_kill_entry; 227 u32 ct_kill_exit; 228 u32 ct_kill_duration; 229 u32 dynamic_smps_entry; 230 u32 dynamic_smps_exit; 231 u32 tx_protection_entry; 232 u32 tx_protection_exit; 233 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE]; 234 u8 support_ct_kill:1, 235 support_dynamic_smps:1, 236 support_tx_protection:1, 237 support_tx_backoff:1; 238 }; 239 240 /* 241 * information on how to parse the EEPROM 242 */ 243 #define EEPROM_REG_BAND_1_CHANNELS 0x08 244 #define EEPROM_REG_BAND_2_CHANNELS 0x26 245 #define EEPROM_REG_BAND_3_CHANNELS 0x42 246 #define EEPROM_REG_BAND_4_CHANNELS 0x5C 247 #define EEPROM_REG_BAND_5_CHANNELS 0x74 248 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82 249 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92 250 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80 251 #define EEPROM_REGULATORY_BAND_NO_HT40 0 252 253 /* lower blocks contain EEPROM image and calibration data */ 254 #define OTP_LOW_IMAGE_SIZE_2K (2 * 512 * sizeof(u16)) /* 2 KB */ 255 #define OTP_LOW_IMAGE_SIZE_16K (16 * 512 * sizeof(u16)) /* 16 KB */ 256 #define OTP_LOW_IMAGE_SIZE_32K (32 * 512 * sizeof(u16)) /* 32 KB */ 257 258 struct iwl_eeprom_params { 259 const u8 regulatory_bands[7]; 260 bool enhanced_txpower; 261 }; 262 263 /* Tx-backoff power threshold 264 * @pwr: The power limit in mw 265 * @backoff: The tx-backoff in uSec 266 */ 267 struct iwl_pwr_tx_backoff { 268 u32 pwr; 269 u32 backoff; 270 }; 271 272 enum iwl_cfg_trans_ltr_delay { 273 IWL_CFG_TRANS_LTR_DELAY_NONE = 0, 274 IWL_CFG_TRANS_LTR_DELAY_200US = 1, 275 IWL_CFG_TRANS_LTR_DELAY_2500US = 2, 276 IWL_CFG_TRANS_LTR_DELAY_1820US = 3, 277 }; 278 279 /** 280 * struct iwl_cfg_trans_params - information needed to start the trans 281 * 282 * These values are specific to the device ID and do not change when 283 * multiple configs are used for a single device ID. They values are 284 * used, among other things, to boot the NIC so that the HW REV or 285 * RFID can be read before deciding the remaining parameters to use. 286 * 287 * @base_params: pointer to basic parameters 288 * @device_family: the device family 289 * @umac_prph_offset: offset to add to UMAC periphery address 290 * @xtal_latency: power up latency to get the xtal stabilized 291 * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY 292 * @rf_id: need to read rf_id to determine the firmware image 293 * @gen2: 22000 and on transport operation 294 * @mq_rx_supported: multi-queue rx support 295 * @integrated: discrete or integrated 296 * @low_latency_xtal: use the low latency xtal if supported 297 * @bisr_workaround: BISR hardware workaround (for 22260 series devices) 298 * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay. 299 * @imr_enabled: use the IMR if supported. 300 */ 301 struct iwl_cfg_trans_params { 302 const struct iwl_base_params *base_params; 303 enum iwl_device_family device_family; 304 u32 umac_prph_offset; 305 u32 xtal_latency; 306 u32 extra_phy_cfg_flags; 307 u32 rf_id:1, 308 gen2:1, 309 mq_rx_supported:1, 310 integrated:1, 311 low_latency_xtal:1, 312 bisr_workaround:1, 313 ltr_delay:2, 314 imr_enabled:1; 315 }; 316 317 /** 318 * struct iwl_fw_mon_reg - FW monitor register info 319 * @addr: register address 320 * @mask: register mask 321 */ 322 struct iwl_fw_mon_reg { 323 u32 addr; 324 u32 mask; 325 }; 326 327 /** 328 * struct iwl_fw_mon_regs - FW monitor registers 329 * @write_ptr: write pointer register 330 * @cycle_cnt: cycle count register 331 * @cur_frag: current fragment in use 332 */ 333 struct iwl_fw_mon_regs { 334 struct iwl_fw_mon_reg write_ptr; 335 struct iwl_fw_mon_reg cycle_cnt; 336 struct iwl_fw_mon_reg cur_frag; 337 }; 338 339 /** 340 * struct iwl_cfg 341 * @trans: the trans-specific configuration part 342 * @name: Official name of the device 343 * @fw_name_pre: Firmware filename prefix. The api version and extension 344 * (.ucode) will be added to filename before loading from disk. The 345 * filename is constructed as <fw_name_pre>-<api>.ucode. 346 * @fw_name_mac: MAC name for this config, the remaining pieces of the 347 * name will be generated dynamically 348 * @ucode_api_max: Highest version of uCode API supported by driver. 349 * @ucode_api_min: Lowest version of uCode API supported by driver. 350 * @max_inst_size: The maximal length of the fw inst section (only DVM) 351 * @max_data_size: The maximal length of the fw data section (only DVM) 352 * @valid_tx_ant: valid transmit antenna 353 * @valid_rx_ant: valid receive antenna 354 * @non_shared_ant: the antenna that is for WiFi only 355 * @nvm_ver: NVM version 356 * @nvm_calib_ver: NVM calibration version 357 * @ht_params: point to ht parameters 358 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) 359 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 360 * @tx_with_siso_diversity: 1x1 device with tx antenna diversity 361 * @internal_wimax_coex: internal wifi/wimax combo device 362 * @high_temp: Is this NIC is designated to be in high temperature. 363 * @host_interrupt_operation_mode: device needs host interrupt operation 364 * mode set 365 * @nvm_hw_section_num: the ID of the HW NVM section 366 * @mac_addr_from_csr: read HW address from CSR registers at this offset 367 * @features: hw features, any combination of feature_passlist 368 * @pwr_tx_backoffs: translation table between power limits and backoffs 369 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response 370 * @dccm_offset: offset from which DCCM begins 371 * @dccm_len: length of DCCM (including runtime stack CCM) 372 * @dccm2_offset: offset from which the second DCCM begins 373 * @dccm2_len: length of the second DCCM 374 * @smem_offset: offset from which the SMEM begins 375 * @smem_len: the length of SMEM 376 * @vht_mu_mimo_supported: VHT MU-MIMO support 377 * @cdb: CDB support 378 * @nvm_type: see &enum iwl_nvm_type 379 * @d3_debug_data_base_addr: base address where D3 debug data is stored 380 * @d3_debug_data_length: length of the D3 debug data 381 * @min_txq_size: minimum number of slots required in a TX queue 382 * @uhb_supported: ultra high band channels supported 383 * @min_ba_txq_size: minimum number of slots required in a TX queue which 384 * based on hardware support (HE - 256, EHT - 1K). 385 * @num_rbds: number of receive buffer descriptors to use 386 * (only used for multi-queue capable devices) 387 * 388 * We enable the driver to be backward compatible wrt. hardware features. 389 * API differences in uCode shouldn't be handled here but through TLVs 390 * and/or the uCode API version instead. 391 */ 392 struct iwl_cfg { 393 struct iwl_cfg_trans_params trans; 394 /* params specific to an individual device within a device family */ 395 const char *name; 396 const char *fw_name_pre; 397 const char *fw_name_mac; 398 /* params likely to change within a device family */ 399 const struct iwl_ht_params *ht_params; 400 const struct iwl_eeprom_params *eeprom_params; 401 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; 402 const char *default_nvm_file_C_step; 403 const struct iwl_tt_params *thermal_params; 404 enum iwl_led_mode led_mode; 405 enum iwl_nvm_type nvm_type; 406 u32 max_data_size; 407 u32 max_inst_size; 408 netdev_features_t features; 409 u32 dccm_offset; 410 u32 dccm_len; 411 u32 dccm2_offset; 412 u32 dccm2_len; 413 u32 smem_offset; 414 u32 smem_len; 415 u16 nvm_ver; 416 u16 nvm_calib_ver; 417 u32 rx_with_siso_diversity:1, 418 tx_with_siso_diversity:1, 419 internal_wimax_coex:1, 420 host_interrupt_operation_mode:1, 421 high_temp:1, 422 mac_addr_from_csr:10, 423 lp_xtal_workaround:1, 424 apmg_not_supported:1, 425 vht_mu_mimo_supported:1, 426 cdb:1, 427 dbgc_supported:1, 428 uhb_supported:1; 429 u8 valid_tx_ant; 430 u8 valid_rx_ant; 431 u8 non_shared_ant; 432 u8 nvm_hw_section_num; 433 u8 max_tx_agg_size; 434 u8 ucode_api_max; 435 u8 ucode_api_min; 436 u16 num_rbds; 437 u32 min_umac_error_event_table; 438 u32 d3_debug_data_base_addr; 439 u32 d3_debug_data_length; 440 u32 min_txq_size; 441 u32 gp2_reg_addr; 442 u32 min_ba_txq_size; 443 const struct iwl_fw_mon_regs mon_dram_regs; 444 const struct iwl_fw_mon_regs mon_smem_regs; 445 const struct iwl_fw_mon_regs mon_dbgi_regs; 446 }; 447 448 #define IWL_CFG_ANY (~0) 449 450 #define IWL_CFG_MAC_TYPE_PU 0x31 451 #define IWL_CFG_MAC_TYPE_TH 0x32 452 #define IWL_CFG_MAC_TYPE_QU 0x33 453 #define IWL_CFG_MAC_TYPE_QUZ 0x35 454 #define IWL_CFG_MAC_TYPE_SO 0x37 455 #define IWL_CFG_MAC_TYPE_SOF 0x43 456 #define IWL_CFG_MAC_TYPE_MA 0x44 457 #define IWL_CFG_MAC_TYPE_BZ 0x46 458 #define IWL_CFG_MAC_TYPE_GL 0x47 459 #define IWL_CFG_MAC_TYPE_SC 0x48 460 #define IWL_CFG_MAC_TYPE_SC2 0x49 461 #define IWL_CFG_MAC_TYPE_SC2F 0x4A 462 #define IWL_CFG_MAC_TYPE_BZ_W 0x4B 463 464 #define IWL_CFG_RF_TYPE_TH 0x105 465 #define IWL_CFG_RF_TYPE_TH1 0x108 466 #define IWL_CFG_RF_TYPE_JF2 0x105 467 #define IWL_CFG_RF_TYPE_JF1 0x108 468 #define IWL_CFG_RF_TYPE_HR2 0x10A 469 #define IWL_CFG_RF_TYPE_HR1 0x10C 470 #define IWL_CFG_RF_TYPE_GF 0x10D 471 #define IWL_CFG_RF_TYPE_FM 0x112 472 #define IWL_CFG_RF_TYPE_WH 0x113 473 474 #define IWL_CFG_RF_ID_TH 0x1 475 #define IWL_CFG_RF_ID_TH1 0x1 476 #define IWL_CFG_RF_ID_JF 0x3 477 #define IWL_CFG_RF_ID_JF1 0x6 478 #define IWL_CFG_RF_ID_JF1_DIV 0xA 479 #define IWL_CFG_RF_ID_HR 0x7 480 #define IWL_CFG_RF_ID_HR1 0x4 481 482 #define IWL_CFG_NO_160 0x1 483 #define IWL_CFG_160 0x0 484 485 #define IWL_CFG_NO_320 0x1 486 #define IWL_CFG_320 0x0 487 488 #define IWL_CFG_CORES_BT 0x0 489 #define IWL_CFG_CORES_BT_GNSS 0x5 490 491 #define IWL_CFG_NO_CDB 0x0 492 #define IWL_CFG_CDB 0x1 493 494 #define IWL_CFG_NO_JACKET 0x0 495 #define IWL_CFG_IS_JACKET 0x1 496 497 #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4) 498 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9) 499 #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10) 500 501 struct iwl_dev_info { 502 u16 device; 503 u16 subdevice; 504 u16 mac_type; 505 u16 rf_type; 506 u8 mac_step; 507 u8 rf_step; 508 u8 rf_id; 509 u8 no_160; 510 u8 cores; 511 u8 cdb; 512 u8 jacket; 513 const struct iwl_cfg *cfg; 514 const char *name; 515 }; 516 517 #if IS_ENABLED(CONFIG_IWLWIFI_KUNIT_TESTS) 518 extern const struct iwl_dev_info iwl_dev_info_table[]; 519 extern const unsigned int iwl_dev_info_table_size; 520 const struct iwl_dev_info * 521 iwl_pci_find_dev_info(u16 device, u16 subsystem_device, 522 u16 mac_type, u8 mac_step, u16 rf_type, u8 cdb, 523 u8 jacket, u8 rf_id, u8 no_160, u8 cores, u8 rf_step); 524 extern const struct pci_device_id iwl_hw_card_ids[]; 525 #endif 526 527 /* 528 * This list declares the config structures for all devices. 529 */ 530 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg; 531 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg; 532 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg; 533 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg; 534 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg; 535 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg; 536 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg; 537 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg; 538 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg; 539 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg; 540 extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg; 541 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg; 542 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg; 543 extern const struct iwl_cfg_trans_params iwl_sc_trans_cfg; 544 extern const char iwl9162_name[]; 545 extern const char iwl9260_name[]; 546 extern const char iwl9260_1_name[]; 547 extern const char iwl9270_name[]; 548 extern const char iwl9461_name[]; 549 extern const char iwl9462_name[]; 550 extern const char iwl9560_name[]; 551 extern const char iwl9162_160_name[]; 552 extern const char iwl9260_160_name[]; 553 extern const char iwl9270_160_name[]; 554 extern const char iwl9461_160_name[]; 555 extern const char iwl9462_160_name[]; 556 extern const char iwl9560_160_name[]; 557 extern const char iwl9260_killer_1550_name[]; 558 extern const char iwl9560_killer_1550i_name[]; 559 extern const char iwl9560_killer_1550s_name[]; 560 extern const char iwl_ax200_name[]; 561 extern const char iwl_ax203_name[]; 562 extern const char iwl_ax204_name[]; 563 extern const char iwl_ax201_name[]; 564 extern const char iwl_ax101_name[]; 565 extern const char iwl_ax200_killer_1650w_name[]; 566 extern const char iwl_ax200_killer_1650x_name[]; 567 extern const char iwl_ax201_killer_1650s_name[]; 568 extern const char iwl_ax201_killer_1650i_name[]; 569 extern const char iwl_ax210_killer_1675w_name[]; 570 extern const char iwl_ax210_killer_1675x_name[]; 571 extern const char iwl9560_killer_1550i_160_name[]; 572 extern const char iwl9560_killer_1550s_160_name[]; 573 extern const char iwl_ax211_killer_1675s_name[]; 574 extern const char iwl_ax211_killer_1675i_name[]; 575 extern const char iwl_ax411_killer_1690s_name[]; 576 extern const char iwl_ax411_killer_1690i_name[]; 577 extern const char iwl_ax211_name[]; 578 extern const char iwl_ax221_name[]; 579 extern const char iwl_ax231_name[]; 580 extern const char iwl_ax411_name[]; 581 extern const char iwl_bz_name[]; 582 extern const char iwl_fm_name[]; 583 extern const char iwl_gl_name[]; 584 extern const char iwl_mtp_name[]; 585 extern const char iwl_sc_name[]; 586 extern const char iwl_sc2_name[]; 587 extern const char iwl_sc2f_name[]; 588 #if IS_ENABLED(CONFIG_IWLDVM) 589 extern const struct iwl_cfg iwl5300_agn_cfg; 590 extern const struct iwl_cfg iwl5100_agn_cfg; 591 extern const struct iwl_cfg iwl5350_agn_cfg; 592 extern const struct iwl_cfg iwl5100_bgn_cfg; 593 extern const struct iwl_cfg iwl5100_abg_cfg; 594 extern const struct iwl_cfg iwl5150_agn_cfg; 595 extern const struct iwl_cfg iwl5150_abg_cfg; 596 extern const struct iwl_cfg iwl6005_2agn_cfg; 597 extern const struct iwl_cfg iwl6005_2abg_cfg; 598 extern const struct iwl_cfg iwl6005_2bg_cfg; 599 extern const struct iwl_cfg iwl6005_2agn_sff_cfg; 600 extern const struct iwl_cfg iwl6005_2agn_d_cfg; 601 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg; 602 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg; 603 extern const struct iwl_cfg iwl1030_bgn_cfg; 604 extern const struct iwl_cfg iwl1030_bg_cfg; 605 extern const struct iwl_cfg iwl6030_2agn_cfg; 606 extern const struct iwl_cfg iwl6030_2abg_cfg; 607 extern const struct iwl_cfg iwl6030_2bgn_cfg; 608 extern const struct iwl_cfg iwl6030_2bg_cfg; 609 extern const struct iwl_cfg iwl6000i_2agn_cfg; 610 extern const struct iwl_cfg iwl6000i_2abg_cfg; 611 extern const struct iwl_cfg iwl6000i_2bg_cfg; 612 extern const struct iwl_cfg iwl6000_3agn_cfg; 613 extern const struct iwl_cfg iwl6050_2agn_cfg; 614 extern const struct iwl_cfg iwl6050_2abg_cfg; 615 extern const struct iwl_cfg iwl6150_bgn_cfg; 616 extern const struct iwl_cfg iwl6150_bg_cfg; 617 extern const struct iwl_cfg iwl1000_bgn_cfg; 618 extern const struct iwl_cfg iwl1000_bg_cfg; 619 extern const struct iwl_cfg iwl100_bgn_cfg; 620 extern const struct iwl_cfg iwl100_bg_cfg; 621 extern const struct iwl_cfg iwl130_bgn_cfg; 622 extern const struct iwl_cfg iwl130_bg_cfg; 623 extern const struct iwl_cfg iwl2000_2bgn_cfg; 624 extern const struct iwl_cfg iwl2000_2bgn_d_cfg; 625 extern const struct iwl_cfg iwl2030_2bgn_cfg; 626 extern const struct iwl_cfg iwl6035_2agn_cfg; 627 extern const struct iwl_cfg iwl6035_2agn_sff_cfg; 628 extern const struct iwl_cfg iwl105_bgn_cfg; 629 extern const struct iwl_cfg iwl105_bgn_d_cfg; 630 extern const struct iwl_cfg iwl135_bgn_cfg; 631 #endif /* CONFIG_IWLDVM */ 632 #if IS_ENABLED(CONFIG_IWLMVM) 633 extern const struct iwl_ht_params iwl_22000_ht_params; 634 extern const struct iwl_cfg iwl7260_2ac_cfg; 635 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp; 636 extern const struct iwl_cfg iwl7260_2n_cfg; 637 extern const struct iwl_cfg iwl7260_n_cfg; 638 extern const struct iwl_cfg iwl3160_2ac_cfg; 639 extern const struct iwl_cfg iwl3160_2n_cfg; 640 extern const struct iwl_cfg iwl3160_n_cfg; 641 extern const struct iwl_cfg iwl3165_2ac_cfg; 642 extern const struct iwl_cfg iwl3168_2ac_cfg; 643 extern const struct iwl_cfg iwl7265_2ac_cfg; 644 extern const struct iwl_cfg iwl7265_2n_cfg; 645 extern const struct iwl_cfg iwl7265_n_cfg; 646 extern const struct iwl_cfg iwl7265d_2ac_cfg; 647 extern const struct iwl_cfg iwl7265d_2n_cfg; 648 extern const struct iwl_cfg iwl7265d_n_cfg; 649 extern const struct iwl_cfg iwl8260_2n_cfg; 650 extern const struct iwl_cfg iwl8260_2ac_cfg; 651 extern const struct iwl_cfg iwl8265_2ac_cfg; 652 extern const struct iwl_cfg iwl8275_2ac_cfg; 653 extern const struct iwl_cfg iwl4165_2ac_cfg; 654 extern const struct iwl_cfg iwl9260_2ac_cfg; 655 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg; 656 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg; 657 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg; 658 extern const struct iwl_cfg iwl9560_2ac_cfg_soc; 659 extern const struct iwl_cfg iwl_qu_b0_hr1_b0; 660 extern const struct iwl_cfg iwl_qu_c0_hr1_b0; 661 extern const struct iwl_cfg iwl_quz_a0_hr1_b0; 662 extern const struct iwl_cfg iwl_qu_b0_hr_b0; 663 extern const struct iwl_cfg iwl_qu_c0_hr_b0; 664 extern const struct iwl_cfg iwl_ax200_cfg_cc; 665 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr; 666 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0; 667 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr; 668 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr; 669 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr; 670 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0; 671 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0; 672 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0; 673 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0; 674 extern const struct iwl_cfg killer1650x_2ax_cfg; 675 extern const struct iwl_cfg killer1650w_2ax_cfg; 676 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0; 677 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0; 678 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long; 679 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0; 680 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0; 681 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long; 682 683 extern const struct iwl_cfg iwl_cfg_ma; 684 685 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0; 686 extern const struct iwl_cfg iwl_cfg_so_a0_ms_a0; 687 extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0; 688 689 extern const struct iwl_cfg iwl_cfg_bz; 690 extern const struct iwl_cfg iwl_cfg_gl; 691 692 extern const struct iwl_cfg iwl_cfg_sc; 693 extern const struct iwl_cfg iwl_cfg_sc2; 694 extern const struct iwl_cfg iwl_cfg_sc2f; 695 #endif /* CONFIG_IWLMVM */ 696 697 #endif /* __IWL_CONFIG_H__ */ 698