xref: /freebsd/sys/contrib/dev/iwlwifi/fw/file.h (revision bfcc09ddd422c95a1a2e4e794b63ee54c4902398)
1*bfcc09ddSBjoern A. Zeeb /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2*bfcc09ddSBjoern A. Zeeb /*
3*bfcc09ddSBjoern A. Zeeb  * Copyright (C) 2008-2014, 2018-2021 Intel Corporation
4*bfcc09ddSBjoern A. Zeeb  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5*bfcc09ddSBjoern A. Zeeb  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6*bfcc09ddSBjoern A. Zeeb  */
7*bfcc09ddSBjoern A. Zeeb #ifndef __iwl_fw_file_h__
8*bfcc09ddSBjoern A. Zeeb #define __iwl_fw_file_h__
9*bfcc09ddSBjoern A. Zeeb 
10*bfcc09ddSBjoern A. Zeeb #include <linux/netdevice.h>
11*bfcc09ddSBjoern A. Zeeb #include <linux/nl80211.h>
12*bfcc09ddSBjoern A. Zeeb 
13*bfcc09ddSBjoern A. Zeeb /* v1/v2 uCode file layout */
14*bfcc09ddSBjoern A. Zeeb struct iwl_ucode_header {
15*bfcc09ddSBjoern A. Zeeb 	__le32 ver;	/* major/minor/API/serial */
16*bfcc09ddSBjoern A. Zeeb 	union {
17*bfcc09ddSBjoern A. Zeeb 		struct {
18*bfcc09ddSBjoern A. Zeeb 			__le32 inst_size;	/* bytes of runtime code */
19*bfcc09ddSBjoern A. Zeeb 			__le32 data_size;	/* bytes of runtime data */
20*bfcc09ddSBjoern A. Zeeb 			__le32 init_size;	/* bytes of init code */
21*bfcc09ddSBjoern A. Zeeb 			__le32 init_data_size;	/* bytes of init data */
22*bfcc09ddSBjoern A. Zeeb 			__le32 boot_size;	/* bytes of bootstrap code */
23*bfcc09ddSBjoern A. Zeeb 			u8 data[0];		/* in same order as sizes */
24*bfcc09ddSBjoern A. Zeeb 		} v1;
25*bfcc09ddSBjoern A. Zeeb 		struct {
26*bfcc09ddSBjoern A. Zeeb 			__le32 build;		/* build number */
27*bfcc09ddSBjoern A. Zeeb 			__le32 inst_size;	/* bytes of runtime code */
28*bfcc09ddSBjoern A. Zeeb 			__le32 data_size;	/* bytes of runtime data */
29*bfcc09ddSBjoern A. Zeeb 			__le32 init_size;	/* bytes of init code */
30*bfcc09ddSBjoern A. Zeeb 			__le32 init_data_size;	/* bytes of init data */
31*bfcc09ddSBjoern A. Zeeb 			__le32 boot_size;	/* bytes of bootstrap code */
32*bfcc09ddSBjoern A. Zeeb 			u8 data[0];		/* in same order as sizes */
33*bfcc09ddSBjoern A. Zeeb 		} v2;
34*bfcc09ddSBjoern A. Zeeb 	} u;
35*bfcc09ddSBjoern A. Zeeb };
36*bfcc09ddSBjoern A. Zeeb 
37*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
38*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_TLV_CONST_BASE	0x100
39*bfcc09ddSBjoern A. Zeeb 
40*bfcc09ddSBjoern A. Zeeb /*
41*bfcc09ddSBjoern A. Zeeb  * new TLV uCode file layout
42*bfcc09ddSBjoern A. Zeeb  *
43*bfcc09ddSBjoern A. Zeeb  * The new TLV file format contains TLVs, that each specify
44*bfcc09ddSBjoern A. Zeeb  * some piece of data.
45*bfcc09ddSBjoern A. Zeeb  */
46*bfcc09ddSBjoern A. Zeeb 
47*bfcc09ddSBjoern A. Zeeb enum iwl_ucode_tlv_type {
48*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INVALID		= 0, /* unused */
49*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INST		= 1,
50*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_DATA		= 2,
51*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INIT		= 3,
52*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INIT_DATA		= 4,
53*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_BOOT		= 5,
54*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
55*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
56*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
57*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
58*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
59*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
60*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
61*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
62*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
63*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
64*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_WOWLAN_INST	= 16,
66*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
67*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS		= 18,
68*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SEC_RT		= 19,
69*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SEC_INIT		= 20,
70*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
71*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_DEF_CALIB		= 22,
72*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PHY_SKU		= 23,
73*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
74*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
75*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
76*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
77*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CSCHEME		= 28,
78*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
79*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
80*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
81*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PAGING		= 32,
82*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
83*bfcc09ddSBjoern A. Zeeb 	/* 35 is unused */
84*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_VERSION	= 36,
85*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
86*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
87*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
88*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
89*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
90*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
91*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_IML		= 52,
92*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
93*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
94*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
95*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_HW_TYPE			= 58,
96*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
97*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
98*bfcc09ddSBjoern A. Zeeb 
99*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PNVM_VERSION		= 62,
100*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_PNVM_SKU			= 64,
101*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TCM_DEBUG_ADDRS		= 65,
102*bfcc09ddSBjoern A. Zeeb 
103*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
104*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
105*bfcc09ddSBjoern A. Zeeb 
106*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
107*bfcc09ddSBjoern A. Zeeb 
108*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
109*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
110*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
111*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
112*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
113*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
114*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
115*bfcc09ddSBjoern A. Zeeb 
116*bfcc09ddSBjoern A. Zeeb 	/* TLVs 0x1000-0x2000 are for internal driver usage */
117*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
118*bfcc09ddSBjoern A. Zeeb };
119*bfcc09ddSBjoern A. Zeeb 
120*bfcc09ddSBjoern A. Zeeb struct iwl_ucode_tlv {
121*bfcc09ddSBjoern A. Zeeb 	__le32 type;		/* see above */
122*bfcc09ddSBjoern A. Zeeb 	__le32 length;		/* not including type/length fields */
123*bfcc09ddSBjoern A. Zeeb 	u8 data[0];
124*bfcc09ddSBjoern A. Zeeb };
125*bfcc09ddSBjoern A. Zeeb 
126*bfcc09ddSBjoern A. Zeeb #define IWL_TLV_UCODE_MAGIC		0x0a4c5749
127*bfcc09ddSBjoern A. Zeeb #define FW_VER_HUMAN_READABLE_SZ	64
128*bfcc09ddSBjoern A. Zeeb 
129*bfcc09ddSBjoern A. Zeeb struct iwl_tlv_ucode_header {
130*bfcc09ddSBjoern A. Zeeb 	/*
131*bfcc09ddSBjoern A. Zeeb 	 * The TLV style ucode header is distinguished from
132*bfcc09ddSBjoern A. Zeeb 	 * the v1/v2 style header by first four bytes being
133*bfcc09ddSBjoern A. Zeeb 	 * zero, as such is an invalid combination of
134*bfcc09ddSBjoern A. Zeeb 	 * major/minor/API/serial versions.
135*bfcc09ddSBjoern A. Zeeb 	 */
136*bfcc09ddSBjoern A. Zeeb 	__le32 zero;
137*bfcc09ddSBjoern A. Zeeb 	__le32 magic;
138*bfcc09ddSBjoern A. Zeeb 	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
139*bfcc09ddSBjoern A. Zeeb 	/* major/minor/API/serial or major in new format */
140*bfcc09ddSBjoern A. Zeeb 	__le32 ver;
141*bfcc09ddSBjoern A. Zeeb 	__le32 build;
142*bfcc09ddSBjoern A. Zeeb 	__le64 ignore;
143*bfcc09ddSBjoern A. Zeeb 	/*
144*bfcc09ddSBjoern A. Zeeb 	 * The data contained herein has a TLV layout,
145*bfcc09ddSBjoern A. Zeeb 	 * see above for the TLV header and types.
146*bfcc09ddSBjoern A. Zeeb 	 * Note that each TLV is padded to a length
147*bfcc09ddSBjoern A. Zeeb 	 * that is a multiple of 4 for alignment.
148*bfcc09ddSBjoern A. Zeeb 	 */
149*bfcc09ddSBjoern A. Zeeb 	u8 data[0];
150*bfcc09ddSBjoern A. Zeeb };
151*bfcc09ddSBjoern A. Zeeb 
152*bfcc09ddSBjoern A. Zeeb /*
153*bfcc09ddSBjoern A. Zeeb  * ucode TLVs
154*bfcc09ddSBjoern A. Zeeb  *
155*bfcc09ddSBjoern A. Zeeb  * ability to get extension for: flags & capabilities from ucode binaries files
156*bfcc09ddSBjoern A. Zeeb  */
157*bfcc09ddSBjoern A. Zeeb struct iwl_ucode_api {
158*bfcc09ddSBjoern A. Zeeb 	__le32 api_index;
159*bfcc09ddSBjoern A. Zeeb 	__le32 api_flags;
160*bfcc09ddSBjoern A. Zeeb } __packed;
161*bfcc09ddSBjoern A. Zeeb 
162*bfcc09ddSBjoern A. Zeeb struct iwl_ucode_capa {
163*bfcc09ddSBjoern A. Zeeb 	__le32 api_index;
164*bfcc09ddSBjoern A. Zeeb 	__le32 api_capa;
165*bfcc09ddSBjoern A. Zeeb } __packed;
166*bfcc09ddSBjoern A. Zeeb 
167*bfcc09ddSBjoern A. Zeeb /**
168*bfcc09ddSBjoern A. Zeeb  * enum iwl_ucode_tlv_flag - ucode API flags
169*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
170*bfcc09ddSBjoern A. Zeeb  *	was a separate TLV but moved here to save space.
171*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
172*bfcc09ddSBjoern A. Zeeb  *	treats good CRC threshold as a boolean
173*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
174*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
175*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
176*bfcc09ddSBjoern A. Zeeb  *	offload profile config command.
177*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
178*bfcc09ddSBjoern A. Zeeb  *	(rather than two) IPv6 addresses
179*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
180*bfcc09ddSBjoern A. Zeeb  *	from the probe request template.
181*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
182*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
183*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
184*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
185*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
186*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
187*bfcc09ddSBjoern A. Zeeb  */
188*bfcc09ddSBjoern A. Zeeb enum iwl_ucode_tlv_flag {
189*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
190*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
191*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
192*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
193*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
194*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
195*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
196*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
197*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
198*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
199*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
200*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_FLAGS_BCAST_FILTERING	= BIT(29),
201*bfcc09ddSBjoern A. Zeeb };
202*bfcc09ddSBjoern A. Zeeb 
203*bfcc09ddSBjoern A. Zeeb typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
204*bfcc09ddSBjoern A. Zeeb 
205*bfcc09ddSBjoern A. Zeeb /**
206*bfcc09ddSBjoern A. Zeeb  * enum iwl_ucode_tlv_api - ucode api
207*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
208*bfcc09ddSBjoern A. Zeeb  *	longer than the passive one, which is essential for fragmented scan.
209*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
210*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
211*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
212*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
213*bfcc09ddSBjoern A. Zeeb  *	iteration complete notification, and the timestamp reported for RX
214*bfcc09ddSBjoern A. Zeeb  *	received during scan, are reported in TSF of the mac specified in the
215*bfcc09ddSBjoern A. Zeeb  *	scan request.
216*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
217*bfcc09ddSBjoern A. Zeeb  *	ADD_MODIFY_STA_KEY_API_S_VER_2.
218*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
219*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
220*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
221*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
222*bfcc09ddSBjoern A. Zeeb  *	indicating low latency direction.
223*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
224*bfcc09ddSBjoern A. Zeeb  *	deprecated.
225*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
226*bfcc09ddSBjoern A. Zeeb  *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
227*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
228*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
229*bfcc09ddSBjoern A. Zeeb  *	the REDUCE_TX_POWER_CMD.
230*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
231*bfcc09ddSBjoern A. Zeeb  *	version of the beacon notification.
232*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
233*bfcc09ddSBjoern A. Zeeb  *	BEACON_FILTER_CONFIG_API_S_VER_4.
234*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
235*bfcc09ddSBjoern A. Zeeb  *	REGULATORY_NVM_GET_INFO_RSP_API_S.
236*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
237*bfcc09ddSBjoern A. Zeeb  *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
238*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
239*bfcc09ddSBjoern A. Zeeb  *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
240*bfcc09ddSBjoern A. Zeeb  *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
241*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
242*bfcc09ddSBjoern A. Zeeb  *	STA_CONTEXT_DOT11AX_API_S
243*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
244*bfcc09ddSBjoern A. Zeeb  *	version tables.
245*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
246*bfcc09ddSBjoern A. Zeeb  *  SCAN_CONFIG_DB_CMD_API_S.
247*bfcc09ddSBjoern A. Zeeb  *
248*bfcc09ddSBjoern A. Zeeb  * @NUM_IWL_UCODE_TLV_API: number of bits used
249*bfcc09ddSBjoern A. Zeeb  */
250*bfcc09ddSBjoern A. Zeeb enum iwl_ucode_tlv_api {
251*bfcc09ddSBjoern A. Zeeb 	/* API Set 0 */
252*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
253*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
254*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
255*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
256*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
257*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
258*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
259*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
260*bfcc09ddSBjoern A. Zeeb 	/* API Set 1 */
261*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
262*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
263*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
264*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
265*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
266*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
267*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
268*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
269*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
270*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
271*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
272*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
273*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
274*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
275*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
276*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
277*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
278*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
279*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
280*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
281*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
282*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
283*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
284*bfcc09ddSBjoern A. Zeeb 
285*bfcc09ddSBjoern A. Zeeb 
286*bfcc09ddSBjoern A. Zeeb #ifdef __CHECKER__
287*bfcc09ddSBjoern A. Zeeb 	/* sparse says it cannot increment the previous enum member */
288*bfcc09ddSBjoern A. Zeeb #define NUM_IWL_UCODE_TLV_API 128
289*bfcc09ddSBjoern A. Zeeb #else
290*bfcc09ddSBjoern A. Zeeb 	NUM_IWL_UCODE_TLV_API
291*bfcc09ddSBjoern A. Zeeb #endif
292*bfcc09ddSBjoern A. Zeeb };
293*bfcc09ddSBjoern A. Zeeb 
294*bfcc09ddSBjoern A. Zeeb typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
295*bfcc09ddSBjoern A. Zeeb 
296*bfcc09ddSBjoern A. Zeeb /**
297*bfcc09ddSBjoern A. Zeeb  * enum iwl_ucode_tlv_capa - ucode capabilities
298*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
299*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
300*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
301*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
302*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
303*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
304*bfcc09ddSBjoern A. Zeeb  *	tx power value into TPC Report action frame and Link Measurement Report
305*bfcc09ddSBjoern A. Zeeb  *	action frame
306*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
307*bfcc09ddSBjoern A. Zeeb  *	channel in DS parameter set element in probe requests.
308*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
309*bfcc09ddSBjoern A. Zeeb  *	probe requests.
310*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
311*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
312*bfcc09ddSBjoern A. Zeeb  *	which also implies support for the scheduler configuration command
313*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
314*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
315*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
316*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
317*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
318*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
319*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
320*bfcc09ddSBjoern A. Zeeb  *	is standalone or with a BSS station interface in the same binding.
321*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
322*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
323*bfcc09ddSBjoern A. Zeeb  *	sources for the MCC. This TLV bit is a future replacement to
324*bfcc09ddSBjoern A. Zeeb  *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
325*bfcc09ddSBjoern A. Zeeb  *	is supported.
326*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
327*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
328*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
329*bfcc09ddSBjoern A. Zeeb  *	stabilization latency for SoCs.
330*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
331*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
332*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
333*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
334*bfcc09ddSBjoern A. Zeeb  * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
335*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
336*bfcc09ddSBjoern A. Zeeb  *	(6 GHz).
337*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
338*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
339*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
340*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
341*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
342*bfcc09ddSBjoern A. Zeeb  *	countdown offloading. Beacon notifications are not sent to the host.
343*bfcc09ddSBjoern A. Zeeb  *	The fw also offloads TBTT alignment.
344*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
345*bfcc09ddSBjoern A. Zeeb  *	antenna the beacon should be transmitted
346*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
347*bfcc09ddSBjoern A. Zeeb  *	from AP and will send it upon d0i3 exit.
348*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
349*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
350*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
351*bfcc09ddSBjoern A. Zeeb  *	thresholds reporting
352*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
353*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
354*bfcc09ddSBjoern A. Zeeb  *	regular image.
355*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
356*bfcc09ddSBjoern A. Zeeb  *	memory addresses from the firmware.
357*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
358*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
359*bfcc09ddSBjoern A. Zeeb  *	command size (command version 4) that supports toggling ACK TX
360*bfcc09ddSBjoern A. Zeeb  *	power reduction.
361*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
362*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
363*bfcc09ddSBjoern A. Zeeb  *	capability.
364*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
365*bfcc09ddSBjoern A. Zeeb  *	to report the CSI information with (certain) RX frames
366*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
367*bfcc09ddSBjoern A. Zeeb  *	initiator and responder
368*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
369*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
370*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
371*bfcc09ddSBjoern A. Zeeb  *	reset flow
372*bfcc09ddSBjoern A. Zeeb  * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
373*bfcc09ddSBjoern A. Zeeb  *      channels even when these are not enabled.
374*bfcc09ddSBjoern A. Zeeb  *
375*bfcc09ddSBjoern A. Zeeb  * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
376*bfcc09ddSBjoern A. Zeeb  */
377*bfcc09ddSBjoern A. Zeeb enum iwl_ucode_tlv_capa {
378*bfcc09ddSBjoern A. Zeeb 	/* set 0 */
379*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
380*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
381*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
382*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
383*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
384*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
385*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
386*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
387*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
388*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
389*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
390*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
391*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
392*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)19,
393*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
394*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
395*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
396*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
397*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
398*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
399*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
400*bfcc09ddSBjoern A. Zeeb 
401*bfcc09ddSBjoern A. Zeeb 	/* set 1 */
402*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
403*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
404*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
405*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
406*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
407*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
408*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
409*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
410*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
411*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
412*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
413*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
414*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
415*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
416*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
417*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
418*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
419*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
420*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
421*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
422*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
423*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
424*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
425*bfcc09ddSBjoern A. Zeeb 
426*bfcc09ddSBjoern A. Zeeb 	/* set 2 */
427*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
428*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
429*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
430*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
431*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
432*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
433*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
434*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
435*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
436*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
437*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
438*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
439*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
440*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
441*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
442*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
443*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
444*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
445*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
446*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
447*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
448*bfcc09ddSBjoern A. Zeeb 
449*bfcc09ddSBjoern A. Zeeb 	/* set 3 */
450*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
451*bfcc09ddSBjoern A. Zeeb 
452*bfcc09ddSBjoern A. Zeeb 	/*
453*bfcc09ddSBjoern A. Zeeb 	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
454*bfcc09ddSBjoern A. Zeeb 	 */
455*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
456*bfcc09ddSBjoern A. Zeeb 
457*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
458*bfcc09ddSBjoern A. Zeeb 	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
459*bfcc09ddSBjoern A. Zeeb 
460*bfcc09ddSBjoern A. Zeeb #ifdef __CHECKER__
461*bfcc09ddSBjoern A. Zeeb 	/* sparse says it cannot increment the previous enum member */
462*bfcc09ddSBjoern A. Zeeb #define NUM_IWL_UCODE_TLV_CAPA 128
463*bfcc09ddSBjoern A. Zeeb #else
464*bfcc09ddSBjoern A. Zeeb 	NUM_IWL_UCODE_TLV_CAPA
465*bfcc09ddSBjoern A. Zeeb #endif
466*bfcc09ddSBjoern A. Zeeb };
467*bfcc09ddSBjoern A. Zeeb 
468*bfcc09ddSBjoern A. Zeeb /* The default calibrate table size if not specified by firmware file */
469*bfcc09ddSBjoern A. Zeeb #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
470*bfcc09ddSBjoern A. Zeeb #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
471*bfcc09ddSBjoern A. Zeeb #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
472*bfcc09ddSBjoern A. Zeeb 
473*bfcc09ddSBjoern A. Zeeb /* The default max probe length if not specified by the firmware file */
474*bfcc09ddSBjoern A. Zeeb #define IWL_DEFAULT_MAX_PROBE_LENGTH	200
475*bfcc09ddSBjoern A. Zeeb 
476*bfcc09ddSBjoern A. Zeeb /*
477*bfcc09ddSBjoern A. Zeeb  * For 16.0 uCode and above, there is no differentiation between sections,
478*bfcc09ddSBjoern A. Zeeb  * just an offset to the HW address.
479*bfcc09ddSBjoern A. Zeeb  */
480*bfcc09ddSBjoern A. Zeeb #define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
481*bfcc09ddSBjoern A. Zeeb #define PAGING_SEPARATOR_SECTION	0xAAAABBBB
482*bfcc09ddSBjoern A. Zeeb 
483*bfcc09ddSBjoern A. Zeeb /* uCode version contains 4 values: Major/Minor/API/Serial */
484*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
485*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
486*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
487*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
488*bfcc09ddSBjoern A. Zeeb 
489*bfcc09ddSBjoern A. Zeeb /**
490*bfcc09ddSBjoern A. Zeeb  * struct iwl_tlv_calib_ctrl - Calibration control struct.
491*bfcc09ddSBjoern A. Zeeb  * Sent as part of the phy configuration command.
492*bfcc09ddSBjoern A. Zeeb  * @flow_trigger: bitmap for which calibrations to perform according to
493*bfcc09ddSBjoern A. Zeeb  *		flow triggers.
494*bfcc09ddSBjoern A. Zeeb  * @event_trigger: bitmap for which calibrations to perform according to
495*bfcc09ddSBjoern A. Zeeb  *		event triggers.
496*bfcc09ddSBjoern A. Zeeb  */
497*bfcc09ddSBjoern A. Zeeb struct iwl_tlv_calib_ctrl {
498*bfcc09ddSBjoern A. Zeeb 	__le32 flow_trigger;
499*bfcc09ddSBjoern A. Zeeb 	__le32 event_trigger;
500*bfcc09ddSBjoern A. Zeeb } __packed;
501*bfcc09ddSBjoern A. Zeeb 
502*bfcc09ddSBjoern A. Zeeb enum iwl_fw_phy_cfg {
503*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_TYPE_POS = 0,
504*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
505*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_STEP_POS = 2,
506*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
507*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_DASH_POS = 4,
508*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
509*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_TX_CHAIN_POS = 16,
510*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
511*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RX_CHAIN_POS = 20,
512*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
513*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_CHAIN_SAD_POS = 23,
514*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
515*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
516*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
517*bfcc09ddSBjoern A. Zeeb 	FW_PHY_CFG_SHARED_CLK = BIT(31),
518*bfcc09ddSBjoern A. Zeeb };
519*bfcc09ddSBjoern A. Zeeb 
520*bfcc09ddSBjoern A. Zeeb #define IWL_UCODE_MAX_CS		1
521*bfcc09ddSBjoern A. Zeeb 
522*bfcc09ddSBjoern A. Zeeb /**
523*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
524*bfcc09ddSBjoern A. Zeeb  * @cipher: a cipher suite selector
525*bfcc09ddSBjoern A. Zeeb  * @flags: cipher scheme flags (currently reserved for a future use)
526*bfcc09ddSBjoern A. Zeeb  * @hdr_len: a size of MPDU security header
527*bfcc09ddSBjoern A. Zeeb  * @pn_len: a size of PN
528*bfcc09ddSBjoern A. Zeeb  * @pn_off: an offset of pn from the beginning of the security header
529*bfcc09ddSBjoern A. Zeeb  * @key_idx_off: an offset of key index byte in the security header
530*bfcc09ddSBjoern A. Zeeb  * @key_idx_mask: a bit mask of key_idx bits
531*bfcc09ddSBjoern A. Zeeb  * @key_idx_shift: bit shift needed to get key_idx
532*bfcc09ddSBjoern A. Zeeb  * @mic_len: mic length in bytes
533*bfcc09ddSBjoern A. Zeeb  * @hw_cipher: a HW cipher index used in host commands
534*bfcc09ddSBjoern A. Zeeb  */
535*bfcc09ddSBjoern A. Zeeb struct iwl_fw_cipher_scheme {
536*bfcc09ddSBjoern A. Zeeb 	__le32 cipher;
537*bfcc09ddSBjoern A. Zeeb 	u8 flags;
538*bfcc09ddSBjoern A. Zeeb 	u8 hdr_len;
539*bfcc09ddSBjoern A. Zeeb 	u8 pn_len;
540*bfcc09ddSBjoern A. Zeeb 	u8 pn_off;
541*bfcc09ddSBjoern A. Zeeb 	u8 key_idx_off;
542*bfcc09ddSBjoern A. Zeeb 	u8 key_idx_mask;
543*bfcc09ddSBjoern A. Zeeb 	u8 key_idx_shift;
544*bfcc09ddSBjoern A. Zeeb 	u8 mic_len;
545*bfcc09ddSBjoern A. Zeeb 	u8 hw_cipher;
546*bfcc09ddSBjoern A. Zeeb } __packed;
547*bfcc09ddSBjoern A. Zeeb 
548*bfcc09ddSBjoern A. Zeeb enum iwl_fw_dbg_reg_operator {
549*bfcc09ddSBjoern A. Zeeb 	CSR_ASSIGN,
550*bfcc09ddSBjoern A. Zeeb 	CSR_SETBIT,
551*bfcc09ddSBjoern A. Zeeb 	CSR_CLEARBIT,
552*bfcc09ddSBjoern A. Zeeb 
553*bfcc09ddSBjoern A. Zeeb 	PRPH_ASSIGN,
554*bfcc09ddSBjoern A. Zeeb 	PRPH_SETBIT,
555*bfcc09ddSBjoern A. Zeeb 	PRPH_CLEARBIT,
556*bfcc09ddSBjoern A. Zeeb 
557*bfcc09ddSBjoern A. Zeeb 	INDIRECT_ASSIGN,
558*bfcc09ddSBjoern A. Zeeb 	INDIRECT_SETBIT,
559*bfcc09ddSBjoern A. Zeeb 	INDIRECT_CLEARBIT,
560*bfcc09ddSBjoern A. Zeeb 
561*bfcc09ddSBjoern A. Zeeb 	PRPH_BLOCKBIT,
562*bfcc09ddSBjoern A. Zeeb };
563*bfcc09ddSBjoern A. Zeeb 
564*bfcc09ddSBjoern A. Zeeb /**
565*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_reg_op - an operation on a register
566*bfcc09ddSBjoern A. Zeeb  *
567*bfcc09ddSBjoern A. Zeeb  * @op: &enum iwl_fw_dbg_reg_operator
568*bfcc09ddSBjoern A. Zeeb  * @addr: offset of the register
569*bfcc09ddSBjoern A. Zeeb  * @val: value
570*bfcc09ddSBjoern A. Zeeb  */
571*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_reg_op {
572*bfcc09ddSBjoern A. Zeeb 	u8 op;
573*bfcc09ddSBjoern A. Zeeb 	u8 reserved[3];
574*bfcc09ddSBjoern A. Zeeb 	__le32 addr;
575*bfcc09ddSBjoern A. Zeeb 	__le32 val;
576*bfcc09ddSBjoern A. Zeeb } __packed;
577*bfcc09ddSBjoern A. Zeeb 
578*bfcc09ddSBjoern A. Zeeb /**
579*bfcc09ddSBjoern A. Zeeb  * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
580*bfcc09ddSBjoern A. Zeeb  *
581*bfcc09ddSBjoern A. Zeeb  * @SMEM_MODE: monitor stores the data in SMEM
582*bfcc09ddSBjoern A. Zeeb  * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
583*bfcc09ddSBjoern A. Zeeb  * @MARBH_MODE: monitor stores the data in MARBH buffer
584*bfcc09ddSBjoern A. Zeeb  * @MIPI_MODE: monitor outputs the data through the MIPI interface
585*bfcc09ddSBjoern A. Zeeb  */
586*bfcc09ddSBjoern A. Zeeb enum iwl_fw_dbg_monitor_mode {
587*bfcc09ddSBjoern A. Zeeb 	SMEM_MODE = 0,
588*bfcc09ddSBjoern A. Zeeb 	EXTERNAL_MODE = 1,
589*bfcc09ddSBjoern A. Zeeb 	MARBH_MODE = 2,
590*bfcc09ddSBjoern A. Zeeb 	MIPI_MODE = 3,
591*bfcc09ddSBjoern A. Zeeb };
592*bfcc09ddSBjoern A. Zeeb 
593*bfcc09ddSBjoern A. Zeeb /**
594*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
595*bfcc09ddSBjoern A. Zeeb  *
596*bfcc09ddSBjoern A. Zeeb  * @data_type: the memory segment type to record
597*bfcc09ddSBjoern A. Zeeb  * @ofs: the memory segment offset
598*bfcc09ddSBjoern A. Zeeb  * @len: the memory segment length, in bytes
599*bfcc09ddSBjoern A. Zeeb  *
600*bfcc09ddSBjoern A. Zeeb  * This parses IWL_UCODE_TLV_FW_MEM_SEG
601*bfcc09ddSBjoern A. Zeeb  */
602*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_mem_seg_tlv {
603*bfcc09ddSBjoern A. Zeeb 	__le32 data_type;
604*bfcc09ddSBjoern A. Zeeb 	__le32 ofs;
605*bfcc09ddSBjoern A. Zeeb 	__le32 len;
606*bfcc09ddSBjoern A. Zeeb } __packed;
607*bfcc09ddSBjoern A. Zeeb 
608*bfcc09ddSBjoern A. Zeeb /**
609*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
610*bfcc09ddSBjoern A. Zeeb  *
611*bfcc09ddSBjoern A. Zeeb  * @version: version of the TLV - currently 0
612*bfcc09ddSBjoern A. Zeeb  * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
613*bfcc09ddSBjoern A. Zeeb  * @size_power: buffer size will be 2^(size_power + 11)
614*bfcc09ddSBjoern A. Zeeb  * @base_reg: addr of the base addr register (PRPH)
615*bfcc09ddSBjoern A. Zeeb  * @end_reg:  addr of the end addr register (PRPH)
616*bfcc09ddSBjoern A. Zeeb  * @write_ptr_reg: the addr of the reg of the write pointer
617*bfcc09ddSBjoern A. Zeeb  * @wrap_count: the addr of the reg of the wrap_count
618*bfcc09ddSBjoern A. Zeeb  * @base_shift: shift right of the base addr reg
619*bfcc09ddSBjoern A. Zeeb  * @end_shift: shift right of the end addr reg
620*bfcc09ddSBjoern A. Zeeb  * @reg_ops: array of registers operations
621*bfcc09ddSBjoern A. Zeeb  *
622*bfcc09ddSBjoern A. Zeeb  * This parses IWL_UCODE_TLV_FW_DBG_DEST
623*bfcc09ddSBjoern A. Zeeb  */
624*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_dest_tlv_v1 {
625*bfcc09ddSBjoern A. Zeeb 	u8 version;
626*bfcc09ddSBjoern A. Zeeb 	u8 monitor_mode;
627*bfcc09ddSBjoern A. Zeeb 	u8 size_power;
628*bfcc09ddSBjoern A. Zeeb 	u8 reserved;
629*bfcc09ddSBjoern A. Zeeb 	__le32 base_reg;
630*bfcc09ddSBjoern A. Zeeb 	__le32 end_reg;
631*bfcc09ddSBjoern A. Zeeb 	__le32 write_ptr_reg;
632*bfcc09ddSBjoern A. Zeeb 	__le32 wrap_count;
633*bfcc09ddSBjoern A. Zeeb 	u8 base_shift;
634*bfcc09ddSBjoern A. Zeeb 	u8 end_shift;
635*bfcc09ddSBjoern A. Zeeb 	struct iwl_fw_dbg_reg_op reg_ops[0];
636*bfcc09ddSBjoern A. Zeeb } __packed;
637*bfcc09ddSBjoern A. Zeeb 
638*bfcc09ddSBjoern A. Zeeb /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
639*bfcc09ddSBjoern A. Zeeb #define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
640*bfcc09ddSBjoern A. Zeeb /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
641*bfcc09ddSBjoern A. Zeeb #define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
642*bfcc09ddSBjoern A. Zeeb /* The smem buffer chunks are in units of 256 bits */
643*bfcc09ddSBjoern A. Zeeb #define IWL_M2S_UNIT_SIZE			0x100
644*bfcc09ddSBjoern A. Zeeb 
645*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_dest_tlv {
646*bfcc09ddSBjoern A. Zeeb 	u8 version;
647*bfcc09ddSBjoern A. Zeeb 	u8 monitor_mode;
648*bfcc09ddSBjoern A. Zeeb 	u8 size_power;
649*bfcc09ddSBjoern A. Zeeb 	u8 reserved;
650*bfcc09ddSBjoern A. Zeeb 	__le32 cfg_reg;
651*bfcc09ddSBjoern A. Zeeb 	__le32 write_ptr_reg;
652*bfcc09ddSBjoern A. Zeeb 	__le32 wrap_count;
653*bfcc09ddSBjoern A. Zeeb 	u8 base_shift;
654*bfcc09ddSBjoern A. Zeeb 	u8 size_shift;
655*bfcc09ddSBjoern A. Zeeb 	struct iwl_fw_dbg_reg_op reg_ops[0];
656*bfcc09ddSBjoern A. Zeeb } __packed;
657*bfcc09ddSBjoern A. Zeeb 
658*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_conf_hcmd {
659*bfcc09ddSBjoern A. Zeeb 	u8 id;
660*bfcc09ddSBjoern A. Zeeb 	u8 reserved;
661*bfcc09ddSBjoern A. Zeeb 	__le16 len;
662*bfcc09ddSBjoern A. Zeeb 	u8 data[0];
663*bfcc09ddSBjoern A. Zeeb } __packed;
664*bfcc09ddSBjoern A. Zeeb 
665*bfcc09ddSBjoern A. Zeeb /**
666*bfcc09ddSBjoern A. Zeeb  * enum iwl_fw_dbg_trigger_mode - triggers functionalities
667*bfcc09ddSBjoern A. Zeeb  *
668*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
669*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
670*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
671*bfcc09ddSBjoern A. Zeeb  *	collect only monitor data
672*bfcc09ddSBjoern A. Zeeb  */
673*bfcc09ddSBjoern A. Zeeb enum iwl_fw_dbg_trigger_mode {
674*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_TRIGGER_START = BIT(0),
675*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
676*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
677*bfcc09ddSBjoern A. Zeeb };
678*bfcc09ddSBjoern A. Zeeb 
679*bfcc09ddSBjoern A. Zeeb /**
680*bfcc09ddSBjoern A. Zeeb  * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
681*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
682*bfcc09ddSBjoern A. Zeeb  */
683*bfcc09ddSBjoern A. Zeeb enum iwl_fw_dbg_trigger_flags {
684*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_FORCE_RESTART = BIT(0),
685*bfcc09ddSBjoern A. Zeeb };
686*bfcc09ddSBjoern A. Zeeb 
687*bfcc09ddSBjoern A. Zeeb /**
688*bfcc09ddSBjoern A. Zeeb  * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
689*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
690*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
691*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
692*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_AP: AP mode
693*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
694*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
695*bfcc09ddSBjoern A. Zeeb  * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
696*bfcc09ddSBjoern A. Zeeb  */
697*bfcc09ddSBjoern A. Zeeb enum iwl_fw_dbg_trigger_vif_type {
698*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
699*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
700*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
701*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
702*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
703*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
704*bfcc09ddSBjoern A. Zeeb 	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
705*bfcc09ddSBjoern A. Zeeb };
706*bfcc09ddSBjoern A. Zeeb 
707*bfcc09ddSBjoern A. Zeeb /**
708*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
709*bfcc09ddSBjoern A. Zeeb  * @id: &enum iwl_fw_dbg_trigger
710*bfcc09ddSBjoern A. Zeeb  * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
711*bfcc09ddSBjoern A. Zeeb  * @stop_conf_ids: bitmap of configurations this trigger relates to.
712*bfcc09ddSBjoern A. Zeeb  *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
713*bfcc09ddSBjoern A. Zeeb  *	to the currently running configuration is set, the data should be
714*bfcc09ddSBjoern A. Zeeb  *	collected.
715*bfcc09ddSBjoern A. Zeeb  * @stop_delay: how many milliseconds to wait before collecting the data
716*bfcc09ddSBjoern A. Zeeb  *	after the STOP trigger fires.
717*bfcc09ddSBjoern A. Zeeb  * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
718*bfcc09ddSBjoern A. Zeeb  * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
719*bfcc09ddSBjoern A. Zeeb  *	configuration should be applied when the triggers kicks in.
720*bfcc09ddSBjoern A. Zeeb  * @occurrences: number of occurrences. 0 means the trigger will never fire.
721*bfcc09ddSBjoern A. Zeeb  * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
722*bfcc09ddSBjoern A. Zeeb  *	trigger in which another occurrence should be ignored.
723*bfcc09ddSBjoern A. Zeeb  * @flags: &enum iwl_fw_dbg_trigger_flags
724*bfcc09ddSBjoern A. Zeeb  */
725*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_tlv {
726*bfcc09ddSBjoern A. Zeeb 	__le32 id;
727*bfcc09ddSBjoern A. Zeeb 	__le32 vif_type;
728*bfcc09ddSBjoern A. Zeeb 	__le32 stop_conf_ids;
729*bfcc09ddSBjoern A. Zeeb 	__le32 stop_delay;
730*bfcc09ddSBjoern A. Zeeb 	u8 mode;
731*bfcc09ddSBjoern A. Zeeb 	u8 start_conf_id;
732*bfcc09ddSBjoern A. Zeeb 	__le16 occurrences;
733*bfcc09ddSBjoern A. Zeeb 	__le16 trig_dis_ms;
734*bfcc09ddSBjoern A. Zeeb 	u8 flags;
735*bfcc09ddSBjoern A. Zeeb 	u8 reserved[5];
736*bfcc09ddSBjoern A. Zeeb 
737*bfcc09ddSBjoern A. Zeeb 	u8 data[0];
738*bfcc09ddSBjoern A. Zeeb } __packed;
739*bfcc09ddSBjoern A. Zeeb 
740*bfcc09ddSBjoern A. Zeeb #define FW_DBG_START_FROM_ALIVE	0
741*bfcc09ddSBjoern A. Zeeb #define FW_DBG_CONF_MAX		32
742*bfcc09ddSBjoern A. Zeeb #define FW_DBG_INVALID		0xff
743*bfcc09ddSBjoern A. Zeeb 
744*bfcc09ddSBjoern A. Zeeb /**
745*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
746*bfcc09ddSBjoern A. Zeeb  * @stop_consec_missed_bcon: stop recording if threshold is crossed.
747*bfcc09ddSBjoern A. Zeeb  * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
748*bfcc09ddSBjoern A. Zeeb  * @start_consec_missed_bcon: start recording if threshold is crossed.
749*bfcc09ddSBjoern A. Zeeb  * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
750*bfcc09ddSBjoern A. Zeeb  * @reserved1: reserved
751*bfcc09ddSBjoern A. Zeeb  * @reserved2: reserved
752*bfcc09ddSBjoern A. Zeeb  */
753*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_missed_bcon {
754*bfcc09ddSBjoern A. Zeeb 	__le32 stop_consec_missed_bcon;
755*bfcc09ddSBjoern A. Zeeb 	__le32 stop_consec_missed_bcon_since_rx;
756*bfcc09ddSBjoern A. Zeeb 	__le32 reserved2[2];
757*bfcc09ddSBjoern A. Zeeb 	__le32 start_consec_missed_bcon;
758*bfcc09ddSBjoern A. Zeeb 	__le32 start_consec_missed_bcon_since_rx;
759*bfcc09ddSBjoern A. Zeeb 	__le32 reserved1[2];
760*bfcc09ddSBjoern A. Zeeb } __packed;
761*bfcc09ddSBjoern A. Zeeb 
762*bfcc09ddSBjoern A. Zeeb /**
763*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
764*bfcc09ddSBjoern A. Zeeb  * cmds: the list of commands to trigger the collection on
765*bfcc09ddSBjoern A. Zeeb  */
766*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_cmd {
767*bfcc09ddSBjoern A. Zeeb 	struct cmd {
768*bfcc09ddSBjoern A. Zeeb 		u8 cmd_id;
769*bfcc09ddSBjoern A. Zeeb 		u8 group_id;
770*bfcc09ddSBjoern A. Zeeb 	} __packed cmds[16];
771*bfcc09ddSBjoern A. Zeeb } __packed;
772*bfcc09ddSBjoern A. Zeeb 
773*bfcc09ddSBjoern A. Zeeb /**
774*bfcc09ddSBjoern A. Zeeb  * iwl_fw_dbg_trigger_stats - configures trigger for statistics
775*bfcc09ddSBjoern A. Zeeb  * @stop_offset: the offset of the value to be monitored
776*bfcc09ddSBjoern A. Zeeb  * @stop_threshold: the threshold above which to collect
777*bfcc09ddSBjoern A. Zeeb  * @start_offset: the offset of the value to be monitored
778*bfcc09ddSBjoern A. Zeeb  * @start_threshold: the threshold above which to start recording
779*bfcc09ddSBjoern A. Zeeb  */
780*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_stats {
781*bfcc09ddSBjoern A. Zeeb 	__le32 stop_offset;
782*bfcc09ddSBjoern A. Zeeb 	__le32 stop_threshold;
783*bfcc09ddSBjoern A. Zeeb 	__le32 start_offset;
784*bfcc09ddSBjoern A. Zeeb 	__le32 start_threshold;
785*bfcc09ddSBjoern A. Zeeb } __packed;
786*bfcc09ddSBjoern A. Zeeb 
787*bfcc09ddSBjoern A. Zeeb /**
788*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
789*bfcc09ddSBjoern A. Zeeb  * @rssi: RSSI value to trigger at
790*bfcc09ddSBjoern A. Zeeb  */
791*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_low_rssi {
792*bfcc09ddSBjoern A. Zeeb 	__le32 rssi;
793*bfcc09ddSBjoern A. Zeeb } __packed;
794*bfcc09ddSBjoern A. Zeeb 
795*bfcc09ddSBjoern A. Zeeb /**
796*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
797*bfcc09ddSBjoern A. Zeeb  * @stop_auth_denied: number of denied authentication to collect
798*bfcc09ddSBjoern A. Zeeb  * @stop_auth_timeout: number of authentication timeout to collect
799*bfcc09ddSBjoern A. Zeeb  * @stop_rx_deauth: number of Rx deauth before to collect
800*bfcc09ddSBjoern A. Zeeb  * @stop_tx_deauth: number of Tx deauth before to collect
801*bfcc09ddSBjoern A. Zeeb  * @stop_assoc_denied: number of denied association to collect
802*bfcc09ddSBjoern A. Zeeb  * @stop_assoc_timeout: number of association timeout to collect
803*bfcc09ddSBjoern A. Zeeb  * @stop_connection_loss: number of connection loss to collect
804*bfcc09ddSBjoern A. Zeeb  * @start_auth_denied: number of denied authentication to start recording
805*bfcc09ddSBjoern A. Zeeb  * @start_auth_timeout: number of authentication timeout to start recording
806*bfcc09ddSBjoern A. Zeeb  * @start_rx_deauth: number of Rx deauth to start recording
807*bfcc09ddSBjoern A. Zeeb  * @start_tx_deauth: number of Tx deauth to start recording
808*bfcc09ddSBjoern A. Zeeb  * @start_assoc_denied: number of denied association to start recording
809*bfcc09ddSBjoern A. Zeeb  * @start_assoc_timeout: number of association timeout to start recording
810*bfcc09ddSBjoern A. Zeeb  * @start_connection_loss: number of connection loss to start recording
811*bfcc09ddSBjoern A. Zeeb  */
812*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_mlme {
813*bfcc09ddSBjoern A. Zeeb 	u8 stop_auth_denied;
814*bfcc09ddSBjoern A. Zeeb 	u8 stop_auth_timeout;
815*bfcc09ddSBjoern A. Zeeb 	u8 stop_rx_deauth;
816*bfcc09ddSBjoern A. Zeeb 	u8 stop_tx_deauth;
817*bfcc09ddSBjoern A. Zeeb 
818*bfcc09ddSBjoern A. Zeeb 	u8 stop_assoc_denied;
819*bfcc09ddSBjoern A. Zeeb 	u8 stop_assoc_timeout;
820*bfcc09ddSBjoern A. Zeeb 	u8 stop_connection_loss;
821*bfcc09ddSBjoern A. Zeeb 	u8 reserved;
822*bfcc09ddSBjoern A. Zeeb 
823*bfcc09ddSBjoern A. Zeeb 	u8 start_auth_denied;
824*bfcc09ddSBjoern A. Zeeb 	u8 start_auth_timeout;
825*bfcc09ddSBjoern A. Zeeb 	u8 start_rx_deauth;
826*bfcc09ddSBjoern A. Zeeb 	u8 start_tx_deauth;
827*bfcc09ddSBjoern A. Zeeb 
828*bfcc09ddSBjoern A. Zeeb 	u8 start_assoc_denied;
829*bfcc09ddSBjoern A. Zeeb 	u8 start_assoc_timeout;
830*bfcc09ddSBjoern A. Zeeb 	u8 start_connection_loss;
831*bfcc09ddSBjoern A. Zeeb 	u8 reserved2;
832*bfcc09ddSBjoern A. Zeeb } __packed;
833*bfcc09ddSBjoern A. Zeeb 
834*bfcc09ddSBjoern A. Zeeb /**
835*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
836*bfcc09ddSBjoern A. Zeeb  * @command_queue: timeout for the command queue in ms
837*bfcc09ddSBjoern A. Zeeb  * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
838*bfcc09ddSBjoern A. Zeeb  * @softap: timeout for the queues of a softAP in ms
839*bfcc09ddSBjoern A. Zeeb  * @p2p_go: timeout for the queues of a P2P GO in ms
840*bfcc09ddSBjoern A. Zeeb  * @p2p_client: timeout for the queues of a P2P client in ms
841*bfcc09ddSBjoern A. Zeeb  * @p2p_device: timeout for the queues of a P2P device in ms
842*bfcc09ddSBjoern A. Zeeb  * @ibss: timeout for the queues of an IBSS in ms
843*bfcc09ddSBjoern A. Zeeb  * @tdls: timeout for the queues of a TDLS station in ms
844*bfcc09ddSBjoern A. Zeeb  */
845*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_txq_timer {
846*bfcc09ddSBjoern A. Zeeb 	__le32 command_queue;
847*bfcc09ddSBjoern A. Zeeb 	__le32 bss;
848*bfcc09ddSBjoern A. Zeeb 	__le32 softap;
849*bfcc09ddSBjoern A. Zeeb 	__le32 p2p_go;
850*bfcc09ddSBjoern A. Zeeb 	__le32 p2p_client;
851*bfcc09ddSBjoern A. Zeeb 	__le32 p2p_device;
852*bfcc09ddSBjoern A. Zeeb 	__le32 ibss;
853*bfcc09ddSBjoern A. Zeeb 	__le32 tdls;
854*bfcc09ddSBjoern A. Zeeb 	__le32 reserved[4];
855*bfcc09ddSBjoern A. Zeeb } __packed;
856*bfcc09ddSBjoern A. Zeeb 
857*bfcc09ddSBjoern A. Zeeb /**
858*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
859*bfcc09ddSBjoern A. Zeeb  * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
860*bfcc09ddSBjoern A. Zeeb  *	trigger each time a time event notification that relates to time event
861*bfcc09ddSBjoern A. Zeeb  *	id with one of the actions in the bitmap is received and
862*bfcc09ddSBjoern A. Zeeb  *	BIT(notif->status) is set in status_bitmap.
863*bfcc09ddSBjoern A. Zeeb  *
864*bfcc09ddSBjoern A. Zeeb  */
865*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_time_event {
866*bfcc09ddSBjoern A. Zeeb 	struct {
867*bfcc09ddSBjoern A. Zeeb 		__le32 id;
868*bfcc09ddSBjoern A. Zeeb 		__le32 action_bitmap;
869*bfcc09ddSBjoern A. Zeeb 		__le32 status_bitmap;
870*bfcc09ddSBjoern A. Zeeb 	} __packed time_events[16];
871*bfcc09ddSBjoern A. Zeeb } __packed;
872*bfcc09ddSBjoern A. Zeeb 
873*bfcc09ddSBjoern A. Zeeb /**
874*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
875*bfcc09ddSBjoern A. Zeeb  * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
876*bfcc09ddSBjoern A. Zeeb  *	when an Rx BlockAck session is started.
877*bfcc09ddSBjoern A. Zeeb  * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
878*bfcc09ddSBjoern A. Zeeb  *	when an Rx BlockAck session is stopped.
879*bfcc09ddSBjoern A. Zeeb  * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
880*bfcc09ddSBjoern A. Zeeb  *	when a Tx BlockAck session is started.
881*bfcc09ddSBjoern A. Zeeb  * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
882*bfcc09ddSBjoern A. Zeeb  *	when a Tx BlockAck session is stopped.
883*bfcc09ddSBjoern A. Zeeb  * rx_bar: tid bitmap to configure on what tid the trigger should occur
884*bfcc09ddSBjoern A. Zeeb  *	when a BAR is received (for a Tx BlockAck session).
885*bfcc09ddSBjoern A. Zeeb  * tx_bar: tid bitmap to configure on what tid the trigger should occur
886*bfcc09ddSBjoern A. Zeeb  *	when a BAR is send (for an Rx BlocAck session).
887*bfcc09ddSBjoern A. Zeeb  * frame_timeout: tid bitmap to configure on what tid the trigger should occur
888*bfcc09ddSBjoern A. Zeeb  *	when a frame times out in the reordering buffer.
889*bfcc09ddSBjoern A. Zeeb  */
890*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_ba {
891*bfcc09ddSBjoern A. Zeeb 	__le16 rx_ba_start;
892*bfcc09ddSBjoern A. Zeeb 	__le16 rx_ba_stop;
893*bfcc09ddSBjoern A. Zeeb 	__le16 tx_ba_start;
894*bfcc09ddSBjoern A. Zeeb 	__le16 tx_ba_stop;
895*bfcc09ddSBjoern A. Zeeb 	__le16 rx_bar;
896*bfcc09ddSBjoern A. Zeeb 	__le16 tx_bar;
897*bfcc09ddSBjoern A. Zeeb 	__le16 frame_timeout;
898*bfcc09ddSBjoern A. Zeeb } __packed;
899*bfcc09ddSBjoern A. Zeeb 
900*bfcc09ddSBjoern A. Zeeb /**
901*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
902*bfcc09ddSBjoern A. Zeeb  * @action_bitmap: the TDLS action to trigger the collection upon
903*bfcc09ddSBjoern A. Zeeb  * @peer_mode: trigger on specific peer or all
904*bfcc09ddSBjoern A. Zeeb  * @peer: the TDLS peer to trigger the collection on
905*bfcc09ddSBjoern A. Zeeb  */
906*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_tdls {
907*bfcc09ddSBjoern A. Zeeb 	u8 action_bitmap;
908*bfcc09ddSBjoern A. Zeeb 	u8 peer_mode;
909*bfcc09ddSBjoern A. Zeeb 	u8 peer[ETH_ALEN];
910*bfcc09ddSBjoern A. Zeeb 	u8 reserved[4];
911*bfcc09ddSBjoern A. Zeeb } __packed;
912*bfcc09ddSBjoern A. Zeeb 
913*bfcc09ddSBjoern A. Zeeb /**
914*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
915*bfcc09ddSBjoern A. Zeeb  *  status.
916*bfcc09ddSBjoern A. Zeeb  * @statuses: the list of statuses to trigger the collection on
917*bfcc09ddSBjoern A. Zeeb  */
918*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_trigger_tx_status {
919*bfcc09ddSBjoern A. Zeeb 	struct tx_status {
920*bfcc09ddSBjoern A. Zeeb 		u8 status;
921*bfcc09ddSBjoern A. Zeeb 		u8 reserved[3];
922*bfcc09ddSBjoern A. Zeeb 	} __packed statuses[16];
923*bfcc09ddSBjoern A. Zeeb 	__le32 reserved[2];
924*bfcc09ddSBjoern A. Zeeb } __packed;
925*bfcc09ddSBjoern A. Zeeb 
926*bfcc09ddSBjoern A. Zeeb /**
927*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
928*bfcc09ddSBjoern A. Zeeb  * @id: conf id
929*bfcc09ddSBjoern A. Zeeb  * @usniffer: should the uSniffer image be used
930*bfcc09ddSBjoern A. Zeeb  * @num_of_hcmds: how many HCMDs to send are present here
931*bfcc09ddSBjoern A. Zeeb  * @hcmd: a variable length host command to be sent to apply the configuration.
932*bfcc09ddSBjoern A. Zeeb  *	If there is more than one HCMD to send, they will appear one after the
933*bfcc09ddSBjoern A. Zeeb  *	other and be sent in the order that they appear in.
934*bfcc09ddSBjoern A. Zeeb  * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
935*bfcc09ddSBjoern A. Zeeb  * %FW_DBG_CONF_MAX configuration per run.
936*bfcc09ddSBjoern A. Zeeb  */
937*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dbg_conf_tlv {
938*bfcc09ddSBjoern A. Zeeb 	u8 id;
939*bfcc09ddSBjoern A. Zeeb 	u8 usniffer;
940*bfcc09ddSBjoern A. Zeeb 	u8 reserved;
941*bfcc09ddSBjoern A. Zeeb 	u8 num_of_hcmds;
942*bfcc09ddSBjoern A. Zeeb 	struct iwl_fw_dbg_conf_hcmd hcmd;
943*bfcc09ddSBjoern A. Zeeb } __packed;
944*bfcc09ddSBjoern A. Zeeb 
945*bfcc09ddSBjoern A. Zeeb #define IWL_FW_CMD_VER_UNKNOWN 99
946*bfcc09ddSBjoern A. Zeeb 
947*bfcc09ddSBjoern A. Zeeb /**
948*bfcc09ddSBjoern A. Zeeb  * struct iwl_fw_cmd_version - firmware command version entry
949*bfcc09ddSBjoern A. Zeeb  * @cmd: command ID
950*bfcc09ddSBjoern A. Zeeb  * @group: group ID
951*bfcc09ddSBjoern A. Zeeb  * @cmd_ver: command version
952*bfcc09ddSBjoern A. Zeeb  * @notif_ver: notification version
953*bfcc09ddSBjoern A. Zeeb  */
954*bfcc09ddSBjoern A. Zeeb struct iwl_fw_cmd_version {
955*bfcc09ddSBjoern A. Zeeb 	u8 cmd;
956*bfcc09ddSBjoern A. Zeeb 	u8 group;
957*bfcc09ddSBjoern A. Zeeb 	u8 cmd_ver;
958*bfcc09ddSBjoern A. Zeeb 	u8 notif_ver;
959*bfcc09ddSBjoern A. Zeeb } __packed;
960*bfcc09ddSBjoern A. Zeeb 
961*bfcc09ddSBjoern A. Zeeb struct iwl_fw_tcm_error_addr {
962*bfcc09ddSBjoern A. Zeeb 	__le32 addr;
963*bfcc09ddSBjoern A. Zeeb }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
964*bfcc09ddSBjoern A. Zeeb 
965*bfcc09ddSBjoern A. Zeeb struct iwl_fw_dump_exclude {
966*bfcc09ddSBjoern A. Zeeb 	__le32 addr, size;
967*bfcc09ddSBjoern A. Zeeb };
968*bfcc09ddSBjoern A. Zeeb 
969*bfcc09ddSBjoern A. Zeeb static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
970*bfcc09ddSBjoern A. Zeeb 					size_t fixed_size, size_t var_size)
971*bfcc09ddSBjoern A. Zeeb {
972*bfcc09ddSBjoern A. Zeeb 	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
973*bfcc09ddSBjoern A. Zeeb 
974*bfcc09ddSBjoern A. Zeeb 	if (WARN_ON(var_len % var_size))
975*bfcc09ddSBjoern A. Zeeb 		return 0;
976*bfcc09ddSBjoern A. Zeeb 
977*bfcc09ddSBjoern A. Zeeb 	return var_len / var_size;
978*bfcc09ddSBjoern A. Zeeb }
979*bfcc09ddSBjoern A. Zeeb 
980*bfcc09ddSBjoern A. Zeeb #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
981*bfcc09ddSBjoern A. Zeeb 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
982*bfcc09ddSBjoern A. Zeeb 			   sizeof(_struct_ptr->_memb[0]))
983*bfcc09ddSBjoern A. Zeeb 
984*bfcc09ddSBjoern A. Zeeb #endif  /* __iwl_fw_file_h__ */
985