1bfcc09ddSBjoern A. Zeeb /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2bfcc09ddSBjoern A. Zeeb /* 3*d9836fb4SBjoern A. Zeeb * Copyright (C) 2012-2014, 2018-2022 Intel Corporation 4bfcc09ddSBjoern A. Zeeb * Copyright (C) 2017 Intel Deutschland GmbH 5bfcc09ddSBjoern A. Zeeb */ 6bfcc09ddSBjoern A. Zeeb #ifndef __iwl_fw_api_rs_h__ 7bfcc09ddSBjoern A. Zeeb #define __iwl_fw_api_rs_h__ 8bfcc09ddSBjoern A. Zeeb 9bfcc09ddSBjoern A. Zeeb #include "mac.h" 10bfcc09ddSBjoern A. Zeeb 11bfcc09ddSBjoern A. Zeeb /** 12bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 13bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for 14bfcc09ddSBjoern A. Zeeb * bandwidths <= 80MHz 15bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 16bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz 17bfcc09ddSBjoern A. Zeeb * bandwidth 18bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation 19bfcc09ddSBjoern A. Zeeb * for BPSK (MCS 0) with 1 spatial 20bfcc09ddSBjoern A. Zeeb * stream 21bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation 22bfcc09ddSBjoern A. Zeeb * for BPSK (MCS 0) with 2 spatial 23bfcc09ddSBjoern A. Zeeb * streams 24bfcc09ddSBjoern A. Zeeb */ 25bfcc09ddSBjoern A. Zeeb enum iwl_tlc_mng_cfg_flags { 26bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 27bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 28bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2), 29bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3), 30bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4), 31bfcc09ddSBjoern A. Zeeb }; 32bfcc09ddSBjoern A. Zeeb 33bfcc09ddSBjoern A. Zeeb /** 34bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_mng_cfg_cw - channel width options 35bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 36bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 37bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 38bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 39bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 40bfcc09ddSBjoern A. Zeeb */ 41bfcc09ddSBjoern A. Zeeb enum iwl_tlc_mng_cfg_cw { 42bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CH_WIDTH_20MHZ, 43bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CH_WIDTH_40MHZ, 44bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CH_WIDTH_80MHZ, 45bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CH_WIDTH_160MHZ, 46bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 47bfcc09ddSBjoern A. Zeeb }; 48bfcc09ddSBjoern A. Zeeb 49bfcc09ddSBjoern A. Zeeb /** 50bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_mng_cfg_chains - possible chains 51bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 52bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 53bfcc09ddSBjoern A. Zeeb */ 54bfcc09ddSBjoern A. Zeeb enum iwl_tlc_mng_cfg_chains { 55bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 56bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 57bfcc09ddSBjoern A. Zeeb }; 58bfcc09ddSBjoern A. Zeeb 59bfcc09ddSBjoern A. Zeeb /** 60bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_mng_cfg_mode - supported modes 61bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_CCK: enable CCK 62bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 63bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 64bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_HT: enable HT 65bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_VHT: enable VHT 66bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_HE: enable HE 67bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_INVALID: invalid value 68bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 69bfcc09ddSBjoern A. Zeeb */ 70bfcc09ddSBjoern A. Zeeb enum iwl_tlc_mng_cfg_mode { 71bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_CCK = 0, 72bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 73bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 74bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_HT, 75bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_VHT, 76bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_HE, 77bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_INVALID, 78bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 79bfcc09ddSBjoern A. Zeeb }; 80bfcc09ddSBjoern A. Zeeb 81bfcc09ddSBjoern A. Zeeb /** 82bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 83bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 84bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 85bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 86bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 87bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 88bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 89bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 90bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 91bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 92bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 93bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 94bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 95bfcc09ddSBjoern A. Zeeb * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 96bfcc09ddSBjoern A. Zeeb */ 97bfcc09ddSBjoern A. Zeeb enum iwl_tlc_mng_ht_rates { 98bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS0 = 0, 99bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS1, 100bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS2, 101bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS3, 102bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS4, 103bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS5, 104bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS6, 105bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS7, 106bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS8, 107bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS9, 108bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS10, 109bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MCS11, 110bfcc09ddSBjoern A. Zeeb IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 111bfcc09ddSBjoern A. Zeeb }; 112bfcc09ddSBjoern A. Zeeb 113bfcc09ddSBjoern A. Zeeb enum IWL_TLC_MNG_NSS { 114bfcc09ddSBjoern A. Zeeb IWL_TLC_NSS_1, 115bfcc09ddSBjoern A. Zeeb IWL_TLC_NSS_2, 116bfcc09ddSBjoern A. Zeeb IWL_TLC_NSS_MAX 117bfcc09ddSBjoern A. Zeeb }; 118bfcc09ddSBjoern A. Zeeb 119*d9836fb4SBjoern A. Zeeb /** 120*d9836fb4SBjoern A. Zeeb * enum IWL_TLC_MCS_PER_BW - mcs index per BW 121*d9836fb4SBjoern A. Zeeb * @IWL_TLC_MCS_PER_BW_80: mcs for bw - 20Hhz, 40Hhz, 80Hhz 122*d9836fb4SBjoern A. Zeeb * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz 123*d9836fb4SBjoern A. Zeeb * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz 124*d9836fb4SBjoern A. Zeeb * @IWL_TLC_MCS_PER_BW_NUM_V3: number of entries up to version 3 125*d9836fb4SBjoern A. Zeeb * @IWL_TLC_MCS_PER_BW_NUM_V4: number of entries from version 4 126*d9836fb4SBjoern A. Zeeb */ 127*d9836fb4SBjoern A. Zeeb enum IWL_TLC_MCS_PER_BW { 128*d9836fb4SBjoern A. Zeeb IWL_TLC_MCS_PER_BW_80, 129*d9836fb4SBjoern A. Zeeb IWL_TLC_MCS_PER_BW_160, 130*d9836fb4SBjoern A. Zeeb IWL_TLC_MCS_PER_BW_320, 131*d9836fb4SBjoern A. Zeeb IWL_TLC_MCS_PER_BW_NUM_V3 = IWL_TLC_MCS_PER_BW_160 + 1, 132*d9836fb4SBjoern A. Zeeb IWL_TLC_MCS_PER_BW_NUM_V4 = IWL_TLC_MCS_PER_BW_320 + 1, 133bfcc09ddSBjoern A. Zeeb }; 134bfcc09ddSBjoern A. Zeeb 135bfcc09ddSBjoern A. Zeeb /** 136*d9836fb4SBjoern A. Zeeb * struct iwl_tlc_config_cmd_v3 - TLC configuration 137bfcc09ddSBjoern A. Zeeb * @sta_id: station id 138bfcc09ddSBjoern A. Zeeb * @reserved1: reserved 139bfcc09ddSBjoern A. Zeeb * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 140bfcc09ddSBjoern A. Zeeb * @mode: &enum iwl_tlc_mng_cfg_mode 141bfcc09ddSBjoern A. Zeeb * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 142bfcc09ddSBjoern A. Zeeb * @amsdu: TX amsdu is supported 143bfcc09ddSBjoern A. Zeeb * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 144bfcc09ddSBjoern A. Zeeb * @non_ht_rates: bitmap of supported legacy rates 145*d9836fb4SBjoern A. Zeeb * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per &enum IWL_TLC_MCS_PER_BW 146*d9836fb4SBjoern A. Zeeb * <nss, channel-width> pair (0 - 80mhz width and below, 1 - 160mhz). 147bfcc09ddSBjoern A. Zeeb * @max_mpdu_len: max MPDU length, in bytes 148bfcc09ddSBjoern A. Zeeb * @sgi_ch_width_supp: bitmap of SGI support per channel width 149bfcc09ddSBjoern A. Zeeb * use BIT(@enum iwl_tlc_mng_cfg_cw) 150bfcc09ddSBjoern A. Zeeb * @reserved2: reserved 151bfcc09ddSBjoern A. Zeeb * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), 152bfcc09ddSBjoern A. Zeeb * set zero for no limit. 153bfcc09ddSBjoern A. Zeeb */ 154*d9836fb4SBjoern A. Zeeb struct iwl_tlc_config_cmd_v3 { 155bfcc09ddSBjoern A. Zeeb u8 sta_id; 156bfcc09ddSBjoern A. Zeeb u8 reserved1[3]; 157bfcc09ddSBjoern A. Zeeb u8 max_ch_width; 158bfcc09ddSBjoern A. Zeeb u8 mode; 159bfcc09ddSBjoern A. Zeeb u8 chains; 160bfcc09ddSBjoern A. Zeeb u8 amsdu; 161bfcc09ddSBjoern A. Zeeb __le16 flags; 162bfcc09ddSBjoern A. Zeeb __le16 non_ht_rates; 163*d9836fb4SBjoern A. Zeeb __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V3]; 164bfcc09ddSBjoern A. Zeeb __le16 max_mpdu_len; 165bfcc09ddSBjoern A. Zeeb u8 sgi_ch_width_supp; 166bfcc09ddSBjoern A. Zeeb u8 reserved2; 167bfcc09ddSBjoern A. Zeeb __le32 max_tx_op; 168bfcc09ddSBjoern A. Zeeb } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */ 169bfcc09ddSBjoern A. Zeeb 170bfcc09ddSBjoern A. Zeeb /** 171*d9836fb4SBjoern A. Zeeb * struct iwl_tlc_config_cmd_v4 - TLC configuration 172*d9836fb4SBjoern A. Zeeb * @sta_id: station id 173*d9836fb4SBjoern A. Zeeb * @reserved1: reserved 174*d9836fb4SBjoern A. Zeeb * @max_ch_width: max supported channel width from &enum iwl_tlc_mng_cfg_cw 175*d9836fb4SBjoern A. Zeeb * @mode: &enum iwl_tlc_mng_cfg_mode 176*d9836fb4SBjoern A. Zeeb * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 177*d9836fb4SBjoern A. Zeeb * @sgi_ch_width_supp: bitmap of SGI support per channel width 178*d9836fb4SBjoern A. Zeeb * use BIT(&enum iwl_tlc_mng_cfg_cw) 179*d9836fb4SBjoern A. Zeeb * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 180*d9836fb4SBjoern A. Zeeb * @non_ht_rates: bitmap of supported legacy rates 181*d9836fb4SBjoern A. Zeeb * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 182*d9836fb4SBjoern A. Zeeb * pair (0 - 80mhz width and below, 1 - 160mhz, 2 - 320mhz). 183*d9836fb4SBjoern A. Zeeb * @max_mpdu_len: max MPDU length, in bytes 184*d9836fb4SBjoern A. Zeeb * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), 185*d9836fb4SBjoern A. Zeeb * set zero for no limit. 186*d9836fb4SBjoern A. Zeeb */ 187*d9836fb4SBjoern A. Zeeb struct iwl_tlc_config_cmd_v4 { 188*d9836fb4SBjoern A. Zeeb u8 sta_id; 189*d9836fb4SBjoern A. Zeeb u8 reserved1[3]; 190*d9836fb4SBjoern A. Zeeb u8 max_ch_width; 191*d9836fb4SBjoern A. Zeeb u8 mode; 192*d9836fb4SBjoern A. Zeeb u8 chains; 193*d9836fb4SBjoern A. Zeeb u8 sgi_ch_width_supp; 194*d9836fb4SBjoern A. Zeeb __le16 flags; 195*d9836fb4SBjoern A. Zeeb __le16 non_ht_rates; 196*d9836fb4SBjoern A. Zeeb __le16 ht_rates[IWL_TLC_NSS_MAX][IWL_TLC_MCS_PER_BW_NUM_V4]; 197*d9836fb4SBjoern A. Zeeb __le16 max_mpdu_len; 198*d9836fb4SBjoern A. Zeeb __le16 max_tx_op; 199*d9836fb4SBjoern A. Zeeb } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_4 */ 200*d9836fb4SBjoern A. Zeeb 201*d9836fb4SBjoern A. Zeeb /** 202bfcc09ddSBjoern A. Zeeb * enum iwl_tlc_update_flags - updated fields 203bfcc09ddSBjoern A. Zeeb * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 204bfcc09ddSBjoern A. Zeeb * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 205bfcc09ddSBjoern A. Zeeb */ 206bfcc09ddSBjoern A. Zeeb enum iwl_tlc_update_flags { 207bfcc09ddSBjoern A. Zeeb IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 208bfcc09ddSBjoern A. Zeeb IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 209bfcc09ddSBjoern A. Zeeb }; 210bfcc09ddSBjoern A. Zeeb 211bfcc09ddSBjoern A. Zeeb /** 212bfcc09ddSBjoern A. Zeeb * struct iwl_tlc_update_notif - TLC notification from FW 213bfcc09ddSBjoern A. Zeeb * @sta_id: station id 214bfcc09ddSBjoern A. Zeeb * @reserved: reserved 215bfcc09ddSBjoern A. Zeeb * @flags: bitmap of notifications reported 216bfcc09ddSBjoern A. Zeeb * @rate: current initial rate 217bfcc09ddSBjoern A. Zeeb * @amsdu_size: Max AMSDU size, in bytes 218bfcc09ddSBjoern A. Zeeb * @amsdu_enabled: bitmap for per-TID AMSDU enablement 219bfcc09ddSBjoern A. Zeeb */ 220bfcc09ddSBjoern A. Zeeb struct iwl_tlc_update_notif { 221bfcc09ddSBjoern A. Zeeb u8 sta_id; 222bfcc09ddSBjoern A. Zeeb u8 reserved[3]; 223bfcc09ddSBjoern A. Zeeb __le32 flags; 224bfcc09ddSBjoern A. Zeeb __le32 rate; 225bfcc09ddSBjoern A. Zeeb __le32 amsdu_size; 226bfcc09ddSBjoern A. Zeeb __le32 amsdu_enabled; 227bfcc09ddSBjoern A. Zeeb } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 228bfcc09ddSBjoern A. Zeeb 229bfcc09ddSBjoern A. Zeeb 230bfcc09ddSBjoern A. Zeeb #define IWL_MAX_MCS_DISPLAY_SIZE 12 231bfcc09ddSBjoern A. Zeeb 232bfcc09ddSBjoern A. Zeeb struct iwl_rate_mcs_info { 233bfcc09ddSBjoern A. Zeeb char mbps[IWL_MAX_MCS_DISPLAY_SIZE]; 234bfcc09ddSBjoern A. Zeeb char mcs[IWL_MAX_MCS_DISPLAY_SIZE]; 235bfcc09ddSBjoern A. Zeeb }; 236bfcc09ddSBjoern A. Zeeb 237bfcc09ddSBjoern A. Zeeb /* 238bfcc09ddSBjoern A. Zeeb * These serve as indexes into 239bfcc09ddSBjoern A. Zeeb * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 240bfcc09ddSBjoern A. Zeeb * TODO: avoid overlap between legacy and HT rates 241bfcc09ddSBjoern A. Zeeb */ 242bfcc09ddSBjoern A. Zeeb enum { 243bfcc09ddSBjoern A. Zeeb IWL_RATE_1M_INDEX = 0, 244bfcc09ddSBjoern A. Zeeb IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 245bfcc09ddSBjoern A. Zeeb IWL_RATE_2M_INDEX, 246bfcc09ddSBjoern A. Zeeb IWL_RATE_5M_INDEX, 247bfcc09ddSBjoern A. Zeeb IWL_RATE_11M_INDEX, 248bfcc09ddSBjoern A. Zeeb IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 249bfcc09ddSBjoern A. Zeeb IWL_RATE_6M_INDEX, 250bfcc09ddSBjoern A. Zeeb IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 251bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 252bfcc09ddSBjoern A. Zeeb IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 253bfcc09ddSBjoern A. Zeeb IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 254bfcc09ddSBjoern A. Zeeb IWL_RATE_9M_INDEX, 255bfcc09ddSBjoern A. Zeeb IWL_RATE_12M_INDEX, 256bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 257bfcc09ddSBjoern A. Zeeb IWL_RATE_18M_INDEX, 258bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 259bfcc09ddSBjoern A. Zeeb IWL_RATE_24M_INDEX, 260bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 261bfcc09ddSBjoern A. Zeeb IWL_RATE_36M_INDEX, 262bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 263bfcc09ddSBjoern A. Zeeb IWL_RATE_48M_INDEX, 264bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 265bfcc09ddSBjoern A. Zeeb IWL_RATE_54M_INDEX, 266bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 267bfcc09ddSBjoern A. Zeeb IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 268bfcc09ddSBjoern A. Zeeb IWL_RATE_60M_INDEX, 269bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 270bfcc09ddSBjoern A. Zeeb IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 271bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_8_INDEX, 272bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_9_INDEX, 273bfcc09ddSBjoern A. Zeeb IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 274bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_10_INDEX, 275bfcc09ddSBjoern A. Zeeb IWL_RATE_MCS_11_INDEX, 276bfcc09ddSBjoern A. Zeeb IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, 277bfcc09ddSBjoern A. Zeeb IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 278bfcc09ddSBjoern A. Zeeb IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, 279bfcc09ddSBjoern A. Zeeb IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, 280bfcc09ddSBjoern A. Zeeb IWL_RATE_INVALID = IWL_RATE_COUNT, 281bfcc09ddSBjoern A. Zeeb }; 282bfcc09ddSBjoern A. Zeeb 283bfcc09ddSBjoern A. Zeeb #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 284bfcc09ddSBjoern A. Zeeb 285bfcc09ddSBjoern A. Zeeb /* fw API values for legacy bit rates, both OFDM and CCK */ 286bfcc09ddSBjoern A. Zeeb enum { 287bfcc09ddSBjoern A. Zeeb IWL_RATE_6M_PLCP = 13, 288bfcc09ddSBjoern A. Zeeb IWL_RATE_9M_PLCP = 15, 289bfcc09ddSBjoern A. Zeeb IWL_RATE_12M_PLCP = 5, 290bfcc09ddSBjoern A. Zeeb IWL_RATE_18M_PLCP = 7, 291bfcc09ddSBjoern A. Zeeb IWL_RATE_24M_PLCP = 9, 292bfcc09ddSBjoern A. Zeeb IWL_RATE_36M_PLCP = 11, 293bfcc09ddSBjoern A. Zeeb IWL_RATE_48M_PLCP = 1, 294bfcc09ddSBjoern A. Zeeb IWL_RATE_54M_PLCP = 3, 295bfcc09ddSBjoern A. Zeeb IWL_RATE_1M_PLCP = 10, 296bfcc09ddSBjoern A. Zeeb IWL_RATE_2M_PLCP = 20, 297bfcc09ddSBjoern A. Zeeb IWL_RATE_5M_PLCP = 55, 298bfcc09ddSBjoern A. Zeeb IWL_RATE_11M_PLCP = 110, 299bfcc09ddSBjoern A. Zeeb IWL_RATE_INVM_PLCP = -1, 300bfcc09ddSBjoern A. Zeeb }; 301bfcc09ddSBjoern A. Zeeb 302bfcc09ddSBjoern A. Zeeb /* 303bfcc09ddSBjoern A. Zeeb * rate_n_flags bit fields version 1 304bfcc09ddSBjoern A. Zeeb * 305bfcc09ddSBjoern A. Zeeb * The 32-bit value has different layouts in the low 8 bites depending on the 306bfcc09ddSBjoern A. Zeeb * format. There are three formats, HT, VHT and legacy (11abg, with subformats 307bfcc09ddSBjoern A. Zeeb * for CCK and OFDM). 308bfcc09ddSBjoern A. Zeeb * 309bfcc09ddSBjoern A. Zeeb * High-throughput (HT) rate format 310bfcc09ddSBjoern A. Zeeb * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 311bfcc09ddSBjoern A. Zeeb * Very High-throughput (VHT) rate format 312bfcc09ddSBjoern A. Zeeb * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 313bfcc09ddSBjoern A. Zeeb * Legacy OFDM rate format for bits 7:0 314bfcc09ddSBjoern A. Zeeb * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 315bfcc09ddSBjoern A. Zeeb * Legacy CCK rate format for bits 7:0: 316bfcc09ddSBjoern A. Zeeb * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 317bfcc09ddSBjoern A. Zeeb */ 318bfcc09ddSBjoern A. Zeeb 319bfcc09ddSBjoern A. Zeeb /* Bit 8: (1) HT format, (0) legacy or VHT format */ 320bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HT_POS 8 321bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HT_MSK_V1 BIT(RATE_MCS_HT_POS) 322bfcc09ddSBjoern A. Zeeb 323bfcc09ddSBjoern A. Zeeb /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 324bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CCK_POS_V1 9 325bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CCK_MSK_V1 BIT(RATE_MCS_CCK_POS_V1) 326bfcc09ddSBjoern A. Zeeb 327bfcc09ddSBjoern A. Zeeb /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 328bfcc09ddSBjoern A. Zeeb #define RATE_MCS_VHT_POS_V1 26 329bfcc09ddSBjoern A. Zeeb #define RATE_MCS_VHT_MSK_V1 BIT(RATE_MCS_VHT_POS_V1) 330bfcc09ddSBjoern A. Zeeb 331bfcc09ddSBjoern A. Zeeb 332bfcc09ddSBjoern A. Zeeb /* 333bfcc09ddSBjoern A. Zeeb * High-throughput (HT) rate format for bits 7:0 334bfcc09ddSBjoern A. Zeeb * 335bfcc09ddSBjoern A. Zeeb * 2-0: MCS rate base 336bfcc09ddSBjoern A. Zeeb * 0) 6 Mbps 337bfcc09ddSBjoern A. Zeeb * 1) 12 Mbps 338bfcc09ddSBjoern A. Zeeb * 2) 18 Mbps 339bfcc09ddSBjoern A. Zeeb * 3) 24 Mbps 340bfcc09ddSBjoern A. Zeeb * 4) 36 Mbps 341bfcc09ddSBjoern A. Zeeb * 5) 48 Mbps 342bfcc09ddSBjoern A. Zeeb * 6) 54 Mbps 343bfcc09ddSBjoern A. Zeeb * 7) 60 Mbps 344bfcc09ddSBjoern A. Zeeb * 4-3: 0) Single stream (SISO) 345bfcc09ddSBjoern A. Zeeb * 1) Dual stream (MIMO) 346bfcc09ddSBjoern A. Zeeb * 2) Triple stream (MIMO) 347bfcc09ddSBjoern A. Zeeb * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 348bfcc09ddSBjoern A. Zeeb * (bits 7-6 are zero) 349bfcc09ddSBjoern A. Zeeb * 350bfcc09ddSBjoern A. Zeeb * Together the low 5 bits work out to the MCS index because we don't 351bfcc09ddSBjoern A. Zeeb * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 352bfcc09ddSBjoern A. Zeeb * streams and 16-23 have three streams. We could also support MCS 32 353bfcc09ddSBjoern A. Zeeb * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 354bfcc09ddSBjoern A. Zeeb */ 355bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_RATE_CODE_MSK_V1 0x7 356bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_NSS_POS_V1 3 357bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_NSS_MSK_V1 (3 << RATE_HT_MCS_NSS_POS_V1) 358bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_MIMO2_MSK BIT(RATE_HT_MCS_NSS_POS_V1) 359bfcc09ddSBjoern A. Zeeb 360bfcc09ddSBjoern A. Zeeb /* Bit 10: (1) Use Green Field preamble */ 361bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_GF_POS 10 362bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 363bfcc09ddSBjoern A. Zeeb 364bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_INDEX_MSK_V1 0x3f 365bfcc09ddSBjoern A. Zeeb 366bfcc09ddSBjoern A. Zeeb /* 367bfcc09ddSBjoern A. Zeeb * Very High-throughput (VHT) rate format for bits 7:0 368bfcc09ddSBjoern A. Zeeb * 369bfcc09ddSBjoern A. Zeeb * 3-0: VHT MCS (0-9) 370bfcc09ddSBjoern A. Zeeb * 5-4: number of streams - 1: 371bfcc09ddSBjoern A. Zeeb * 0) Single stream (SISO) 372bfcc09ddSBjoern A. Zeeb * 1) Dual stream (MIMO) 373bfcc09ddSBjoern A. Zeeb * 2) Triple stream (MIMO) 374bfcc09ddSBjoern A. Zeeb */ 375bfcc09ddSBjoern A. Zeeb 376bfcc09ddSBjoern A. Zeeb /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 377bfcc09ddSBjoern A. Zeeb #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 378bfcc09ddSBjoern A. Zeeb #define RATE_VHT_MCS_NSS_POS 4 379bfcc09ddSBjoern A. Zeeb #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 380bfcc09ddSBjoern A. Zeeb #define RATE_VHT_MCS_MIMO2_MSK BIT(RATE_VHT_MCS_NSS_POS) 381bfcc09ddSBjoern A. Zeeb 382bfcc09ddSBjoern A. Zeeb /* 383bfcc09ddSBjoern A. Zeeb * Legacy OFDM rate format for bits 7:0 384bfcc09ddSBjoern A. Zeeb * 385bfcc09ddSBjoern A. Zeeb * 3-0: 0xD) 6 Mbps 386bfcc09ddSBjoern A. Zeeb * 0xF) 9 Mbps 387bfcc09ddSBjoern A. Zeeb * 0x5) 12 Mbps 388bfcc09ddSBjoern A. Zeeb * 0x7) 18 Mbps 389bfcc09ddSBjoern A. Zeeb * 0x9) 24 Mbps 390bfcc09ddSBjoern A. Zeeb * 0xB) 36 Mbps 391bfcc09ddSBjoern A. Zeeb * 0x1) 48 Mbps 392bfcc09ddSBjoern A. Zeeb * 0x3) 54 Mbps 393bfcc09ddSBjoern A. Zeeb * (bits 7-4 are 0) 394bfcc09ddSBjoern A. Zeeb * 395bfcc09ddSBjoern A. Zeeb * Legacy CCK rate format for bits 7:0: 396bfcc09ddSBjoern A. Zeeb * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 397bfcc09ddSBjoern A. Zeeb * 398bfcc09ddSBjoern A. Zeeb * 6-0: 10) 1 Mbps 399bfcc09ddSBjoern A. Zeeb * 20) 2 Mbps 400bfcc09ddSBjoern A. Zeeb * 55) 5.5 Mbps 401bfcc09ddSBjoern A. Zeeb * 110) 11 Mbps 402bfcc09ddSBjoern A. Zeeb * (bit 7 is 0) 403bfcc09ddSBjoern A. Zeeb */ 404bfcc09ddSBjoern A. Zeeb #define RATE_LEGACY_RATE_MSK_V1 0xff 405bfcc09ddSBjoern A. Zeeb 406bfcc09ddSBjoern A. Zeeb /* Bit 10 - OFDM HE */ 407bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_POS_V1 10 408bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_MSK_V1 BIT(RATE_MCS_HE_POS_V1) 409bfcc09ddSBjoern A. Zeeb 410bfcc09ddSBjoern A. Zeeb /* 411bfcc09ddSBjoern A. Zeeb * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 412bfcc09ddSBjoern A. Zeeb * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 413bfcc09ddSBjoern A. Zeeb */ 414bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_POS 11 415bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_MSK_V1 (3 << RATE_MCS_CHAN_WIDTH_POS) 416bfcc09ddSBjoern A. Zeeb 417bfcc09ddSBjoern A. Zeeb /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 418bfcc09ddSBjoern A. Zeeb #define RATE_MCS_SGI_POS_V1 13 419bfcc09ddSBjoern A. Zeeb #define RATE_MCS_SGI_MSK_V1 BIT(RATE_MCS_SGI_POS_V1) 420bfcc09ddSBjoern A. Zeeb 421bfcc09ddSBjoern A. Zeeb /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 422bfcc09ddSBjoern A. Zeeb #define RATE_MCS_ANT_POS 14 423bfcc09ddSBjoern A. Zeeb #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 424bfcc09ddSBjoern A. Zeeb #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 425bfcc09ddSBjoern A. Zeeb #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 426bfcc09ddSBjoern A. Zeeb RATE_MCS_ANT_B_MSK) 427bfcc09ddSBjoern A. Zeeb #define RATE_MCS_ANT_MSK RATE_MCS_ANT_AB_MSK 428bfcc09ddSBjoern A. Zeeb 429bfcc09ddSBjoern A. Zeeb /* Bit 17: (0) SS, (1) SS*2 */ 430bfcc09ddSBjoern A. Zeeb #define RATE_MCS_STBC_POS 17 431bfcc09ddSBjoern A. Zeeb #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 432bfcc09ddSBjoern A. Zeeb 433bfcc09ddSBjoern A. Zeeb /* Bit 18: OFDM-HE dual carrier mode */ 434bfcc09ddSBjoern A. Zeeb #define RATE_HE_DUAL_CARRIER_MODE 18 435bfcc09ddSBjoern A. Zeeb #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 436bfcc09ddSBjoern A. Zeeb 437bfcc09ddSBjoern A. Zeeb /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 438bfcc09ddSBjoern A. Zeeb #define RATE_MCS_BF_POS 19 439bfcc09ddSBjoern A. Zeeb #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 440bfcc09ddSBjoern A. Zeeb 441bfcc09ddSBjoern A. Zeeb /* 442bfcc09ddSBjoern A. Zeeb * Bit 20-21: HE LTF type and guard interval 443bfcc09ddSBjoern A. Zeeb * HE (ext) SU: 444bfcc09ddSBjoern A. Zeeb * 0 1xLTF+0.8us 445bfcc09ddSBjoern A. Zeeb * 1 2xLTF+0.8us 446bfcc09ddSBjoern A. Zeeb * 2 2xLTF+1.6us 447bfcc09ddSBjoern A. Zeeb * 3 & SGI (bit 13) clear 4xLTF+3.2us 448bfcc09ddSBjoern A. Zeeb * 3 & SGI (bit 13) set 4xLTF+0.8us 449bfcc09ddSBjoern A. Zeeb * HE MU: 450bfcc09ddSBjoern A. Zeeb * 0 4xLTF+0.8us 451bfcc09ddSBjoern A. Zeeb * 1 2xLTF+0.8us 452bfcc09ddSBjoern A. Zeeb * 2 2xLTF+1.6us 453bfcc09ddSBjoern A. Zeeb * 3 4xLTF+3.2us 454bfcc09ddSBjoern A. Zeeb * HE TRIG: 455bfcc09ddSBjoern A. Zeeb * 0 1xLTF+1.6us 456bfcc09ddSBjoern A. Zeeb * 1 2xLTF+1.6us 457bfcc09ddSBjoern A. Zeeb * 2 4xLTF+3.2us 458bfcc09ddSBjoern A. Zeeb * 3 (does not occur) 459bfcc09ddSBjoern A. Zeeb */ 460bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_GI_LTF_POS 20 461bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_GI_LTF_MSK_V1 (3 << RATE_MCS_HE_GI_LTF_POS) 462bfcc09ddSBjoern A. Zeeb 463bfcc09ddSBjoern A. Zeeb /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 464bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_POS_V1 22 465bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_SU_V1 (0 << RATE_MCS_HE_TYPE_POS_V1) 466bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_EXT_SU_V1 BIT(RATE_MCS_HE_TYPE_POS_V1) 467bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_MU_V1 (2 << RATE_MCS_HE_TYPE_POS_V1) 468bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_TRIG_V1 (3 << RATE_MCS_HE_TYPE_POS_V1) 469bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_MSK_V1 (3 << RATE_MCS_HE_TYPE_POS_V1) 470bfcc09ddSBjoern A. Zeeb 471bfcc09ddSBjoern A. Zeeb /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 472bfcc09ddSBjoern A. Zeeb #define RATE_MCS_DUP_POS_V1 24 473bfcc09ddSBjoern A. Zeeb #define RATE_MCS_DUP_MSK_V1 (3 << RATE_MCS_DUP_POS_V1) 474bfcc09ddSBjoern A. Zeeb 475bfcc09ddSBjoern A. Zeeb /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 476bfcc09ddSBjoern A. Zeeb #define RATE_MCS_LDPC_POS_V1 27 477bfcc09ddSBjoern A. Zeeb #define RATE_MCS_LDPC_MSK_V1 BIT(RATE_MCS_LDPC_POS_V1) 478bfcc09ddSBjoern A. Zeeb 479bfcc09ddSBjoern A. Zeeb /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 480bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_106T_POS_V1 28 481bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_106T_MSK_V1 BIT(RATE_MCS_HE_106T_POS_V1) 482bfcc09ddSBjoern A. Zeeb 483bfcc09ddSBjoern A. Zeeb /* Bit 30-31: (1) RTS, (2) CTS */ 484bfcc09ddSBjoern A. Zeeb #define RATE_MCS_RTS_REQUIRED_POS (30) 485bfcc09ddSBjoern A. Zeeb #define RATE_MCS_RTS_REQUIRED_MSK (0x1 << RATE_MCS_RTS_REQUIRED_POS) 486bfcc09ddSBjoern A. Zeeb 487bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CTS_REQUIRED_POS (31) 488bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS) 489bfcc09ddSBjoern A. Zeeb 490bfcc09ddSBjoern A. Zeeb /* rate_n_flags bit field version 2 491bfcc09ddSBjoern A. Zeeb * 492bfcc09ddSBjoern A. Zeeb * The 32-bit value has different layouts in the low 8 bits depending on the 493bfcc09ddSBjoern A. Zeeb * format. There are three formats, HT, VHT and legacy (11abg, with subformats 494bfcc09ddSBjoern A. Zeeb * for CCK and OFDM). 495bfcc09ddSBjoern A. Zeeb * 496bfcc09ddSBjoern A. Zeeb */ 497bfcc09ddSBjoern A. Zeeb 498bfcc09ddSBjoern A. Zeeb /* Bits 10-8: rate format 499bfcc09ddSBjoern A. Zeeb * (0) Legacy CCK (1) Legacy OFDM (2) High-throughput (HT) 500bfcc09ddSBjoern A. Zeeb * (3) Very High-throughput (VHT) (4) High-efficiency (HE) 501bfcc09ddSBjoern A. Zeeb * (5) Extremely High-throughput (EHT) 502bfcc09ddSBjoern A. Zeeb */ 503bfcc09ddSBjoern A. Zeeb #define RATE_MCS_MOD_TYPE_POS 8 504bfcc09ddSBjoern A. Zeeb #define RATE_MCS_MOD_TYPE_MSK (0x7 << RATE_MCS_MOD_TYPE_POS) 505bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CCK_MSK (0 << RATE_MCS_MOD_TYPE_POS) 506bfcc09ddSBjoern A. Zeeb #define RATE_MCS_LEGACY_OFDM_MSK (1 << RATE_MCS_MOD_TYPE_POS) 507bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HT_MSK (2 << RATE_MCS_MOD_TYPE_POS) 508bfcc09ddSBjoern A. Zeeb #define RATE_MCS_VHT_MSK (3 << RATE_MCS_MOD_TYPE_POS) 509bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_MSK (4 << RATE_MCS_MOD_TYPE_POS) 510bfcc09ddSBjoern A. Zeeb #define RATE_MCS_EHT_MSK (5 << RATE_MCS_MOD_TYPE_POS) 511bfcc09ddSBjoern A. Zeeb 512bfcc09ddSBjoern A. Zeeb /* 513bfcc09ddSBjoern A. Zeeb * Legacy CCK rate format for bits 0:3: 514bfcc09ddSBjoern A. Zeeb * 515bfcc09ddSBjoern A. Zeeb * (0) 0xa - 1 Mbps 516bfcc09ddSBjoern A. Zeeb * (1) 0x14 - 2 Mbps 517bfcc09ddSBjoern A. Zeeb * (2) 0x37 - 5.5 Mbps 518bfcc09ddSBjoern A. Zeeb * (3) 0x6e - 11 nbps 519bfcc09ddSBjoern A. Zeeb * 520bfcc09ddSBjoern A. Zeeb * Legacy OFDM rate format for bis 3:0: 521bfcc09ddSBjoern A. Zeeb * 522bfcc09ddSBjoern A. Zeeb * (0) 6 Mbps 523bfcc09ddSBjoern A. Zeeb * (1) 9 Mbps 524bfcc09ddSBjoern A. Zeeb * (2) 12 Mbps 525bfcc09ddSBjoern A. Zeeb * (3) 18 Mbps 526bfcc09ddSBjoern A. Zeeb * (4) 24 Mbps 527bfcc09ddSBjoern A. Zeeb * (5) 36 Mbps 528bfcc09ddSBjoern A. Zeeb * (6) 48 Mbps 529bfcc09ddSBjoern A. Zeeb * (7) 54 Mbps 530bfcc09ddSBjoern A. Zeeb * 531bfcc09ddSBjoern A. Zeeb */ 532bfcc09ddSBjoern A. Zeeb #define RATE_LEGACY_RATE_MSK 0x7 533bfcc09ddSBjoern A. Zeeb 534bfcc09ddSBjoern A. Zeeb /* 535bfcc09ddSBjoern A. Zeeb * HT, VHT, HE, EHT rate format for bits 3:0 536bfcc09ddSBjoern A. Zeeb * 3-0: MCS 537bfcc09ddSBjoern A. Zeeb * 538bfcc09ddSBjoern A. Zeeb */ 539bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_CODE_MSK 0x7 540bfcc09ddSBjoern A. Zeeb #define RATE_MCS_NSS_POS 4 541bfcc09ddSBjoern A. Zeeb #define RATE_MCS_NSS_MSK (1 << RATE_MCS_NSS_POS) 542bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CODE_MSK 0xf 543bfcc09ddSBjoern A. Zeeb #define RATE_HT_MCS_INDEX(r) ((((r) & RATE_MCS_NSS_MSK) >> 1) | \ 544bfcc09ddSBjoern A. Zeeb ((r) & RATE_HT_MCS_CODE_MSK)) 545bfcc09ddSBjoern A. Zeeb 546bfcc09ddSBjoern A. Zeeb /* Bits 7-5: reserved */ 547bfcc09ddSBjoern A. Zeeb 548bfcc09ddSBjoern A. Zeeb /* 549bfcc09ddSBjoern A. Zeeb * Bits 13-11: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz, (4) 320MHz 550bfcc09ddSBjoern A. Zeeb */ 551bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_MSK (0x7 << RATE_MCS_CHAN_WIDTH_POS) 552bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 553bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 554bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 555bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 556bfcc09ddSBjoern A. Zeeb #define RATE_MCS_CHAN_WIDTH_320 (4 << RATE_MCS_CHAN_WIDTH_POS) 557bfcc09ddSBjoern A. Zeeb 558bfcc09ddSBjoern A. Zeeb /* Bit 15-14: Antenna selection: 559bfcc09ddSBjoern A. Zeeb * Bit 14: Ant A active 560bfcc09ddSBjoern A. Zeeb * Bit 15: Ant B active 561bfcc09ddSBjoern A. Zeeb * 562bfcc09ddSBjoern A. Zeeb * All relevant definitions are same as in v1 563bfcc09ddSBjoern A. Zeeb */ 564bfcc09ddSBjoern A. Zeeb 565bfcc09ddSBjoern A. Zeeb /* Bit 16 (1) LDPC enables, (0) LDPC disabled */ 566bfcc09ddSBjoern A. Zeeb #define RATE_MCS_LDPC_POS 16 567bfcc09ddSBjoern A. Zeeb #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 568bfcc09ddSBjoern A. Zeeb 569bfcc09ddSBjoern A. Zeeb /* Bit 17: (0) SS, (1) SS*2 (same as v1) */ 570bfcc09ddSBjoern A. Zeeb 571bfcc09ddSBjoern A. Zeeb /* Bit 18: OFDM-HE dual carrier mode (same as v1) */ 572bfcc09ddSBjoern A. Zeeb 573bfcc09ddSBjoern A. Zeeb /* Bit 19: (0) Beamforming is off, (1) Beamforming is on (same as v1) */ 574bfcc09ddSBjoern A. Zeeb 575bfcc09ddSBjoern A. Zeeb /* 576bfcc09ddSBjoern A. Zeeb * Bit 22-20: HE LTF type and guard interval 577bfcc09ddSBjoern A. Zeeb * CCK: 578bfcc09ddSBjoern A. Zeeb * 0 long preamble 579bfcc09ddSBjoern A. Zeeb * 1 short preamble 580bfcc09ddSBjoern A. Zeeb * HT/VHT: 581bfcc09ddSBjoern A. Zeeb * 0 0.8us 582bfcc09ddSBjoern A. Zeeb * 1 0.4us 583bfcc09ddSBjoern A. Zeeb * HE (ext) SU: 584bfcc09ddSBjoern A. Zeeb * 0 1xLTF+0.8us 585bfcc09ddSBjoern A. Zeeb * 1 2xLTF+0.8us 586bfcc09ddSBjoern A. Zeeb * 2 2xLTF+1.6us 587bfcc09ddSBjoern A. Zeeb * 3 4xLTF+3.2us 588bfcc09ddSBjoern A. Zeeb * 4 4xLTF+0.8us 589bfcc09ddSBjoern A. Zeeb * HE MU: 590bfcc09ddSBjoern A. Zeeb * 0 4xLTF+0.8us 591bfcc09ddSBjoern A. Zeeb * 1 2xLTF+0.8us 592bfcc09ddSBjoern A. Zeeb * 2 2xLTF+1.6us 593bfcc09ddSBjoern A. Zeeb * 3 4xLTF+3.2us 594bfcc09ddSBjoern A. Zeeb * HE TRIG: 595bfcc09ddSBjoern A. Zeeb * 0 1xLTF+1.6us 596bfcc09ddSBjoern A. Zeeb * 1 2xLTF+1.6us 597bfcc09ddSBjoern A. Zeeb * 2 4xLTF+3.2us 598bfcc09ddSBjoern A. Zeeb * */ 599bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_GI_LTF_MSK (0x7 << RATE_MCS_HE_GI_LTF_POS) 600bfcc09ddSBjoern A. Zeeb #define RATE_MCS_SGI_POS RATE_MCS_HE_GI_LTF_POS 601bfcc09ddSBjoern A. Zeeb #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 602bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_SU_4_LTF 3 603bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_SU_4_LTF_08_GI 4 604bfcc09ddSBjoern A. Zeeb 605bfcc09ddSBjoern A. Zeeb /* Bit 24-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 606bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_POS 23 607bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) 608bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) 609bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) 610bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) 611bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 612bfcc09ddSBjoern A. Zeeb 613bfcc09ddSBjoern A. Zeeb /* Bit 25: duplicate channel enabled 614bfcc09ddSBjoern A. Zeeb * 615bfcc09ddSBjoern A. Zeeb * if this bit is set, duplicate is according to BW (bits 11-13): 616bfcc09ddSBjoern A. Zeeb * 617bfcc09ddSBjoern A. Zeeb * CCK: 2x 20MHz 618bfcc09ddSBjoern A. Zeeb * OFDM Legacy: N x 20Mhz, (N = BW \ 2 , either 2, 4, 8, 16) 619bfcc09ddSBjoern A. Zeeb * EHT: 2 x BW/2, (80 - 2x40, 160 - 2x80, 320 - 2x160) 620bfcc09ddSBjoern A. Zeeb * */ 621bfcc09ddSBjoern A. Zeeb #define RATE_MCS_DUP_POS 25 622bfcc09ddSBjoern A. Zeeb #define RATE_MCS_DUP_MSK (1 << RATE_MCS_DUP_POS) 623bfcc09ddSBjoern A. Zeeb 624bfcc09ddSBjoern A. Zeeb /* Bit 26: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 625bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_106T_POS 26 626bfcc09ddSBjoern A. Zeeb #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) 627bfcc09ddSBjoern A. Zeeb 628bfcc09ddSBjoern A. Zeeb /* Bit 27: EHT extra LTF: 629bfcc09ddSBjoern A. Zeeb * instead of 1 LTF for SISO use 2 LTFs, 630bfcc09ddSBjoern A. Zeeb * instead of 2 LTFs for NSTS=2 use 4 LTFs*/ 631bfcc09ddSBjoern A. Zeeb #define RATE_MCS_EHT_EXTRA_LTF_POS 27 632bfcc09ddSBjoern A. Zeeb #define RATE_MCS_EHT_EXTRA_LTF_MSK (1 << RATE_MCS_EHT_EXTRA_LTF_POS) 633bfcc09ddSBjoern A. Zeeb 634bfcc09ddSBjoern A. Zeeb /* Bit 31-28: reserved */ 635bfcc09ddSBjoern A. Zeeb 636bfcc09ddSBjoern A. Zeeb /* Link Quality definitions */ 637bfcc09ddSBjoern A. Zeeb 638bfcc09ddSBjoern A. Zeeb /* # entries in rate scale table to support Tx retries */ 639bfcc09ddSBjoern A. Zeeb #define LQ_MAX_RETRY_NUM 16 640bfcc09ddSBjoern A. Zeeb 641bfcc09ddSBjoern A. Zeeb /* Link quality command flags bit fields */ 642bfcc09ddSBjoern A. Zeeb 643bfcc09ddSBjoern A. Zeeb /* Bit 0: (0) Don't use RTS (1) Use RTS */ 644bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_USE_RTS_POS 0 645bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 646bfcc09ddSBjoern A. Zeeb 647bfcc09ddSBjoern A. Zeeb /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 648bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_COLOR_POS 1 649bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 650bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 651bfcc09ddSBjoern A. Zeeb LQ_FLAG_COLOR_POS) 652bfcc09ddSBjoern A. Zeeb #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 653bfcc09ddSBjoern A. Zeeb LQ_FLAG_COLOR_MSK) 654bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 655bfcc09ddSBjoern A. Zeeb 656bfcc09ddSBjoern A. Zeeb /* Bit 4-5: Tx RTS BW Signalling 657bfcc09ddSBjoern A. Zeeb * (0) No RTS BW signalling 658bfcc09ddSBjoern A. Zeeb * (1) Static BW signalling 659bfcc09ddSBjoern A. Zeeb * (2) Dynamic BW signalling 660bfcc09ddSBjoern A. Zeeb */ 661bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_RTS_BW_SIG_POS 4 662bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 663bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 664bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 665bfcc09ddSBjoern A. Zeeb 666bfcc09ddSBjoern A. Zeeb /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 667bfcc09ddSBjoern A. Zeeb * Dyanmic BW selection allows Tx with narrower BW then requested in rates 668bfcc09ddSBjoern A. Zeeb */ 669bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_DYNAMIC_BW_POS 6 670bfcc09ddSBjoern A. Zeeb #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 671bfcc09ddSBjoern A. Zeeb 672bfcc09ddSBjoern A. Zeeb /* Single Stream Tx Parameters (lq_cmd->ss_params) 673bfcc09ddSBjoern A. Zeeb * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 674bfcc09ddSBjoern A. Zeeb * used for single stream Tx. 675bfcc09ddSBjoern A. Zeeb */ 676bfcc09ddSBjoern A. Zeeb 677bfcc09ddSBjoern A. Zeeb /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 678bfcc09ddSBjoern A. Zeeb * (0) - No STBC allowed 679bfcc09ddSBjoern A. Zeeb * (1) - 2x1 STBC allowed (HT/VHT) 680bfcc09ddSBjoern A. Zeeb * (2) - 4x2 STBC allowed (HT/VHT) 681bfcc09ddSBjoern A. Zeeb * (3) - 3x2 STBC allowed (HT only) 682bfcc09ddSBjoern A. Zeeb * All our chips are at most 2 antennas so only (1) is valid for now. 683bfcc09ddSBjoern A. Zeeb */ 684bfcc09ddSBjoern A. Zeeb #define LQ_SS_STBC_ALLOWED_POS 0 685bfcc09ddSBjoern A. Zeeb #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 686bfcc09ddSBjoern A. Zeeb 687bfcc09ddSBjoern A. Zeeb /* 2x1 STBC is allowed */ 688bfcc09ddSBjoern A. Zeeb #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 689bfcc09ddSBjoern A. Zeeb 690bfcc09ddSBjoern A. Zeeb /* Bit 2: Beamformer (VHT only) is allowed */ 691bfcc09ddSBjoern A. Zeeb #define LQ_SS_BFER_ALLOWED_POS 2 692bfcc09ddSBjoern A. Zeeb #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 693bfcc09ddSBjoern A. Zeeb 694bfcc09ddSBjoern A. Zeeb /* Bit 3: Force BFER or STBC for testing 695bfcc09ddSBjoern A. Zeeb * If this is set: 696bfcc09ddSBjoern A. Zeeb * If BFER is allowed then force the ucode to choose BFER else 697bfcc09ddSBjoern A. Zeeb * If STBC is allowed then force the ucode to choose STBC over SISO 698bfcc09ddSBjoern A. Zeeb */ 699bfcc09ddSBjoern A. Zeeb #define LQ_SS_FORCE_POS 3 700bfcc09ddSBjoern A. Zeeb #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 701bfcc09ddSBjoern A. Zeeb 702bfcc09ddSBjoern A. Zeeb /* Bit 31: ss_params field is valid. Used for FW backward compatibility 703bfcc09ddSBjoern A. Zeeb * with other drivers which don't support the ss_params API yet 704bfcc09ddSBjoern A. Zeeb */ 705bfcc09ddSBjoern A. Zeeb #define LQ_SS_PARAMS_VALID_POS 31 706bfcc09ddSBjoern A. Zeeb #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 707bfcc09ddSBjoern A. Zeeb 708bfcc09ddSBjoern A. Zeeb /** 709bfcc09ddSBjoern A. Zeeb * struct iwl_lq_cmd - link quality command 710bfcc09ddSBjoern A. Zeeb * @sta_id: station to update 711bfcc09ddSBjoern A. Zeeb * @reduced_tpc: reduced transmit power control value 712bfcc09ddSBjoern A. Zeeb * @control: not used 713bfcc09ddSBjoern A. Zeeb * @flags: combination of LQ_FLAG_* 714bfcc09ddSBjoern A. Zeeb * @mimo_delim: the first SISO index in rs_table, which separates MIMO 715bfcc09ddSBjoern A. Zeeb * and SISO rates 716bfcc09ddSBjoern A. Zeeb * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 717bfcc09ddSBjoern A. Zeeb * Should be ANT_[ABC] 718bfcc09ddSBjoern A. Zeeb * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 719bfcc09ddSBjoern A. Zeeb * @initial_rate_index: first index from rs_table per AC category 720bfcc09ddSBjoern A. Zeeb * @agg_time_limit: aggregation max time threshold in usec/100, meaning 721bfcc09ddSBjoern A. Zeeb * value of 100 is one usec. Range is 100 to 8000 722bfcc09ddSBjoern A. Zeeb * @agg_disable_start_th: try-count threshold for starting aggregation. 723bfcc09ddSBjoern A. Zeeb * If a frame has higher try-count, it should not be selected for 724bfcc09ddSBjoern A. Zeeb * starting an aggregation sequence. 725bfcc09ddSBjoern A. Zeeb * @agg_frame_cnt_limit: max frame count in an aggregation. 726bfcc09ddSBjoern A. Zeeb * 0: no limit 727bfcc09ddSBjoern A. Zeeb * 1: no aggregation (one frame per aggregation) 728bfcc09ddSBjoern A. Zeeb * 2 - 0x3f: maximal number of frames (up to 3f == 63) 729bfcc09ddSBjoern A. Zeeb * @reserved2: reserved 730bfcc09ddSBjoern A. Zeeb * @rs_table: array of rates for each TX try, each is rate_n_flags, 731bfcc09ddSBjoern A. Zeeb * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 732bfcc09ddSBjoern A. Zeeb * @ss_params: single stream features. declare whether STBC or BFER are allowed. 733bfcc09ddSBjoern A. Zeeb */ 734bfcc09ddSBjoern A. Zeeb struct iwl_lq_cmd { 735bfcc09ddSBjoern A. Zeeb u8 sta_id; 736bfcc09ddSBjoern A. Zeeb u8 reduced_tpc; 737bfcc09ddSBjoern A. Zeeb __le16 control; 738bfcc09ddSBjoern A. Zeeb /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 739bfcc09ddSBjoern A. Zeeb u8 flags; 740bfcc09ddSBjoern A. Zeeb u8 mimo_delim; 741bfcc09ddSBjoern A. Zeeb u8 single_stream_ant_msk; 742bfcc09ddSBjoern A. Zeeb u8 dual_stream_ant_msk; 743bfcc09ddSBjoern A. Zeeb u8 initial_rate_index[AC_NUM]; 744bfcc09ddSBjoern A. Zeeb /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 745bfcc09ddSBjoern A. Zeeb __le16 agg_time_limit; 746bfcc09ddSBjoern A. Zeeb u8 agg_disable_start_th; 747bfcc09ddSBjoern A. Zeeb u8 agg_frame_cnt_limit; 748bfcc09ddSBjoern A. Zeeb __le32 reserved2; 749bfcc09ddSBjoern A. Zeeb __le32 rs_table[LQ_MAX_RETRY_NUM]; 750bfcc09ddSBjoern A. Zeeb __le32 ss_params; 751bfcc09ddSBjoern A. Zeeb }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 752bfcc09ddSBjoern A. Zeeb 753bfcc09ddSBjoern A. Zeeb u8 iwl_fw_rate_idx_to_plcp(int idx); 754bfcc09ddSBjoern A. Zeeb u32 iwl_new_rate_from_v1(u32 rate_v1); 755bfcc09ddSBjoern A. Zeeb u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags); 756bfcc09ddSBjoern A. Zeeb const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx); 757bfcc09ddSBjoern A. Zeeb const char *iwl_rs_pretty_ant(u8 ant); 758bfcc09ddSBjoern A. Zeeb const char *iwl_rs_pretty_bw(int bw); 759bfcc09ddSBjoern A. Zeeb int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate); 760bfcc09ddSBjoern A. Zeeb bool iwl_he_is_sgi(u32 rate_n_flags); 761bfcc09ddSBjoern A. Zeeb 762bfcc09ddSBjoern A. Zeeb #endif /* __iwl_fw_api_rs_h__ */ 763