1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_CORE_H 8 #define ATH12K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #if defined(__FreeBSD__) 15 #include <linux/wait.h> 16 #endif 17 #include "qmi.h" 18 #include "htc.h" 19 #include "wmi.h" 20 #include "hal.h" 21 #include "dp.h" 22 #include "ce.h" 23 #include "mac.h" 24 #include "hw.h" 25 #include "hal_rx.h" 26 #include "reg.h" 27 #include "dbring.h" 28 29 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 30 31 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512 32 33 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 34 35 /* Pending management packets threshold for dropping probe responses */ 36 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 37 38 #define ATH12K_INVALID_HW_MAC_ID 0xFF 39 #define ATH12K_RX_RATE_TABLE_NUM 320 40 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576 41 42 #define ATH12K_MON_TIMER_INTERVAL 10 43 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ) 44 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3 45 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5 46 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 47 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 48 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 49 50 #if defined(__FreeBSD__) 51 #ifdef WME_AC_BE 52 #undef WME_AC_BE 53 #endif 54 #ifdef WME_AC_BK 55 #undef WME_AC_BK 56 #endif 57 #ifdef WME_AC_VI 58 #undef WME_AC_VI 59 #endif 60 #ifdef WME_AC_VO 61 #undef WME_AC_VO 62 #endif 63 #ifdef WME_NUM_AC 64 #undef WME_NUM_AC 65 #endif 66 #endif 67 68 enum wme_ac { 69 WME_AC_BE, 70 WME_AC_BK, 71 WME_AC_VI, 72 WME_AC_VO, 73 WME_NUM_AC 74 }; 75 76 #define ATH12K_HT_MCS_MAX 7 77 #define ATH12K_VHT_MCS_MAX 9 78 #define ATH12K_HE_MCS_MAX 11 79 80 enum ath12k_crypt_mode { 81 /* Only use hardware crypto engine */ 82 ATH12K_CRYPT_MODE_HW, 83 /* Only use software crypto */ 84 ATH12K_CRYPT_MODE_SW, 85 }; 86 87 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) 88 { 89 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 90 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 91 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 92 WME_AC_VO); 93 } 94 95 enum ath12k_skb_flags { 96 ATH12K_SKB_HW_80211_ENCAP = BIT(0), 97 ATH12K_SKB_CIPHER_SET = BIT(1), 98 }; 99 100 struct ath12k_skb_cb { 101 dma_addr_t paddr; 102 struct ath12k *ar; 103 struct ieee80211_vif *vif; 104 dma_addr_t paddr_ext_desc; 105 u32 cipher; 106 u8 flags; 107 }; 108 109 struct ath12k_skb_rxcb { 110 dma_addr_t paddr; 111 bool is_first_msdu; 112 bool is_last_msdu; 113 bool is_continuation; 114 bool is_mcbc; 115 bool is_eapol; 116 struct hal_rx_desc *rx_desc; 117 u8 err_rel_src; 118 u8 err_code; 119 u8 mac_id; 120 u8 unmapped; 121 u8 is_frag; 122 u8 tid; 123 u16 peer_id; 124 }; 125 126 enum ath12k_hw_rev { 127 ATH12K_HW_QCN9274_HW10, 128 ATH12K_HW_QCN9274_HW20, 129 ATH12K_HW_WCN7850_HW20 130 }; 131 132 enum ath12k_firmware_mode { 133 /* the default mode, standard 802.11 functionality */ 134 ATH12K_FIRMWARE_MODE_NORMAL, 135 136 /* factory tests etc */ 137 ATH12K_FIRMWARE_MODE_FTM, 138 }; 139 140 #define ATH12K_IRQ_NUM_MAX 57 141 #define ATH12K_EXT_IRQ_NUM_MAX 16 142 143 struct ath12k_ext_irq_grp { 144 struct ath12k_base *ab; 145 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX]; 146 u32 num_irq; 147 u32 grp_id; 148 u64 timestamp; 149 struct napi_struct napi; 150 struct net_device napi_ndev; 151 }; 152 153 #define HEHANDLE_CAP_PHYINFO_SIZE 3 154 #define HECAP_PHYINFO_SIZE 9 155 #define HECAP_MACINFO_SIZE 5 156 #define HECAP_TXRX_MCS_NSS_SIZE 2 157 #define HECAP_PPET16_PPET8_MAX_SIZE 25 158 159 #define HE_PPET16_PPET8_SIZE 8 160 161 /* 802.11ax PPE (PPDU packet Extension) threshold */ 162 struct he_ppe_threshold { 163 u32 numss_m1; 164 u32 ru_mask; 165 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 166 }; 167 168 struct ath12k_he { 169 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 170 u32 hecap_rxmcsnssmap; 171 u32 hecap_txmcsnssmap; 172 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 173 struct he_ppe_threshold hecap_ppet; 174 u32 heop_param; 175 }; 176 177 #define MAX_RADIOS 3 178 179 enum { 180 WMI_HOST_TP_SCALE_MAX = 0, 181 WMI_HOST_TP_SCALE_50 = 1, 182 WMI_HOST_TP_SCALE_25 = 2, 183 WMI_HOST_TP_SCALE_12 = 3, 184 WMI_HOST_TP_SCALE_MIN = 4, 185 WMI_HOST_TP_SCALE_SIZE = 5, 186 }; 187 188 enum ath12k_scan_state { 189 ATH12K_SCAN_IDLE, 190 ATH12K_SCAN_STARTING, 191 ATH12K_SCAN_RUNNING, 192 ATH12K_SCAN_ABORTING, 193 }; 194 195 enum ath12k_dev_flags { 196 ATH12K_CAC_RUNNING, 197 ATH12K_FLAG_CRASH_FLUSH, 198 ATH12K_FLAG_RAW_MODE, 199 ATH12K_FLAG_HW_CRYPTO_DISABLED, 200 ATH12K_FLAG_RECOVERY, 201 ATH12K_FLAG_UNREGISTERING, 202 ATH12K_FLAG_REGISTERED, 203 ATH12K_FLAG_QMI_FAIL, 204 ATH12K_FLAG_HTC_SUSPEND_COMPLETE, 205 }; 206 207 enum ath12k_monitor_flags { 208 ATH12K_FLAG_MONITOR_ENABLED, 209 }; 210 211 struct ath12k_vif { 212 u32 vdev_id; 213 enum wmi_vdev_type vdev_type; 214 enum wmi_vdev_subtype vdev_subtype; 215 u32 beacon_interval; 216 u32 dtim_period; 217 u16 ast_hash; 218 u16 ast_idx; 219 u16 tcl_metadata; 220 u8 hal_addr_search_flags; 221 u8 search_type; 222 223 struct ath12k *ar; 224 struct ieee80211_vif *vif; 225 226 int bank_id; 227 u8 vdev_id_check_en; 228 229 struct wmi_wmm_params_all_arg wmm_params; 230 struct list_head list; 231 union { 232 struct { 233 u32 uapsd; 234 } sta; 235 struct { 236 /* 127 stations; wmi limit */ 237 u8 tim_bitmap[16]; 238 u8 tim_len; 239 u32 ssid_len; 240 u8 ssid[IEEE80211_MAX_SSID_LEN]; 241 bool hidden_ssid; 242 /* P2P_IE with NoA attribute for P2P_GO case */ 243 u32 noa_len; 244 u8 *noa_data; 245 } ap; 246 } u; 247 248 bool is_started; 249 bool is_up; 250 u32 aid; 251 u8 bssid[ETH_ALEN]; 252 struct cfg80211_bitrate_mask bitrate_mask; 253 int num_legacy_stations; 254 int rtscts_prot_mode; 255 int txpower; 256 bool rsnie_present; 257 bool wpaie_present; 258 struct ieee80211_chanctx_conf chanctx; 259 u32 key_cipher; 260 u8 tx_encap_type; 261 u8 vdev_stats_id; 262 u32 punct_bitmap; 263 }; 264 265 struct ath12k_vif_iter { 266 u32 vdev_id; 267 struct ath12k_vif *arvif; 268 }; 269 270 #define HAL_AST_IDX_INVALID 0xFFFF 271 #define HAL_RX_MAX_MCS 12 272 #define HAL_RX_MAX_MCS_HT 31 273 #define HAL_RX_MAX_MCS_VHT 9 274 #define HAL_RX_MAX_MCS_HE 11 275 #define HAL_RX_MAX_NSS 8 276 #define HAL_RX_MAX_NUM_LEGACY_RATES 12 277 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576 278 #define ATH12K_RX_RATE_TABLE_NUM 320 279 280 struct ath12k_rx_peer_rate_stats { 281 u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1]; 282 u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1]; 283 u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1]; 284 u64 nss_count[HAL_RX_MAX_NSS]; 285 u64 bw_count[HAL_RX_BW_MAX]; 286 u64 gi_count[HAL_RX_GI_MAX]; 287 u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES]; 288 u64 rx_rate[ATH12K_RX_RATE_TABLE_11AX_NUM]; 289 }; 290 291 struct ath12k_rx_peer_stats { 292 u64 num_msdu; 293 u64 num_mpdu_fcs_ok; 294 u64 num_mpdu_fcs_err; 295 u64 tcp_msdu_count; 296 u64 udp_msdu_count; 297 u64 other_msdu_count; 298 u64 ampdu_msdu_count; 299 u64 non_ampdu_msdu_count; 300 u64 stbc_count; 301 u64 beamformed_count; 302 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 303 u64 nss_count[HAL_RX_MAX_NSS]; 304 u64 bw_count[HAL_RX_BW_MAX]; 305 u64 gi_count[HAL_RX_GI_MAX]; 306 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 307 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 308 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 309 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 310 u64 rx_duration; 311 u64 dcm_count; 312 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 313 struct ath12k_rx_peer_rate_stats pkt_stats; 314 struct ath12k_rx_peer_rate_stats byte_stats; 315 }; 316 317 #define ATH12K_HE_MCS_NUM 12 318 #define ATH12K_VHT_MCS_NUM 10 319 #define ATH12K_BW_NUM 5 320 #define ATH12K_NSS_NUM 4 321 #define ATH12K_LEGACY_NUM 12 322 #define ATH12K_GI_NUM 4 323 #define ATH12K_HT_MCS_NUM 32 324 325 enum ath12k_pkt_rx_err { 326 ATH12K_PKT_RX_ERR_FCS, 327 ATH12K_PKT_RX_ERR_TKIP, 328 ATH12K_PKT_RX_ERR_CRYPT, 329 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL, 330 ATH12K_PKT_RX_ERR_MAX, 331 }; 332 333 enum ath12k_ampdu_subfrm_num { 334 ATH12K_AMPDU_SUBFRM_NUM_10, 335 ATH12K_AMPDU_SUBFRM_NUM_20, 336 ATH12K_AMPDU_SUBFRM_NUM_30, 337 ATH12K_AMPDU_SUBFRM_NUM_40, 338 ATH12K_AMPDU_SUBFRM_NUM_50, 339 ATH12K_AMPDU_SUBFRM_NUM_60, 340 ATH12K_AMPDU_SUBFRM_NUM_MORE, 341 ATH12K_AMPDU_SUBFRM_NUM_MAX, 342 }; 343 344 enum ath12k_amsdu_subfrm_num { 345 ATH12K_AMSDU_SUBFRM_NUM_1, 346 ATH12K_AMSDU_SUBFRM_NUM_2, 347 ATH12K_AMSDU_SUBFRM_NUM_3, 348 ATH12K_AMSDU_SUBFRM_NUM_4, 349 ATH12K_AMSDU_SUBFRM_NUM_MORE, 350 ATH12K_AMSDU_SUBFRM_NUM_MAX, 351 }; 352 353 enum ath12k_counter_type { 354 ATH12K_COUNTER_TYPE_BYTES, 355 ATH12K_COUNTER_TYPE_PKTS, 356 ATH12K_COUNTER_TYPE_MAX, 357 }; 358 359 enum ath12k_stats_type { 360 ATH12K_STATS_TYPE_SUCC, 361 ATH12K_STATS_TYPE_FAIL, 362 ATH12K_STATS_TYPE_RETRY, 363 ATH12K_STATS_TYPE_AMPDU, 364 ATH12K_STATS_TYPE_MAX, 365 }; 366 367 struct ath12k_htt_data_stats { 368 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM]; 369 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM]; 370 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM]; 371 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM]; 372 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM]; 373 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM]; 374 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM]; 375 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX]; 376 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX]; 377 }; 378 379 struct ath12k_htt_tx_stats { 380 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX]; 381 u64 tx_duration; 382 u64 ba_fails; 383 u64 ack_fails; 384 u16 ru_start; 385 u16 ru_tones; 386 u32 mu_group[MAX_MU_GROUP_ID]; 387 }; 388 389 struct ath12k_per_ppdu_tx_stats { 390 u16 succ_pkts; 391 u16 failed_pkts; 392 u16 retry_pkts; 393 u32 succ_bytes; 394 u32 failed_bytes; 395 u32 retry_bytes; 396 }; 397 398 struct ath12k_wbm_tx_stats { 399 u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX]; 400 }; 401 402 struct ath12k_sta { 403 struct ath12k_vif *arvif; 404 405 /* the following are protected by ar->data_lock */ 406 u32 changed; /* IEEE80211_RC_* */ 407 u32 bw; 408 u32 nss; 409 u32 smps; 410 enum hal_pn_type pn_type; 411 412 struct work_struct update_wk; 413 struct rate_info txrate; 414 struct rate_info last_txrate; 415 u64 rx_duration; 416 u64 tx_duration; 417 u8 rssi_comb; 418 struct ath12k_rx_peer_stats *rx_stats; 419 struct ath12k_wbm_tx_stats *wbm_tx_stats; 420 u32 bw_prev; 421 }; 422 423 #define ATH12K_MIN_5G_FREQ 4150 424 #define ATH12K_MIN_6G_FREQ 5945 425 #define ATH12K_MAX_6G_FREQ 7115 426 #define ATH12K_NUM_CHANS 100 427 #define ATH12K_MAX_5G_CHAN 173 428 429 enum ath12k_state { 430 ATH12K_STATE_OFF, 431 ATH12K_STATE_ON, 432 ATH12K_STATE_RESTARTING, 433 ATH12K_STATE_RESTARTED, 434 ATH12K_STATE_WEDGED, 435 /* Add other states as required */ 436 }; 437 438 /* Antenna noise floor */ 439 #define ATH12K_DEFAULT_NOISE_FLOOR -95 440 441 struct ath12k_fw_stats { 442 u32 pdev_id; 443 u32 stats_id; 444 struct list_head pdevs; 445 struct list_head vdevs; 446 struct list_head bcn; 447 }; 448 449 struct ath12k_per_peer_tx_stats { 450 u32 succ_bytes; 451 u32 retry_bytes; 452 u32 failed_bytes; 453 u32 duration; 454 u16 succ_pkts; 455 u16 retry_pkts; 456 u16 failed_pkts; 457 u16 ru_start; 458 u16 ru_tones; 459 u8 ba_fails; 460 u8 ppdu_type; 461 u32 mu_grpid; 462 u32 mu_pos; 463 bool is_ampdu; 464 }; 465 466 #define ATH12K_FLUSH_TIMEOUT (5 * HZ) 467 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 468 469 struct ath12k { 470 struct ath12k_base *ab; 471 struct ath12k_pdev *pdev; 472 struct ieee80211_hw *hw; 473 struct ieee80211_ops *ops; 474 struct ath12k_wmi_pdev *wmi; 475 struct ath12k_pdev_dp dp; 476 u8 mac_addr[ETH_ALEN]; 477 u32 ht_cap_info; 478 u32 vht_cap_info; 479 struct ath12k_he ar_he; 480 enum ath12k_state state; 481 bool supports_6ghz; 482 struct { 483 struct completion started; 484 struct completion completed; 485 struct completion on_channel; 486 struct delayed_work timeout; 487 enum ath12k_scan_state state; 488 bool is_roc; 489 int vdev_id; 490 int roc_freq; 491 bool roc_notify; 492 } scan; 493 494 struct { 495 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 496 struct ieee80211_sband_iftype_data 497 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 498 } mac; 499 500 unsigned long dev_flags; 501 unsigned int filter_flags; 502 unsigned long monitor_flags; 503 u32 min_tx_power; 504 u32 max_tx_power; 505 u32 txpower_limit_2g; 506 u32 txpower_limit_5g; 507 u32 txpower_scale; 508 u32 power_scale; 509 u32 chan_tx_pwr; 510 u32 num_stations; 511 u32 max_num_stations; 512 bool monitor_present; 513 /* To synchronize concurrent synchronous mac80211 callback operations, 514 * concurrent debugfs configuration and concurrent FW statistics events. 515 */ 516 struct mutex conf_mutex; 517 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 518 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_vif info, 519 * channel context data, survey info, test mode data. 520 */ 521 spinlock_t data_lock; 522 523 struct list_head arvifs; 524 /* should never be NULL; needed for regular htt rx */ 525 struct ieee80211_channel *rx_channel; 526 527 /* valid during scan; needed for mgmt rx during scan */ 528 struct ieee80211_channel *scan_channel; 529 530 u8 cfg_tx_chainmask; 531 u8 cfg_rx_chainmask; 532 u8 num_rx_chains; 533 u8 num_tx_chains; 534 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 535 u8 pdev_idx; 536 u8 lmac_id; 537 538 struct completion peer_assoc_done; 539 struct completion peer_delete_done; 540 541 int install_key_status; 542 struct completion install_key_done; 543 544 int last_wmi_vdev_start_status; 545 struct completion vdev_setup_done; 546 struct completion vdev_delete_done; 547 548 int num_peers; 549 int max_num_peers; 550 u32 num_started_vdevs; 551 u32 num_created_vdevs; 552 unsigned long long allocated_vdev_map; 553 554 struct idr txmgmt_idr; 555 /* protects txmgmt_idr data */ 556 spinlock_t txmgmt_idr_lock; 557 atomic_t num_pending_mgmt_tx; 558 wait_queue_head_t txmgmt_empty_waitq; 559 560 /* cycle count is reported twice for each visited channel during scan. 561 * access protected by data_lock 562 */ 563 u32 survey_last_rx_clear_count; 564 u32 survey_last_cycle_count; 565 566 /* Channel info events are expected to come in pairs without and with 567 * COMPLETE flag set respectively for each channel visit during scan. 568 * 569 * However there are deviations from this rule. This flag is used to 570 * avoid reporting garbage data. 571 */ 572 bool ch_info_can_report_survey; 573 struct survey_info survey[ATH12K_NUM_CHANS]; 574 struct completion bss_survey_done; 575 576 struct work_struct regd_update_work; 577 578 struct work_struct wmi_mgmt_tx_work; 579 struct sk_buff_head wmi_mgmt_tx_queue; 580 581 struct ath12k_per_peer_tx_stats peer_tx_stats; 582 struct list_head ppdu_stats_info; 583 u32 ppdu_stat_list_depth; 584 585 struct ath12k_per_peer_tx_stats cached_stats; 586 u32 last_ppdu_id; 587 u32 cached_ppdu_id; 588 589 bool dfs_block_radar_events; 590 bool monitor_conf_enabled; 591 bool monitor_vdev_created; 592 bool monitor_started; 593 int monitor_vdev_id; 594 }; 595 596 struct ath12k_band_cap { 597 u32 phy_id; 598 u32 max_bw_supported; 599 u32 ht_cap_info; 600 u32 he_cap_info[2]; 601 u32 he_mcs; 602 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 603 struct ath12k_wmi_ppe_threshold_arg he_ppet; 604 u16 he_6ghz_capa; 605 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 606 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE]; 607 u32 eht_mcs_20_only; 608 u32 eht_mcs_80; 609 u32 eht_mcs_160; 610 u32 eht_mcs_320; 611 struct ath12k_wmi_ppe_threshold_arg eht_ppet; 612 u32 eht_cap_info_internal; 613 }; 614 615 struct ath12k_pdev_cap { 616 u32 supported_bands; 617 u32 ampdu_density; 618 u32 vht_cap; 619 u32 vht_mcs; 620 u32 he_mcs; 621 u32 tx_chain_mask; 622 u32 rx_chain_mask; 623 u32 tx_chain_mask_shift; 624 u32 rx_chain_mask_shift; 625 struct ath12k_band_cap band[NUM_NL80211_BANDS]; 626 }; 627 628 struct mlo_timestamp { 629 u32 info; 630 u32 sync_timestamp_lo_us; 631 u32 sync_timestamp_hi_us; 632 u32 mlo_offset_lo; 633 u32 mlo_offset_hi; 634 u32 mlo_offset_clks; 635 u32 mlo_comp_clks; 636 u32 mlo_comp_timer; 637 }; 638 639 struct ath12k_pdev { 640 struct ath12k *ar; 641 u32 pdev_id; 642 struct ath12k_pdev_cap cap; 643 u8 mac_addr[ETH_ALEN]; 644 struct mlo_timestamp timestamp; 645 }; 646 647 struct ath12k_fw_pdev { 648 u32 pdev_id; 649 u32 phy_id; 650 u32 supported_bands; 651 }; 652 653 struct ath12k_board_data { 654 const struct firmware *fw; 655 const void *data; 656 size_t len; 657 }; 658 659 struct ath12k_soc_dp_tx_err_stats { 660 /* TCL Ring Descriptor unavailable */ 661 u32 desc_na[DP_TCL_NUM_RING_MAX]; 662 /* Other failures during dp_tx due to mem allocation failure 663 * idr unavailable etc. 664 */ 665 atomic_t misc_fail; 666 }; 667 668 struct ath12k_soc_dp_stats { 669 u32 err_ring_pkts; 670 u32 invalid_rbm; 671 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 672 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 673 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 674 struct ath12k_soc_dp_tx_err_stats tx_err; 675 }; 676 677 /* Master structure to hold the hw data which may be used in core module */ 678 struct ath12k_base { 679 enum ath12k_hw_rev hw_rev; 680 struct platform_device *pdev; 681 struct device *dev; 682 struct ath12k_qmi qmi; 683 struct ath12k_wmi_base wmi_ab; 684 struct completion fw_ready; 685 int num_radios; 686 /* HW channel counters frequency value in hertz common to all MACs */ 687 u32 cc_freq_hz; 688 689 struct ath12k_htc htc; 690 691 struct ath12k_dp dp; 692 693 void __iomem *mem; 694 unsigned long mem_len; 695 696 struct { 697 enum ath12k_bus bus; 698 const struct ath12k_hif_ops *ops; 699 } hif; 700 701 struct ath12k_ce ce; 702 struct timer_list rx_replenish_retry; 703 struct ath12k_hal hal; 704 /* To synchronize core_start/core_stop */ 705 struct mutex core_lock; 706 /* Protects data like peers */ 707 spinlock_t base_lock; 708 709 /* Single pdev device (struct ath12k_hw_params::single_pdev_only): 710 * 711 * Firmware maintains data for all bands but advertises a single 712 * phy to the host which is stored as a single element in this 713 * array. 714 * 715 * Other devices: 716 * 717 * This array will contain as many elements as the number of 718 * radios. 719 */ 720 struct ath12k_pdev pdevs[MAX_RADIOS]; 721 722 /* struct ath12k_hw_params::single_pdev_only devices use this to 723 * store phy specific data 724 */ 725 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS]; 726 u8 fw_pdev_count; 727 728 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS]; 729 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS]; 730 unsigned long long free_vdev_map; 731 unsigned long long free_vdev_stats_id_map; 732 struct list_head peers; 733 wait_queue_head_t peer_mapping_wq; 734 u8 mac_addr[ETH_ALEN]; 735 bool wmi_ready; 736 u32 wlan_init_status; 737 int irq_num[ATH12K_IRQ_NUM_MAX]; 738 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX]; 739 struct napi_struct *napi; 740 struct ath12k_wmi_target_cap_arg target_caps; 741 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 742 bool pdevs_macaddr_valid; 743 int bd_api; 744 745 const struct ath12k_hw_params *hw_params; 746 747 const struct firmware *cal_file; 748 749 /* Below regd's are protected by ab->data_lock */ 750 /* This is the regd set for every radio 751 * by the firmware during initialization 752 */ 753 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 754 /* This regd is set during dynamic country setting 755 * This may or may not be used during the runtime 756 */ 757 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 758 759 /* Current DFS Regulatory */ 760 enum ath12k_dfs_region dfs_region; 761 struct ath12k_soc_dp_stats soc_stats; 762 763 unsigned long dev_flags; 764 struct completion driver_recovery; 765 struct workqueue_struct *workqueue; 766 struct work_struct restart_work; 767 struct workqueue_struct *workqueue_aux; 768 struct work_struct reset_work; 769 atomic_t reset_count; 770 atomic_t recovery_count; 771 atomic_t recovery_start_count; 772 bool is_reset; 773 struct completion reset_complete; 774 struct completion reconfigure_complete; 775 struct completion recovery_start; 776 /* continuous recovery fail count */ 777 atomic_t fail_cont_count; 778 unsigned long reset_fail_timeout; 779 struct { 780 /* protected by data_lock */ 781 u32 fw_crash_counter; 782 } stats; 783 u32 pktlog_defs_checksum; 784 785 struct ath12k_dbring_cap *db_caps; 786 u32 num_db_cap; 787 788 struct timer_list mon_reap_timer; 789 790 struct completion htc_suspend; 791 792 u64 fw_soc_drop_count; 793 bool static_window_map; 794 795 /* must be last */ 796 u8 drv_priv[] __aligned(sizeof(void *)); 797 }; 798 799 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab); 800 int ath12k_core_pre_init(struct ath12k_base *ab); 801 int ath12k_core_init(struct ath12k_base *ath12k); 802 void ath12k_core_deinit(struct ath12k_base *ath12k); 803 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size, 804 enum ath12k_bus bus); 805 void ath12k_core_free(struct ath12k_base *ath12k); 806 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, 807 struct ath12k_board_data *bd, 808 char *filename); 809 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k, 810 struct ath12k_board_data *bd); 811 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd); 812 int ath12k_core_check_dt(struct ath12k_base *ath12k); 813 814 void ath12k_core_halt(struct ath12k *ar); 815 int ath12k_core_resume(struct ath12k_base *ab); 816 int ath12k_core_suspend(struct ath12k_base *ab); 817 818 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab, 819 const char *filename); 820 821 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 822 { 823 switch (state) { 824 case ATH12K_SCAN_IDLE: 825 return "idle"; 826 case ATH12K_SCAN_STARTING: 827 return "starting"; 828 case ATH12K_SCAN_RUNNING: 829 return "running"; 830 case ATH12K_SCAN_ABORTING: 831 return "aborting"; 832 } 833 834 return "unknown"; 835 } 836 837 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb) 838 { 839 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) > 840 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 841 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 842 } 843 844 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb) 845 { 846 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb)); 847 return (struct ath12k_skb_rxcb *)skb->cb; 848 } 849 850 static inline struct ath12k_vif *ath12k_vif_to_arvif(struct ieee80211_vif *vif) 851 { 852 return (struct ath12k_vif *)vif->drv_priv; 853 } 854 855 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab, 856 int mac_id) 857 { 858 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar; 859 } 860 861 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab, 862 const char *filename, 863 void *buf, size_t buf_len) 864 { 865 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR, 866 ab->hw_params->fw.dir, filename); 867 } 868 869 static inline const char *ath12k_bus_str(enum ath12k_bus bus) 870 { 871 switch (bus) { 872 case ATH12K_BUS_PCI: 873 return "pci"; 874 } 875 876 return "unknown"; 877 } 878 879 #endif /* _CORE_H_ */ 880