1dd4f32aeSBjoern A. Zeeb /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2dd4f32aeSBjoern A. Zeeb /* 3dd4f32aeSBjoern A. Zeeb * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4*28348caeSBjoern A. Zeeb * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 5dd4f32aeSBjoern A. Zeeb */ 6dd4f32aeSBjoern A. Zeeb 7dd4f32aeSBjoern A. Zeeb #ifndef ATH11K_HAL_TX_H 8dd4f32aeSBjoern A. Zeeb #define ATH11K_HAL_TX_H 9dd4f32aeSBjoern A. Zeeb 10dd4f32aeSBjoern A. Zeeb #include "hal_desc.h" 11dd4f32aeSBjoern A. Zeeb #include "core.h" 12dd4f32aeSBjoern A. Zeeb 13dd4f32aeSBjoern A. Zeeb #define HAL_TX_ADDRX_EN 1 14dd4f32aeSBjoern A. Zeeb #define HAL_TX_ADDRY_EN 2 15dd4f32aeSBjoern A. Zeeb 16dd4f32aeSBjoern A. Zeeb #define HAL_TX_ADDR_SEARCH_DEFAULT 0 17dd4f32aeSBjoern A. Zeeb #define HAL_TX_ADDR_SEARCH_INDEX 1 18dd4f32aeSBjoern A. Zeeb 19dd4f32aeSBjoern A. Zeeb struct hal_tx_info { 20dd4f32aeSBjoern A. Zeeb u16 meta_data_flags; /* %HAL_TCL_DATA_CMD_INFO0_META_ */ 21dd4f32aeSBjoern A. Zeeb u8 ring_id; 22dd4f32aeSBjoern A. Zeeb u32 desc_id; 23dd4f32aeSBjoern A. Zeeb enum hal_tcl_desc_type type; 24dd4f32aeSBjoern A. Zeeb enum hal_tcl_encap_type encap_type; 25dd4f32aeSBjoern A. Zeeb dma_addr_t paddr; 26dd4f32aeSBjoern A. Zeeb u32 data_len; 27dd4f32aeSBjoern A. Zeeb u32 pkt_offset; 28dd4f32aeSBjoern A. Zeeb enum hal_encrypt_type encrypt_type; 29dd4f32aeSBjoern A. Zeeb u32 flags0; /* %HAL_TCL_DATA_CMD_INFO1_ */ 30dd4f32aeSBjoern A. Zeeb u32 flags1; /* %HAL_TCL_DATA_CMD_INFO2_ */ 31dd4f32aeSBjoern A. Zeeb u16 addr_search_flags; /* %HAL_TCL_DATA_CMD_INFO0_ADDR(X/Y)_ */ 32dd4f32aeSBjoern A. Zeeb u16 bss_ast_hash; 33dd4f32aeSBjoern A. Zeeb u16 bss_ast_idx; 34dd4f32aeSBjoern A. Zeeb u8 tid; 35dd4f32aeSBjoern A. Zeeb u8 search_type; /* %HAL_TX_ADDR_SEARCH_ */ 36dd4f32aeSBjoern A. Zeeb u8 lmac_id; 37dd4f32aeSBjoern A. Zeeb u8 dscp_tid_tbl_idx; 38dd4f32aeSBjoern A. Zeeb bool enable_mesh; 39*28348caeSBjoern A. Zeeb u8 rbm_id; 40dd4f32aeSBjoern A. Zeeb }; 41dd4f32aeSBjoern A. Zeeb 42dd4f32aeSBjoern A. Zeeb /* TODO: Check if the actual desc macros can be used instead */ 43dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_FIRST_MSDU BIT(0) 44dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_LAST_MSDU BIT(1) 45dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_MSDU_IN_AMSDU BIT(2) 46dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_RATE_STATS_VALID BIT(3) 47dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_RATE_LDPC BIT(4) 48dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_RATE_STBC BIT(5) 49dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_FLAGS_OFDMA BIT(6) 50dd4f32aeSBjoern A. Zeeb 51dd4f32aeSBjoern A. Zeeb #define HAL_TX_STATUS_DESC_LEN sizeof(struct hal_wbm_release_ring) 52dd4f32aeSBjoern A. Zeeb 53dd4f32aeSBjoern A. Zeeb /* Tx status parsed from srng desc */ 54dd4f32aeSBjoern A. Zeeb struct hal_tx_status { 55dd4f32aeSBjoern A. Zeeb enum hal_wbm_rel_src_module buf_rel_source; 56dd4f32aeSBjoern A. Zeeb enum hal_wbm_tqm_rel_reason status; 57dd4f32aeSBjoern A. Zeeb u8 ack_rssi; 58dd4f32aeSBjoern A. Zeeb u32 flags; /* %HAL_TX_STATUS_FLAGS_ */ 59dd4f32aeSBjoern A. Zeeb u32 ppdu_id; 60dd4f32aeSBjoern A. Zeeb u8 try_cnt; 61dd4f32aeSBjoern A. Zeeb u8 tid; 62dd4f32aeSBjoern A. Zeeb u16 peer_id; 63dd4f32aeSBjoern A. Zeeb u32 rate_stats; 64dd4f32aeSBjoern A. Zeeb }; 65dd4f32aeSBjoern A. Zeeb 66dd4f32aeSBjoern A. Zeeb void ath11k_hal_tx_cmd_desc_setup(struct ath11k_base *ab, void *cmd, 67dd4f32aeSBjoern A. Zeeb struct hal_tx_info *ti); 68dd4f32aeSBjoern A. Zeeb void ath11k_hal_tx_set_dscp_tid_map(struct ath11k_base *ab, int id); 69dd4f32aeSBjoern A. Zeeb int ath11k_hal_reo_cmd_send(struct ath11k_base *ab, struct hal_srng *srng, 70dd4f32aeSBjoern A. Zeeb enum hal_reo_cmd_type type, 71dd4f32aeSBjoern A. Zeeb struct ath11k_hal_reo_cmd *cmd); 72dd4f32aeSBjoern A. Zeeb void ath11k_hal_tx_init_data_ring(struct ath11k_base *ab, 73dd4f32aeSBjoern A. Zeeb struct hal_srng *srng); 74dd4f32aeSBjoern A. Zeeb #endif 75