1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #include "core.h" 7 #include "dp_tx.h" 8 #include "debug.h" 9 #include "debugfs_sta.h" 10 #include "hw.h" 11 #include "peer.h" 12 #include "mac.h" 13 14 static enum hal_tcl_encap_type 15 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb) 16 { 17 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 18 struct ath11k_base *ab = arvif->ar->ab; 19 20 if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) 21 return HAL_TCL_ENCAP_TYPE_RAW; 22 23 if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) 24 return HAL_TCL_ENCAP_TYPE_ETHERNET; 25 26 return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI; 27 } 28 29 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb) 30 { 31 struct ieee80211_hdr *hdr = (void *)skb->data; 32 u8 *qos_ctl; 33 34 if (!ieee80211_is_data_qos(hdr->frame_control)) 35 return; 36 37 qos_ctl = ieee80211_get_qos_ctl(hdr); 38 memmove(skb->data + IEEE80211_QOS_CTL_LEN, 39 #if defined(__linux__) 40 skb->data, (void *)qos_ctl - (void *)skb->data); 41 #elif defined(__FreeBSD__) 42 skb->data, qos_ctl - (u8 *)skb->data); 43 #endif 44 skb_pull(skb, IEEE80211_QOS_CTL_LEN); 45 46 hdr = (void *)skb->data; 47 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA); 48 } 49 50 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb) 51 { 52 struct ieee80211_hdr *hdr = (void *)skb->data; 53 struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb); 54 55 if (cb->flags & ATH11K_SKB_HW_80211_ENCAP) 56 return skb->priority & IEEE80211_QOS_CTL_TID_MASK; 57 else if (!ieee80211_is_data_qos(hdr->frame_control)) 58 return HAL_DESC_REO_NON_QOS_TID; 59 else 60 return skb->priority & IEEE80211_QOS_CTL_TID_MASK; 61 } 62 63 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher) 64 { 65 switch (cipher) { 66 case WLAN_CIPHER_SUITE_WEP40: 67 return HAL_ENCRYPT_TYPE_WEP_40; 68 case WLAN_CIPHER_SUITE_WEP104: 69 return HAL_ENCRYPT_TYPE_WEP_104; 70 case WLAN_CIPHER_SUITE_TKIP: 71 return HAL_ENCRYPT_TYPE_TKIP_MIC; 72 case WLAN_CIPHER_SUITE_CCMP: 73 return HAL_ENCRYPT_TYPE_CCMP_128; 74 case WLAN_CIPHER_SUITE_CCMP_256: 75 return HAL_ENCRYPT_TYPE_CCMP_256; 76 case WLAN_CIPHER_SUITE_GCMP: 77 return HAL_ENCRYPT_TYPE_GCMP_128; 78 case WLAN_CIPHER_SUITE_GCMP_256: 79 return HAL_ENCRYPT_TYPE_AES_GCMP_256; 80 default: 81 return HAL_ENCRYPT_TYPE_OPEN; 82 } 83 } 84 85 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif, 86 struct ath11k_sta *arsta, struct sk_buff *skb) 87 { 88 struct ath11k_base *ab = ar->ab; 89 struct ath11k_dp *dp = &ab->dp; 90 struct hal_tx_info ti = {0}; 91 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 92 struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb); 93 struct hal_srng *tcl_ring; 94 struct ieee80211_hdr *hdr = (void *)skb->data; 95 struct dp_tx_ring *tx_ring; 96 #if defined(__linux__) 97 void *hal_tcl_desc; 98 #elif defined(__FreeBSD__) 99 u8 *hal_tcl_desc; 100 #endif 101 u8 pool_id; 102 u8 hal_ring_id; 103 int ret; 104 u8 ring_selector = 0, ring_map = 0; 105 bool tcl_ring_retry; 106 107 if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags))) 108 return -ESHUTDOWN; 109 110 if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) && 111 !ieee80211_is_data(hdr->frame_control))) 112 return -ENOTSUPP; 113 114 pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1); 115 116 /* Let the default ring selection be based on current processor 117 * number, where one of the 3 tcl rings are selected based on 118 * the smp_processor_id(). In case that ring 119 * is full/busy, we resort to other available rings. 120 * If all rings are full, we drop the packet. 121 * //TODO Add throttling logic when all rings are full 122 */ 123 ring_selector = smp_processor_id(); 124 125 tcl_ring_sel: 126 tcl_ring_retry = false; 127 128 ti.ring_id = ring_selector % ab->hw_params.max_tx_ring; 129 130 ring_map |= BIT(ti.ring_id); 131 132 tx_ring = &dp->tx_ring[ti.ring_id]; 133 134 spin_lock_bh(&tx_ring->tx_idr_lock); 135 ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0, 136 DP_TX_IDR_SIZE - 1, GFP_ATOMIC); 137 spin_unlock_bh(&tx_ring->tx_idr_lock); 138 139 if (unlikely(ret < 0)) { 140 if (ring_map == (BIT(ab->hw_params.max_tx_ring) - 1)) { 141 atomic_inc(&ab->soc_stats.tx_err.misc_fail); 142 return -ENOSPC; 143 } 144 145 /* Check if the next ring is available */ 146 ring_selector++; 147 goto tcl_ring_sel; 148 } 149 150 ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) | 151 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) | 152 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id); 153 ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb); 154 155 if (ieee80211_has_a4(hdr->frame_control) && 156 is_multicast_ether_addr(hdr->addr3) && arsta && 157 arsta->use_4addr_set) { 158 ti.meta_data_flags = arsta->tcl_metadata; 159 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1); 160 } else { 161 ti.meta_data_flags = arvif->tcl_metadata; 162 } 163 164 if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) { 165 if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) { 166 ti.encrypt_type = 167 ath11k_dp_tx_get_encrypt_type(skb_cb->cipher); 168 169 if (ieee80211_has_protected(hdr->frame_control)) 170 skb_put(skb, IEEE80211_CCMP_MIC_LEN); 171 } else { 172 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN; 173 } 174 } 175 176 ti.addr_search_flags = arvif->hal_addr_search_flags; 177 ti.search_type = arvif->search_type; 178 ti.type = HAL_TCL_DESC_TYPE_BUFFER; 179 ti.pkt_offset = 0; 180 ti.lmac_id = ar->lmac_id; 181 ti.bss_ast_hash = arvif->ast_hash; 182 ti.bss_ast_idx = arvif->ast_idx; 183 ti.dscp_tid_tbl_idx = 0; 184 185 if (likely(skb->ip_summed == CHECKSUM_PARTIAL && 186 ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) { 187 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) | 188 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) | 189 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) | 190 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) | 191 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1); 192 } 193 194 if (ieee80211_vif_is_mesh(arvif->vif)) 195 ti.enable_mesh = true; 196 197 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1); 198 199 ti.tid = ath11k_dp_tx_get_tid(skb); 200 201 switch (ti.encap_type) { 202 case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI: 203 ath11k_dp_tx_encap_nwifi(skb); 204 break; 205 case HAL_TCL_ENCAP_TYPE_RAW: 206 if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) { 207 ret = -EINVAL; 208 goto fail_remove_idr; 209 } 210 break; 211 case HAL_TCL_ENCAP_TYPE_ETHERNET: 212 /* no need to encap */ 213 break; 214 case HAL_TCL_ENCAP_TYPE_802_3: 215 default: 216 /* TODO: Take care of other encap modes as well */ 217 ret = -EINVAL; 218 atomic_inc(&ab->soc_stats.tx_err.misc_fail); 219 goto fail_remove_idr; 220 } 221 222 ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE); 223 if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) { 224 atomic_inc(&ab->soc_stats.tx_err.misc_fail); 225 ath11k_warn(ab, "failed to DMA map data Tx buffer\n"); 226 ret = -ENOMEM; 227 goto fail_remove_idr; 228 } 229 230 ti.data_len = skb->len; 231 skb_cb->paddr = ti.paddr; 232 skb_cb->vif = arvif->vif; 233 skb_cb->ar = ar; 234 235 hal_ring_id = tx_ring->tcl_data_ring.ring_id; 236 tcl_ring = &ab->hal.srng_list[hal_ring_id]; 237 238 spin_lock_bh(&tcl_ring->lock); 239 240 ath11k_hal_srng_access_begin(ab, tcl_ring); 241 242 hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring); 243 if (unlikely(!hal_tcl_desc)) { 244 /* NOTE: It is highly unlikely we'll be running out of tcl_ring 245 * desc because the desc is directly enqueued onto hw queue. 246 */ 247 ath11k_hal_srng_access_end(ab, tcl_ring); 248 ab->soc_stats.tx_err.desc_na[ti.ring_id]++; 249 spin_unlock_bh(&tcl_ring->lock); 250 ret = -ENOMEM; 251 252 /* Checking for available tcl descritors in another ring in 253 * case of failure due to full tcl ring now, is better than 254 * checking this ring earlier for each pkt tx. 255 * Restart ring selection if some rings are not checked yet. 256 */ 257 if (unlikely(ring_map != (BIT(ab->hw_params.max_tx_ring)) - 1) && 258 ab->hw_params.max_tx_ring > 1) { 259 tcl_ring_retry = true; 260 ring_selector++; 261 } 262 263 goto fail_unmap_dma; 264 } 265 266 ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc + 267 sizeof(struct hal_tlv_hdr), &ti); 268 269 ath11k_hal_srng_access_end(ab, tcl_ring); 270 271 ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.ring_id]); 272 273 spin_unlock_bh(&tcl_ring->lock); 274 275 ath11k_dbg_dump(ab, ATH11K_DBG_DP_TX, NULL, "dp tx msdu: ", 276 skb->data, skb->len); 277 278 atomic_inc(&ar->dp.num_tx_pending); 279 280 return 0; 281 282 fail_unmap_dma: 283 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE); 284 285 fail_remove_idr: 286 spin_lock_bh(&tx_ring->tx_idr_lock); 287 idr_remove(&tx_ring->txbuf_idr, 288 FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id)); 289 spin_unlock_bh(&tx_ring->tx_idr_lock); 290 291 if (tcl_ring_retry) 292 goto tcl_ring_sel; 293 294 return ret; 295 } 296 297 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id, 298 int msdu_id, 299 struct dp_tx_ring *tx_ring) 300 { 301 struct ath11k *ar; 302 struct sk_buff *msdu; 303 struct ath11k_skb_cb *skb_cb; 304 305 spin_lock(&tx_ring->tx_idr_lock); 306 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id); 307 spin_unlock(&tx_ring->tx_idr_lock); 308 309 if (unlikely(!msdu)) { 310 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n", 311 msdu_id); 312 return; 313 } 314 315 skb_cb = ATH11K_SKB_CB(msdu); 316 317 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 318 dev_kfree_skb_any(msdu); 319 320 ar = ab->pdevs[mac_id].ar; 321 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 322 wake_up(&ar->dp.tx_empty_waitq); 323 } 324 325 static void 326 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab, 327 struct dp_tx_ring *tx_ring, 328 struct ath11k_dp_htt_wbm_tx_status *ts) 329 { 330 struct sk_buff *msdu; 331 struct ieee80211_tx_info *info; 332 struct ath11k_skb_cb *skb_cb; 333 struct ath11k *ar; 334 335 spin_lock(&tx_ring->tx_idr_lock); 336 msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id); 337 spin_unlock(&tx_ring->tx_idr_lock); 338 339 if (unlikely(!msdu)) { 340 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n", 341 ts->msdu_id); 342 return; 343 } 344 345 skb_cb = ATH11K_SKB_CB(msdu); 346 info = IEEE80211_SKB_CB(msdu); 347 348 ar = skb_cb->ar; 349 350 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 351 wake_up(&ar->dp.tx_empty_waitq); 352 353 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 354 355 memset(&info->status, 0, sizeof(info->status)); 356 357 if (ts->acked) { 358 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 359 info->flags |= IEEE80211_TX_STAT_ACK; 360 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + 361 ts->ack_rssi; 362 info->status.is_valid_ack_signal = true; 363 } else { 364 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 365 } 366 } 367 368 ieee80211_tx_status(ar->hw, msdu); 369 } 370 371 static void 372 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab, 373 #if defined(__linux__) 374 void *desc, u8 mac_id, 375 #elif defined(__FreeBSD__) 376 u8 *desc, u8 mac_id, 377 #endif 378 u32 msdu_id, struct dp_tx_ring *tx_ring) 379 { 380 struct htt_tx_wbm_completion *status_desc; 381 struct ath11k_dp_htt_wbm_tx_status ts = {0}; 382 enum hal_wbm_htt_tx_comp_status wbm_status; 383 384 status_desc = (void *)(desc + HTT_TX_WBM_COMP_STATUS_OFFSET); 385 386 wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS, 387 status_desc->info0); 388 switch (wbm_status) { 389 case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK: 390 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP: 391 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL: 392 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK); 393 ts.msdu_id = msdu_id; 394 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI, 395 status_desc->info1); 396 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts); 397 break; 398 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ: 399 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT: 400 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring); 401 break; 402 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY: 403 /* This event is to be handled only when the driver decides to 404 * use WDS offload functionality. 405 */ 406 break; 407 default: 408 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status); 409 break; 410 } 411 } 412 413 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar, 414 struct sk_buff *msdu, 415 struct hal_tx_status *ts) 416 { 417 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats; 418 419 if (ts->try_cnt > 1) { 420 peer_stats->retry_pkts += ts->try_cnt - 1; 421 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len; 422 423 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) { 424 peer_stats->failed_pkts += 1; 425 peer_stats->failed_bytes += msdu->len; 426 } 427 } 428 } 429 430 void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts) 431 { 432 struct ath11k_base *ab = ar->ab; 433 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats; 434 enum hal_tx_rate_stats_pkt_type pkt_type; 435 enum hal_tx_rate_stats_sgi sgi; 436 enum hal_tx_rate_stats_bw bw; 437 struct ath11k_peer *peer; 438 struct ath11k_sta *arsta; 439 struct ieee80211_sta *sta; 440 u16 rate, ru_tones; 441 u8 mcs, rate_idx, ofdma; 442 int ret; 443 444 spin_lock_bh(&ab->base_lock); 445 peer = ath11k_peer_find_by_id(ab, ts->peer_id); 446 if (!peer || !peer->sta) { 447 ath11k_dbg(ab, ATH11K_DBG_DP_TX, 448 "failed to find the peer by id %u\n", ts->peer_id); 449 goto err_out; 450 } 451 452 sta = peer->sta; 453 arsta = (struct ath11k_sta *)sta->drv_priv; 454 455 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 456 pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE, 457 ts->rate_stats); 458 mcs = FIELD_GET(HAL_TX_RATE_STATS_INFO0_MCS, 459 ts->rate_stats); 460 sgi = FIELD_GET(HAL_TX_RATE_STATS_INFO0_SGI, 461 ts->rate_stats); 462 bw = FIELD_GET(HAL_TX_RATE_STATS_INFO0_BW, ts->rate_stats); 463 ru_tones = FIELD_GET(HAL_TX_RATE_STATS_INFO0_TONES_IN_RU, ts->rate_stats); 464 ofdma = FIELD_GET(HAL_TX_RATE_STATS_INFO0_OFDMA_TX, ts->rate_stats); 465 466 /* This is to prefer choose the real NSS value arsta->last_txrate.nss, 467 * if it is invalid, then choose the NSS value while assoc. 468 */ 469 if (arsta->last_txrate.nss) 470 arsta->txrate.nss = arsta->last_txrate.nss; 471 else 472 arsta->txrate.nss = arsta->peer_nss; 473 474 if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11A || 475 pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11B) { 476 ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs, 477 pkt_type, 478 &rate_idx, 479 &rate); 480 if (ret < 0) 481 goto err_out; 482 arsta->txrate.legacy = rate; 483 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11N) { 484 if (mcs > 7) { 485 ath11k_warn(ab, "Invalid HT mcs index %d\n", mcs); 486 goto err_out; 487 } 488 489 if (arsta->txrate.nss != 0) 490 arsta->txrate.mcs = mcs + 8 * (arsta->txrate.nss - 1); 491 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 492 if (sgi) 493 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 494 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AC) { 495 if (mcs > 9) { 496 ath11k_warn(ab, "Invalid VHT mcs index %d\n", mcs); 497 goto err_out; 498 } 499 500 arsta->txrate.mcs = mcs; 501 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 502 if (sgi) 503 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 504 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) { 505 if (mcs > 11) { 506 ath11k_warn(ab, "Invalid HE mcs index %d\n", mcs); 507 goto err_out; 508 } 509 510 arsta->txrate.mcs = mcs; 511 arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS; 512 arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi); 513 } 514 515 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw); 516 if (ofdma && pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) { 517 arsta->txrate.bw = RATE_INFO_BW_HE_RU; 518 arsta->txrate.he_ru_alloc = 519 ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones); 520 } 521 522 if (ath11k_debugfs_is_extd_tx_stats_enabled(ar)) 523 ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx); 524 525 err_out: 526 spin_unlock_bh(&ab->base_lock); 527 } 528 529 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, 530 struct sk_buff *msdu, 531 struct hal_tx_status *ts) 532 { 533 struct ath11k_base *ab = ar->ab; 534 struct ieee80211_tx_info *info; 535 struct ath11k_skb_cb *skb_cb; 536 537 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) { 538 /* Must not happen */ 539 return; 540 } 541 542 skb_cb = ATH11K_SKB_CB(msdu); 543 544 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 545 546 if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) { 547 dev_kfree_skb_any(msdu); 548 return; 549 } 550 551 if (unlikely(!skb_cb->vif)) { 552 dev_kfree_skb_any(msdu); 553 return; 554 } 555 556 info = IEEE80211_SKB_CB(msdu); 557 memset(&info->status, 0, sizeof(info->status)); 558 559 /* skip tx rate update from ieee80211_status*/ 560 info->status.rates[0].idx = -1; 561 562 if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED && 563 !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 564 info->flags |= IEEE80211_TX_STAT_ACK; 565 info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + 566 ts->ack_rssi; 567 info->status.is_valid_ack_signal = true; 568 } 569 570 if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX && 571 (info->flags & IEEE80211_TX_CTL_NO_ACK)) 572 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 573 574 if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar)) || 575 ab->hw_params.single_pdev_only) { 576 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) { 577 if (ar->last_ppdu_id == 0) { 578 ar->last_ppdu_id = ts->ppdu_id; 579 } else if (ar->last_ppdu_id == ts->ppdu_id || 580 ar->cached_ppdu_id == ar->last_ppdu_id) { 581 ar->cached_ppdu_id = ar->last_ppdu_id; 582 ar->cached_stats.is_ampdu = true; 583 ath11k_dp_tx_update_txcompl(ar, ts); 584 memset(&ar->cached_stats, 0, 585 sizeof(struct ath11k_per_peer_tx_stats)); 586 } else { 587 ar->cached_stats.is_ampdu = false; 588 ath11k_dp_tx_update_txcompl(ar, ts); 589 memset(&ar->cached_stats, 0, 590 sizeof(struct ath11k_per_peer_tx_stats)); 591 } 592 ar->last_ppdu_id = ts->ppdu_id; 593 } 594 595 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts); 596 } 597 598 /* NOTE: Tx rate status reporting. Tx completion status does not have 599 * necessary information (for example nss) to build the tx rate. 600 * Might end up reporting it out-of-band from HTT stats. 601 */ 602 603 ieee80211_tx_status(ar->hw, msdu); 604 } 605 606 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab, 607 struct hal_wbm_release_ring *desc, 608 struct hal_tx_status *ts) 609 { 610 ts->buf_rel_source = 611 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0); 612 if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW && 613 ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) 614 return; 615 616 if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) 617 return; 618 619 ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON, 620 desc->info0); 621 ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER, 622 desc->info1); 623 ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT, 624 desc->info1); 625 ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI, 626 desc->info2); 627 if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU) 628 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU; 629 ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3); 630 ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3); 631 if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID) 632 ts->rate_stats = desc->rate_stats.info0; 633 else 634 ts->rate_stats = 0; 635 } 636 637 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id) 638 { 639 struct ath11k *ar; 640 struct ath11k_dp *dp = &ab->dp; 641 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id; 642 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id]; 643 struct sk_buff *msdu; 644 struct hal_tx_status ts = { 0 }; 645 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id]; 646 u32 *desc; 647 u32 msdu_id; 648 u8 mac_id; 649 650 spin_lock_bh(&status_ring->lock); 651 652 ath11k_hal_srng_access_begin(ab, status_ring); 653 654 while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) != 655 tx_ring->tx_status_tail) && 656 (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) { 657 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head], 658 desc, sizeof(struct hal_wbm_release_ring)); 659 tx_ring->tx_status_head = 660 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head); 661 } 662 663 if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) && 664 (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) == 665 tx_ring->tx_status_tail))) { 666 /* TODO: Process pending tx_status messages when kfifo_is_full() */ 667 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n"); 668 } 669 670 ath11k_hal_srng_access_end(ab, status_ring); 671 672 spin_unlock_bh(&status_ring->lock); 673 674 while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) { 675 struct hal_wbm_release_ring *tx_status; 676 u32 desc_id; 677 678 tx_ring->tx_status_tail = 679 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail); 680 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail]; 681 ath11k_dp_tx_status_parse(ab, tx_status, &ts); 682 683 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE, 684 tx_status->buf_addr_info.info1); 685 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id); 686 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id); 687 688 if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) { 689 ath11k_dp_tx_process_htt_tx_complete(ab, 690 (void *)tx_status, 691 mac_id, msdu_id, 692 tx_ring); 693 continue; 694 } 695 696 spin_lock(&tx_ring->tx_idr_lock); 697 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id); 698 if (unlikely(!msdu)) { 699 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n", 700 msdu_id); 701 spin_unlock(&tx_ring->tx_idr_lock); 702 continue; 703 } 704 705 spin_unlock(&tx_ring->tx_idr_lock); 706 707 ar = ab->pdevs[mac_id].ar; 708 709 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) 710 wake_up(&ar->dp.tx_empty_waitq); 711 712 ath11k_dp_tx_complete_msdu(ar, msdu, &ts); 713 } 714 } 715 716 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid, 717 enum hal_reo_cmd_type type, 718 struct ath11k_hal_reo_cmd *cmd, 719 void (*cb)(struct ath11k_dp *, void *, 720 enum hal_reo_cmd_status)) 721 { 722 struct ath11k_dp *dp = &ab->dp; 723 struct dp_reo_cmd *dp_cmd; 724 struct hal_srng *cmd_ring; 725 int cmd_num; 726 727 if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags)) 728 return -ESHUTDOWN; 729 730 cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; 731 cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd); 732 733 /* cmd_num should start from 1, during failure return the error code */ 734 if (cmd_num < 0) 735 return cmd_num; 736 737 /* reo cmd ring descriptors has cmd_num starting from 1 */ 738 if (cmd_num == 0) 739 return -EINVAL; 740 741 if (!cb) 742 return 0; 743 744 /* Can this be optimized so that we keep the pending command list only 745 * for tid delete command to free up the resoruce on the command status 746 * indication? 747 */ 748 dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC); 749 750 if (!dp_cmd) 751 return -ENOMEM; 752 753 memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid)); 754 dp_cmd->cmd_num = cmd_num; 755 dp_cmd->handler = cb; 756 757 spin_lock_bh(&dp->reo_cmd_lock); 758 list_add_tail(&dp_cmd->list, &dp->reo_cmd_list); 759 spin_unlock_bh(&dp->reo_cmd_lock); 760 761 return 0; 762 } 763 764 static int 765 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab, 766 int mac_id, u32 ring_id, 767 enum hal_ring_type ring_type, 768 enum htt_srng_ring_type *htt_ring_type, 769 enum htt_srng_ring_id *htt_ring_id) 770 { 771 int lmac_ring_id_offset = 0; 772 int ret = 0; 773 774 switch (ring_type) { 775 case HAL_RXDMA_BUF: 776 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC; 777 778 /* for QCA6390, host fills rx buffer to fw and fw fills to 779 * rxbuf ring for each rxdma 780 */ 781 if (!ab->hw_params.rx_mac_buf_ring) { 782 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF + 783 lmac_ring_id_offset) || 784 ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF + 785 lmac_ring_id_offset))) { 786 ret = -EINVAL; 787 } 788 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING; 789 *htt_ring_type = HTT_SW_TO_HW_RING; 790 } else { 791 if (ring_id == HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF) { 792 *htt_ring_id = HTT_HOST1_TO_FW_RXBUF_RING; 793 *htt_ring_type = HTT_SW_TO_SW_RING; 794 } else { 795 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING; 796 *htt_ring_type = HTT_SW_TO_HW_RING; 797 } 798 } 799 break; 800 case HAL_RXDMA_DST: 801 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING; 802 *htt_ring_type = HTT_HW_TO_SW_RING; 803 break; 804 case HAL_RXDMA_MONITOR_BUF: 805 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING; 806 *htt_ring_type = HTT_SW_TO_HW_RING; 807 break; 808 case HAL_RXDMA_MONITOR_STATUS: 809 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING; 810 *htt_ring_type = HTT_SW_TO_HW_RING; 811 break; 812 case HAL_RXDMA_MONITOR_DST: 813 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING; 814 *htt_ring_type = HTT_HW_TO_SW_RING; 815 break; 816 case HAL_RXDMA_MONITOR_DESC: 817 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING; 818 *htt_ring_type = HTT_SW_TO_HW_RING; 819 break; 820 default: 821 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type); 822 ret = -EINVAL; 823 } 824 return ret; 825 } 826 827 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id, 828 int mac_id, enum hal_ring_type ring_type) 829 { 830 struct htt_srng_setup_cmd *cmd; 831 struct hal_srng *srng = &ab->hal.srng_list[ring_id]; 832 struct hal_srng_params params; 833 struct sk_buff *skb; 834 u32 ring_entry_sz; 835 int len = sizeof(*cmd); 836 dma_addr_t hp_addr, tp_addr; 837 enum htt_srng_ring_type htt_ring_type; 838 enum htt_srng_ring_id htt_ring_id; 839 int ret; 840 841 skb = ath11k_htc_alloc_skb(ab, len); 842 if (!skb) 843 return -ENOMEM; 844 845 memset(¶ms, 0, sizeof(params)); 846 ath11k_hal_srng_get_params(ab, srng, ¶ms); 847 848 hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng); 849 tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng); 850 851 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id, 852 ring_type, &htt_ring_type, 853 &htt_ring_id); 854 if (ret) 855 goto err_free; 856 857 skb_put(skb, len); 858 cmd = (struct htt_srng_setup_cmd *)skb->data; 859 cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE, 860 HTT_H2T_MSG_TYPE_SRING_SETUP); 861 if (htt_ring_type == HTT_SW_TO_HW_RING || 862 htt_ring_type == HTT_HW_TO_SW_RING) 863 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID, 864 DP_SW2HW_MACID(mac_id)); 865 else 866 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID, 867 mac_id); 868 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE, 869 htt_ring_type); 870 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id); 871 872 cmd->ring_base_addr_lo = params.ring_base_paddr & 873 HAL_ADDR_LSB_REG_MASK; 874 875 cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >> 876 HAL_ADDR_MSB_REG_SHIFT; 877 878 ret = ath11k_hal_srng_get_entrysize(ab, ring_type); 879 if (ret < 0) 880 goto err_free; 881 882 ring_entry_sz = ret; 883 884 ring_entry_sz >>= 2; 885 cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE, 886 ring_entry_sz); 887 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE, 888 params.num_entries * ring_entry_sz); 889 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP, 890 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP)); 891 cmd->info1 |= FIELD_PREP( 892 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP, 893 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)); 894 cmd->info1 |= FIELD_PREP( 895 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP, 896 !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP)); 897 if (htt_ring_type == HTT_SW_TO_HW_RING) 898 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS; 899 900 cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK; 901 cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >> 902 HAL_ADDR_MSB_REG_SHIFT; 903 904 cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK; 905 cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >> 906 HAL_ADDR_MSB_REG_SHIFT; 907 908 cmd->ring_msi_addr_lo = lower_32_bits(params.msi_addr); 909 cmd->ring_msi_addr_hi = upper_32_bits(params.msi_addr); 910 cmd->msi_data = params.msi_data; 911 912 cmd->intr_info = FIELD_PREP( 913 HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH, 914 params.intr_batch_cntr_thres_entries * ring_entry_sz); 915 cmd->intr_info |= FIELD_PREP( 916 HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH, 917 params.intr_timer_thres_us >> 3); 918 919 cmd->info2 = 0; 920 if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) { 921 cmd->info2 = FIELD_PREP( 922 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH, 923 params.low_threshold); 924 } 925 926 ath11k_dbg(ab, ATH11k_DBG_HAL, 927 "%s msi_addr_lo:0x%x, msi_addr_hi:0x%x, msi_data:0x%x\n", 928 __func__, cmd->ring_msi_addr_lo, cmd->ring_msi_addr_hi, 929 cmd->msi_data); 930 931 ath11k_dbg(ab, ATH11k_DBG_HAL, 932 "ring_id:%d, ring_type:%d, intr_info:0x%x, flags:0x%x\n", 933 ring_id, ring_type, cmd->intr_info, cmd->info2); 934 935 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb); 936 if (ret) 937 goto err_free; 938 939 return 0; 940 941 err_free: 942 dev_kfree_skb_any(skb); 943 944 return ret; 945 } 946 947 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ) 948 949 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab) 950 { 951 struct ath11k_dp *dp = &ab->dp; 952 struct sk_buff *skb; 953 struct htt_ver_req_cmd *cmd; 954 int len = sizeof(*cmd); 955 int ret; 956 957 init_completion(&dp->htt_tgt_version_received); 958 959 skb = ath11k_htc_alloc_skb(ab, len); 960 if (!skb) 961 return -ENOMEM; 962 963 skb_put(skb, len); 964 cmd = (struct htt_ver_req_cmd *)skb->data; 965 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID, 966 HTT_H2T_MSG_TYPE_VERSION_REQ); 967 968 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 969 if (ret) { 970 dev_kfree_skb_any(skb); 971 return ret; 972 } 973 974 ret = wait_for_completion_timeout(&dp->htt_tgt_version_received, 975 HTT_TARGET_VERSION_TIMEOUT_HZ); 976 if (ret == 0) { 977 ath11k_warn(ab, "htt target version request timed out\n"); 978 return -ETIMEDOUT; 979 } 980 981 if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) { 982 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n", 983 dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR); 984 return -ENOTSUPP; 985 } 986 987 return 0; 988 } 989 990 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask) 991 { 992 struct ath11k_base *ab = ar->ab; 993 struct ath11k_dp *dp = &ab->dp; 994 struct sk_buff *skb; 995 struct htt_ppdu_stats_cfg_cmd *cmd; 996 int len = sizeof(*cmd); 997 u8 pdev_mask; 998 int ret; 999 int i; 1000 1001 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) { 1002 skb = ath11k_htc_alloc_skb(ab, len); 1003 if (!skb) 1004 return -ENOMEM; 1005 1006 skb_put(skb, len); 1007 cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data; 1008 cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE, 1009 HTT_H2T_MSG_TYPE_PPDU_STATS_CFG); 1010 1011 pdev_mask = 1 << (ar->pdev_idx + i); 1012 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask); 1013 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask); 1014 1015 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 1016 if (ret) { 1017 dev_kfree_skb_any(skb); 1018 return ret; 1019 } 1020 } 1021 1022 return 0; 1023 } 1024 1025 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id, 1026 int mac_id, enum hal_ring_type ring_type, 1027 int rx_buf_size, 1028 struct htt_rx_ring_tlv_filter *tlv_filter) 1029 { 1030 struct htt_rx_ring_selection_cfg_cmd *cmd; 1031 struct hal_srng *srng = &ab->hal.srng_list[ring_id]; 1032 struct hal_srng_params params; 1033 struct sk_buff *skb; 1034 int len = sizeof(*cmd); 1035 enum htt_srng_ring_type htt_ring_type; 1036 enum htt_srng_ring_id htt_ring_id; 1037 int ret; 1038 1039 skb = ath11k_htc_alloc_skb(ab, len); 1040 if (!skb) 1041 return -ENOMEM; 1042 1043 memset(¶ms, 0, sizeof(params)); 1044 ath11k_hal_srng_get_params(ab, srng, ¶ms); 1045 1046 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id, 1047 ring_type, &htt_ring_type, 1048 &htt_ring_id); 1049 if (ret) 1050 goto err_free; 1051 1052 skb_put(skb, len); 1053 cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data; 1054 cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE, 1055 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG); 1056 if (htt_ring_type == HTT_SW_TO_HW_RING || 1057 htt_ring_type == HTT_HW_TO_SW_RING) 1058 cmd->info0 |= 1059 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID, 1060 DP_SW2HW_MACID(mac_id)); 1061 else 1062 cmd->info0 |= 1063 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID, 1064 mac_id); 1065 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID, 1066 htt_ring_id); 1067 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS, 1068 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP)); 1069 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS, 1070 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP)); 1071 1072 cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE, 1073 rx_buf_size); 1074 cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0; 1075 cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1; 1076 cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2; 1077 cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3; 1078 cmd->rx_filter_tlv = tlv_filter->rx_filter; 1079 1080 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb); 1081 if (ret) 1082 goto err_free; 1083 1084 return 0; 1085 1086 err_free: 1087 dev_kfree_skb_any(skb); 1088 1089 return ret; 1090 } 1091 1092 int 1093 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type, 1094 struct htt_ext_stats_cfg_params *cfg_params, 1095 u64 cookie) 1096 { 1097 struct ath11k_base *ab = ar->ab; 1098 struct ath11k_dp *dp = &ab->dp; 1099 struct sk_buff *skb; 1100 struct htt_ext_stats_cfg_cmd *cmd; 1101 u32 pdev_id; 1102 int len = sizeof(*cmd); 1103 int ret; 1104 1105 skb = ath11k_htc_alloc_skb(ab, len); 1106 if (!skb) 1107 return -ENOMEM; 1108 1109 skb_put(skb, len); 1110 1111 cmd = (struct htt_ext_stats_cfg_cmd *)skb->data; 1112 memset(cmd, 0, sizeof(*cmd)); 1113 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG; 1114 1115 if (ab->hw_params.single_pdev_only) 1116 pdev_id = ath11k_mac_get_target_pdev_id(ar); 1117 else 1118 pdev_id = ar->pdev->pdev_id; 1119 1120 cmd->hdr.pdev_mask = 1 << pdev_id; 1121 1122 cmd->hdr.stats_type = type; 1123 cmd->cfg_param0 = cfg_params->cfg0; 1124 cmd->cfg_param1 = cfg_params->cfg1; 1125 cmd->cfg_param2 = cfg_params->cfg2; 1126 cmd->cfg_param3 = cfg_params->cfg3; 1127 cmd->cookie_lsb = lower_32_bits(cookie); 1128 cmd->cookie_msb = upper_32_bits(cookie); 1129 1130 ret = ath11k_htc_send(&ab->htc, dp->eid, skb); 1131 if (ret) { 1132 ath11k_warn(ab, "failed to send htt type stats request: %d", 1133 ret); 1134 dev_kfree_skb_any(skb); 1135 return ret; 1136 } 1137 1138 return 0; 1139 } 1140 1141 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset) 1142 { 1143 struct ath11k_pdev_dp *dp = &ar->dp; 1144 struct ath11k_base *ab = ar->ab; 1145 struct htt_rx_ring_tlv_filter tlv_filter = {0}; 1146 int ret = 0, ring_id = 0, i; 1147 1148 if (ab->hw_params.full_monitor_mode) { 1149 ret = ath11k_dp_tx_htt_rx_full_mon_setup(ab, 1150 dp->mac_id, !reset); 1151 if (ret < 0) { 1152 ath11k_err(ab, "failed to setup full monitor %d\n", ret); 1153 return ret; 1154 } 1155 } 1156 1157 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id; 1158 1159 if (!reset) { 1160 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING; 1161 tlv_filter.pkt_filter_flags0 = 1162 HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 | 1163 HTT_RX_MON_MO_MGMT_FILTER_FLAGS0; 1164 tlv_filter.pkt_filter_flags1 = 1165 HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 | 1166 HTT_RX_MON_MO_MGMT_FILTER_FLAGS1; 1167 tlv_filter.pkt_filter_flags2 = 1168 HTT_RX_MON_FP_CTRL_FILTER_FLASG2 | 1169 HTT_RX_MON_MO_CTRL_FILTER_FLASG2; 1170 tlv_filter.pkt_filter_flags3 = 1171 HTT_RX_MON_FP_CTRL_FILTER_FLASG3 | 1172 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 | 1173 HTT_RX_MON_FP_DATA_FILTER_FLASG3 | 1174 HTT_RX_MON_MO_DATA_FILTER_FLASG3; 1175 } 1176 1177 if (ab->hw_params.rxdma1_enable) { 1178 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id, 1179 HAL_RXDMA_MONITOR_BUF, 1180 DP_RXDMA_REFILL_RING_SIZE, 1181 &tlv_filter); 1182 } else if (!reset) { 1183 /* set in monitor mode only */ 1184 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) { 1185 ring_id = dp->rx_mac_buf_ring[i].ring_id; 1186 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, 1187 dp->mac_id + i, 1188 HAL_RXDMA_BUF, 1189 1024, 1190 &tlv_filter); 1191 } 1192 } 1193 1194 if (ret) 1195 return ret; 1196 1197 for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) { 1198 ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id; 1199 if (!reset) { 1200 tlv_filter.rx_filter = 1201 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING; 1202 } else { 1203 tlv_filter = ath11k_mac_mon_status_filter_default; 1204 1205 if (ath11k_debugfs_is_extd_rx_stats_enabled(ar)) 1206 tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar); 1207 } 1208 1209 ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id, 1210 dp->mac_id + i, 1211 HAL_RXDMA_MONITOR_STATUS, 1212 DP_RXDMA_REFILL_RING_SIZE, 1213 &tlv_filter); 1214 } 1215 1216 if (!ar->ab->hw_params.rxdma1_enable) 1217 mod_timer(&ar->ab->mon_reap_timer, jiffies + 1218 msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL)); 1219 1220 return ret; 1221 } 1222 1223 int ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base *ab, int mac_id, 1224 bool config) 1225 { 1226 struct htt_rx_full_monitor_mode_cfg_cmd *cmd; 1227 struct sk_buff *skb; 1228 int ret, len = sizeof(*cmd); 1229 1230 skb = ath11k_htc_alloc_skb(ab, len); 1231 if (!skb) 1232 return -ENOMEM; 1233 1234 skb_put(skb, len); 1235 cmd = (struct htt_rx_full_monitor_mode_cfg_cmd *)skb->data; 1236 memset(cmd, 0, sizeof(*cmd)); 1237 cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE, 1238 HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE); 1239 1240 cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id); 1241 1242 cmd->cfg = HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ENABLE | 1243 FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING, 1244 HTT_RX_MON_RING_SW); 1245 if (config) { 1246 cmd->cfg |= HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ZERO_MPDUS_END | 1247 HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_NON_ZERO_MPDUS_END; 1248 } 1249 1250 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb); 1251 if (ret) 1252 goto err_free; 1253 1254 return 0; 1255 1256 err_free: 1257 dev_kfree_skb_any(skb); 1258 1259 return ret; 1260 } 1261