1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef ATH11K_CORE_H 7 #define ATH11K_CORE_H 8 9 #include <linux/types.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 #include <linux/bitfield.h> 13 #if defined(__FreeBSD__) 14 #include <linux/wait.h> 15 #endif 16 #include "qmi.h" 17 #include "htc.h" 18 #include "wmi.h" 19 #include "hal.h" 20 #include "dp.h" 21 #include "ce.h" 22 #include "mac.h" 23 #include "hw.h" 24 #include "hal_rx.h" 25 #include "reg.h" 26 #include "thermal.h" 27 #include "dbring.h" 28 #include "spectral.h" 29 30 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 31 32 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 33 34 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 35 36 /* Pending management packets threshold for dropping probe responses */ 37 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 38 39 #define ATH11K_INVALID_HW_MAC_ID 0xFF 40 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 41 42 extern unsigned int ath11k_frame_mode; 43 44 #define ATH11K_MON_TIMER_INTERVAL 10 45 46 enum ath11k_supported_bw { 47 ATH11K_BW_20 = 0, 48 ATH11K_BW_40 = 1, 49 ATH11K_BW_80 = 2, 50 ATH11K_BW_160 = 3, 51 }; 52 53 enum ath11k_bdf_search { 54 ATH11K_BDF_SEARCH_DEFAULT, 55 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 56 }; 57 58 #if defined(__FreeBSD__) 59 #ifdef WME_AC_BE 60 #undef WME_AC_BE 61 #endif 62 #ifdef WME_AC_BK 63 #undef WME_AC_BK 64 #endif 65 #ifdef WME_AC_VI 66 #undef WME_AC_VI 67 #endif 68 #ifdef WME_AC_VO 69 #undef WME_AC_VO 70 #endif 71 #ifdef WME_NUM_AC 72 #undef WME_NUM_AC 73 #endif 74 #endif 75 76 enum wme_ac { 77 WME_AC_BE, 78 WME_AC_BK, 79 WME_AC_VI, 80 WME_AC_VO, 81 WME_NUM_AC 82 }; 83 84 #define ATH11K_HT_MCS_MAX 7 85 #define ATH11K_VHT_MCS_MAX 9 86 #define ATH11K_HE_MCS_MAX 11 87 88 enum ath11k_crypt_mode { 89 /* Only use hardware crypto engine */ 90 ATH11K_CRYPT_MODE_HW, 91 /* Only use software crypto */ 92 ATH11K_CRYPT_MODE_SW, 93 }; 94 95 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 96 { 97 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 98 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 99 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 100 WME_AC_VO); 101 } 102 103 enum ath11k_skb_flags { 104 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 105 ATH11K_SKB_CIPHER_SET = BIT(1), 106 }; 107 108 struct ath11k_skb_cb { 109 dma_addr_t paddr; 110 u8 eid; 111 u8 flags; 112 u32 cipher; 113 struct ath11k *ar; 114 struct ieee80211_vif *vif; 115 } __packed; 116 117 struct ath11k_skb_rxcb { 118 dma_addr_t paddr; 119 bool is_first_msdu; 120 bool is_last_msdu; 121 bool is_continuation; 122 bool is_mcbc; 123 bool is_eapol; 124 struct hal_rx_desc *rx_desc; 125 u8 err_rel_src; 126 u8 err_code; 127 u8 mac_id; 128 u8 unmapped; 129 u8 is_frag; 130 u8 tid; 131 u16 peer_id; 132 u16 seq_no; 133 }; 134 135 enum ath11k_hw_rev { 136 ATH11K_HW_IPQ8074, 137 ATH11K_HW_QCA6390_HW20, 138 ATH11K_HW_IPQ6018_HW10, 139 ATH11K_HW_QCN9074_HW10, 140 ATH11K_HW_WCN6855_HW20, 141 ATH11K_HW_WCN6855_HW21, 142 }; 143 144 enum ath11k_firmware_mode { 145 /* the default mode, standard 802.11 functionality */ 146 ATH11K_FIRMWARE_MODE_NORMAL, 147 148 /* factory tests etc */ 149 ATH11K_FIRMWARE_MODE_FTM, 150 151 /* Cold boot calibration */ 152 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 153 }; 154 155 extern bool ath11k_cold_boot_cal; 156 157 #define ATH11K_IRQ_NUM_MAX 52 158 #define ATH11K_EXT_IRQ_NUM_MAX 16 159 160 struct ath11k_ext_irq_grp { 161 struct ath11k_base *ab; 162 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 163 u32 num_irq; 164 u32 grp_id; 165 u64 timestamp; 166 bool napi_enabled; 167 struct napi_struct napi; 168 struct net_device napi_ndev; 169 }; 170 171 #define HEHANDLE_CAP_PHYINFO_SIZE 3 172 #define HECAP_PHYINFO_SIZE 9 173 #define HECAP_MACINFO_SIZE 5 174 #define HECAP_TXRX_MCS_NSS_SIZE 2 175 #define HECAP_PPET16_PPET8_MAX_SIZE 25 176 177 #define HE_PPET16_PPET8_SIZE 8 178 179 /* 802.11ax PPE (PPDU packet Extension) threshold */ 180 struct he_ppe_threshold { 181 u32 numss_m1; 182 u32 ru_mask; 183 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 184 }; 185 186 struct ath11k_he { 187 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 188 u32 hecap_rxmcsnssmap; 189 u32 hecap_txmcsnssmap; 190 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 191 struct he_ppe_threshold hecap_ppet; 192 u32 heop_param; 193 }; 194 195 #define MAX_RADIOS 3 196 197 enum { 198 WMI_HOST_TP_SCALE_MAX = 0, 199 WMI_HOST_TP_SCALE_50 = 1, 200 WMI_HOST_TP_SCALE_25 = 2, 201 WMI_HOST_TP_SCALE_12 = 3, 202 WMI_HOST_TP_SCALE_MIN = 4, 203 WMI_HOST_TP_SCALE_SIZE = 5, 204 }; 205 206 enum ath11k_scan_state { 207 ATH11K_SCAN_IDLE, 208 ATH11K_SCAN_STARTING, 209 ATH11K_SCAN_RUNNING, 210 ATH11K_SCAN_ABORTING, 211 }; 212 213 enum ath11k_dev_flags { 214 ATH11K_CAC_RUNNING, 215 ATH11K_FLAG_CORE_REGISTERED, 216 ATH11K_FLAG_CRASH_FLUSH, 217 ATH11K_FLAG_RAW_MODE, 218 ATH11K_FLAG_HW_CRYPTO_DISABLED, 219 ATH11K_FLAG_BTCOEX, 220 ATH11K_FLAG_RECOVERY, 221 ATH11K_FLAG_UNREGISTERING, 222 ATH11K_FLAG_REGISTERED, 223 ATH11K_FLAG_QMI_FAIL, 224 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 225 ATH11K_FLAG_CE_IRQ_ENABLED, 226 ATH11K_FLAG_EXT_IRQ_ENABLED, 227 ATH11K_FLAG_FIXED_MEM_RGN, 228 }; 229 230 enum ath11k_monitor_flags { 231 ATH11K_FLAG_MONITOR_CONF_ENABLED, 232 ATH11K_FLAG_MONITOR_STARTED, 233 ATH11K_FLAG_MONITOR_VDEV_CREATED, 234 }; 235 236 struct ath11k_vif { 237 u32 vdev_id; 238 enum wmi_vdev_type vdev_type; 239 enum wmi_vdev_subtype vdev_subtype; 240 u32 beacon_interval; 241 u32 dtim_period; 242 u16 ast_hash; 243 u16 ast_idx; 244 u16 tcl_metadata; 245 u8 hal_addr_search_flags; 246 u8 search_type; 247 248 struct ath11k *ar; 249 struct ieee80211_vif *vif; 250 251 u16 tx_seq_no; 252 struct wmi_wmm_params_all_arg wmm_params; 253 struct list_head list; 254 union { 255 struct { 256 u32 uapsd; 257 } sta; 258 struct { 259 /* 127 stations; wmi limit */ 260 u8 tim_bitmap[16]; 261 u8 tim_len; 262 u32 ssid_len; 263 u8 ssid[IEEE80211_MAX_SSID_LEN]; 264 bool hidden_ssid; 265 /* P2P_IE with NoA attribute for P2P_GO case */ 266 u32 noa_len; 267 u8 *noa_data; 268 } ap; 269 } u; 270 271 bool is_started; 272 bool is_up; 273 bool spectral_enabled; 274 bool ps; 275 u32 aid; 276 u8 bssid[ETH_ALEN]; 277 struct cfg80211_bitrate_mask bitrate_mask; 278 struct delayed_work connection_loss_work; 279 int num_legacy_stations; 280 int rtscts_prot_mode; 281 int txpower; 282 bool rsnie_present; 283 bool wpaie_present; 284 bool bcca_zero_sent; 285 bool do_not_send_tmpl; 286 struct ieee80211_chanctx_conf chanctx; 287 }; 288 289 struct ath11k_vif_iter { 290 u32 vdev_id; 291 struct ath11k_vif *arvif; 292 }; 293 294 struct ath11k_rx_peer_stats { 295 u64 num_msdu; 296 u64 num_mpdu_fcs_ok; 297 u64 num_mpdu_fcs_err; 298 u64 tcp_msdu_count; 299 u64 udp_msdu_count; 300 u64 other_msdu_count; 301 u64 ampdu_msdu_count; 302 u64 non_ampdu_msdu_count; 303 u64 stbc_count; 304 u64 beamformed_count; 305 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 306 u64 nss_count[HAL_RX_MAX_NSS]; 307 u64 bw_count[HAL_RX_BW_MAX]; 308 u64 gi_count[HAL_RX_GI_MAX]; 309 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 310 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 311 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 312 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 313 u64 rx_duration; 314 u64 dcm_count; 315 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 316 }; 317 318 #define ATH11K_HE_MCS_NUM 12 319 #define ATH11K_VHT_MCS_NUM 10 320 #define ATH11K_BW_NUM 4 321 #define ATH11K_NSS_NUM 4 322 #define ATH11K_LEGACY_NUM 12 323 #define ATH11K_GI_NUM 4 324 #define ATH11K_HT_MCS_NUM 32 325 326 enum ath11k_pkt_rx_err { 327 ATH11K_PKT_RX_ERR_FCS, 328 ATH11K_PKT_RX_ERR_TKIP, 329 ATH11K_PKT_RX_ERR_CRYPT, 330 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 331 ATH11K_PKT_RX_ERR_MAX, 332 }; 333 334 enum ath11k_ampdu_subfrm_num { 335 ATH11K_AMPDU_SUBFRM_NUM_10, 336 ATH11K_AMPDU_SUBFRM_NUM_20, 337 ATH11K_AMPDU_SUBFRM_NUM_30, 338 ATH11K_AMPDU_SUBFRM_NUM_40, 339 ATH11K_AMPDU_SUBFRM_NUM_50, 340 ATH11K_AMPDU_SUBFRM_NUM_60, 341 ATH11K_AMPDU_SUBFRM_NUM_MORE, 342 ATH11K_AMPDU_SUBFRM_NUM_MAX, 343 }; 344 345 enum ath11k_amsdu_subfrm_num { 346 ATH11K_AMSDU_SUBFRM_NUM_1, 347 ATH11K_AMSDU_SUBFRM_NUM_2, 348 ATH11K_AMSDU_SUBFRM_NUM_3, 349 ATH11K_AMSDU_SUBFRM_NUM_4, 350 ATH11K_AMSDU_SUBFRM_NUM_MORE, 351 ATH11K_AMSDU_SUBFRM_NUM_MAX, 352 }; 353 354 enum ath11k_counter_type { 355 ATH11K_COUNTER_TYPE_BYTES, 356 ATH11K_COUNTER_TYPE_PKTS, 357 ATH11K_COUNTER_TYPE_MAX, 358 }; 359 360 enum ath11k_stats_type { 361 ATH11K_STATS_TYPE_SUCC, 362 ATH11K_STATS_TYPE_FAIL, 363 ATH11K_STATS_TYPE_RETRY, 364 ATH11K_STATS_TYPE_AMPDU, 365 ATH11K_STATS_TYPE_MAX, 366 }; 367 368 struct ath11k_htt_data_stats { 369 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 370 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 371 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 372 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 373 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 374 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 375 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 376 }; 377 378 struct ath11k_htt_tx_stats { 379 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 380 u64 tx_duration; 381 u64 ba_fails; 382 u64 ack_fails; 383 }; 384 385 struct ath11k_per_ppdu_tx_stats { 386 u16 succ_pkts; 387 u16 failed_pkts; 388 u16 retry_pkts; 389 u32 succ_bytes; 390 u32 failed_bytes; 391 u32 retry_bytes; 392 }; 393 394 struct ath11k_sta { 395 struct ath11k_vif *arvif; 396 397 /* the following are protected by ar->data_lock */ 398 u32 changed; /* IEEE80211_RC_* */ 399 u32 bw; 400 u32 nss; 401 u32 smps; 402 enum hal_pn_type pn_type; 403 404 struct work_struct update_wk; 405 struct work_struct set_4addr_wk; 406 struct rate_info txrate; 407 u32 peer_nss; 408 struct rate_info last_txrate; 409 u64 rx_duration; 410 u64 tx_duration; 411 u8 rssi_comb; 412 s8 rssi_beacon; 413 s8 chain_signal[IEEE80211_MAX_CHAINS]; 414 struct ath11k_htt_tx_stats *tx_stats; 415 struct ath11k_rx_peer_stats *rx_stats; 416 417 #ifdef CONFIG_MAC80211_DEBUGFS 418 /* protected by conf_mutex */ 419 bool aggr_mode; 420 #endif 421 422 bool use_4addr_set; 423 u16 tcl_metadata; 424 }; 425 426 #define ATH11K_MIN_5G_FREQ 4150 427 #define ATH11K_MIN_6G_FREQ 5925 428 #define ATH11K_MAX_6G_FREQ 7115 429 #define ATH11K_NUM_CHANS 101 430 #define ATH11K_MAX_5G_CHAN 173 431 432 enum ath11k_state { 433 ATH11K_STATE_OFF, 434 ATH11K_STATE_ON, 435 ATH11K_STATE_RESTARTING, 436 ATH11K_STATE_RESTARTED, 437 ATH11K_STATE_WEDGED, 438 /* Add other states as required */ 439 }; 440 441 /* Antenna noise floor */ 442 #define ATH11K_DEFAULT_NOISE_FLOOR -95 443 444 #define ATH11K_INVALID_RSSI_FULL -1 445 446 #define ATH11K_INVALID_RSSI_EMPTY -128 447 448 struct ath11k_fw_stats { 449 struct dentry *debugfs_fwstats; 450 u32 pdev_id; 451 u32 stats_id; 452 struct list_head pdevs; 453 struct list_head vdevs; 454 struct list_head bcn; 455 }; 456 457 struct ath11k_dbg_htt_stats { 458 u8 type; 459 u8 reset; 460 struct debug_htt_stats_req *stats_req; 461 /* protects shared stats req buffer */ 462 spinlock_t lock; 463 }; 464 465 struct ath11k_debug { 466 struct dentry *debugfs_pdev; 467 struct ath11k_dbg_htt_stats htt_stats; 468 u32 extd_tx_stats; 469 struct ath11k_fw_stats fw_stats; 470 struct completion fw_stats_complete; 471 bool fw_stats_done; 472 u32 extd_rx_stats; 473 u32 pktlog_filter; 474 u32 pktlog_mode; 475 u32 pktlog_peer_valid; 476 u8 pktlog_peer_addr[ETH_ALEN]; 477 u32 rx_filter; 478 }; 479 480 struct ath11k_per_peer_tx_stats { 481 u32 succ_bytes; 482 u32 retry_bytes; 483 u32 failed_bytes; 484 u16 succ_pkts; 485 u16 retry_pkts; 486 u16 failed_pkts; 487 u32 duration; 488 u8 ba_fails; 489 bool is_ampdu; 490 }; 491 492 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 493 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 494 495 struct ath11k { 496 struct ath11k_base *ab; 497 struct ath11k_pdev *pdev; 498 struct ieee80211_hw *hw; 499 struct ieee80211_ops *ops; 500 struct ath11k_pdev_wmi *wmi; 501 struct ath11k_pdev_dp dp; 502 u8 mac_addr[ETH_ALEN]; 503 u32 ht_cap_info; 504 u32 vht_cap_info; 505 struct ath11k_he ar_he; 506 enum ath11k_state state; 507 bool supports_6ghz; 508 struct { 509 struct completion started; 510 struct completion completed; 511 struct completion on_channel; 512 struct delayed_work timeout; 513 enum ath11k_scan_state state; 514 bool is_roc; 515 int vdev_id; 516 int roc_freq; 517 bool roc_notify; 518 } scan; 519 520 struct { 521 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 522 struct ieee80211_sband_iftype_data 523 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 524 } mac; 525 526 unsigned long dev_flags; 527 unsigned int filter_flags; 528 unsigned long monitor_flags; 529 u32 min_tx_power; 530 u32 max_tx_power; 531 u32 txpower_limit_2g; 532 u32 txpower_limit_5g; 533 u32 txpower_scale; 534 u32 power_scale; 535 u32 chan_tx_pwr; 536 u32 num_stations; 537 u32 max_num_stations; 538 /* To synchronize concurrent synchronous mac80211 callback operations, 539 * concurrent debugfs configuration and concurrent FW statistics events. 540 */ 541 struct mutex conf_mutex; 542 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 543 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 544 * channel context data, survey info, test mode data. 545 */ 546 spinlock_t data_lock; 547 548 struct list_head arvifs; 549 /* should never be NULL; needed for regular htt rx */ 550 struct ieee80211_channel *rx_channel; 551 552 /* valid during scan; needed for mgmt rx during scan */ 553 struct ieee80211_channel *scan_channel; 554 555 u8 cfg_tx_chainmask; 556 u8 cfg_rx_chainmask; 557 u8 num_rx_chains; 558 u8 num_tx_chains; 559 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 560 u8 pdev_idx; 561 u8 lmac_id; 562 563 struct completion peer_assoc_done; 564 struct completion peer_delete_done; 565 566 int install_key_status; 567 struct completion install_key_done; 568 569 int last_wmi_vdev_start_status; 570 struct completion vdev_setup_done; 571 struct completion vdev_delete_done; 572 573 int num_peers; 574 int max_num_peers; 575 u32 num_started_vdevs; 576 u32 num_created_vdevs; 577 unsigned long long allocated_vdev_map; 578 579 struct idr txmgmt_idr; 580 /* protects txmgmt_idr data */ 581 spinlock_t txmgmt_idr_lock; 582 atomic_t num_pending_mgmt_tx; 583 wait_queue_head_t txmgmt_empty_waitq; 584 585 /* cycle count is reported twice for each visited channel during scan. 586 * access protected by data_lock 587 */ 588 u32 survey_last_rx_clear_count; 589 u32 survey_last_cycle_count; 590 591 /* Channel info events are expected to come in pairs without and with 592 * COMPLETE flag set respectively for each channel visit during scan. 593 * 594 * However there are deviations from this rule. This flag is used to 595 * avoid reporting garbage data. 596 */ 597 bool ch_info_can_report_survey; 598 struct survey_info survey[ATH11K_NUM_CHANS]; 599 struct completion bss_survey_done; 600 601 struct work_struct regd_update_work; 602 603 struct work_struct wmi_mgmt_tx_work; 604 struct sk_buff_head wmi_mgmt_tx_queue; 605 606 struct ath11k_per_peer_tx_stats peer_tx_stats; 607 struct list_head ppdu_stats_info; 608 u32 ppdu_stat_list_depth; 609 610 struct ath11k_per_peer_tx_stats cached_stats; 611 u32 last_ppdu_id; 612 u32 cached_ppdu_id; 613 int monitor_vdev_id; 614 #ifdef CONFIG_ATH11K_DEBUGFS 615 struct ath11k_debug debug; 616 #endif 617 #ifdef CONFIG_ATH11K_SPECTRAL 618 struct ath11k_spectral spectral; 619 #endif 620 bool dfs_block_radar_events; 621 struct ath11k_thermal thermal; 622 u32 vdev_id_11d_scan; 623 struct completion finish_11d_scan; 624 struct completion finish_11d_ch_list; 625 bool pending_11d; 626 bool regdom_set_by_user; 627 int hw_rate_code; 628 }; 629 630 struct ath11k_band_cap { 631 u32 phy_id; 632 u32 max_bw_supported; 633 u32 ht_cap_info; 634 u32 he_cap_info[2]; 635 u32 he_mcs; 636 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 637 struct ath11k_ppe_threshold he_ppet; 638 u16 he_6ghz_capa; 639 }; 640 641 struct ath11k_pdev_cap { 642 u32 supported_bands; 643 u32 ampdu_density; 644 u32 vht_cap; 645 u32 vht_mcs; 646 u32 he_mcs; 647 u32 tx_chain_mask; 648 u32 rx_chain_mask; 649 u32 tx_chain_mask_shift; 650 u32 rx_chain_mask_shift; 651 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 652 bool nss_ratio_enabled; 653 u8 nss_ratio_info; 654 }; 655 656 struct ath11k_pdev { 657 struct ath11k *ar; 658 u32 pdev_id; 659 struct ath11k_pdev_cap cap; 660 u8 mac_addr[ETH_ALEN]; 661 }; 662 663 struct ath11k_board_data { 664 const struct firmware *fw; 665 const void *data; 666 size_t len; 667 }; 668 669 struct ath11k_bus_params { 670 bool mhi_support; 671 bool m3_fw_support; 672 bool fixed_bdf_addr; 673 bool fixed_mem_region; 674 bool static_window_map; 675 }; 676 677 /* IPQ8074 HW channel counters frequency value in hertz */ 678 #define IPQ8074_CC_FREQ_HERTZ 320000 679 680 struct ath11k_bp_stats { 681 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 682 u16 hp; 683 684 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 685 u16 tp; 686 687 /* Number of Backpressure events received for the ring */ 688 u32 count; 689 690 /* Last recorded event timestamp */ 691 unsigned long jiffies; 692 }; 693 694 struct ath11k_dp_ring_bp_stats { 695 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 696 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 697 }; 698 699 struct ath11k_soc_dp_tx_err_stats { 700 /* TCL Ring Descriptor unavailable */ 701 u32 desc_na[DP_TCL_NUM_RING_MAX]; 702 /* Other failures during dp_tx due to mem allocation failure 703 * idr unavailable etc. 704 */ 705 atomic_t misc_fail; 706 }; 707 708 struct ath11k_soc_dp_stats { 709 u32 err_ring_pkts; 710 u32 invalid_rbm; 711 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 712 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 713 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 714 struct ath11k_soc_dp_tx_err_stats tx_err; 715 struct ath11k_dp_ring_bp_stats bp_stats; 716 }; 717 718 /* Master structure to hold the hw data which may be used in core module */ 719 struct ath11k_base { 720 enum ath11k_hw_rev hw_rev; 721 struct platform_device *pdev; 722 struct device *dev; 723 struct ath11k_qmi qmi; 724 struct ath11k_wmi_base wmi_ab; 725 struct completion fw_ready; 726 int num_radios; 727 /* HW channel counters frequency value in hertz common to all MACs */ 728 u32 cc_freq_hz; 729 730 struct ath11k_htc htc; 731 732 struct ath11k_dp dp; 733 734 void __iomem *mem; 735 unsigned long mem_len; 736 737 struct { 738 enum ath11k_bus bus; 739 const struct ath11k_hif_ops *ops; 740 } hif; 741 742 struct { 743 struct completion wakeup_completed; 744 } wow; 745 746 struct ath11k_ce ce; 747 struct timer_list rx_replenish_retry; 748 struct ath11k_hal hal; 749 /* To synchronize core_start/core_stop */ 750 struct mutex core_lock; 751 /* Protects data like peers */ 752 spinlock_t base_lock; 753 struct ath11k_pdev pdevs[MAX_RADIOS]; 754 struct { 755 enum WMI_HOST_WLAN_BAND supported_bands; 756 u32 pdev_id; 757 } target_pdev_ids[MAX_RADIOS]; 758 u8 target_pdev_count; 759 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 760 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 761 unsigned long long free_vdev_map; 762 struct list_head peers; 763 wait_queue_head_t peer_mapping_wq; 764 u8 mac_addr[ETH_ALEN]; 765 bool wmi_ready; 766 u32 wlan_init_status; 767 int irq_num[ATH11K_IRQ_NUM_MAX]; 768 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 769 struct ath11k_targ_cap target_caps; 770 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 771 bool pdevs_macaddr_valid; 772 int bd_api; 773 774 struct ath11k_hw_params hw_params; 775 struct ath11k_bus_params bus_params; 776 777 const struct firmware *cal_file; 778 779 /* Below regd's are protected by ab->data_lock */ 780 /* This is the regd set for every radio 781 * by the firmware during initializatin 782 */ 783 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 784 /* This regd is set during dynamic country setting 785 * This may or may not be used during the runtime 786 */ 787 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 788 789 /* Current DFS Regulatory */ 790 enum ath11k_dfs_region dfs_region; 791 #ifdef CONFIG_ATH11K_DEBUGFS 792 struct dentry *debugfs_soc; 793 struct dentry *debugfs_ath11k; 794 #endif 795 struct ath11k_soc_dp_stats soc_stats; 796 797 unsigned long dev_flags; 798 struct completion driver_recovery; 799 struct workqueue_struct *workqueue; 800 struct work_struct restart_work; 801 struct work_struct update_11d_work; 802 u8 new_alpha2[3]; 803 struct { 804 /* protected by data_lock */ 805 u32 fw_crash_counter; 806 } stats; 807 u32 pktlog_defs_checksum; 808 809 struct ath11k_dbring_cap *db_caps; 810 u32 num_db_cap; 811 struct work_struct rfkill_work; 812 813 /* true means radio is on */ 814 bool rfkill_radio_on; 815 816 /* To synchronize 11d scan vdev id */ 817 struct mutex vdev_id_11d_lock; 818 struct timer_list mon_reap_timer; 819 820 struct completion htc_suspend; 821 822 struct { 823 enum ath11k_bdf_search bdf_search; 824 u32 vendor; 825 u32 device; 826 u32 subsystem_vendor; 827 u32 subsystem_device; 828 } id; 829 830 /* must be last */ 831 u8 drv_priv[0] __aligned(sizeof(void *)); 832 }; 833 834 struct ath11k_fw_stats_pdev { 835 struct list_head list; 836 837 /* PDEV stats */ 838 s32 ch_noise_floor; 839 /* Cycles spent transmitting frames */ 840 u32 tx_frame_count; 841 /* Cycles spent receiving frames */ 842 u32 rx_frame_count; 843 /* Total channel busy time, evidently */ 844 u32 rx_clear_count; 845 /* Total on-channel time */ 846 u32 cycle_count; 847 u32 phy_err_count; 848 u32 chan_tx_power; 849 u32 ack_rx_bad; 850 u32 rts_bad; 851 u32 rts_good; 852 u32 fcs_bad; 853 u32 no_beacons; 854 u32 mib_int_count; 855 856 /* PDEV TX stats */ 857 /* Num HTT cookies queued to dispatch list */ 858 s32 comp_queued; 859 /* Num HTT cookies dispatched */ 860 s32 comp_delivered; 861 /* Num MSDU queued to WAL */ 862 s32 msdu_enqued; 863 /* Num MPDU queue to WAL */ 864 s32 mpdu_enqued; 865 /* Num MSDUs dropped by WMM limit */ 866 s32 wmm_drop; 867 /* Num Local frames queued */ 868 s32 local_enqued; 869 /* Num Local frames done */ 870 s32 local_freed; 871 /* Num queued to HW */ 872 s32 hw_queued; 873 /* Num PPDU reaped from HW */ 874 s32 hw_reaped; 875 /* Num underruns */ 876 s32 underrun; 877 /* Num hw paused */ 878 u32 hw_paused; 879 /* Num PPDUs cleaned up in TX abort */ 880 s32 tx_abort; 881 /* Num MPDUs requeued by SW */ 882 s32 mpdus_requeued; 883 /* excessive retries */ 884 u32 tx_ko; 885 u32 tx_xretry; 886 /* data hw rate code */ 887 u32 data_rc; 888 /* Scheduler self triggers */ 889 u32 self_triggers; 890 /* frames dropped due to excessive sw retries */ 891 u32 sw_retry_failure; 892 /* illegal rate phy errors */ 893 u32 illgl_rate_phy_err; 894 /* wal pdev continuous xretry */ 895 u32 pdev_cont_xretry; 896 /* wal pdev tx timeouts */ 897 u32 pdev_tx_timeout; 898 /* wal pdev resets */ 899 u32 pdev_resets; 900 /* frames dropped due to non-availability of stateless TIDs */ 901 u32 stateless_tid_alloc_failure; 902 /* PhY/BB underrun */ 903 u32 phy_underrun; 904 /* MPDU is more than txop limit */ 905 u32 txop_ovf; 906 /* Num sequences posted */ 907 u32 seq_posted; 908 /* Num sequences failed in queueing */ 909 u32 seq_failed_queueing; 910 /* Num sequences completed */ 911 u32 seq_completed; 912 /* Num sequences restarted */ 913 u32 seq_restarted; 914 /* Num of MU sequences posted */ 915 u32 mu_seq_posted; 916 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 917 * (Reset,channel change) 918 */ 919 s32 mpdus_sw_flush; 920 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 921 s32 mpdus_hw_filter; 922 /* Num MPDUs truncated by PDG (TXOP, TBTT, 923 * PPDU_duration based on rate, dyn_bw) 924 */ 925 s32 mpdus_truncated; 926 /* Num MPDUs that was tried but didn't receive ACK or BA */ 927 s32 mpdus_ack_failed; 928 /* Num MPDUs that was dropped du to expiry. */ 929 s32 mpdus_expired; 930 931 /* PDEV RX stats */ 932 /* Cnts any change in ring routing mid-ppdu */ 933 s32 mid_ppdu_route_change; 934 /* Total number of statuses processed */ 935 s32 status_rcvd; 936 /* Extra frags on rings 0-3 */ 937 s32 r0_frags; 938 s32 r1_frags; 939 s32 r2_frags; 940 s32 r3_frags; 941 /* MSDUs / MPDUs delivered to HTT */ 942 s32 htt_msdus; 943 s32 htt_mpdus; 944 /* MSDUs / MPDUs delivered to local stack */ 945 s32 loc_msdus; 946 s32 loc_mpdus; 947 /* AMSDUs that have more MSDUs than the status ring size */ 948 s32 oversize_amsdu; 949 /* Number of PHY errors */ 950 s32 phy_errs; 951 /* Number of PHY errors drops */ 952 s32 phy_err_drop; 953 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 954 s32 mpdu_errs; 955 /* Num overflow errors */ 956 s32 rx_ovfl_errs; 957 }; 958 959 struct ath11k_fw_stats_vdev { 960 struct list_head list; 961 962 u32 vdev_id; 963 u32 beacon_snr; 964 u32 data_snr; 965 u32 num_tx_frames[WLAN_MAX_AC]; 966 u32 num_rx_frames; 967 u32 num_tx_frames_retries[WLAN_MAX_AC]; 968 u32 num_tx_frames_failures[WLAN_MAX_AC]; 969 u32 num_rts_fail; 970 u32 num_rts_success; 971 u32 num_rx_err; 972 u32 num_rx_discard; 973 u32 num_tx_not_acked; 974 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 975 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 976 }; 977 978 struct ath11k_fw_stats_bcn { 979 struct list_head list; 980 981 u32 vdev_id; 982 u32 tx_bcn_succ_cnt; 983 u32 tx_bcn_outage_cnt; 984 }; 985 986 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 987 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 988 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 989 990 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 991 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 992 993 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 994 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 995 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 996 int ath11k_core_pre_init(struct ath11k_base *ab); 997 int ath11k_core_init(struct ath11k_base *ath11k); 998 void ath11k_core_deinit(struct ath11k_base *ath11k); 999 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1000 enum ath11k_bus bus, 1001 const struct ath11k_bus_params *bus_params); 1002 void ath11k_core_free(struct ath11k_base *ath11k); 1003 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1004 struct ath11k_board_data *bd); 1005 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1006 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1007 struct ath11k_board_data *bd, 1008 const char *name); 1009 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1010 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1011 1012 void ath11k_core_halt(struct ath11k *ar); 1013 int ath11k_core_resume(struct ath11k_base *ab); 1014 int ath11k_core_suspend(struct ath11k_base *ab); 1015 1016 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1017 const char *filename); 1018 1019 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1020 { 1021 switch (state) { 1022 case ATH11K_SCAN_IDLE: 1023 return "idle"; 1024 case ATH11K_SCAN_STARTING: 1025 return "starting"; 1026 case ATH11K_SCAN_RUNNING: 1027 return "running"; 1028 case ATH11K_SCAN_ABORTING: 1029 return "aborting"; 1030 } 1031 1032 return "unknown"; 1033 } 1034 1035 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1036 { 1037 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1038 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1039 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1040 } 1041 1042 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1043 { 1044 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1045 return (struct ath11k_skb_rxcb *)skb->cb; 1046 } 1047 1048 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1049 { 1050 return (struct ath11k_vif *)vif->drv_priv; 1051 } 1052 1053 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1054 int mac_id) 1055 { 1056 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1057 } 1058 1059 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1060 const char *filename, 1061 void *buf, size_t buf_len) 1062 { 1063 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1064 ab->hw_params.fw.dir, filename); 1065 } 1066 1067 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1068 { 1069 switch (bus) { 1070 case ATH11K_BUS_PCI: 1071 return "pci"; 1072 case ATH11K_BUS_AHB: 1073 return "ahb"; 1074 } 1075 1076 return "unknown"; 1077 } 1078 1079 #endif /* _CORE_H_ */ 1080