1*da8fa4e3SBjoern A. Zeeb /* SPDX-License-Identifier: ISC */ 2*da8fa4e3SBjoern A. Zeeb /* 3*da8fa4e3SBjoern A. Zeeb * Copyright (c) 2004-2011 Atheros Communications Inc. 4*da8fa4e3SBjoern A. Zeeb * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. 5*da8fa4e3SBjoern A. Zeeb * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com> 6*da8fa4e3SBjoern A. Zeeb */ 7*da8fa4e3SBjoern A. Zeeb 8*da8fa4e3SBjoern A. Zeeb #ifndef _USB_H_ 9*da8fa4e3SBjoern A. Zeeb #define _USB_H_ 10*da8fa4e3SBjoern A. Zeeb 11*da8fa4e3SBjoern A. Zeeb /* constants */ 12*da8fa4e3SBjoern A. Zeeb #define TX_URB_COUNT 32 13*da8fa4e3SBjoern A. Zeeb #define RX_URB_COUNT 32 14*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_RX_BUFFER_SIZE 4096 15*da8fa4e3SBjoern A. Zeeb 16*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_PIPE_INVALID ATH10K_USB_PIPE_MAX 17*da8fa4e3SBjoern A. Zeeb 18*da8fa4e3SBjoern A. Zeeb /* USB endpoint definitions */ 19*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_CTRL_IN 0x81 20*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_DATA_IN 0x82 21*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_DATA2_IN 0x83 22*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_INT_IN 0x84 23*da8fa4e3SBjoern A. Zeeb 24*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_CTRL_OUT 0x01 25*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_DATA_LP_OUT 0x02 26*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_DATA_MP_OUT 0x03 27*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_EP_ADDR_APP_DATA_HP_OUT 0x04 28*da8fa4e3SBjoern A. Zeeb 29*da8fa4e3SBjoern A. Zeeb /* diagnostic command defnitions */ 30*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CONTROL_REQ_SEND_BMI_CMD 1 31*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CONTROL_REQ_RECV_BMI_RESP 2 32*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CONTROL_REQ_DIAG_CMD 3 33*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CONTROL_REQ_DIAG_RESP 4 34*da8fa4e3SBjoern A. Zeeb 35*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CTRL_DIAG_CC_READ 0 36*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_CTRL_DIAG_CC_WRITE 1 37*da8fa4e3SBjoern A. Zeeb 38*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_IS_BULK_EP(attr) (((attr) & 3) == 0x02) 39*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_IS_INT_EP(attr) (((attr) & 3) == 0x03) 40*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_IS_ISOC_EP(attr) (((attr) & 3) == 0x01) 41*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_IS_DIR_IN(addr) ((addr) & 0x80) 42*da8fa4e3SBjoern A. Zeeb 43*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_ctrl_diag_cmd_write { 44*da8fa4e3SBjoern A. Zeeb __le32 cmd; 45*da8fa4e3SBjoern A. Zeeb __le32 address; 46*da8fa4e3SBjoern A. Zeeb __le32 value; 47*da8fa4e3SBjoern A. Zeeb __le32 padding; 48*da8fa4e3SBjoern A. Zeeb } __packed; 49*da8fa4e3SBjoern A. Zeeb 50*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_ctrl_diag_cmd_read { 51*da8fa4e3SBjoern A. Zeeb __le32 cmd; 52*da8fa4e3SBjoern A. Zeeb __le32 address; 53*da8fa4e3SBjoern A. Zeeb } __packed; 54*da8fa4e3SBjoern A. Zeeb 55*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_ctrl_diag_resp_read { 56*da8fa4e3SBjoern A. Zeeb u8 value[4]; 57*da8fa4e3SBjoern A. Zeeb } __packed; 58*da8fa4e3SBjoern A. Zeeb 59*da8fa4e3SBjoern A. Zeeb /* tx/rx pipes for usb */ 60*da8fa4e3SBjoern A. Zeeb enum ath10k_usb_pipe_id { 61*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_TX_CTRL = 0, 62*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_TX_DATA_LP, 63*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_TX_DATA_MP, 64*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_TX_DATA_HP, 65*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_RX_CTRL, 66*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_RX_DATA, 67*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_RX_DATA2, 68*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_RX_INT, 69*da8fa4e3SBjoern A. Zeeb ATH10K_USB_PIPE_MAX 70*da8fa4e3SBjoern A. Zeeb }; 71*da8fa4e3SBjoern A. Zeeb 72*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_pipe { 73*da8fa4e3SBjoern A. Zeeb struct list_head urb_list_head; 74*da8fa4e3SBjoern A. Zeeb struct usb_anchor urb_submitted; 75*da8fa4e3SBjoern A. Zeeb u32 urb_alloc; 76*da8fa4e3SBjoern A. Zeeb u32 urb_cnt; 77*da8fa4e3SBjoern A. Zeeb u32 urb_cnt_thresh; 78*da8fa4e3SBjoern A. Zeeb unsigned int usb_pipe_handle; 79*da8fa4e3SBjoern A. Zeeb u32 flags; 80*da8fa4e3SBjoern A. Zeeb u8 ep_address; 81*da8fa4e3SBjoern A. Zeeb u8 logical_pipe_num; 82*da8fa4e3SBjoern A. Zeeb struct ath10k_usb *ar_usb; 83*da8fa4e3SBjoern A. Zeeb u16 max_packet_size; 84*da8fa4e3SBjoern A. Zeeb struct work_struct io_complete_work; 85*da8fa4e3SBjoern A. Zeeb struct sk_buff_head io_comp_queue; 86*da8fa4e3SBjoern A. Zeeb struct usb_endpoint_descriptor *ep_desc; 87*da8fa4e3SBjoern A. Zeeb }; 88*da8fa4e3SBjoern A. Zeeb 89*da8fa4e3SBjoern A. Zeeb #define ATH10K_USB_PIPE_FLAG_TX BIT(0) 90*da8fa4e3SBjoern A. Zeeb 91*da8fa4e3SBjoern A. Zeeb /* usb device object */ 92*da8fa4e3SBjoern A. Zeeb struct ath10k_usb { 93*da8fa4e3SBjoern A. Zeeb /* protects pipe->urb_list_head and pipe->urb_cnt */ 94*da8fa4e3SBjoern A. Zeeb spinlock_t cs_lock; 95*da8fa4e3SBjoern A. Zeeb 96*da8fa4e3SBjoern A. Zeeb struct usb_device *udev; 97*da8fa4e3SBjoern A. Zeeb struct usb_interface *interface; 98*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX]; 99*da8fa4e3SBjoern A. Zeeb u8 *diag_cmd_buffer; 100*da8fa4e3SBjoern A. Zeeb u8 *diag_resp_buffer; 101*da8fa4e3SBjoern A. Zeeb struct ath10k *ar; 102*da8fa4e3SBjoern A. Zeeb }; 103*da8fa4e3SBjoern A. Zeeb 104*da8fa4e3SBjoern A. Zeeb /* usb urb object */ 105*da8fa4e3SBjoern A. Zeeb struct ath10k_urb_context { 106*da8fa4e3SBjoern A. Zeeb struct list_head link; 107*da8fa4e3SBjoern A. Zeeb struct ath10k_usb_pipe *pipe; 108*da8fa4e3SBjoern A. Zeeb struct sk_buff *skb; 109*da8fa4e3SBjoern A. Zeeb struct ath10k *ar; 110*da8fa4e3SBjoern A. Zeeb }; 111*da8fa4e3SBjoern A. Zeeb 112*da8fa4e3SBjoern A. Zeeb static inline struct ath10k_usb *ath10k_usb_priv(struct ath10k *ar) 113*da8fa4e3SBjoern A. Zeeb { 114*da8fa4e3SBjoern A. Zeeb return (struct ath10k_usb *)ar->drv_priv; 115*da8fa4e3SBjoern A. Zeeb } 116*da8fa4e3SBjoern A. Zeeb 117*da8fa4e3SBjoern A. Zeeb #endif 118