1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _CORE_H_ 9 #define _CORE_H_ 10 11 #include <linux/completion.h> 12 #include <linux/if_ether.h> 13 #include <linux/types.h> 14 #include <linux/pci.h> 15 #include <linux/uuid.h> 16 #include <linux/time.h> 17 18 #include "htt.h" 19 #include "htc.h" 20 #include "hw.h" 21 #include "targaddrs.h" 22 #include "wmi.h" 23 #include "../ath.h" 24 #include "../regd.h" 25 #include "../dfs_pattern_detector.h" 26 #include "spectral.h" 27 #include "thermal.h" 28 #include "wow.h" 29 #include "swap.h" 30 31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 33 #define WO(_f) ((_f##_OFFSET) >> 2) 34 35 #define ATH10K_SCAN_ID 0 36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 37 #define WMI_READY_TIMEOUT (5 * HZ) 38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 40 #define ATH10K_NUM_CHANS 41 41 #define ATH10K_MAX_5G_CHAN 173 42 43 #if defined(CONFIG_FWLOG) 44 #define ATH10K_FWLOG_MODULE_ID_MAX_10_2_4 28 45 #define ATH10K_FWLOG_MODULE_ID_MAX_10_4 35 46 #endif 47 48 /* Antenna noise floor */ 49 #define ATH10K_DEFAULT_NOISE_FLOOR -95 50 51 #define ATH10K_INVALID_RSSI 128 52 53 #define ATH10K_MAX_NUM_MGMT_PENDING 128 54 55 /* number of failed packets (20 packets with 16 sw reties each) */ 56 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 57 58 /* 59 * Use insanely high numbers to make sure that the firmware implementation 60 * won't start, we have the same functionality already in hostapd. Unit 61 * is seconds. 62 */ 63 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 64 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 65 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 66 67 /* NAPI poll budget */ 68 #define ATH10K_NAPI_BUDGET 64 69 70 /* SMBIOS type containing Board Data File Name Extension */ 71 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 72 73 /* SMBIOS type structure length (excluding strings-set) */ 74 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 75 76 /* Offset pointing to Board Data File Name Extension */ 77 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 78 79 /* Board Data File Name Extension string length. 80 * String format: BDF_<Customer ID>_<Extension>\0 81 */ 82 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 83 84 /* The magic used by QCA spec */ 85 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 86 87 /* Default Airtime weight multipler (Tuned for multiclient performance) */ 88 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4 89 90 #define ATH10K_MAX_RETRY_COUNT 30 91 92 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \ 93 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 94 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\ 95 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 96 97 struct ath10k; 98 99 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 100 { 101 switch (bus) { 102 case ATH10K_BUS_PCI: 103 return "pci"; 104 case ATH10K_BUS_AHB: 105 return "ahb"; 106 case ATH10K_BUS_SDIO: 107 return "sdio"; 108 case ATH10K_BUS_USB: 109 return "usb"; 110 case ATH10K_BUS_SNOC: 111 return "snoc"; 112 } 113 114 return "unknown"; 115 } 116 117 enum ath10k_skb_flags { 118 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 119 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 120 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 121 ATH10K_SKB_F_MGMT = BIT(3), 122 ATH10K_SKB_F_QOS = BIT(4), 123 ATH10K_SKB_F_RAW_TX = BIT(5), 124 ATH10K_SKB_F_NOACK_TID = BIT(6), 125 }; 126 127 struct ath10k_skb_cb { 128 dma_addr_t paddr; 129 u8 flags; 130 u8 eid; 131 u16 msdu_id; 132 u16 airtime_est; 133 struct ieee80211_vif *vif; 134 struct ieee80211_txq *txq; 135 u32 ucast_cipher; 136 } __packed; 137 138 struct ath10k_skb_rxcb { 139 dma_addr_t paddr; 140 struct hlist_node hlist; 141 u8 eid; 142 }; 143 144 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 145 { 146 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 147 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 148 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 149 } 150 151 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 152 { 153 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 154 return (struct ath10k_skb_rxcb *)skb->cb; 155 } 156 157 #define ATH10K_RXCB_SKB(rxcb) \ 158 container_of((void *)rxcb, struct sk_buff, cb) 159 160 static inline u32 host_interest_item_address(u32 item_offset) 161 { 162 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 163 } 164 165 enum ath10k_phy_mode { 166 ATH10K_PHY_MODE_LEGACY = 0, 167 ATH10K_PHY_MODE_HT = 1, 168 ATH10K_PHY_MODE_VHT = 2, 169 }; 170 171 /* Data rate 100KBPS based on IE Index */ 172 struct ath10k_index_ht_data_rate_type { 173 u8 beacon_rate_index; 174 u16 supported_rate[4]; 175 }; 176 177 /* Data rate 100KBPS based on IE Index */ 178 struct ath10k_index_vht_data_rate_type { 179 u8 beacon_rate_index; 180 u16 supported_VHT80_rate[2]; 181 u16 supported_VHT40_rate[2]; 182 u16 supported_VHT20_rate[2]; 183 }; 184 185 struct ath10k_bmi { 186 bool done_sent; 187 }; 188 189 struct ath10k_mem_chunk { 190 void *vaddr; 191 dma_addr_t paddr; 192 u32 len; 193 u32 req_id; 194 }; 195 196 struct ath10k_wmi { 197 enum ath10k_htc_ep_id eid; 198 struct completion service_ready; 199 struct completion unified_ready; 200 struct completion barrier; 201 struct completion radar_confirm; 202 wait_queue_head_t tx_credits_wq; 203 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 204 struct wmi_cmd_map *cmd; 205 struct wmi_vdev_param_map *vdev_param; 206 struct wmi_pdev_param_map *pdev_param; 207 struct wmi_peer_param_map *peer_param; 208 const struct wmi_ops *ops; 209 const struct wmi_peer_flags_map *peer_flags; 210 211 u32 mgmt_max_num_pending_tx; 212 213 /* Protected by data_lock */ 214 struct idr mgmt_pending_tx; 215 216 u32 num_mem_chunks; 217 u32 rx_decap_mode; 218 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 219 }; 220 221 struct ath10k_fw_stats_peer { 222 struct list_head list; 223 224 u8 peer_macaddr[ETH_ALEN]; 225 u32 peer_rssi; 226 u32 peer_tx_rate; 227 u32 peer_rx_rate; /* 10x only */ 228 u64 rx_duration; 229 }; 230 231 struct ath10k_fw_extd_stats_peer { 232 struct list_head list; 233 234 u8 peer_macaddr[ETH_ALEN]; 235 u64 rx_duration; 236 }; 237 238 struct ath10k_fw_stats_vdev { 239 struct list_head list; 240 241 u32 vdev_id; 242 u32 beacon_snr; 243 u32 data_snr; 244 u32 num_tx_frames[4]; 245 u32 num_rx_frames; 246 u32 num_tx_frames_retries[4]; 247 u32 num_tx_frames_failures[4]; 248 u32 num_rts_fail; 249 u32 num_rts_success; 250 u32 num_rx_err; 251 u32 num_rx_discard; 252 u32 num_tx_not_acked; 253 u32 tx_rate_history[10]; 254 u32 beacon_rssi_history[10]; 255 }; 256 257 struct ath10k_fw_stats_vdev_extd { 258 struct list_head list; 259 260 u32 vdev_id; 261 u32 ppdu_aggr_cnt; 262 u32 ppdu_noack; 263 u32 mpdu_queued; 264 u32 ppdu_nonaggr_cnt; 265 u32 mpdu_sw_requeued; 266 u32 mpdu_suc_retry; 267 u32 mpdu_suc_multitry; 268 u32 mpdu_fail_retry; 269 u32 tx_ftm_suc; 270 u32 tx_ftm_suc_retry; 271 u32 tx_ftm_fail; 272 u32 rx_ftmr_cnt; 273 u32 rx_ftmr_dup_cnt; 274 u32 rx_iftmr_cnt; 275 u32 rx_iftmr_dup_cnt; 276 }; 277 278 struct ath10k_fw_stats_pdev { 279 struct list_head list; 280 281 /* PDEV stats */ 282 s32 ch_noise_floor; 283 u32 tx_frame_count; /* Cycles spent transmitting frames */ 284 u32 rx_frame_count; /* Cycles spent receiving frames */ 285 u32 rx_clear_count; /* Total channel busy time, evidently */ 286 u32 cycle_count; /* Total on-channel time */ 287 u32 phy_err_count; 288 u32 chan_tx_power; 289 u32 ack_rx_bad; 290 u32 rts_bad; 291 u32 rts_good; 292 u32 fcs_bad; 293 u32 no_beacons; 294 u32 mib_int_count; 295 296 /* PDEV TX stats */ 297 s32 comp_queued; 298 s32 comp_delivered; 299 s32 msdu_enqued; 300 s32 mpdu_enqued; 301 s32 wmm_drop; 302 s32 local_enqued; 303 s32 local_freed; 304 s32 hw_queued; 305 s32 hw_reaped; 306 s32 underrun; 307 u32 hw_paused; 308 s32 tx_abort; 309 s32 mpdus_requeued; 310 u32 tx_ko; 311 u32 data_rc; 312 u32 self_triggers; 313 u32 sw_retry_failure; 314 u32 illgl_rate_phy_err; 315 u32 pdev_cont_xretry; 316 u32 pdev_tx_timeout; 317 u32 pdev_resets; 318 u32 phy_underrun; 319 u32 txop_ovf; 320 u32 seq_posted; 321 u32 seq_failed_queueing; 322 u32 seq_completed; 323 u32 seq_restarted; 324 u32 mu_seq_posted; 325 u32 mpdus_sw_flush; 326 u32 mpdus_hw_filter; 327 u32 mpdus_truncated; 328 u32 mpdus_ack_failed; 329 u32 mpdus_expired; 330 331 /* PDEV RX stats */ 332 s32 mid_ppdu_route_change; 333 s32 status_rcvd; 334 s32 r0_frags; 335 s32 r1_frags; 336 s32 r2_frags; 337 s32 r3_frags; 338 s32 htt_msdus; 339 s32 htt_mpdus; 340 s32 loc_msdus; 341 s32 loc_mpdus; 342 s32 oversize_amsdu; 343 s32 phy_errs; 344 s32 phy_err_drop; 345 s32 mpdu_errs; 346 s32 rx_ovfl_errs; 347 }; 348 349 struct ath10k_fw_stats { 350 bool extended; 351 struct list_head pdevs; 352 struct list_head vdevs; 353 struct list_head peers; 354 struct list_head peers_extd; 355 }; 356 357 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 358 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 359 360 struct ath10k_tpc_table { 361 u32 pream_idx[WMI_TPC_RATE_MAX]; 362 u8 rate_code[WMI_TPC_RATE_MAX]; 363 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 364 }; 365 366 struct ath10k_tpc_stats { 367 u32 reg_domain; 368 u32 chan_freq; 369 u32 phy_mode; 370 u32 twice_antenna_reduction; 371 u32 twice_max_rd_power; 372 s32 twice_antenna_gain; 373 u32 power_limit; 374 u32 num_tx_chain; 375 u32 ctl; 376 u32 rate_max; 377 u8 flag[WMI_TPC_FLAG]; 378 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 379 }; 380 381 struct ath10k_tpc_table_final { 382 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 383 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 384 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 385 }; 386 387 struct ath10k_tpc_stats_final { 388 u32 reg_domain; 389 u32 chan_freq; 390 u32 phy_mode; 391 u32 twice_antenna_reduction; 392 u32 twice_max_rd_power; 393 s32 twice_antenna_gain; 394 u32 power_limit; 395 u32 num_tx_chain; 396 u32 ctl; 397 u32 rate_max; 398 u8 flag[WMI_TPC_FLAG]; 399 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 400 }; 401 402 struct ath10k_dfs_stats { 403 u32 phy_errors; 404 u32 pulses_total; 405 u32 pulses_detected; 406 u32 pulses_discarded; 407 u32 radar_detected; 408 }; 409 410 enum ath10k_radar_confirmation_state { 411 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 412 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 413 ATH10K_RADAR_CONFIRMATION_STOPPED, 414 }; 415 416 struct ath10k_radar_found_info { 417 u32 pri_min; 418 u32 pri_max; 419 u32 width_min; 420 u32 width_max; 421 u32 sidx_min; 422 u32 sidx_max; 423 }; 424 425 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 426 427 struct ath10k_peer { 428 struct list_head list; 429 struct ieee80211_vif *vif; 430 struct ieee80211_sta *sta; 431 432 bool removed; 433 int vdev_id; 434 u8 addr[ETH_ALEN]; 435 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 436 437 /* protected by ar->data_lock */ 438 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 439 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 440 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS]; 441 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 442 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS]; 443 struct { 444 enum htt_security_types sec_type; 445 int pn_len; 446 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX]; 447 }; 448 449 struct ath10k_txq { 450 struct list_head list; 451 unsigned long num_fw_queued; 452 unsigned long num_push_allowed; 453 }; 454 455 enum ath10k_pkt_rx_err { 456 ATH10K_PKT_RX_ERR_FCS, 457 ATH10K_PKT_RX_ERR_TKIP, 458 ATH10K_PKT_RX_ERR_CRYPT, 459 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 460 ATH10K_PKT_RX_ERR_MAX, 461 }; 462 463 enum ath10k_ampdu_subfrm_num { 464 ATH10K_AMPDU_SUBFRM_NUM_10, 465 ATH10K_AMPDU_SUBFRM_NUM_20, 466 ATH10K_AMPDU_SUBFRM_NUM_30, 467 ATH10K_AMPDU_SUBFRM_NUM_40, 468 ATH10K_AMPDU_SUBFRM_NUM_50, 469 ATH10K_AMPDU_SUBFRM_NUM_60, 470 ATH10K_AMPDU_SUBFRM_NUM_MORE, 471 ATH10K_AMPDU_SUBFRM_NUM_MAX, 472 }; 473 474 enum ath10k_amsdu_subfrm_num { 475 ATH10K_AMSDU_SUBFRM_NUM_1, 476 ATH10K_AMSDU_SUBFRM_NUM_2, 477 ATH10K_AMSDU_SUBFRM_NUM_3, 478 ATH10K_AMSDU_SUBFRM_NUM_4, 479 ATH10K_AMSDU_SUBFRM_NUM_MORE, 480 ATH10K_AMSDU_SUBFRM_NUM_MAX, 481 }; 482 483 struct ath10k_sta_tid_stats { 484 unsigned long rx_pkt_from_fw; 485 unsigned long rx_pkt_unchained; 486 unsigned long rx_pkt_drop_chained; 487 unsigned long rx_pkt_drop_filter; 488 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 489 unsigned long rx_pkt_queued_for_mac; 490 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 491 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 492 }; 493 494 enum ath10k_counter_type { 495 ATH10K_COUNTER_TYPE_BYTES, 496 ATH10K_COUNTER_TYPE_PKTS, 497 ATH10K_COUNTER_TYPE_MAX, 498 }; 499 500 enum ath10k_stats_type { 501 ATH10K_STATS_TYPE_SUCC, 502 ATH10K_STATS_TYPE_FAIL, 503 ATH10K_STATS_TYPE_RETRY, 504 ATH10K_STATS_TYPE_AMPDU, 505 ATH10K_STATS_TYPE_MAX, 506 }; 507 508 struct ath10k_htt_data_stats { 509 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; 510 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; 511 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; 512 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; 513 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; 514 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; 515 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; 516 }; 517 518 struct ath10k_htt_tx_stats { 519 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; 520 u64 tx_duration; 521 u64 ba_fails; 522 u64 ack_fails; 523 }; 524 525 #define ATH10K_TID_MAX 8 526 527 struct ath10k_sta { 528 struct ath10k_vif *arvif; 529 530 /* the following are protected by ar->data_lock */ 531 u32 changed; /* IEEE80211_RC_* */ 532 u32 bw; 533 u32 nss; 534 u32 smps; 535 u16 peer_id; 536 struct rate_info txrate; 537 struct ieee80211_tx_info tx_info; 538 u32 tx_retries; 539 u32 tx_failed; 540 u32 last_tx_bitrate; 541 542 u32 rx_rate_code; 543 u32 rx_bitrate_kbps; 544 u32 tx_rate_code; 545 u32 tx_bitrate_kbps; 546 struct work_struct update_wk; 547 u64 rx_duration; 548 struct ath10k_htt_tx_stats *tx_stats; 549 u32 ucast_cipher; 550 551 #ifdef CONFIG_MAC80211_DEBUGFS 552 /* protected by conf_mutex */ 553 bool aggr_mode; 554 555 /* Protected with ar->data_lock */ 556 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 557 #endif 558 /* Protected with ar->data_lock */ 559 u32 peer_ps_state; 560 struct work_struct tid_config_wk; 561 int noack[ATH10K_TID_MAX]; 562 int retry_long[ATH10K_TID_MAX]; 563 int ampdu[ATH10K_TID_MAX]; 564 u8 rate_ctrl[ATH10K_TID_MAX]; 565 u32 rate_code[ATH10K_TID_MAX]; 566 int rtscts[ATH10K_TID_MAX]; 567 }; 568 569 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 570 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 571 572 enum ath10k_beacon_state { 573 ATH10K_BEACON_SCHEDULED = 0, 574 ATH10K_BEACON_SENDING, 575 ATH10K_BEACON_SENT, 576 }; 577 578 struct ath10k_vif { 579 struct list_head list; 580 581 u32 vdev_id; 582 u16 peer_id; 583 enum wmi_vdev_type vdev_type; 584 enum wmi_vdev_subtype vdev_subtype; 585 u32 beacon_interval; 586 u32 dtim_period; 587 struct sk_buff *beacon; 588 /* protected by data_lock */ 589 enum ath10k_beacon_state beacon_state; 590 void *beacon_buf; 591 dma_addr_t beacon_paddr; 592 unsigned long tx_paused; /* arbitrary values defined by target */ 593 594 struct ath10k *ar; 595 struct ieee80211_vif *vif; 596 597 bool is_started; 598 bool is_up; 599 bool spectral_enabled; 600 bool ps; 601 u32 aid; 602 u8 bssid[ETH_ALEN]; 603 604 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 605 s8 def_wep_key_idx; 606 607 u16 tx_seq_no; 608 609 union { 610 struct { 611 u32 uapsd; 612 } sta; 613 struct { 614 /* 512 stations */ 615 u8 tim_bitmap[64]; 616 u8 tim_len; 617 u32 ssid_len; 618 u8 ssid[IEEE80211_MAX_SSID_LEN]; 619 bool hidden_ssid; 620 /* P2P_IE with NoA attribute for P2P_GO case */ 621 u32 noa_len; 622 u8 *noa_data; 623 } ap; 624 } u; 625 626 bool use_cts_prot; 627 bool nohwcrypt; 628 int num_legacy_stations; 629 int txpower; 630 bool ftm_responder; 631 struct wmi_wmm_params_all_arg wmm_params; 632 struct work_struct ap_csa_work; 633 struct delayed_work connection_loss_work; 634 struct cfg80211_bitrate_mask bitrate_mask; 635 636 /* For setting VHT peer fixed rate, protected by conf_mutex */ 637 int vht_num_rates; 638 u8 vht_pfr; 639 u32 tid_conf_changed[ATH10K_TID_MAX]; 640 int noack[ATH10K_TID_MAX]; 641 int retry_long[ATH10K_TID_MAX]; 642 int ampdu[ATH10K_TID_MAX]; 643 u8 rate_ctrl[ATH10K_TID_MAX]; 644 u32 rate_code[ATH10K_TID_MAX]; 645 int rtscts[ATH10K_TID_MAX]; 646 u32 tids_rst; 647 }; 648 649 struct ath10k_vif_iter { 650 u32 vdev_id; 651 struct ath10k_vif *arvif; 652 }; 653 654 /* Copy Engine register dump, protected by ce-lock */ 655 struct ath10k_ce_crash_data { 656 __le32 base_addr; 657 __le32 src_wr_idx; 658 __le32 src_r_idx; 659 __le32 dst_wr_idx; 660 __le32 dst_r_idx; 661 }; 662 663 struct ath10k_ce_crash_hdr { 664 __le32 ce_count; 665 __le32 reserved[3]; /* for future use */ 666 struct ath10k_ce_crash_data entries[]; 667 }; 668 669 #define MAX_MEM_DUMP_TYPE 5 670 671 /* used for crash-dump storage, protected by data-lock */ 672 struct ath10k_fw_crash_data { 673 guid_t guid; 674 struct timespec64 timestamp; 675 __le32 registers[REG_DUMP_COUNT_QCA988X]; 676 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 677 678 u8 *ramdump_buf; 679 size_t ramdump_buf_len; 680 }; 681 682 struct ath10k_debug { 683 struct dentry *debugfs_phy; 684 685 struct ath10k_fw_stats fw_stats; 686 struct completion fw_stats_complete; 687 bool fw_stats_done; 688 689 unsigned long htt_stats_mask; 690 unsigned long reset_htt_stats; 691 struct delayed_work htt_stats_dwork; 692 struct ath10k_dfs_stats dfs_stats; 693 struct ath_dfs_pool_stats dfs_pool_stats; 694 695 /* used for tpc-dump storage, protected by data-lock */ 696 struct ath10k_tpc_stats *tpc_stats; 697 struct ath10k_tpc_stats_final *tpc_stats_final; 698 699 struct completion tpc_complete; 700 701 /* protected by conf_mutex */ 702 u64 fw_dbglog_mask; 703 u32 fw_dbglog_level; 704 u32 reg_addr; 705 u32 nf_cal_period; 706 void *cal_data; 707 u32 enable_extd_tx_stats; 708 u8 fw_dbglog_mode; 709 }; 710 711 enum ath10k_state { 712 ATH10K_STATE_OFF = 0, 713 ATH10K_STATE_ON, 714 715 /* When doing firmware recovery the device is first powered down. 716 * mac80211 is supposed to call in to start() hook later on. It is 717 * however possible that driver unloading and firmware crash overlap. 718 * mac80211 can wait on conf_mutex in stop() while the device is 719 * stopped in ath10k_core_restart() work holding conf_mutex. The state 720 * RESTARTED means that the device is up and mac80211 has started hw 721 * reconfiguration. Once mac80211 is done with the reconfiguration we 722 * set the state to STATE_ON in reconfig_complete(). 723 */ 724 ATH10K_STATE_RESTARTING, 725 ATH10K_STATE_RESTARTED, 726 727 /* The device has crashed while restarting hw. This state is like ON 728 * but commands are blocked in HTC and -ECOMM response is given. This 729 * prevents completion timeouts and makes the driver more responsive to 730 * userspace commands. This is also prevents recursive recovery. 731 */ 732 ATH10K_STATE_WEDGED, 733 734 /* factory tests */ 735 ATH10K_STATE_UTF, 736 }; 737 738 enum ath10k_firmware_mode { 739 /* the default mode, standard 802.11 functionality */ 740 ATH10K_FIRMWARE_MODE_NORMAL, 741 742 /* factory tests etc */ 743 ATH10K_FIRMWARE_MODE_UTF, 744 }; 745 746 enum ath10k_fw_features { 747 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 748 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 749 750 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 751 ATH10K_FW_FEATURE_WMI_10X = 1, 752 753 /* firmware support tx frame management over WMI, otherwise it's HTT */ 754 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 755 756 /* Firmware does not support P2P */ 757 ATH10K_FW_FEATURE_NO_P2P = 3, 758 759 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 760 * bit is required to be set as well. Deprecated, don't use in new 761 * code. 762 */ 763 ATH10K_FW_FEATURE_WMI_10_2 = 4, 764 765 /* Some firmware revisions lack proper multi-interface client powersave 766 * implementation. Enabling PS could result in connection drops, 767 * traffic stalls, etc. 768 */ 769 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 770 771 /* Some firmware revisions have an incomplete WoWLAN implementation 772 * despite WMI service bit being advertised. This feature flag is used 773 * to distinguish whether WoWLAN is really supported or not. 774 */ 775 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 776 777 /* Don't trust error code from otp.bin */ 778 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 779 780 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 781 * it 8 bytes long in Native Wifi Rx decap. 782 */ 783 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 784 785 /* Firmware supports bypassing PLL setting on init. */ 786 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 787 788 /* Raw mode support. If supported, FW supports receiving and trasmitting 789 * frames in raw mode. 790 */ 791 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 792 793 /* Firmware Supports Adaptive CCA*/ 794 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 795 796 /* Firmware supports management frame protection */ 797 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 798 799 /* Firmware supports pull-push model where host shares it's software 800 * queue state with firmware and firmware generates fetch requests 801 * telling host which queues to dequeue tx from. 802 * 803 * Primary function of this is improved MU-MIMO performance with 804 * multiple clients. 805 */ 806 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 807 808 /* Firmware supports BT-Coex without reloading firmware via pdev param. 809 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 810 * extended resource config should be enabled always. This firmware IE 811 * is used to configure WMI_COEX_GPIO_SUPPORT. 812 */ 813 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 814 815 /* Unused flag and proven to be not working, enable this if you want 816 * to experiment sending NULL func data frames in HTT TX 817 */ 818 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 819 820 /* Firmware allow other BSS mesh broadcast/multicast frames without 821 * creating monitor interface. Appropriate rxfilters are programmed for 822 * mesh vdev by firmware itself. This feature flags will be used for 823 * not creating monitor vdev while configuring mesh node. 824 */ 825 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 826 827 /* Firmware does not support power save in station mode. */ 828 ATH10K_FW_FEATURE_NO_PS = 17, 829 830 /* Firmware allows management tx by reference instead of by value. */ 831 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 832 833 /* Firmware load is done externally, not by bmi */ 834 ATH10K_FW_FEATURE_NON_BMI = 19, 835 836 /* Firmware sends only one chan_info event per channel */ 837 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, 838 839 /* Firmware allows setting peer fixed rate */ 840 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21, 841 842 /* Firmware support IRAM recovery */ 843 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22, 844 845 /* keep last */ 846 ATH10K_FW_FEATURE_COUNT, 847 }; 848 849 enum ath10k_dev_flags { 850 /* Indicates that ath10k device is during CAC phase of DFS */ 851 ATH10K_CAC_RUNNING, 852 ATH10K_FLAG_CORE_REGISTERED, 853 854 /* Device has crashed and needs to restart. This indicates any pending 855 * waiters should immediately cancel instead of waiting for a time out. 856 */ 857 ATH10K_FLAG_CRASH_FLUSH, 858 859 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 860 * Raw mode supports both hardware and software crypto. Native WiFi only 861 * supports hardware crypto. 862 */ 863 ATH10K_FLAG_RAW_MODE, 864 865 /* Disable HW crypto engine */ 866 ATH10K_FLAG_HW_CRYPTO_DISABLED, 867 868 /* Bluetooth coexistance enabled */ 869 ATH10K_FLAG_BTCOEX, 870 871 /* Per Station statistics service */ 872 ATH10K_FLAG_PEER_STATS, 873 874 /* Indicates that ath10k device is during recovery process and not complete */ 875 ATH10K_FLAG_RESTARTING, 876 877 /* protected by conf_mutex */ 878 ATH10K_FLAG_NAPI_ENABLED, 879 }; 880 881 enum ath10k_cal_mode { 882 ATH10K_CAL_MODE_FILE, 883 ATH10K_CAL_MODE_OTP, 884 ATH10K_CAL_MODE_DT, 885 ATH10K_CAL_MODE_NVMEM, 886 ATH10K_PRE_CAL_MODE_FILE, 887 ATH10K_PRE_CAL_MODE_DT, 888 ATH10K_PRE_CAL_MODE_NVMEM, 889 ATH10K_CAL_MODE_EEPROM, 890 }; 891 892 enum ath10k_crypt_mode { 893 /* Only use hardware crypto engine */ 894 ATH10K_CRYPT_MODE_HW, 895 /* Only use software crypto engine */ 896 ATH10K_CRYPT_MODE_SW, 897 }; 898 899 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 900 { 901 switch (mode) { 902 case ATH10K_CAL_MODE_FILE: 903 return "file"; 904 case ATH10K_CAL_MODE_OTP: 905 return "otp"; 906 case ATH10K_CAL_MODE_DT: 907 return "dt"; 908 case ATH10K_CAL_MODE_NVMEM: 909 return "nvmem"; 910 case ATH10K_PRE_CAL_MODE_FILE: 911 return "pre-cal-file"; 912 case ATH10K_PRE_CAL_MODE_DT: 913 return "pre-cal-dt"; 914 case ATH10K_PRE_CAL_MODE_NVMEM: 915 return "pre-cal-nvmem"; 916 case ATH10K_CAL_MODE_EEPROM: 917 return "eeprom"; 918 } 919 920 return "unknown"; 921 } 922 923 enum ath10k_scan_state { 924 ATH10K_SCAN_IDLE, 925 ATH10K_SCAN_STARTING, 926 ATH10K_SCAN_RUNNING, 927 ATH10K_SCAN_ABORTING, 928 }; 929 930 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 931 { 932 switch (state) { 933 case ATH10K_SCAN_IDLE: 934 return "idle"; 935 case ATH10K_SCAN_STARTING: 936 return "starting"; 937 case ATH10K_SCAN_RUNNING: 938 return "running"; 939 case ATH10K_SCAN_ABORTING: 940 return "aborting"; 941 } 942 943 return "unknown"; 944 } 945 946 enum ath10k_tx_pause_reason { 947 ATH10K_TX_PAUSE_Q_FULL, 948 ATH10K_TX_PAUSE_MAX, 949 }; 950 951 struct ath10k_fw_file { 952 const struct firmware *firmware; 953 954 char fw_version[ETHTOOL_FWVERS_LEN]; 955 956 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 957 958 enum ath10k_fw_wmi_op_version wmi_op_version; 959 enum ath10k_fw_htt_op_version htt_op_version; 960 961 const void *firmware_data; 962 size_t firmware_len; 963 964 const void *otp_data; 965 size_t otp_len; 966 967 const void *codeswap_data; 968 size_t codeswap_len; 969 970 /* The original idea of struct ath10k_fw_file was that it only 971 * contains struct firmware and pointers to various parts (actual 972 * firmware binary, otp, metadata etc) of the file. This seg_info 973 * is actually created separate but as this is used similarly as 974 * the other firmware components it's more convenient to have it 975 * here. 976 */ 977 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 978 }; 979 980 struct ath10k_fw_components { 981 const struct firmware *board; 982 const void *board_data; 983 size_t board_len; 984 const struct firmware *ext_board; 985 const void *ext_board_data; 986 size_t ext_board_len; 987 988 struct ath10k_fw_file fw_file; 989 }; 990 991 struct ath10k_per_peer_tx_stats { 992 u32 succ_bytes; 993 u32 retry_bytes; 994 u32 failed_bytes; 995 u8 ratecode; 996 u8 flags; 997 u16 peer_id; 998 u16 succ_pkts; 999 u16 retry_pkts; 1000 u16 failed_pkts; 1001 u16 duration; 1002 u32 reserved1; 1003 u32 reserved2; 1004 }; 1005 1006 enum ath10k_dev_type { 1007 ATH10K_DEV_TYPE_LL, 1008 ATH10K_DEV_TYPE_HL, 1009 }; 1010 1011 struct ath10k_bus_params { 1012 u32 chip_id; 1013 enum ath10k_dev_type dev_type; 1014 bool link_can_suspend; 1015 bool hl_msdu_ids; 1016 }; 1017 1018 struct ath10k { 1019 struct ath_common ath_common; 1020 struct ieee80211_hw *hw; 1021 struct ieee80211_ops *ops; 1022 struct device *dev; 1023 struct msa_region { 1024 dma_addr_t paddr; 1025 u32 mem_size; 1026 void *vaddr; 1027 } msa; 1028 u8 mac_addr[ETH_ALEN]; 1029 1030 enum ath10k_hw_rev hw_rev; 1031 u16 dev_id; 1032 u32 chip_id; 1033 u32 target_version; 1034 u8 fw_version_major; 1035 u32 fw_version_minor; 1036 u16 fw_version_release; 1037 u16 fw_version_build; 1038 u32 fw_stats_req_mask; 1039 u32 phy_capability; 1040 u32 hw_min_tx_power; 1041 u32 hw_max_tx_power; 1042 u32 hw_eeprom_rd; 1043 u32 ht_cap_info; 1044 u32 vht_cap_info; 1045 u32 vht_supp_mcs; 1046 u32 num_rf_chains; 1047 u32 max_spatial_stream; 1048 #if defined(CONFIG_FWLOG) 1049 u32 fwlog_max_moduleid; 1050 #endif 1051 /* protected by conf_mutex */ 1052 u32 low_2ghz_chan; 1053 u32 high_2ghz_chan; 1054 u32 low_5ghz_chan; 1055 u32 high_5ghz_chan; 1056 bool ani_enabled; 1057 u32 sys_cap_info; 1058 1059 /* protected by data_lock */ 1060 bool hw_rfkill_on; 1061 1062 /* protected by conf_mutex */ 1063 u8 ps_state_enable; 1064 1065 bool nlo_enabled; 1066 bool p2p; 1067 1068 struct { 1069 enum ath10k_bus bus; 1070 const struct ath10k_hif_ops *ops; 1071 } hif; 1072 1073 struct completion target_suspend; 1074 struct completion driver_recovery; 1075 1076 const struct ath10k_hw_regs *regs; 1077 const struct ath10k_hw_ce_regs *hw_ce_regs; 1078 const struct ath10k_hw_values *hw_values; 1079 struct ath10k_bmi bmi; 1080 struct ath10k_wmi wmi; 1081 struct ath10k_htc htc; 1082 struct ath10k_htt htt; 1083 1084 struct ath10k_hw_params hw_params; 1085 1086 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 1087 struct ath10k_fw_components normal_mode_fw; 1088 1089 /* READ-ONLY images of the running firmware, which can be either 1090 * normal or UTF. Do not modify, release etc! 1091 */ 1092 const struct ath10k_fw_components *running_fw; 1093 1094 const struct firmware *pre_cal_file; 1095 const struct firmware *cal_file; 1096 1097 struct { 1098 u32 vendor; 1099 u32 device; 1100 u32 subsystem_vendor; 1101 u32 subsystem_device; 1102 1103 bool bmi_ids_valid; 1104 bool qmi_ids_valid; 1105 u32 qmi_board_id; 1106 u32 qmi_chip_id; 1107 u8 bmi_board_id; 1108 u8 bmi_eboard_id; 1109 u8 bmi_chip_id; 1110 bool ext_bid_supported; 1111 1112 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 1113 } id; 1114 1115 int fw_api; 1116 int bd_api; 1117 enum ath10k_cal_mode cal_mode; 1118 1119 struct { 1120 struct completion started; 1121 struct completion completed; 1122 struct completion on_channel; 1123 struct delayed_work timeout; 1124 enum ath10k_scan_state state; 1125 bool is_roc; 1126 int vdev_id; 1127 int roc_freq; 1128 bool roc_notify; 1129 } scan; 1130 1131 struct { 1132 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 1133 } mac; 1134 1135 /* should never be NULL; needed for regular htt rx */ 1136 struct ieee80211_channel *rx_channel; 1137 1138 /* valid during scan; needed for mgmt rx during scan */ 1139 struct ieee80211_channel *scan_channel; 1140 1141 /* current operating channel definition */ 1142 struct cfg80211_chan_def chandef; 1143 1144 /* currently configured operating channel in firmware */ 1145 struct ieee80211_channel *tgt_oper_chan; 1146 1147 unsigned long long free_vdev_map; 1148 struct ath10k_vif *monitor_arvif; 1149 bool monitor; 1150 int monitor_vdev_id; 1151 bool monitor_started; 1152 unsigned int filter_flags; 1153 unsigned long dev_flags; 1154 bool dfs_block_radar_events; 1155 1156 /* protected by conf_mutex */ 1157 bool radar_enabled; 1158 int num_started_vdevs; 1159 1160 /* Protected by conf-mutex */ 1161 u8 cfg_tx_chainmask; 1162 u8 cfg_rx_chainmask; 1163 1164 struct completion install_key_done; 1165 1166 int last_wmi_vdev_start_status; 1167 struct completion vdev_setup_done; 1168 struct completion vdev_delete_done; 1169 struct completion peer_stats_info_complete; 1170 1171 struct workqueue_struct *workqueue; 1172 /* Auxiliary workqueue */ 1173 struct workqueue_struct *workqueue_aux; 1174 struct workqueue_struct *workqueue_tx_complete; 1175 /* prevents concurrent FW reconfiguration */ 1176 struct mutex conf_mutex; 1177 1178 /* protects coredump data */ 1179 struct mutex dump_mutex; 1180 1181 /* protects shared structure data */ 1182 spinlock_t data_lock; 1183 1184 struct list_head arvifs; 1185 struct list_head peers; 1186 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1187 wait_queue_head_t peer_mapping_wq; 1188 1189 /* protected by conf_mutex */ 1190 int num_peers; 1191 int num_stations; 1192 1193 int max_num_peers; 1194 int max_num_stations; 1195 int max_num_vdevs; 1196 int max_num_tdls_vdevs; 1197 int num_active_peers; 1198 int num_tids; 1199 1200 struct work_struct svc_rdy_work; 1201 struct sk_buff *svc_rdy_skb; 1202 1203 struct work_struct offchan_tx_work; 1204 struct sk_buff_head offchan_tx_queue; 1205 struct completion offchan_tx_completed; 1206 struct sk_buff *offchan_tx_skb; 1207 1208 struct work_struct wmi_mgmt_tx_work; 1209 struct sk_buff_head wmi_mgmt_tx_queue; 1210 1211 enum ath10k_state state; 1212 1213 struct work_struct register_work; 1214 struct work_struct restart_work; 1215 struct work_struct bundle_tx_work; 1216 struct work_struct tx_complete_work; 1217 1218 /* cycle count is reported twice for each visited channel during scan. 1219 * access protected by data_lock 1220 */ 1221 u32 survey_last_rx_clear_count; 1222 u32 survey_last_cycle_count; 1223 struct survey_info survey[ATH10K_NUM_CHANS]; 1224 1225 /* Channel info events are expected to come in pairs without and with 1226 * COMPLETE flag set respectively for each channel visit during scan. 1227 * 1228 * However there are deviations from this rule. This flag is used to 1229 * avoid reporting garbage data. 1230 */ 1231 bool ch_info_can_report_survey; 1232 struct completion bss_survey_done; 1233 1234 struct dfs_pattern_detector *dfs_detector; 1235 1236 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1237 1238 #ifdef CONFIG_ATH10K_DEBUGFS 1239 struct ath10k_debug debug; 1240 struct { 1241 /* relay(fs) channel for spectral scan */ 1242 struct rchan *rfs_chan_spec_scan; 1243 1244 /* spectral_mode and spec_config are protected by conf_mutex */ 1245 enum ath10k_spectral_mode mode; 1246 struct ath10k_spec_scan config; 1247 } spectral; 1248 #endif 1249 1250 u32 pktlog_filter; 1251 1252 #ifdef CONFIG_DEV_COREDUMP 1253 struct { 1254 struct ath10k_fw_crash_data *fw_crash_data; 1255 } coredump; 1256 #endif 1257 1258 struct { 1259 /* protected by conf_mutex */ 1260 struct ath10k_fw_components utf_mode_fw; 1261 1262 /* protected by data_lock */ 1263 bool utf_monitor; 1264 } testmode; 1265 1266 struct { 1267 /* protected by data_lock */ 1268 u32 rx_crc_err_drop; 1269 u32 fw_crash_counter; 1270 u32 fw_warm_reset_counter; 1271 u32 fw_cold_reset_counter; 1272 } stats; 1273 1274 struct ath10k_thermal thermal; 1275 struct ath10k_wow wow; 1276 struct ath10k_per_peer_tx_stats peer_tx_stats; 1277 1278 #if defined(CONFIG_FWLOG) 1279 struct work_struct fwlog_tx_work; 1280 struct sk_buff_head fwlog_tx_queue; 1281 #endif 1282 1283 /* NAPI */ 1284 struct net_device napi_dev; 1285 struct napi_struct napi; 1286 1287 struct work_struct set_coverage_class_work; 1288 /* protected by conf_mutex */ 1289 struct { 1290 /* writing also protected by data_lock */ 1291 s16 coverage_class; 1292 1293 u32 reg_phyclk; 1294 u32 reg_slottime_conf; 1295 u32 reg_slottime_orig; 1296 u32 reg_ack_cts_timeout_conf; 1297 u32 reg_ack_cts_timeout_orig; 1298 } fw_coverage; 1299 1300 u32 ampdu_reference; 1301 1302 const u8 *wmi_key_cipher; 1303 void *ce_priv; 1304 1305 u32 sta_tid_stats_mask; 1306 1307 /* protected by data_lock */ 1308 enum ath10k_radar_confirmation_state radar_conf_state; 1309 struct ath10k_radar_found_info last_radar_info; 1310 struct work_struct radar_confirmation_work; 1311 struct ath10k_bus_params bus_param; 1312 struct completion peer_delete_done; 1313 1314 bool coex_support; 1315 int coex_gpio_pin; 1316 1317 s32 tx_power_2g_limit; 1318 s32 tx_power_5g_limit; 1319 1320 /* must be last */ 1321 u8 drv_priv[] __aligned(sizeof(void *)); 1322 }; 1323 1324 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1325 { 1326 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1327 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1328 return true; 1329 1330 return false; 1331 } 1332 1333 extern unsigned long ath10k_coredump_mask; 1334 1335 void ath10k_core_napi_sync_disable(struct ath10k *ar); 1336 void ath10k_core_napi_enable(struct ath10k *ar); 1337 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1338 enum ath10k_bus bus, 1339 enum ath10k_hw_rev hw_rev, 1340 const struct ath10k_hif_ops *hif_ops); 1341 void ath10k_core_destroy(struct ath10k *ar); 1342 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1343 char *buf, 1344 size_t max_len); 1345 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1346 struct ath10k_fw_file *fw_file); 1347 1348 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1349 const struct ath10k_fw_components *fw_components); 1350 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1351 void ath10k_core_stop(struct ath10k *ar); 1352 void ath10k_core_start_recovery(struct ath10k *ar); 1353 int ath10k_core_register(struct ath10k *ar, 1354 const struct ath10k_bus_params *bus_params); 1355 void ath10k_core_unregister(struct ath10k *ar); 1356 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); 1357 int ath10k_core_check_dt(struct ath10k *ar); 1358 void ath10k_core_free_board_files(struct ath10k *ar); 1359 1360 #endif /* _CORE_H_ */ 1361