xref: /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c (revision f6a3b357e9be4c6423c85eff9a847163a0d307c8)
1 /*
2  * Copyright (c) 2012, 2013 Adrian Chadd <adrian@FreeBSD.org>.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #include "opt_ah.h"
18 
19 #include "ah.h"
20 #include "ah_internal.h"
21 #include "ah_devid.h"
22 #include "ah_desc.h"
23 
24 #include "ar9300.h"
25 #include "ar9300reg.h"
26 #include "ar9300phy.h"
27 #include "ar9300desc.h"
28 
29 #include "ar9300_freebsd.h"
30 
31 #include "ar9300_stub.h"
32 #include "ar9300_stub_funcs.h"
33 
34 #define FIX_NOISE_FLOOR     1
35 #define NEXT_TBTT_NOW      5
36 static HAL_BOOL ar9300ClrMulticastFilterIndex(struct ath_hal *ah, uint32_t ix);
37 static HAL_BOOL ar9300SetMulticastFilterIndex(struct ath_hal *ah, uint32_t ix);
38 
39 static void ar9300_beacon_set_beacon_timers(struct ath_hal *ah,
40     const HAL_BEACON_TIMERS *bt);
41 
42 static void
43 ar9300SetChainMasks(struct ath_hal *ah, uint32_t tx_chainmask,
44     uint32_t rx_chainmask)
45 {
46 
47 	AH9300(ah)->ah_tx_chainmask =
48 	    tx_chainmask & AH_PRIVATE(ah)->ah_caps.halTxChainMask;
49 	AH9300(ah)->ah_rx_chainmask =
50 	    rx_chainmask & AH_PRIVATE(ah)->ah_caps.halRxChainMask;
51 }
52 
53 static u_int
54 ar9300GetSlotTime(struct ath_hal *ah)
55 {
56 	u_int clks = OS_REG_READ(ah, AR_D_GBL_IFS_SLOT) & 0xffff;
57 	return (ath_hal_mac_usec(ah, clks));	/* convert from system clocks */
58 }
59 
60 static HAL_BOOL
61 ar9300_freebsd_set_tx_power_limit(struct ath_hal *ah, uint32_t limit)
62 {
63 	return (ar9300_set_tx_power_limit(ah, limit, 0, 0));
64 }
65 
66 static uint64_t
67 ar9300_get_next_tbtt(struct ath_hal *ah)
68 {
69 	return (OS_REG_READ(ah, AR_NEXT_TBTT_TIMER));
70 }
71 
72 
73 /*
74  * TODO: implement the antenna diversity control for AR9485 and
75  * other LNA mixing based NICs.
76  *
77  * For now we'll just go with the HAL default and make these no-ops.
78  */
79 static HAL_ANT_SETTING
80 ar9300_freebsd_get_antenna_switch(struct ath_hal *ah)
81 {
82 
83 	return (HAL_ANT_VARIABLE);
84 }
85 
86 static HAL_BOOL
87 ar9300_freebsd_set_antenna_switch(struct ath_hal *ah, HAL_ANT_SETTING setting)
88 {
89 
90 	return (AH_TRUE);
91 }
92 
93 static u_int
94 ar9300_freebsd_get_cts_timeout(struct ath_hal *ah)
95 {
96     u_int clks = MS(OS_REG_READ(ah, AR_TIME_OUT), AR_TIME_OUT_CTS);
97     return ath_hal_mac_usec(ah, clks);      /* convert from system clocks */
98 }
99 
100 static void
101 ar9300_freebsd_set_tsf64(struct ath_hal *ah, uint64_t tsf64)
102 {
103 
104 	/*
105 	 * XXX TODO: read ar5416SetTsf64() - we should wait before we do
106 	 * this.
107 	 */
108 	OS_REG_WRITE(ah, AR_TSF_L32, tsf64 & 0xffffffff);
109 	OS_REG_WRITE(ah, AR_TSF_U32, (tsf64 >> 32) & 0xffffffff);
110 }
111 
112 /* Flags for pulse_bw_info */
113 #define	PRI_CH_RADAR_FOUND		0x01
114 #define	EXT_CH_RADAR_FOUND		0x02
115 #define	EXT_CH_RADAR_EARLY_FOUND	0x04
116 
117 static HAL_BOOL
118 ar9300_freebsd_proc_radar_event(struct ath_hal *ah, struct ath_rx_status *rxs,
119     uint64_t fulltsf, const char *buf, HAL_DFS_EVENT *event)
120 {
121 	HAL_BOOL doDfsExtCh;
122 	HAL_BOOL doDfsEnhanced;
123 	HAL_BOOL doDfsCombinedRssi;
124 
125 	uint8_t rssi = 0, ext_rssi = 0;
126 	uint8_t pulse_bw_info = 0, pulse_length_ext = 0, pulse_length_pri = 0;
127 	uint32_t dur = 0;
128 	int pri_found = 1, ext_found = 0;
129 	int early_ext = 0;
130 	int is_dc = 0;
131 	uint16_t datalen;		/* length from the RX status field */
132 
133 	/* Check whether the given phy error is a radar event */
134 	if ((rxs->rs_phyerr != HAL_PHYERR_RADAR) &&
135 	    (rxs->rs_phyerr != HAL_PHYERR_FALSE_RADAR_EXT)) {
136 		return AH_FALSE;
137 	}
138 
139 	/* Grab copies of the capabilities; just to make the code clearer */
140 	doDfsExtCh = AH_PRIVATE(ah)->ah_caps.halExtChanDfsSupport;
141 	doDfsEnhanced = AH_PRIVATE(ah)->ah_caps.halEnhancedDfsSupport;
142 	doDfsCombinedRssi = AH_PRIVATE(ah)->ah_caps.halUseCombinedRadarRssi;
143 
144 	datalen = rxs->rs_datalen;
145 
146 	/* If hardware supports it, use combined RSSI, else use chain 0 RSSI */
147 	if (doDfsCombinedRssi)
148 		rssi = (uint8_t) rxs->rs_rssi;
149 	else
150 		rssi = (uint8_t) rxs->rs_rssi_ctl[0];
151 
152 	/* Set this; but only use it if doDfsExtCh is set */
153 	ext_rssi = (uint8_t) rxs->rs_rssi_ext[0];
154 
155 	/* Cap it at 0 if the RSSI is a negative number */
156 	if (rssi & 0x80)
157 		rssi = 0;
158 
159 	if (ext_rssi & 0x80)
160 		ext_rssi = 0;
161 
162 	/*
163 	 * Fetch the relevant data from the frame
164 	 */
165 	if (doDfsExtCh) {
166 		if (datalen < 3)
167 			return AH_FALSE;
168 
169 		/* Last three bytes of the frame are of interest */
170 		pulse_length_pri = *(buf + datalen - 3);
171 		pulse_length_ext = *(buf + datalen - 2);
172 		pulse_bw_info = *(buf + datalen - 1);
173 		HALDEBUG(ah, HAL_DEBUG_DFS, "%s: rssi=%d, ext_rssi=%d, pulse_length_pri=%d,"
174 		    " pulse_length_ext=%d, pulse_bw_info=%x\n",
175 		    __func__, rssi, ext_rssi, pulse_length_pri, pulse_length_ext,
176 		    pulse_bw_info);
177 	} else {
178 		/* The pulse width is byte 0 of the data */
179 		if (datalen >= 1)
180 			dur = ((uint8_t) buf[0]) & 0xff;
181 		else
182 			dur = 0;
183 
184 		if (dur == 0 && rssi == 0) {
185 			HALDEBUG(ah, HAL_DEBUG_DFS, "%s: dur and rssi are 0\n", __func__);
186 			return AH_FALSE;
187 		}
188 
189 		HALDEBUG(ah, HAL_DEBUG_DFS, "%s: rssi=%d, dur=%d\n", __func__, rssi, dur);
190 
191 		/* Single-channel only */
192 		pri_found = 1;
193 		ext_found = 0;
194 	}
195 
196 	/*
197 	 * If doing extended channel data, pulse_bw_info must
198 	 * have one of the flags set.
199 	 */
200 	if (doDfsExtCh && pulse_bw_info == 0x0)
201 		return AH_FALSE;
202 
203 	/*
204 	 * If the extended channel data is available, calculate
205 	 * which to pay attention to.
206 	 */
207 	if (doDfsExtCh) {
208 		/* If pulse is on DC, take the larger duration of the two */
209 		if ((pulse_bw_info & EXT_CH_RADAR_FOUND) &&
210 		    (pulse_bw_info & PRI_CH_RADAR_FOUND)) {
211 			is_dc = 1;
212 			if (pulse_length_ext > pulse_length_pri) {
213 				dur = pulse_length_ext;
214 				pri_found = 0;
215 				ext_found = 1;
216 			} else {
217 				dur = pulse_length_pri;
218 				pri_found = 1;
219 				ext_found = 0;
220 			}
221 		} else if (pulse_bw_info & EXT_CH_RADAR_EARLY_FOUND) {
222 			dur = pulse_length_ext;
223 			pri_found = 0;
224 			ext_found = 1;
225 			early_ext = 1;
226 		} else if (pulse_bw_info & PRI_CH_RADAR_FOUND) {
227 			dur = pulse_length_pri;
228 			pri_found = 1;
229 			ext_found = 0;
230 		} else if (pulse_bw_info & EXT_CH_RADAR_FOUND) {
231 			dur = pulse_length_ext;
232 			pri_found = 0;
233 			ext_found = 1;
234 		}
235 
236 	}
237 
238 	/*
239 	 * For enhanced DFS (Merlin and later), pulse_bw_info has
240 	 * implications for selecting the correct RSSI value.
241 	 */
242 	if (doDfsEnhanced) {
243 		switch (pulse_bw_info & 0x03) {
244 		case 0:
245 			/* No radar? */
246 			rssi = 0;
247 			break;
248 		case PRI_CH_RADAR_FOUND:
249 			/* Radar in primary channel */
250 			/* Cannot use ctrl channel RSSI if ext channel is stronger */
251 			if (ext_rssi >= (rssi + 3)) {
252 				rssi = 0;
253 			}
254 			break;
255 		case EXT_CH_RADAR_FOUND:
256 			/* Radar in extended channel */
257 			/* Cannot use ext channel RSSI if ctrl channel is stronger */
258 			if (rssi >= (ext_rssi + 12)) {
259 				rssi = 0;
260 			} else {
261 				rssi = ext_rssi;
262 			}
263 			break;
264 		case (PRI_CH_RADAR_FOUND | EXT_CH_RADAR_FOUND):
265 			/* When both are present, use stronger one */
266 			if (rssi < ext_rssi)
267 				rssi = ext_rssi;
268 			break;
269 		}
270 	}
271 
272 	/*
273 	 * If not doing enhanced DFS, choose the ext channel if
274 	 * it is stronger than the main channel
275 	 */
276 	if (doDfsExtCh && !doDfsEnhanced) {
277 		if ((ext_rssi > rssi) && (ext_rssi < 128))
278 			rssi = ext_rssi;
279 	}
280 
281 	/*
282 	 * XXX what happens if the above code decides the RSSI
283 	 * XXX wasn't valid, an sets it to 0?
284 	 */
285 
286 	/*
287 	 * Fill out dfs_event structure.
288 	 */
289 	event->re_full_ts = fulltsf;
290 	event->re_ts = rxs->rs_tstamp;
291 	event->re_rssi = rssi;
292 	event->re_dur = dur;
293 
294 	event->re_flags = 0;
295 	if (pri_found)
296 		event->re_flags |= HAL_DFS_EVENT_PRICH;
297 	if (ext_found)
298 		event->re_flags |= HAL_DFS_EVENT_EXTCH;
299 	if (early_ext)
300 		event->re_flags |= HAL_DFS_EVENT_EXTEARLY;
301 	if (is_dc)
302 		event->re_flags |= HAL_DFS_EVENT_ISDC;
303 
304 	return AH_TRUE;
305 }
306 
307 void
308 ar9300_attach_freebsd_ops(struct ath_hal *ah)
309 {
310 
311 	/* Global functions */
312 	ah->ah_detach		= ar9300_detach;
313 	ah->ah_getRateTable		= ar9300_get_rate_table;
314 
315 	/* Reset functions */
316 	ah->ah_reset		= ar9300_reset_freebsd;
317 	ah->ah_phyDisable		= ar9300_phy_disable;
318 	ah->ah_disable		= ar9300_disable;
319 	ah->ah_configPCIE		= ar9300_config_pcie_freebsd;
320 //	ah->ah_disablePCIE		= ar9300_disable_pcie_phy;
321 	ah->ah_setPCUConfig		= ar9300_set_pcu_config;
322 	// perCalibration
323 	ah->ah_perCalibrationN	= ar9300_per_calibration_freebsd;
324 	ah->ah_resetCalValid	= ar9300_reset_cal_valid_freebsd;
325 	ah->ah_setTxPowerLimit	= ar9300_freebsd_set_tx_power_limit;
326 	ah->ah_getChanNoise		= ath_hal_getChanNoise;
327 
328 	/* Transmit functions */
329 	ah->ah_setupTxQueue		= ar9300_setup_tx_queue;
330 	ah->ah_setTxQueueProps	= ar9300_set_tx_queue_props;
331 	ah->ah_getTxQueueProps	= ar9300_get_tx_queue_props;
332 	ah->ah_releaseTxQueue	= ar9300_release_tx_queue;
333 	ah->ah_resetTxQueue		= ar9300_reset_tx_queue;
334 	ah->ah_getTxDP		= ar9300_get_tx_dp;
335 	ah->ah_setTxDP		= ar9300_set_tx_dp;
336 	ah->ah_numTxPending		= ar9300_num_tx_pending;
337 	ah->ah_startTxDma		= ar9300_start_tx_dma;
338 	ah->ah_stopTxDma		= ar9300_stop_tx_dma_freebsd;
339 	ah->ah_setupTxDesc		= ar9300_freebsd_setup_tx_desc;
340 	ah->ah_setupXTxDesc		= ar9300_freebsd_setup_x_tx_desc;
341 	ah->ah_fillTxDesc		= ar9300_freebsd_fill_tx_desc;
342 	ah->ah_procTxDesc		= ar9300_freebsd_proc_tx_desc;
343 	ah->ah_getTxIntrQueue	= ar9300_get_tx_intr_queue;
344 	// reqTxIntrDesc
345 	ah->ah_getTxCompletionRates	= ar9300_freebsd_get_tx_completion_rates;
346 	ah->ah_setTxDescLink	= ar9300_set_desc_link;
347 	ah->ah_getTxDescLink	= ar9300_freebsd_get_desc_link;
348 	ah->ah_getTxDescLinkPtr	= ar9300_get_desc_link_ptr;
349 	ah->ah_setupTxStatusRing	= ar9300_setup_tx_status_ring;
350 	ah->ah_getTxRawTxDesc	 = ar9300_get_raw_tx_desc;
351 	ah->ah_updateTxTrigLevel	= ar9300_update_tx_trig_level;
352 
353 	/* RX functions */
354 	ah->ah_getRxDP		= ar9300_get_rx_dp;
355 	ah->ah_setRxDP		= ar9300_set_rx_dp;
356 	ah->ah_enableReceive	= ar9300_enable_receive;
357 	ah->ah_stopDmaReceive	= ar9300_stop_dma_receive_freebsd;
358 	ah->ah_startPcuReceive	= ar9300_start_pcu_receive;
359 	ah->ah_stopPcuReceive	= ar9300_stop_pcu_receive;
360 	ah->ah_setMulticastFilter	= ar9300_set_multicast_filter;
361 	ah->ah_setMulticastFilterIndex = ar9300SetMulticastFilterIndex;
362 	ah->ah_clrMulticastFilterIndex = ar9300ClrMulticastFilterIndex;
363 	ah->ah_getRxFilter		= ar9300_get_rx_filter;
364 	ah->ah_setRxFilter		= ar9300_set_rx_filter;
365 	/* setupRxDesc */
366 	ah->ah_procRxDesc		= ar9300_proc_rx_desc_freebsd;
367 	ah->ah_rxMonitor		= ar9300_ani_rxmonitor_freebsd;
368 	ah->ah_aniPoll		= ar9300_ani_poll_freebsd;
369 	ah->ah_procMibEvent		= ar9300_process_mib_intr;
370 
371 	/* Misc functions */
372 	ah->ah_getCapability	= ar9300_get_capability;
373 	ah->ah_setCapability	= ar9300_set_capability;
374 	ah->ah_getDiagState		= ar9300_get_diag_state;
375 	ah->ah_getMacAddress	= ar9300_get_mac_address;
376 	ah->ah_setMacAddress	= ar9300_set_mac_address;
377 	ah->ah_getBssIdMask		= ar9300_get_bss_id_mask;
378 	ah->ah_setBssIdMask		= ar9300_set_bss_id_mask;
379 	ah->ah_setRegulatoryDomain	= ar9300_set_regulatory_domain;
380 	ah->ah_setLedState		= ar9300_set_led_state;
381 	ah->ah_writeAssocid		= ar9300_write_associd;
382 	ah->ah_gpioCfgInput		= ar9300_gpio_cfg_input;
383 	ah->ah_gpioCfgOutput	= ar9300_gpio_cfg_output;
384 	ah->ah_gpioGet		= ar9300_gpio_get;
385 	ah->ah_gpioSet		= ar9300_gpio_set;
386 	ah->ah_gpioSetIntr		= ar9300_gpio_set_intr;
387 	/* polarity */
388 	/* mask */
389 	ah->ah_getTsf32		= ar9300_get_tsf32;
390 	ah->ah_getTsf64		= ar9300_get_tsf64;
391 	ah->ah_resetTsf		= ar9300_reset_tsf;
392 	ah->ah_setTsf64		= ar9300_freebsd_set_tsf64;
393 	ah->ah_detectCardPresent	= ar9300_detect_card_present;
394 	// ah->ah_updateMibCounters	= ar9300_update_mib_counters;
395 	ah->ah_getRfGain		= ar9300_get_rfgain;
396 	ah->ah_getDefAntenna	= ar9300_get_def_antenna;
397 	ah->ah_setDefAntenna	= ar9300_set_def_antenna;
398 	ah->ah_getAntennaSwitch	= ar9300_freebsd_get_antenna_switch;
399 	ah->ah_setAntennaSwitch	= ar9300_freebsd_set_antenna_switch;
400 	// ah->ah_setSifsTime		= ar9300_set_sifs_time;
401 	// ah->ah_getSifsTime		= ar9300_get_sifs_time;
402 	ah->ah_setSlotTime		= ar9300_set_slot_time;
403 	ah->ah_getSlotTime		= ar9300GetSlotTime;
404 	ah->ah_getAckTimeout	= ar9300_get_ack_timeout;
405 	ah->ah_setAckTimeout	= ar9300_set_ack_timeout;
406 	// XXX ack/ctsrate
407 	// XXX CTS timeout
408 	ah->ah_getCTSTimeout = ar9300_freebsd_get_cts_timeout;
409 	// XXX decompmask
410 	// coverageclass
411 	ah->ah_setQuiet		= ar9300_set_quiet;
412 	ah->ah_getMibCycleCounts	= ar9300_freebsd_get_mib_cycle_counts;
413 
414 	/* DFS functions */
415 	ah->ah_enableDfs		= ar9300_enable_dfs;
416 	ah->ah_getDfsThresh		= ar9300_get_dfs_thresh;
417 	ah->ah_getDfsDefaultThresh	= ar9300_get_default_dfs_thresh;
418 	ah->ah_procRadarEvent		= ar9300_freebsd_proc_radar_event;
419 	ah->ah_isFastClockEnabled	= ar9300_is_fast_clock_enabled;
420 	ah->ah_get11nExtBusy		= ar9300_get_11n_ext_busy;
421 	ah->ah_setDfsCacTxQuiet		= ar9300_cac_tx_quiet;
422 
423 	/* Spectral Scan Functions */
424 	ah->ah_spectralConfigure	= ar9300_configure_spectral_scan;
425 	ah->ah_spectralGetConfig	= ar9300_get_spectral_params;
426 	ah->ah_spectralStart		= ar9300_start_spectral_scan;
427 	ah->ah_spectralStop		= ar9300_stop_spectral_scan;
428 	ah->ah_spectralIsEnabled	= ar9300_is_spectral_enabled;
429 	ah->ah_spectralIsActive		= ar9300_is_spectral_active;
430 
431 	/* Key cache functions */
432 	ah->ah_getKeyCacheSize	= ar9300_get_key_cache_size;
433 	ah->ah_resetKeyCacheEntry	= ar9300_reset_key_cache_entry;
434 	ah->ah_isKeyCacheEntryValid	= ar9300_is_key_cache_entry_valid;
435 	ah->ah_setKeyCacheEntry	= ar9300_set_key_cache_entry;
436 	ah->ah_setKeyCacheEntryMac	= ar9300_set_key_cache_entry_mac;
437 
438 	/* Power management functions */
439 	ah->ah_setPowerMode		= ar9300_set_power_mode;
440 	ah->ah_getPowerMode		= ar9300_get_power_mode;
441 
442 	/* Beacon functions */
443 	/* ah_setBeaconTimers */
444 	ah->ah_beaconInit		= ar9300_freebsd_beacon_init;
445 	ah->ah_setBeaconTimers		= ar9300_beacon_set_beacon_timers;
446 	ah->ah_setStationBeaconTimers = ar9300_set_sta_beacon_timers;
447 	/* ah_resetStationBeaconTimers */
448 	ah->ah_getNextTBTT = ar9300_get_next_tbtt;
449 
450 	/* Interrupt functions */
451 	ah->ah_isInterruptPending	= ar9300_is_interrupt_pending;
452 	ah->ah_getPendingInterrupts	= ar9300_get_pending_interrupts_freebsd;
453 	ah->ah_getInterrupts =	ar9300_get_interrupts;
454 	ah->ah_setInterrupts =	ar9300_set_interrupts_freebsd;
455 
456 	/* Regulatory/internal functions */
457 	//    AH_PRIVATE(ah)->ah_getNfAdjust = ar9300_get_nf_adjust;
458 	AH_PRIVATE(ah)->ah_eepromRead = ar9300_eeprom_read_word;
459 	//    AH_PRIVATE(ah)->ah_getChipPowerLimits = ar9300_get_chip_power_limits;
460 	AH_PRIVATE(ah)->ah_getWirelessModes = ar9300_get_wireless_modes;
461 	AH_PRIVATE(ah)->ah_getChannelEdges = ar9300_get_channel_edges;
462 
463 	AH_PRIVATE(ah)->ah_eepromRead = ar9300_eeprom_read_word;
464 	/* XXX ah_eeprom */
465 	/* XXX ah_eeversion */
466 	/* XXX ah_eepromDetach */
467 	/* XXX ah_eepromGet */
468 	AH_PRIVATE(ah)->ah_eepromGet = ar9300_eeprom_get_freebsd;
469 	/* XXX ah_eepromSet */
470 	/* XXX ah_getSpurChan */
471 	/* XXX ah_eepromDiag */
472 
473 	/* 802.11n functions */
474 	ah->ah_chainTxDesc = ar9300_freebsd_chain_tx_desc;
475 	ah->ah_setupFirstTxDesc= ar9300_freebsd_setup_first_tx_desc;
476 	ah->ah_setupLastTxDesc = ar9300_freebsd_setup_last_tx_desc;
477 	ah->ah_set11nRateScenario = ar9300_freebsd_set_11n_rate_scenario;
478 	ah->ah_set11nTxDesc = ar9300_freebsd_setup_11n_desc;
479 	ah->ah_set11nAggrFirst = ar9300_set_11n_aggr_first;
480 	ah->ah_set11nAggrMiddle = ar9300_set_11n_aggr_middle;
481 	ah->ah_set11nAggrLast = ar9300_set_11n_aggr_last;
482 	ah->ah_clr11nAggr = ar9300_clr_11n_aggr;
483 	ah->ah_set11nBurstDuration = ar9300_set_11n_burst_duration;
484 	/* ah_get11nExtBusy */
485 	ah->ah_set11nMac2040 = ar9300_set_11n_mac2040;
486 	ah->ah_setChainMasks = ar9300SetChainMasks;
487 	/* ah_get11nRxClear */
488 	/* ah_set11nRxClear */
489 
490 	/* bluetooth coexistence functions */
491 	ah->ah_btCoexSetInfo		= ar9300_set_bt_coex_info;
492 	ah->ah_btCoexSetConfig		= ar9300_bt_coex_config;
493 	ah->ah_btCoexSetQcuThresh	= ar9300_bt_coex_set_qcu_thresh;
494 	ah->ah_btCoexSetWeights		= ar9300_bt_coex_set_weights;
495 	ah->ah_btCoexSetBmissThresh	= ar9300_bt_coex_setup_bmiss_thresh;
496 	ah->ah_btCoexSetParameter	= ar9300_bt_coex_set_parameter;
497 	ah->ah_btCoexDisable		= ar9300_bt_coex_disable;
498 	ah->ah_btCoexEnable		= ar9300_bt_coex_enable;
499 
500 	/* MCI bluetooth functions */
501 	if (AR_SREV_JUPITER(ah) || AR_SREV_APHRODITE(ah)) {
502 		/*
503 		 * Note: these are done in attach too for now, because
504 		 * at this point we haven't yet setup the mac/bb revision
505 		 * values, so this code is effectively NULL.
506 		 * However, I'm leaving this here so people digging
507 		 * into the code (a) see the MCI bits here, and (b)
508 		 * are now told they should look elsewhere for
509 		 * these methods.
510 		 */
511 		ah->ah_btCoexSetWeights = ar9300_mci_bt_coex_set_weights;
512 		ah->ah_btCoexDisable = ar9300_mci_bt_coex_disable;
513 		ah->ah_btCoexEnable = ar9300_mci_bt_coex_enable;
514 	}
515 	ah->ah_btMciSetup		= ar9300_mci_setup;
516 	ah->ah_btMciSendMessage		= ar9300_mci_send_message;
517 	ah->ah_btMciGetInterrupt	= ar9300_mci_get_interrupt;
518 	ah->ah_btMciState		= ar9300_mci_state;
519 	ah->ah_btMciDetach		= ar9300_mci_detach;
520 
521 	/* LNA diversity functions */
522 	ah->ah_divLnaConfGet = ar9300_ant_div_comb_get_config;
523 	ah->ah_divLnaConfSet = ar9300_ant_div_comb_set_config;
524 }
525 
526 HAL_BOOL
527 ar9300_reset_freebsd(struct ath_hal *ah, HAL_OPMODE opmode,
528     struct ieee80211_channel *chan, HAL_BOOL bChannelChange,
529     HAL_RESET_TYPE resetType,
530     HAL_STATUS *status)
531 {
532 	HAL_BOOL r;
533 	HAL_HT_MACMODE macmode;
534 	struct ath_hal_private  *ap  = AH_PRIVATE(ah);
535 
536 	macmode =
537 	    IEEE80211_IS_CHAN_HT40(chan) ?
538 	        HAL_HT_MACMODE_2040 : HAL_HT_MACMODE_20;
539 
540 	r = ar9300_reset(ah, opmode, chan, macmode,
541 	    ap->ah_caps.halTxChainMask,
542 	    ap->ah_caps.halRxChainMask,
543 	    HAL_HT_EXTPROTSPACING_20, /* always 20Mhz channel spacing */
544 	    bChannelChange,
545 	    status,
546 	    AH_FALSE);       /* XXX should really extend ath_hal_reset() */
547 
548 	return (r);
549 }
550 
551 void
552 ar9300_config_pcie_freebsd(struct ath_hal *ah, HAL_BOOL restore,
553     HAL_BOOL powerOff)
554 {
555 
556 	ar9300_config_pci_power_save(ah, restore ? 1 : 0, powerOff ? 1 : 0);
557 }
558 
559 /*
560  * This is a copy from ar9300_eeprom_get(), purely because the FreeBSD
561  * API is very silly and inconsistent.
562  *
563  * The AR93xx HAL doesn't call the eepromGetFlag() function, so this
564  * only occurs for FreeBSD code.
565  *
566  * When I fix this particular API, I'll undo this.
567  */
568 HAL_STATUS
569 ar9300_eeprom_get_freebsd(struct ath_hal *ah, int param, void *val)
570 {
571 
572 	switch (param) {
573 	case AR_EEP_FSTCLK_5G:
574 		return HAL_OK;
575 	default:
576 		ath_hal_printf(ah, "%s: called, param=%d\n",
577 		    __func__, param);
578 		return HAL_EIO;
579 	}
580 }
581 
582 HAL_BOOL
583 ar9300_stop_tx_dma_freebsd(struct ath_hal *ah, u_int q)
584 {
585 
586 	return ar9300_stop_tx_dma(ah, q, 1000);
587 }
588 
589 void
590 ar9300_ani_poll_freebsd(struct ath_hal *ah,
591     const struct ieee80211_channel *chan)
592 {
593 
594 	HAL_NODE_STATS stats;
595 	HAL_ANISTATS anistats;
596 	HAL_SURVEY_SAMPLE survey;
597 
598 	OS_MEMZERO(&stats, sizeof(stats));
599 	OS_MEMZERO(&anistats, sizeof(anistats));
600 	OS_MEMZERO(&survey, sizeof(survey));
601 
602 	ar9300_ani_ar_poll(ah, &stats, chan, &anistats);
603 
604 	/*
605 	 * If ANI stats are valid, use them to update the
606 	 * channel survey.
607 	 */
608 	if (anistats.valid) {
609 		survey.cycle_count = anistats.cyclecnt_diff;
610 		survey.chan_busy = anistats.rxclr_cnt;
611 		survey.ext_chan_busy = anistats.extrxclr_cnt;
612 		survey.tx_busy = anistats.txframecnt_diff;
613 		survey.rx_busy = anistats.rxframecnt_diff;
614 		ath_hal_survey_add_sample(ah, &survey);
615 	}
616 }
617 
618 /*
619  * Setup the configuration parameters in the style the AR9300 HAL
620  * wants.
621  */
622 void
623 ar9300_config_defaults_freebsd(struct ath_hal *ah, HAL_OPS_CONFIG *ah_config)
624 {
625 
626 	/* Until FreeBSD's HAL does this by default - just copy */
627 	OS_MEMCPY(&ah->ah_config, ah_config, sizeof(HAL_OPS_CONFIG));
628 	ah->ah_config.ath_hal_enable_ani = AH_TRUE;
629 }
630 
631 HAL_BOOL
632 ar9300_stop_dma_receive_freebsd(struct ath_hal *ah)
633 {
634 
635 	return ar9300_stop_dma_receive(ah, 1000);
636 }
637 
638 HAL_BOOL
639 ar9300_get_pending_interrupts_freebsd(struct ath_hal *ah, HAL_INT *masked)
640 {
641 
642 	/* Non-MSI, so no MSI vector; and 'nortc' = 0 */
643 	return ar9300_get_pending_interrupts(ah, masked, HAL_INT_LINE, 0, 0);
644 }
645 
646 HAL_INT
647 ar9300_set_interrupts_freebsd(struct ath_hal *ah, HAL_INT ints)
648 {
649 
650 	/* nortc = 0 */
651 	return ar9300_set_interrupts(ah, ints, 0);
652 }
653 
654 HAL_BOOL
655 ar9300_per_calibration_freebsd(struct ath_hal *ah,
656     struct ieee80211_channel *chan, u_int rxchainmask, HAL_BOOL long_cal,
657     HAL_BOOL *isCalDone)
658 {
659 	/* XXX fake scheduled calibrations for now */
660 	u_int32_t sched_cals = 0xfffffff;
661 
662 	return ar9300_calibration(ah, chan,
663 	    AH_PRIVATE(ah)->ah_caps.halRxChainMask,
664 	    long_cal,
665 	    isCalDone,
666 	    0,			/* is_scan */
667 	    &sched_cals);
668 }
669 
670 HAL_BOOL
671 ar9300_reset_cal_valid_freebsd(struct ath_hal *ah,
672     const struct ieee80211_channel *chan)
673 {
674 
675 	HAL_BOOL is_cal_done = AH_TRUE;
676 
677 	ar9300_reset_cal_valid(ah, chan, &is_cal_done, 0xffffffff);
678 	return (is_cal_done);
679 }
680 
681 
682 /*
683  * FreeBSD will just pass in the descriptor value as 'pa'.
684  * The Atheros HAL treats 'pa' as the physical address of the RX
685  * descriptor and 'bufaddr' as the physical address of the RX buffer.
686  * I'm not sure why they didn't collapse them - the AR9300 RX descriptor
687  * routine doesn't check 'pa'.
688  */
689 HAL_STATUS
690 ar9300_proc_rx_desc_freebsd(struct ath_hal *ah, struct ath_desc *ds,
691     uint32_t pa, struct ath_desc *ds_next, uint64_t tsf,
692     struct ath_rx_status *rxs)
693 {
694 
695 	return (ar9300_proc_rx_desc_fast(ah, ds, 0, ds_next, rxs,
696 	    (void *) ds));
697 }
698 
699 /*
700  * This is the primary way the ANI code gets the node statistics per packet.
701  */
702 void
703 ar9300_ani_rxmonitor_freebsd(struct ath_hal *ah, const HAL_NODE_STATS *stats,
704     const struct ieee80211_channel *chan)
705 {
706 	struct ath_hal_9300 *ahp = AH9300(ah);
707 
708 	ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi;
709 }
710 
711 void
712 ar9300_freebsd_get_desc_link(struct ath_hal *ah, void *ds, uint32_t *link)
713 {
714 	struct ar9300_txc *ads = AR9300TXC(ds);
715 
716 	(*link) = ads->ds_link;
717 }
718 
719 /*
720  * TX descriptor field setting wrappers - eek.
721  */
722 
723 
724 HAL_BOOL
725 ar9300_freebsd_setup_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
726     u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower,
727     u_int txRate0, u_int txTries0, u_int keyIx, u_int antMode, u_int flags,
728     u_int rtsctsRate, u_int rtsCtsDuration, u_int compicvLen,
729     u_int compivLen, u_int comp)
730 {
731 	struct ath_hal_9300 *ahp = AH9300(ah);
732 
733 	HAL_KEY_TYPE keyType = 0;	/* XXX No padding */
734 
735 	if (keyIx != HAL_TXKEYIX_INVALID)
736 		keyType = ahp->ah_keytype[keyIx];
737 
738 	/* XXX bounds check keyix */
739 	ar9300_set_11n_tx_desc(ah, ds, pktLen, type, txPower, keyIx,
740 	    keyType, flags);
741 
742 	return AH_TRUE;
743 }
744 
745 HAL_BOOL
746 ar9300_freebsd_setup_x_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
747     u_int txRate1, u_int txTries1,
748     u_int txRate2, u_int txTries2,
749     u_int txRate3, u_int txTries3)
750 {
751 
752 #if 0
753 	ath_hal_printf(ah, "%s: called, 0x%x/%d, 0x%x/%d, 0x%x/%d\n",
754 	    __func__,
755 	    txRate1, txTries1,
756 	    txRate2, txTries2,
757 	    txRate3, txTries3);
758 #endif
759 
760 	/* XXX should only be called during probe */
761 	return (AH_TRUE);
762 }
763 
764 HAL_BOOL
765 ar9300_freebsd_fill_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
766     HAL_DMA_ADDR *bufListPtr, uint32_t *segLenPtr, u_int descId, u_int qid,
767     HAL_BOOL firstSeg, HAL_BOOL lastSeg,
768     const struct ath_desc *ds0)
769 {
770 	HAL_KEY_TYPE keyType = 0;
771 	const struct ar9300_txc *ads = AR9300TXC_CONST(ds0);
772 
773 	/*
774 	 * FreeBSD's HAL doesn't pass the keytype to fill_tx_desc();
775 	 * it's copied as part of the descriptor chaining.
776 	 *
777 	 * So, extract it from ds0.
778 	 */
779 	keyType = MS(ads->ds_ctl17, AR_encr_type);
780 
781 	return ar9300_fill_tx_desc(ah, ds, bufListPtr, segLenPtr, descId,
782 	    qid, keyType, firstSeg, lastSeg, ds0);
783 }
784 
785 HAL_BOOL
786 ar9300_freebsd_get_tx_completion_rates(struct ath_hal *ah,
787     const struct ath_desc *ds0, int *rates, int *tries)
788 {
789 
790 	ath_hal_printf(ah, "%s: called\n", __func__);
791 	return AH_FALSE;	/* XXX for now */
792 }
793 
794 
795 /*
796  * 802.11n TX descriptor wrappers
797  */
798 void
799 ar9300_freebsd_set_11n_rate_scenario(struct ath_hal *ah, struct ath_desc *ds,
800     u_int durUpdateEn, u_int rtsctsRate, HAL_11N_RATE_SERIES series[],
801     u_int nseries, u_int flags)
802 {
803 
804 	/* lastds=NULL, rtscts_duration is 0, smart antenna is 0 */
805 	ar9300_set_11n_rate_scenario(ah, (void *) ds, (void *)ds, durUpdateEn,
806 	    rtsctsRate, 0, series, nseries, flags, 0);
807 }
808 
809 /* chaintxdesc */
810 HAL_BOOL
811 ar9300_freebsd_chain_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
812     HAL_DMA_ADDR *bufLenList, uint32_t *segLenList,
813     u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int keyIx,
814     HAL_CIPHER cipher, uint8_t numDelims,
815     HAL_BOOL firstSeg, HAL_BOOL lastSeg, HAL_BOOL lastAggr)
816 {
817 
818 	ath_hal_printf(ah, "%s: called\n", __func__);
819 	return AH_FALSE;
820 }
821 
822 /* setupfirsttxdesc */
823 HAL_BOOL
824 ar9300_freebsd_setup_first_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
825     u_int aggrLen, u_int flags, u_int txPower, u_int txRate0,
826     u_int txTries0, u_int antMode, u_int rtsctsRate, u_int rtsctsDuration)
827 {
828 
829 	ath_hal_printf(ah, "%s: called\n", __func__);
830 	return AH_FALSE;
831 }
832 
833 /* setuplasttxdesc */
834 /*
835  * This gets called but for now let's not log anything;
836  * it's only used to update the rate control information.
837  */
838 HAL_BOOL
839 ar9300_freebsd_setup_last_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
840     const struct ath_desc *ds0)
841 {
842 
843 //	ath_hal_printf(ah, "%s: called\n", __func__);
844 	return AH_FALSE;
845 }
846 
847 void
848 ar9300_freebsd_setup_11n_desc(struct ath_hal *ah, void *ds, u_int pktLen,
849     HAL_PKT_TYPE type, u_int txPower, u_int keyIx, u_int flags)
850 {
851 	ath_hal_printf(ah, "%s: called\n", __func__);
852 #if 0
853 	struct ath_hal_9300 *ahp = AH9300(ah);
854 
855 	HAL_KEY_TYPE keyType = 0;	/* XXX No padding */
856 
857 	if (keyIx != HAL_TXKEYIX_INVALID)
858 		keyType = ahp->ah_keytype[keyIx];
859 
860 	/* XXX bounds check keyix */
861 	ar9300_set_11n_tx_desc(ah, ds, pktLen, type, txPower, keyIx,
862 	    keyType, flags);
863 #endif
864 }
865 
866 HAL_STATUS
867 ar9300_freebsd_proc_tx_desc(struct ath_hal *ah, struct ath_desc *ds,
868     struct ath_tx_status *ts)
869 {
870 
871 	return ar9300_proc_tx_desc(ah, ts);
872 }
873 
874 void
875 ar9300_freebsd_beacon_init(struct ath_hal *ah, uint32_t next_beacon,
876     uint32_t beacon_period)
877 {
878 
879 	ar9300_beacon_init(ah, next_beacon, beacon_period, 0,
880 	    AH_PRIVATE(ah)->ah_opmode);
881 }
882 
883 HAL_BOOL
884 ar9300_freebsd_get_mib_cycle_counts(struct ath_hal *ah,
885     HAL_SURVEY_SAMPLE *hs)
886 
887 {
888 
889 	return (AH_FALSE);
890 }
891 
892 /*
893  * Clear multicast filter by index - from FreeBSD ar5212_recv.c
894  */
895 static HAL_BOOL
896 ar9300ClrMulticastFilterIndex(struct ath_hal *ah, uint32_t ix)
897 {
898 	uint32_t val;
899 
900 	if (ix >= 64)
901 		return (AH_FALSE);
902 	if (ix >= 32) {
903 		val = OS_REG_READ(ah, AR_MCAST_FIL1);
904 		OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
905 	} else {
906 		val = OS_REG_READ(ah, AR_MCAST_FIL0);
907 		OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));
908 	}
909 	return AH_TRUE;
910 }
911 
912 /*
913  * Set multicast filter by index - from FreeBSD ar5212_recv.c
914  */
915 static HAL_BOOL
916 ar9300SetMulticastFilterIndex(struct ath_hal *ah, uint32_t ix)
917 {
918 	uint32_t val;
919 
920 	if (ix >= 64)
921 		return (AH_FALSE);
922 	if (ix >= 32) {
923 		val = OS_REG_READ(ah, AR_MCAST_FIL1);
924 		OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
925 	} else {
926 		val = OS_REG_READ(ah, AR_MCAST_FIL0);
927 		OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
928 	}
929 	return (AH_TRUE);
930 }
931 
932 #define	TU_TO_USEC(_tu) ((_tu) << 10)
933 #define	ONE_EIGHTH_TU_TO_USEC(_tu8) ((_tu8) << 7)
934 
935 /*
936  * Initializes all of the hardware registers used to
937  * send beacons.  Note that for station operation the
938  * driver calls ar9300_set_sta_beacon_timers instead.
939  */
940 static void
941 ar9300_beacon_set_beacon_timers(struct ath_hal *ah,
942     const HAL_BEACON_TIMERS *bt)
943 {
944 	uint32_t bperiod;
945 
946 #if 0
947     HALASSERT(opmode == HAL_M_IBSS || opmode == HAL_M_HOSTAP);
948     if (opmode == HAL_M_IBSS) {
949         OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
950     }
951 #endif
952 
953 	/* XXX TODO: should migrate the HAL code to always use ONE_EIGHTH_TU */
954 	OS_REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bt->bt_nexttbtt));
955 	OS_REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextdba));
956 	OS_REG_WRITE(ah, AR_NEXT_SWBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextswba));
957 	OS_REG_WRITE(ah, AR_NEXT_NDP_TIMER, TU_TO_USEC(bt->bt_nextatim));
958 
959 	bperiod = TU_TO_USEC(bt->bt_intval & HAL_BEACON_PERIOD);
960 	AH9300(ah)->ah_beaconInterval = bt->bt_intval & HAL_BEACON_PERIOD;
961 	OS_REG_WRITE(ah, AR_BEACON_PERIOD, bperiod);
962 	OS_REG_WRITE(ah, AR_DMA_BEACON_PERIOD, bperiod);
963 	OS_REG_WRITE(ah, AR_SWBA_PERIOD, bperiod);
964 	OS_REG_WRITE(ah, AR_NDP_PERIOD, bperiod);
965 
966 	/*
967 	 * Reset TSF if required.
968 	 */
969 	if (bt->bt_intval & HAL_BEACON_RESET_TSF)
970 		ar9300_reset_tsf(ah);
971 
972 	/* enable timers */
973 	/* NB: flags == 0 handled specially for backwards compatibility */
974 	OS_REG_SET_BIT(ah, AR_TIMER_MODE,
975 	    bt->bt_flags != 0 ? bt->bt_flags :
976 	    AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN);
977 }
978 
979 
980 /*
981  * RF attach stubs
982  */
983 
984 static HAL_BOOL
985 rf9330_attach(struct ath_hal *ah, HAL_STATUS *status)
986 {
987 
988 	(*status) = HAL_EINVAL;
989 	return (AH_FALSE);
990 }
991 
992 static HAL_BOOL
993 rf9330_probe(struct ath_hal *ah)
994 {
995 	return (AH_FALSE);
996 }
997 
998 AH_RF(RF9330, rf9330_probe, rf9330_attach);
999 
1000