1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2022, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 175 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 176 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 177 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 178 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 179 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 180 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 181 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 182 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 183 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 184 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 185 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 186 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 187 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 188 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 189 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 190 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 191 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 192 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 193 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 194 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 195 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 196 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 197 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 198 199 200 /* 201 * All tables must be byte-packed to match the ACPI specification, since 202 * the tables are provided by the system BIOS. 203 */ 204 #pragma pack(1) 205 206 /* 207 * Note: C bitfields are not used for this reason: 208 * 209 * "Bitfields are great and easy to read, but unfortunately the C language 210 * does not specify the layout of bitfields in memory, which means they are 211 * essentially useless for dealing with packed data in on-disk formats or 212 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 213 * this decision was a design error in C. Ritchie could have picked an order 214 * and stuck with it." Norman Ramsey. 215 * See http://stackoverflow.com/a/1053662/41661 216 */ 217 218 219 /******************************************************************************* 220 * 221 * AEST - Arm Error Source Table 222 * 223 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 224 * September 2020. 225 * 226 ******************************************************************************/ 227 228 typedef struct acpi_table_aest 229 { 230 ACPI_TABLE_HEADER Header; 231 void *NodeArray[]; 232 233 } ACPI_TABLE_AEST; 234 235 /* Common Subtable header - one per Node Structure (Subtable) */ 236 237 typedef struct acpi_aest_hdr 238 { 239 UINT8 Type; 240 UINT16 Length; 241 UINT8 Reserved; 242 UINT32 NodeSpecificOffset; 243 UINT32 NodeInterfaceOffset; 244 UINT32 NodeInterruptOffset; 245 UINT32 NodeInterruptCount; 246 UINT64 TimestampRate; 247 UINT64 Reserved1; 248 UINT64 ErrorInjectionRate; 249 250 } ACPI_AEST_HEADER; 251 252 /* Values for Type above */ 253 254 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 255 #define ACPI_AEST_MEMORY_ERROR_NODE 1 256 #define ACPI_AEST_SMMU_ERROR_NODE 2 257 #define ACPI_AEST_VENDOR_ERROR_NODE 3 258 #define ACPI_AEST_GIC_ERROR_NODE 4 259 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 260 261 262 /* 263 * AEST subtables (Error nodes) 264 */ 265 266 /* 0: Processor Error */ 267 268 typedef struct acpi_aest_processor 269 { 270 UINT32 ProcessorId; 271 UINT8 ResourceType; 272 UINT8 Reserved; 273 UINT8 Flags; 274 UINT8 Revision; 275 UINT64 ProcessorAffinity; 276 277 } ACPI_AEST_PROCESSOR; 278 279 /* Values for ResourceType above, related structs below */ 280 281 #define ACPI_AEST_CACHE_RESOURCE 0 282 #define ACPI_AEST_TLB_RESOURCE 1 283 #define ACPI_AEST_GENERIC_RESOURCE 2 284 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 285 286 /* 0R: Processor Cache Resource Substructure */ 287 288 typedef struct acpi_aest_processor_cache 289 { 290 UINT32 CacheReference; 291 UINT32 Reserved; 292 293 } ACPI_AEST_PROCESSOR_CACHE; 294 295 /* Values for CacheType above */ 296 297 #define ACPI_AEST_CACHE_DATA 0 298 #define ACPI_AEST_CACHE_INSTRUCTION 1 299 #define ACPI_AEST_CACHE_UNIFIED 2 300 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 301 302 /* 1R: Processor TLB Resource Substructure */ 303 304 typedef struct acpi_aest_processor_tlb 305 { 306 UINT32 TlbLevel; 307 UINT32 Reserved; 308 309 } ACPI_AEST_PROCESSOR_TLB; 310 311 /* 2R: Processor Generic Resource Substructure */ 312 313 typedef struct acpi_aest_processor_generic 314 { 315 UINT32 Resource; 316 317 } ACPI_AEST_PROCESSOR_GENERIC; 318 319 /* 1: Memory Error */ 320 321 typedef struct acpi_aest_memory 322 { 323 UINT32 SratProximityDomain; 324 325 } ACPI_AEST_MEMORY; 326 327 /* 2: Smmu Error */ 328 329 typedef struct acpi_aest_smmu 330 { 331 UINT32 IortNodeReference; 332 UINT32 SubcomponentReference; 333 334 } ACPI_AEST_SMMU; 335 336 /* 3: Vendor Defined */ 337 338 typedef struct acpi_aest_vendor 339 { 340 UINT32 AcpiHid; 341 UINT32 AcpiUid; 342 UINT8 VendorSpecificData[16]; 343 344 } ACPI_AEST_VENDOR; 345 346 /* 4: Gic Error */ 347 348 typedef struct acpi_aest_gic 349 { 350 UINT32 InterfaceType; 351 UINT32 InstanceId; 352 353 } ACPI_AEST_GIC; 354 355 /* Values for InterfaceType above */ 356 357 #define ACPI_AEST_GIC_CPU 0 358 #define ACPI_AEST_GIC_DISTRIBUTOR 1 359 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 360 #define ACPI_AEST_GIC_ITS 3 361 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 362 363 364 /* Node Interface Structure */ 365 366 typedef struct acpi_aest_node_interface 367 { 368 UINT8 Type; 369 UINT8 Reserved[3]; 370 UINT32 Flags; 371 UINT64 Address; 372 UINT32 ErrorRecordIndex; 373 UINT32 ErrorRecordCount; 374 UINT64 ErrorRecordImplemented; 375 UINT64 ErrorStatusReporting; 376 UINT64 AddressingMode; 377 378 } ACPI_AEST_NODE_INTERFACE; 379 380 /* Values for Type field above */ 381 382 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 383 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 384 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 385 386 /* Node Interrupt Structure */ 387 388 typedef struct acpi_aest_node_interrupt 389 { 390 UINT8 Type; 391 UINT8 Reserved[2]; 392 UINT8 Flags; 393 UINT32 Gsiv; 394 UINT8 IortId; 395 UINT8 Reserved1[3]; 396 397 } ACPI_AEST_NODE_INTERRUPT; 398 399 /* Values for Type field above */ 400 401 #define ACPI_AEST_NODE_FAULT_HANDLING 0 402 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 403 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 404 405 406 /******************************************************************************* 407 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 408 * 409 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 410 * ARM DEN0093 v1.1 411 * 412 ******************************************************************************/ 413 typedef struct acpi_table_agdi 414 { 415 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 416 UINT8 Flags; 417 UINT8 Reserved[3]; 418 UINT32 SdeiEvent; 419 UINT32 Gsiv; 420 421 } ACPI_TABLE_AGDI; 422 423 /* Mask for Flags field above */ 424 425 #define ACPI_AGDI_SIGNALING_MODE (1) 426 427 428 /******************************************************************************* 429 * 430 * APMT - ARM Performance Monitoring Unit Table 431 * 432 * Conforms to: 433 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 434 * ARM DEN0117 v1.0 November 25, 2021 435 * 436 ******************************************************************************/ 437 438 typedef struct acpi_table_apmt { 439 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 440 } ACPI_TABLE_APMT; 441 442 #define ACPI_APMT_NODE_ID_LENGTH 4 443 444 /* 445 * APMT subtables 446 */ 447 typedef struct acpi_apmt_node { 448 UINT16 Length; 449 UINT8 Flags; 450 UINT8 Type; 451 UINT32 Id; 452 UINT64 InstPrimary; 453 UINT32 InstSecondary; 454 UINT64 BaseAddress0; 455 UINT64 BaseAddress1; 456 UINT32 OvflwIrq; 457 UINT32 Reserved; 458 UINT32 OvflwIrqFlags; 459 UINT32 ProcAffinity; 460 UINT32 ImplId; 461 } ACPI_APMT_NODE; 462 463 /* Masks for Flags field above */ 464 465 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 466 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 467 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 468 469 /* Values for Flags dual page field above */ 470 471 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 472 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 473 474 /* Values for Flags processor affinity field above */ 475 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 476 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 477 478 /* Values for Flags 64-bit atomic field above */ 479 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 480 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 481 482 /* Values for Type field above */ 483 484 enum acpi_apmt_node_type { 485 ACPI_APMT_NODE_TYPE_MC = 0x00, 486 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 487 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 488 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 489 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 490 ACPI_APMT_NODE_TYPE_COUNT 491 }; 492 493 /* Masks for ovflw_irq_flags field above */ 494 495 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 496 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 497 498 /* Values for ovflw_irq_flags mode field above */ 499 500 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 501 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 502 503 /* Values for ovflw_irq_flags type field above */ 504 505 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 506 507 508 /******************************************************************************* 509 * 510 * BDAT - BIOS Data ACPI Table 511 * 512 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 513 * Nov 2020 514 * 515 ******************************************************************************/ 516 517 typedef struct acpi_table_bdat 518 { 519 ACPI_TABLE_HEADER Header; 520 ACPI_GENERIC_ADDRESS Gas; 521 522 } ACPI_TABLE_BDAT; 523 524 525 /******************************************************************************* 526 * 527 * IORT - IO Remapping Table 528 * 529 * Conforms to "IO Remapping Table System Software on ARM Platforms", 530 * Document number: ARM DEN 0049E.d, Feb 2022 531 * 532 ******************************************************************************/ 533 534 typedef struct acpi_table_iort 535 { 536 ACPI_TABLE_HEADER Header; 537 UINT32 NodeCount; 538 UINT32 NodeOffset; 539 UINT32 Reserved; 540 541 } ACPI_TABLE_IORT; 542 543 544 /* 545 * IORT subtables 546 */ 547 typedef struct acpi_iort_node 548 { 549 UINT8 Type; 550 UINT16 Length; 551 UINT8 Revision; 552 UINT32 Identifier; 553 UINT32 MappingCount; 554 UINT32 MappingOffset; 555 char NodeData[1]; 556 557 } ACPI_IORT_NODE; 558 559 /* Values for subtable Type above */ 560 561 enum AcpiIortNodeType 562 { 563 ACPI_IORT_NODE_ITS_GROUP = 0x00, 564 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 565 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 566 ACPI_IORT_NODE_SMMU = 0x03, 567 ACPI_IORT_NODE_SMMU_V3 = 0x04, 568 ACPI_IORT_NODE_PMCG = 0x05, 569 ACPI_IORT_NODE_RMR = 0x06, 570 }; 571 572 573 typedef struct acpi_iort_id_mapping 574 { 575 UINT32 InputBase; /* Lowest value in input range */ 576 UINT32 IdCount; /* Number of IDs */ 577 UINT32 OutputBase; /* Lowest value in output range */ 578 UINT32 OutputReference; /* A reference to the output node */ 579 UINT32 Flags; 580 581 } ACPI_IORT_ID_MAPPING; 582 583 /* Masks for Flags field above for IORT subtable */ 584 585 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 586 587 588 typedef struct acpi_iort_memory_access 589 { 590 UINT32 CacheCoherency; 591 UINT8 Hints; 592 UINT16 Reserved; 593 UINT8 MemoryFlags; 594 595 } ACPI_IORT_MEMORY_ACCESS; 596 597 /* Values for CacheCoherency field above */ 598 599 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 600 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 601 602 /* Masks for Hints field above */ 603 604 #define ACPI_IORT_HT_TRANSIENT (1) 605 #define ACPI_IORT_HT_WRITE (1<<1) 606 #define ACPI_IORT_HT_READ (1<<2) 607 #define ACPI_IORT_HT_OVERRIDE (1<<3) 608 609 /* Masks for MemoryFlags field above */ 610 611 #define ACPI_IORT_MF_COHERENCY (1) 612 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 613 614 615 /* 616 * IORT node specific subtables 617 */ 618 typedef struct acpi_iort_its_group 619 { 620 UINT32 ItsCount; 621 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 622 623 } ACPI_IORT_ITS_GROUP; 624 625 626 typedef struct acpi_iort_named_component 627 { 628 UINT32 NodeFlags; 629 UINT64 MemoryProperties; /* Memory access properties */ 630 UINT8 MemoryAddressLimit; /* Memory address size limit */ 631 char DeviceName[1]; /* Path of namespace object */ 632 633 } ACPI_IORT_NAMED_COMPONENT; 634 635 /* Masks for Flags field above */ 636 637 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 638 #define ACPI_IORT_NC_PASID_BITS (31<<1) 639 640 typedef struct acpi_iort_root_complex 641 { 642 UINT64 MemoryProperties; /* Memory access properties */ 643 UINT32 AtsAttribute; 644 UINT32 PciSegmentNumber; 645 UINT8 MemoryAddressLimit; /* Memory address size limit */ 646 UINT16 PasidCapabilities; /* PASID Capabilities */ 647 UINT8 Reserved[1]; /* Reserved, must be zero */ 648 649 } ACPI_IORT_ROOT_COMPLEX; 650 651 /* Masks for AtsAttribute field above */ 652 653 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 654 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 655 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 656 657 /* Masks for PasidCapabilities field above */ 658 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 659 660 typedef struct acpi_iort_smmu 661 { 662 UINT64 BaseAddress; /* SMMU base address */ 663 UINT64 Span; /* Length of memory range */ 664 UINT32 Model; 665 UINT32 Flags; 666 UINT32 GlobalInterruptOffset; 667 UINT32 ContextInterruptCount; 668 UINT32 ContextInterruptOffset; 669 UINT32 PmuInterruptCount; 670 UINT32 PmuInterruptOffset; 671 UINT64 Interrupts[1]; /* Interrupt array */ 672 673 } ACPI_IORT_SMMU; 674 675 /* Values for Model field above */ 676 677 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 678 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 679 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 680 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 681 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 682 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 683 684 /* Masks for Flags field above */ 685 686 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 687 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 688 689 /* Global interrupt format */ 690 691 typedef struct acpi_iort_smmu_gsi 692 { 693 UINT32 NSgIrpt; 694 UINT32 NSgIrptFlags; 695 UINT32 NSgCfgIrpt; 696 UINT32 NSgCfgIrptFlags; 697 698 } ACPI_IORT_SMMU_GSI; 699 700 701 typedef struct acpi_iort_smmu_v3 702 { 703 UINT64 BaseAddress; /* SMMUv3 base address */ 704 UINT32 Flags; 705 UINT32 Reserved; 706 UINT64 VatosAddress; 707 UINT32 Model; 708 UINT32 EventGsiv; 709 UINT32 PriGsiv; 710 UINT32 GerrGsiv; 711 UINT32 SyncGsiv; 712 UINT32 Pxm; 713 UINT32 IdMappingIndex; 714 715 } ACPI_IORT_SMMU_V3; 716 717 /* Values for Model field above */ 718 719 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 720 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 721 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 722 723 /* Masks for Flags field above */ 724 725 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 726 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 727 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 728 729 typedef struct acpi_iort_pmcg 730 { 731 UINT64 Page0BaseAddress; 732 UINT32 OverflowGsiv; 733 UINT32 NodeReference; 734 UINT64 Page1BaseAddress; 735 736 } ACPI_IORT_PMCG; 737 738 typedef struct acpi_iort_rmr { 739 UINT32 Flags; 740 UINT32 RmrCount; 741 UINT32 RmrOffset; 742 743 } ACPI_IORT_RMR; 744 745 /* Masks for Flags field above */ 746 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 747 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 748 749 /* 750 * Macro to access the Access Attributes in flags field above: 751 * Access Attributes is encoded in bits 9:2 752 */ 753 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 754 755 /* Values for above Access Attributes */ 756 757 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 758 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 759 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 760 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 761 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 762 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 763 764 typedef struct acpi_iort_rmr_desc { 765 UINT64 BaseAddress; 766 UINT64 Length; 767 UINT32 Reserved; 768 769 } ACPI_IORT_RMR_DESC; 770 771 /******************************************************************************* 772 * 773 * IVRS - I/O Virtualization Reporting Structure 774 * Version 1 775 * 776 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 777 * Revision 1.26, February 2009. 778 * 779 ******************************************************************************/ 780 781 typedef struct acpi_table_ivrs 782 { 783 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 784 UINT32 Info; /* Common virtualization info */ 785 UINT64 Reserved; 786 787 } ACPI_TABLE_IVRS; 788 789 /* Values for Info field above */ 790 791 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 792 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 793 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 794 795 796 /* IVRS subtable header */ 797 798 typedef struct acpi_ivrs_header 799 { 800 UINT8 Type; /* Subtable type */ 801 UINT8 Flags; 802 UINT16 Length; /* Subtable length */ 803 UINT16 DeviceId; /* ID of IOMMU */ 804 805 } ACPI_IVRS_HEADER; 806 807 /* Values for subtable Type above */ 808 809 enum AcpiIvrsType 810 { 811 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 812 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 813 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 814 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 815 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 816 ACPI_IVRS_TYPE_MEMORY3 = 0x22 817 }; 818 819 /* Masks for Flags field above for IVHD subtable */ 820 821 #define ACPI_IVHD_TT_ENABLE (1) 822 #define ACPI_IVHD_PASS_PW (1<<1) 823 #define ACPI_IVHD_RES_PASS_PW (1<<2) 824 #define ACPI_IVHD_ISOC (1<<3) 825 #define ACPI_IVHD_IOTLB (1<<4) 826 827 /* Masks for Flags field above for IVMD subtable */ 828 829 #define ACPI_IVMD_UNITY (1) 830 #define ACPI_IVMD_READ (1<<1) 831 #define ACPI_IVMD_WRITE (1<<2) 832 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 833 834 835 /* 836 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 837 */ 838 839 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 840 841 typedef struct acpi_ivrs_hardware_10 842 { 843 ACPI_IVRS_HEADER Header; 844 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 845 UINT64 BaseAddress; /* IOMMU control registers */ 846 UINT16 PciSegmentGroup; 847 UINT16 Info; /* MSI number and unit ID */ 848 UINT32 FeatureReporting; 849 850 } ACPI_IVRS_HARDWARE1; 851 852 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 853 854 typedef struct acpi_ivrs_hardware_11 855 { 856 ACPI_IVRS_HEADER Header; 857 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 858 UINT64 BaseAddress; /* IOMMU control registers */ 859 UINT16 PciSegmentGroup; 860 UINT16 Info; /* MSI number and unit ID */ 861 UINT32 Attributes; 862 UINT64 EfrRegisterImage; 863 UINT64 Reserved; 864 } ACPI_IVRS_HARDWARE2; 865 866 /* Masks for Info field above */ 867 868 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 869 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 870 871 872 /* 873 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 874 * Upper two bits of the Type field are the (encoded) length of the structure. 875 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 876 * are reserved for future use but not defined. 877 */ 878 typedef struct acpi_ivrs_de_header 879 { 880 UINT8 Type; 881 UINT16 Id; 882 UINT8 DataSetting; 883 884 } ACPI_IVRS_DE_HEADER; 885 886 /* Length of device entry is in the top two bits of Type field above */ 887 888 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 889 890 /* Values for device entry Type field above */ 891 892 enum AcpiIvrsDeviceEntryType 893 { 894 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 895 896 ACPI_IVRS_TYPE_PAD4 = 0, 897 ACPI_IVRS_TYPE_ALL = 1, 898 ACPI_IVRS_TYPE_SELECT = 2, 899 ACPI_IVRS_TYPE_START = 3, 900 ACPI_IVRS_TYPE_END = 4, 901 902 /* 8-byte device entries */ 903 904 ACPI_IVRS_TYPE_PAD8 = 64, 905 ACPI_IVRS_TYPE_NOT_USED = 65, 906 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 907 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 908 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 909 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 910 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 911 912 /* Variable-length device entries */ 913 914 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 915 }; 916 917 /* Values for Data field above */ 918 919 #define ACPI_IVHD_INIT_PASS (1) 920 #define ACPI_IVHD_EINT_PASS (1<<1) 921 #define ACPI_IVHD_NMI_PASS (1<<2) 922 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 923 #define ACPI_IVHD_LINT0_PASS (1<<6) 924 #define ACPI_IVHD_LINT1_PASS (1<<7) 925 926 927 /* Types 0-4: 4-byte device entry */ 928 929 typedef struct acpi_ivrs_device4 930 { 931 ACPI_IVRS_DE_HEADER Header; 932 933 } ACPI_IVRS_DEVICE4; 934 935 /* Types 66-67: 8-byte device entry */ 936 937 typedef struct acpi_ivrs_device8a 938 { 939 ACPI_IVRS_DE_HEADER Header; 940 UINT8 Reserved1; 941 UINT16 UsedId; 942 UINT8 Reserved2; 943 944 } ACPI_IVRS_DEVICE8A; 945 946 /* Types 70-71: 8-byte device entry */ 947 948 typedef struct acpi_ivrs_device8b 949 { 950 ACPI_IVRS_DE_HEADER Header; 951 UINT32 ExtendedData; 952 953 } ACPI_IVRS_DEVICE8B; 954 955 /* Values for ExtendedData above */ 956 957 #define ACPI_IVHD_ATS_DISABLED (1<<31) 958 959 /* Type 72: 8-byte device entry */ 960 961 typedef struct acpi_ivrs_device8c 962 { 963 ACPI_IVRS_DE_HEADER Header; 964 UINT8 Handle; 965 UINT16 UsedId; 966 UINT8 Variety; 967 968 } ACPI_IVRS_DEVICE8C; 969 970 /* Values for Variety field above */ 971 972 #define ACPI_IVHD_IOAPIC 1 973 #define ACPI_IVHD_HPET 2 974 975 /* Type 240: variable-length device entry */ 976 977 typedef struct acpi_ivrs_device_hid 978 { 979 ACPI_IVRS_DE_HEADER Header; 980 UINT64 AcpiHid; 981 UINT64 AcpiCid; 982 UINT8 UidType; 983 UINT8 UidLength; 984 985 } ACPI_IVRS_DEVICE_HID; 986 987 /* Values for UidType above */ 988 989 #define ACPI_IVRS_UID_NOT_PRESENT 0 990 #define ACPI_IVRS_UID_IS_INTEGER 1 991 #define ACPI_IVRS_UID_IS_STRING 2 992 993 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 994 995 typedef struct acpi_ivrs_memory 996 { 997 ACPI_IVRS_HEADER Header; 998 UINT16 AuxData; 999 UINT64 Reserved; 1000 UINT64 StartAddress; 1001 UINT64 MemoryLength; 1002 1003 } ACPI_IVRS_MEMORY; 1004 1005 1006 /******************************************************************************* 1007 * 1008 * LPIT - Low Power Idle Table 1009 * 1010 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1011 * 1012 ******************************************************************************/ 1013 1014 typedef struct acpi_table_lpit 1015 { 1016 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1017 1018 } ACPI_TABLE_LPIT; 1019 1020 1021 /* LPIT subtable header */ 1022 1023 typedef struct acpi_lpit_header 1024 { 1025 UINT32 Type; /* Subtable type */ 1026 UINT32 Length; /* Subtable length */ 1027 UINT16 UniqueId; 1028 UINT16 Reserved; 1029 UINT32 Flags; 1030 1031 } ACPI_LPIT_HEADER; 1032 1033 /* Values for subtable Type above */ 1034 1035 enum AcpiLpitType 1036 { 1037 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1038 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1039 }; 1040 1041 /* Masks for Flags field above */ 1042 1043 #define ACPI_LPIT_STATE_DISABLED (1) 1044 #define ACPI_LPIT_NO_COUNTER (1<<1) 1045 1046 /* 1047 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1048 */ 1049 1050 /* 0x00: Native C-state instruction based LPI structure */ 1051 1052 typedef struct acpi_lpit_native 1053 { 1054 ACPI_LPIT_HEADER Header; 1055 ACPI_GENERIC_ADDRESS EntryTrigger; 1056 UINT32 Residency; 1057 UINT32 Latency; 1058 ACPI_GENERIC_ADDRESS ResidencyCounter; 1059 UINT64 CounterFrequency; 1060 1061 } ACPI_LPIT_NATIVE; 1062 1063 1064 /******************************************************************************* 1065 * 1066 * MADT - Multiple APIC Description Table 1067 * Version 3 1068 * 1069 ******************************************************************************/ 1070 1071 typedef struct acpi_table_madt 1072 { 1073 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1074 UINT32 Address; /* Physical address of local APIC */ 1075 UINT32 Flags; 1076 1077 } ACPI_TABLE_MADT; 1078 1079 /* Masks for Flags field above */ 1080 1081 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1082 1083 /* Values for PCATCompat flag */ 1084 1085 #define ACPI_MADT_DUAL_PIC 1 1086 #define ACPI_MADT_MULTIPLE_APIC 0 1087 1088 1089 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1090 1091 enum AcpiMadtType 1092 { 1093 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1094 ACPI_MADT_TYPE_IO_APIC = 1, 1095 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1096 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1097 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1098 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1099 ACPI_MADT_TYPE_IO_SAPIC = 6, 1100 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1101 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1102 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1103 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1104 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1105 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1106 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1107 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1108 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1109 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1110 ACPI_MADT_TYPE_RESERVED = 17, /* 17 to 0x7F are reserved */ 1111 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1112 }; 1113 1114 1115 /* 1116 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1117 */ 1118 1119 /* 0: Processor Local APIC */ 1120 1121 typedef struct acpi_madt_local_apic 1122 { 1123 ACPI_SUBTABLE_HEADER Header; 1124 UINT8 ProcessorId; /* ACPI processor id */ 1125 UINT8 Id; /* Processor's local APIC id */ 1126 UINT32 LapicFlags; 1127 1128 } ACPI_MADT_LOCAL_APIC; 1129 1130 1131 /* 1: IO APIC */ 1132 1133 typedef struct acpi_madt_io_apic 1134 { 1135 ACPI_SUBTABLE_HEADER Header; 1136 UINT8 Id; /* I/O APIC ID */ 1137 UINT8 Reserved; /* Reserved - must be zero */ 1138 UINT32 Address; /* APIC physical address */ 1139 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1140 1141 } ACPI_MADT_IO_APIC; 1142 1143 1144 /* 2: Interrupt Override */ 1145 1146 typedef struct acpi_madt_interrupt_override 1147 { 1148 ACPI_SUBTABLE_HEADER Header; 1149 UINT8 Bus; /* 0 - ISA */ 1150 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1151 UINT32 GlobalIrq; /* Global system interrupt */ 1152 UINT16 IntiFlags; 1153 1154 } ACPI_MADT_INTERRUPT_OVERRIDE; 1155 1156 1157 /* 3: NMI Source */ 1158 1159 typedef struct acpi_madt_nmi_source 1160 { 1161 ACPI_SUBTABLE_HEADER Header; 1162 UINT16 IntiFlags; 1163 UINT32 GlobalIrq; /* Global system interrupt */ 1164 1165 } ACPI_MADT_NMI_SOURCE; 1166 1167 1168 /* 4: Local APIC NMI */ 1169 1170 typedef struct acpi_madt_local_apic_nmi 1171 { 1172 ACPI_SUBTABLE_HEADER Header; 1173 UINT8 ProcessorId; /* ACPI processor id */ 1174 UINT16 IntiFlags; 1175 UINT8 Lint; /* LINTn to which NMI is connected */ 1176 1177 } ACPI_MADT_LOCAL_APIC_NMI; 1178 1179 1180 /* 5: Address Override */ 1181 1182 typedef struct acpi_madt_local_apic_override 1183 { 1184 ACPI_SUBTABLE_HEADER Header; 1185 UINT16 Reserved; /* Reserved, must be zero */ 1186 UINT64 Address; /* APIC physical address */ 1187 1188 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1189 1190 1191 /* 6: I/O Sapic */ 1192 1193 typedef struct acpi_madt_io_sapic 1194 { 1195 ACPI_SUBTABLE_HEADER Header; 1196 UINT8 Id; /* I/O SAPIC ID */ 1197 UINT8 Reserved; /* Reserved, must be zero */ 1198 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1199 UINT64 Address; /* SAPIC physical address */ 1200 1201 } ACPI_MADT_IO_SAPIC; 1202 1203 1204 /* 7: Local Sapic */ 1205 1206 typedef struct acpi_madt_local_sapic 1207 { 1208 ACPI_SUBTABLE_HEADER Header; 1209 UINT8 ProcessorId; /* ACPI processor id */ 1210 UINT8 Id; /* SAPIC ID */ 1211 UINT8 Eid; /* SAPIC EID */ 1212 UINT8 Reserved[3]; /* Reserved, must be zero */ 1213 UINT32 LapicFlags; 1214 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1215 char UidString[1]; /* String UID - ACPI 3.0 */ 1216 1217 } ACPI_MADT_LOCAL_SAPIC; 1218 1219 1220 /* 8: Platform Interrupt Source */ 1221 1222 typedef struct acpi_madt_interrupt_source 1223 { 1224 ACPI_SUBTABLE_HEADER Header; 1225 UINT16 IntiFlags; 1226 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1227 UINT8 Id; /* Processor ID */ 1228 UINT8 Eid; /* Processor EID */ 1229 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1230 UINT32 GlobalIrq; /* Global system interrupt */ 1231 UINT32 Flags; /* Interrupt Source Flags */ 1232 1233 } ACPI_MADT_INTERRUPT_SOURCE; 1234 1235 /* Masks for Flags field above */ 1236 1237 #define ACPI_MADT_CPEI_OVERRIDE (1) 1238 1239 1240 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1241 1242 typedef struct acpi_madt_local_x2apic 1243 { 1244 ACPI_SUBTABLE_HEADER Header; 1245 UINT16 Reserved; /* Reserved - must be zero */ 1246 UINT32 LocalApicId; /* Processor x2APIC ID */ 1247 UINT32 LapicFlags; 1248 UINT32 Uid; /* ACPI processor UID */ 1249 1250 } ACPI_MADT_LOCAL_X2APIC; 1251 1252 1253 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1254 1255 typedef struct acpi_madt_local_x2apic_nmi 1256 { 1257 ACPI_SUBTABLE_HEADER Header; 1258 UINT16 IntiFlags; 1259 UINT32 Uid; /* ACPI processor UID */ 1260 UINT8 Lint; /* LINTn to which NMI is connected */ 1261 UINT8 Reserved[3]; /* Reserved - must be zero */ 1262 1263 } ACPI_MADT_LOCAL_X2APIC_NMI; 1264 1265 1266 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1267 1268 typedef struct acpi_madt_generic_interrupt 1269 { 1270 ACPI_SUBTABLE_HEADER Header; 1271 UINT16 Reserved; /* Reserved - must be zero */ 1272 UINT32 CpuInterfaceNumber; 1273 UINT32 Uid; 1274 UINT32 Flags; 1275 UINT32 ParkingVersion; 1276 UINT32 PerformanceInterrupt; 1277 UINT64 ParkedAddress; 1278 UINT64 BaseAddress; 1279 UINT64 GicvBaseAddress; 1280 UINT64 GichBaseAddress; 1281 UINT32 VgicInterrupt; 1282 UINT64 GicrBaseAddress; 1283 UINT64 ArmMpidr; 1284 UINT8 EfficiencyClass; 1285 UINT8 Reserved2[1]; 1286 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1287 1288 } ACPI_MADT_GENERIC_INTERRUPT; 1289 1290 /* Masks for Flags field above */ 1291 1292 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1293 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1294 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1295 1296 1297 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1298 1299 typedef struct acpi_madt_generic_distributor 1300 { 1301 ACPI_SUBTABLE_HEADER Header; 1302 UINT16 Reserved; /* Reserved - must be zero */ 1303 UINT32 GicId; 1304 UINT64 BaseAddress; 1305 UINT32 GlobalIrqBase; 1306 UINT8 Version; 1307 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1308 1309 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1310 1311 /* Values for Version field above */ 1312 1313 enum AcpiMadtGicVersion 1314 { 1315 ACPI_MADT_GIC_VERSION_NONE = 0, 1316 ACPI_MADT_GIC_VERSION_V1 = 1, 1317 ACPI_MADT_GIC_VERSION_V2 = 2, 1318 ACPI_MADT_GIC_VERSION_V3 = 3, 1319 ACPI_MADT_GIC_VERSION_V4 = 4, 1320 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1321 }; 1322 1323 1324 /* 13: Generic MSI Frame (ACPI 5.1) */ 1325 1326 typedef struct acpi_madt_generic_msi_frame 1327 { 1328 ACPI_SUBTABLE_HEADER Header; 1329 UINT16 Reserved; /* Reserved - must be zero */ 1330 UINT32 MsiFrameId; 1331 UINT64 BaseAddress; 1332 UINT32 Flags; 1333 UINT16 SpiCount; 1334 UINT16 SpiBase; 1335 1336 } ACPI_MADT_GENERIC_MSI_FRAME; 1337 1338 /* Masks for Flags field above */ 1339 1340 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1341 1342 1343 /* 14: Generic Redistributor (ACPI 5.1) */ 1344 1345 typedef struct acpi_madt_generic_redistributor 1346 { 1347 ACPI_SUBTABLE_HEADER Header; 1348 UINT16 Reserved; /* reserved - must be zero */ 1349 UINT64 BaseAddress; 1350 UINT32 Length; 1351 1352 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1353 1354 1355 /* 15: Generic Translator (ACPI 6.0) */ 1356 1357 typedef struct acpi_madt_generic_translator 1358 { 1359 ACPI_SUBTABLE_HEADER Header; 1360 UINT16 Reserved; /* reserved - must be zero */ 1361 UINT32 TranslationId; 1362 UINT64 BaseAddress; 1363 UINT32 Reserved2; 1364 1365 } ACPI_MADT_GENERIC_TRANSLATOR; 1366 1367 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1368 1369 typedef struct acpi_madt_multiproc_wakeup 1370 { 1371 ACPI_SUBTABLE_HEADER Header; 1372 UINT16 MailboxVersion; 1373 UINT32 Reserved; /* reserved - must be zero */ 1374 UINT64 BaseAddress; 1375 1376 } ACPI_MADT_MULTIPROC_WAKEUP; 1377 1378 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1379 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1380 1381 typedef struct acpi_madt_multiproc_wakeup_mailbox 1382 { 1383 UINT16 Command; 1384 UINT16 Reserved; /* reserved - must be zero */ 1385 UINT32 ApicId; 1386 UINT64 WakeupVector; 1387 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1388 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1389 1390 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1391 1392 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1393 1394 /* 17: OEM data */ 1395 1396 typedef struct acpi_madt_oem_data 1397 { 1398 UINT8 OemData[0]; 1399 } ACPI_MADT_OEM_DATA; 1400 1401 1402 /* 1403 * Common flags fields for MADT subtables 1404 */ 1405 1406 /* MADT Local APIC flags */ 1407 1408 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1409 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1410 1411 /* MADT MPS INTI flags (IntiFlags) */ 1412 1413 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1414 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1415 1416 /* Values for MPS INTI flags */ 1417 1418 #define ACPI_MADT_POLARITY_CONFORMS 0 1419 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1420 #define ACPI_MADT_POLARITY_RESERVED 2 1421 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1422 1423 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1424 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1425 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1426 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1427 1428 1429 /******************************************************************************* 1430 * 1431 * MCFG - PCI Memory Mapped Configuration table and subtable 1432 * Version 1 1433 * 1434 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1435 * 1436 ******************************************************************************/ 1437 1438 typedef struct acpi_table_mcfg 1439 { 1440 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1441 UINT8 Reserved[8]; 1442 1443 } ACPI_TABLE_MCFG; 1444 1445 1446 /* Subtable */ 1447 1448 typedef struct acpi_mcfg_allocation 1449 { 1450 UINT64 Address; /* Base address, processor-relative */ 1451 UINT16 PciSegment; /* PCI segment group number */ 1452 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1453 UINT8 EndBusNumber; /* Final PCI Bus number */ 1454 UINT32 Reserved; 1455 1456 } ACPI_MCFG_ALLOCATION; 1457 1458 1459 /******************************************************************************* 1460 * 1461 * MCHI - Management Controller Host Interface Table 1462 * Version 1 1463 * 1464 * Conforms to "Management Component Transport Protocol (MCTP) Host 1465 * Interface Specification", Revision 1.0.0a, October 13, 2009 1466 * 1467 ******************************************************************************/ 1468 1469 typedef struct acpi_table_mchi 1470 { 1471 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1472 UINT8 InterfaceType; 1473 UINT8 Protocol; 1474 UINT64 ProtocolData; 1475 UINT8 InterruptType; 1476 UINT8 Gpe; 1477 UINT8 PciDeviceFlag; 1478 UINT32 GlobalInterrupt; 1479 ACPI_GENERIC_ADDRESS ControlRegister; 1480 UINT8 PciSegment; 1481 UINT8 PciBus; 1482 UINT8 PciDevice; 1483 UINT8 PciFunction; 1484 1485 } ACPI_TABLE_MCHI; 1486 1487 1488 /******************************************************************************* 1489 * 1490 * MPST - Memory Power State Table (ACPI 5.0) 1491 * Version 1 1492 * 1493 ******************************************************************************/ 1494 1495 #define ACPI_MPST_CHANNEL_INFO \ 1496 UINT8 ChannelId; \ 1497 UINT8 Reserved1[3]; \ 1498 UINT16 PowerNodeCount; \ 1499 UINT16 Reserved2; 1500 1501 /* Main table */ 1502 1503 typedef struct acpi_table_mpst 1504 { 1505 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1506 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1507 1508 } ACPI_TABLE_MPST; 1509 1510 1511 /* Memory Platform Communication Channel Info */ 1512 1513 typedef struct acpi_mpst_channel 1514 { 1515 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1516 1517 } ACPI_MPST_CHANNEL; 1518 1519 1520 /* Memory Power Node Structure */ 1521 1522 typedef struct acpi_mpst_power_node 1523 { 1524 UINT8 Flags; 1525 UINT8 Reserved1; 1526 UINT16 NodeId; 1527 UINT32 Length; 1528 UINT64 RangeAddress; 1529 UINT64 RangeLength; 1530 UINT32 NumPowerStates; 1531 UINT32 NumPhysicalComponents; 1532 1533 } ACPI_MPST_POWER_NODE; 1534 1535 /* Values for Flags field above */ 1536 1537 #define ACPI_MPST_ENABLED 1 1538 #define ACPI_MPST_POWER_MANAGED 2 1539 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1540 1541 1542 /* Memory Power State Structure (follows POWER_NODE above) */ 1543 1544 typedef struct acpi_mpst_power_state 1545 { 1546 UINT8 PowerState; 1547 UINT8 InfoIndex; 1548 1549 } ACPI_MPST_POWER_STATE; 1550 1551 1552 /* Physical Component ID Structure (follows POWER_STATE above) */ 1553 1554 typedef struct acpi_mpst_component 1555 { 1556 UINT16 ComponentId; 1557 1558 } ACPI_MPST_COMPONENT; 1559 1560 1561 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1562 1563 typedef struct acpi_mpst_data_hdr 1564 { 1565 UINT16 CharacteristicsCount; 1566 UINT16 Reserved; 1567 1568 } ACPI_MPST_DATA_HDR; 1569 1570 typedef struct acpi_mpst_power_data 1571 { 1572 UINT8 StructureId; 1573 UINT8 Flags; 1574 UINT16 Reserved1; 1575 UINT32 AveragePower; 1576 UINT32 PowerSaving; 1577 UINT64 ExitLatency; 1578 UINT64 Reserved2; 1579 1580 } ACPI_MPST_POWER_DATA; 1581 1582 /* Values for Flags field above */ 1583 1584 #define ACPI_MPST_PRESERVE 1 1585 #define ACPI_MPST_AUTOENTRY 2 1586 #define ACPI_MPST_AUTOEXIT 4 1587 1588 1589 /* Shared Memory Region (not part of an ACPI table) */ 1590 1591 typedef struct acpi_mpst_shared 1592 { 1593 UINT32 Signature; 1594 UINT16 PccCommand; 1595 UINT16 PccStatus; 1596 UINT32 CommandRegister; 1597 UINT32 StatusRegister; 1598 UINT32 PowerStateId; 1599 UINT32 PowerNodeId; 1600 UINT64 EnergyConsumed; 1601 UINT64 AveragePower; 1602 1603 } ACPI_MPST_SHARED; 1604 1605 1606 /******************************************************************************* 1607 * 1608 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1609 * Version 1 1610 * 1611 ******************************************************************************/ 1612 1613 typedef struct acpi_table_msct 1614 { 1615 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1616 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1617 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1618 UINT32 MaxClockDomains; /* Max number of clock domains */ 1619 UINT64 MaxAddress; /* Max physical address in system */ 1620 1621 } ACPI_TABLE_MSCT; 1622 1623 1624 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1625 1626 typedef struct acpi_msct_proximity 1627 { 1628 UINT8 Revision; 1629 UINT8 Length; 1630 UINT32 RangeStart; /* Start of domain range */ 1631 UINT32 RangeEnd; /* End of domain range */ 1632 UINT32 ProcessorCapacity; 1633 UINT64 MemoryCapacity; /* In bytes */ 1634 1635 } ACPI_MSCT_PROXIMITY; 1636 1637 1638 /******************************************************************************* 1639 * 1640 * MSDM - Microsoft Data Management table 1641 * 1642 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1643 * November 29, 2011. Copyright 2011 Microsoft 1644 * 1645 ******************************************************************************/ 1646 1647 /* Basic MSDM table is only the common ACPI header */ 1648 1649 typedef struct acpi_table_msdm 1650 { 1651 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1652 1653 } ACPI_TABLE_MSDM; 1654 1655 1656 /******************************************************************************* 1657 * 1658 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1659 * Version 1 1660 * 1661 ******************************************************************************/ 1662 1663 typedef struct acpi_table_nfit 1664 { 1665 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1666 UINT32 Reserved; /* Reserved, must be zero */ 1667 1668 } ACPI_TABLE_NFIT; 1669 1670 /* Subtable header for NFIT */ 1671 1672 typedef struct acpi_nfit_header 1673 { 1674 UINT16 Type; 1675 UINT16 Length; 1676 1677 } ACPI_NFIT_HEADER; 1678 1679 1680 /* Values for subtable type in ACPI_NFIT_HEADER */ 1681 1682 enum AcpiNfitType 1683 { 1684 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1685 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1686 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1687 ACPI_NFIT_TYPE_SMBIOS = 3, 1688 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1689 ACPI_NFIT_TYPE_DATA_REGION = 5, 1690 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1691 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1692 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1693 }; 1694 1695 /* 1696 * NFIT Subtables 1697 */ 1698 1699 /* 0: System Physical Address Range Structure */ 1700 1701 typedef struct acpi_nfit_system_address 1702 { 1703 ACPI_NFIT_HEADER Header; 1704 UINT16 RangeIndex; 1705 UINT16 Flags; 1706 UINT32 Reserved; /* Reserved, must be zero */ 1707 UINT32 ProximityDomain; 1708 UINT8 RangeGuid[16]; 1709 UINT64 Address; 1710 UINT64 Length; 1711 UINT64 MemoryMapping; 1712 UINT64 LocationCookie; /* ACPI 6.4 */ 1713 1714 } ACPI_NFIT_SYSTEM_ADDRESS; 1715 1716 /* Flags */ 1717 1718 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1719 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1720 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1721 1722 /* Range Type GUIDs appear in the include/acuuid.h file */ 1723 1724 1725 /* 1: Memory Device to System Address Range Map Structure */ 1726 1727 typedef struct acpi_nfit_memory_map 1728 { 1729 ACPI_NFIT_HEADER Header; 1730 UINT32 DeviceHandle; 1731 UINT16 PhysicalId; 1732 UINT16 RegionId; 1733 UINT16 RangeIndex; 1734 UINT16 RegionIndex; 1735 UINT64 RegionSize; 1736 UINT64 RegionOffset; 1737 UINT64 Address; 1738 UINT16 InterleaveIndex; 1739 UINT16 InterleaveWays; 1740 UINT16 Flags; 1741 UINT16 Reserved; /* Reserved, must be zero */ 1742 1743 } ACPI_NFIT_MEMORY_MAP; 1744 1745 /* Flags */ 1746 1747 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1748 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1749 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1750 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1751 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1752 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1753 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1754 1755 1756 /* 2: Interleave Structure */ 1757 1758 typedef struct acpi_nfit_interleave 1759 { 1760 ACPI_NFIT_HEADER Header; 1761 UINT16 InterleaveIndex; 1762 UINT16 Reserved; /* Reserved, must be zero */ 1763 UINT32 LineCount; 1764 UINT32 LineSize; 1765 UINT32 LineOffset[1]; /* Variable length */ 1766 1767 } ACPI_NFIT_INTERLEAVE; 1768 1769 1770 /* 3: SMBIOS Management Information Structure */ 1771 1772 typedef struct acpi_nfit_smbios 1773 { 1774 ACPI_NFIT_HEADER Header; 1775 UINT32 Reserved; /* Reserved, must be zero */ 1776 UINT8 Data[1]; /* Variable length */ 1777 1778 } ACPI_NFIT_SMBIOS; 1779 1780 1781 /* 4: NVDIMM Control Region Structure */ 1782 1783 typedef struct acpi_nfit_control_region 1784 { 1785 ACPI_NFIT_HEADER Header; 1786 UINT16 RegionIndex; 1787 UINT16 VendorId; 1788 UINT16 DeviceId; 1789 UINT16 RevisionId; 1790 UINT16 SubsystemVendorId; 1791 UINT16 SubsystemDeviceId; 1792 UINT16 SubsystemRevisionId; 1793 UINT8 ValidFields; 1794 UINT8 ManufacturingLocation; 1795 UINT16 ManufacturingDate; 1796 UINT8 Reserved[2]; /* Reserved, must be zero */ 1797 UINT32 SerialNumber; 1798 UINT16 Code; 1799 UINT16 Windows; 1800 UINT64 WindowSize; 1801 UINT64 CommandOffset; 1802 UINT64 CommandSize; 1803 UINT64 StatusOffset; 1804 UINT64 StatusSize; 1805 UINT16 Flags; 1806 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1807 1808 } ACPI_NFIT_CONTROL_REGION; 1809 1810 /* Flags */ 1811 1812 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1813 1814 /* ValidFields bits */ 1815 1816 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1817 1818 1819 /* 5: NVDIMM Block Data Window Region Structure */ 1820 1821 typedef struct acpi_nfit_data_region 1822 { 1823 ACPI_NFIT_HEADER Header; 1824 UINT16 RegionIndex; 1825 UINT16 Windows; 1826 UINT64 Offset; 1827 UINT64 Size; 1828 UINT64 Capacity; 1829 UINT64 StartAddress; 1830 1831 } ACPI_NFIT_DATA_REGION; 1832 1833 1834 /* 6: Flush Hint Address Structure */ 1835 1836 typedef struct acpi_nfit_flush_address 1837 { 1838 ACPI_NFIT_HEADER Header; 1839 UINT32 DeviceHandle; 1840 UINT16 HintCount; 1841 UINT8 Reserved[6]; /* Reserved, must be zero */ 1842 UINT64 HintAddress[1]; /* Variable length */ 1843 1844 } ACPI_NFIT_FLUSH_ADDRESS; 1845 1846 1847 /* 7: Platform Capabilities Structure */ 1848 1849 typedef struct acpi_nfit_capabilities 1850 { 1851 ACPI_NFIT_HEADER Header; 1852 UINT8 HighestCapability; 1853 UINT8 Reserved[3]; /* Reserved, must be zero */ 1854 UINT32 Capabilities; 1855 UINT32 Reserved2; 1856 1857 } ACPI_NFIT_CAPABILITIES; 1858 1859 /* Capabilities Flags */ 1860 1861 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1862 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1863 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1864 1865 1866 /* 1867 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1868 */ 1869 typedef struct nfit_device_handle 1870 { 1871 UINT32 Handle; 1872 1873 } NFIT_DEVICE_HANDLE; 1874 1875 /* Device handle construction and extraction macros */ 1876 1877 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1878 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1879 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1880 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1881 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1882 1883 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1884 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1885 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1886 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1887 #define ACPI_NFIT_NODE_ID_OFFSET 16 1888 1889 /* Macro to construct a NFIT/NVDIMM device handle */ 1890 1891 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1892 ((dimm) | \ 1893 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1894 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1895 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1896 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1897 1898 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1899 1900 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1901 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1902 1903 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1904 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1905 1906 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1907 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1908 1909 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1910 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1911 1912 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1913 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1914 1915 1916 /******************************************************************************* 1917 * 1918 * NHLT - Non HD Audio Link Table 1919 * 1920 * Conforms to: Intel Smart Sound Technology NHLT Specification 1921 * Version 0.8.1, January 2020. 1922 * 1923 ******************************************************************************/ 1924 1925 /* Main table */ 1926 1927 typedef struct acpi_table_nhlt 1928 { 1929 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1930 UINT8 EndpointCount; 1931 1932 } ACPI_TABLE_NHLT; 1933 1934 typedef struct acpi_table_nhlt_endpoint_count 1935 { 1936 UINT8 EndpointCount; 1937 1938 } ACPI_TABLE_NHLT_ENDPOINT_COUNT; 1939 1940 typedef struct acpi_nhlt_endpoint 1941 { 1942 UINT32 DescriptorLength; 1943 UINT8 LinkType; 1944 UINT8 InstanceId; 1945 UINT16 VendorId; 1946 UINT16 DeviceId; 1947 UINT16 RevisionId; 1948 UINT32 SubsystemId; 1949 UINT8 DeviceType; 1950 UINT8 Direction; 1951 UINT8 VirtualBusId; 1952 1953 } ACPI_NHLT_ENDPOINT; 1954 1955 /* Types for LinkType field above */ 1956 1957 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1958 #define ACPI_NHLT_RESERVED_DSP 1 1959 #define ACPI_NHLT_PDM 2 1960 #define ACPI_NHLT_SSP 3 1961 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1962 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1963 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1964 1965 /* All other values above are reserved */ 1966 1967 /* Values for DeviceId field above */ 1968 1969 #define ACPI_NHLT_PDM_DMIC 0xAE20 1970 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1971 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1972 1973 /* Values for DeviceType field above */ 1974 1975 /* SSP Link */ 1976 1977 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1978 #define ACPI_NHLT_LINK_FM 1 1979 #define ACPI_NHLT_LINK_MODEM 2 1980 /* 3 is reserved */ 1981 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1982 1983 /* PDM Link */ 1984 1985 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1986 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1987 1988 /* Values for Direction field above */ 1989 1990 #define ACPI_NHLT_DIR_RENDER 0 1991 #define ACPI_NHLT_DIR_CAPTURE 1 1992 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1993 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1994 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1995 1996 /* Capabilities = 2 */ 1997 1998 typedef struct acpi_nhlt_device_specific_config 1999 { 2000 UINT32 CapabilitiesSize; 2001 UINT8 VirtualSlot; 2002 UINT8 ConfigType; 2003 2004 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 2005 2006 /* Capabilities = 3 */ 2007 2008 typedef struct acpi_nhlt_device_specific_config_a 2009 { 2010 UINT32 CapabilitiesSize; 2011 UINT8 VirtualSlot; 2012 UINT8 ConfigType; 2013 UINT8 ArrayType; 2014 2015 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 2016 2017 /* Capabilities = 3 */ 2018 2019 typedef struct acpi_nhlt_device_specific_config_d 2020 { 2021 UINT8 VirtualSlot; 2022 UINT8 ConfigType; 2023 UINT8 ArrayType; 2024 2025 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_D; 2026 2027 /* Values for Config Type above */ 2028 2029 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 2030 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 2031 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 2032 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 2033 2034 /* Capabilities = 0 */ 2035 2036 typedef struct acpi_nhlt_device_specific_config_b 2037 { 2038 UINT32 CapabilitiesSize; 2039 2040 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 2041 2042 /* Capabilities = 1 */ 2043 2044 typedef struct acpi_nhlt_device_specific_config_c 2045 { 2046 UINT32 CapabilitiesSize; 2047 UINT8 VirtualSlot; 2048 2049 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 2050 2051 typedef struct acpi_nhlt_render_device_specific_config 2052 { 2053 UINT32 CapabilitiesSize; 2054 UINT8 VirtualSlot; 2055 2056 } ACPI_NHLT_RENDER_DEVICE_SPECIFIC_CONFIG; 2057 2058 typedef struct acpi_nhlt_wave_extensible 2059 { 2060 UINT16 FormatTag; 2061 UINT16 ChannelCount; 2062 UINT32 SamplesPerSec; 2063 UINT32 AvgBytesPerSec; 2064 UINT16 BlockAlign; 2065 UINT16 BitsPerSample; 2066 UINT16 ExtraFormatSize; 2067 UINT16 ValidBitsPerSample; 2068 UINT32 ChannelMask; 2069 UINT8 SubFormatGuid[16]; 2070 2071 } ACPI_NHLT_WAVE_EXTENSIBLE; 2072 2073 /* Values for ChannelMask above */ 2074 2075 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2076 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2077 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2078 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2079 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2080 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2081 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2082 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2083 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2084 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2085 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2086 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2087 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2088 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2089 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2090 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2091 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2092 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2093 2094 typedef struct acpi_nhlt_format_config 2095 { 2096 ACPI_NHLT_WAVE_EXTENSIBLE Format; 2097 UINT32 CapabilitySize; 2098 UINT8 Capabilities[]; 2099 2100 } ACPI_NHLT_FORMAT_CONFIG; 2101 2102 typedef struct acpi_nhlt_formats_config 2103 { 2104 UINT8 FormatsCount; 2105 2106 } ACPI_NHLT_FORMATS_CONFIG; 2107 2108 typedef struct acpi_nhlt_device_specific_hdr 2109 { 2110 UINT8 VirtualSlot; 2111 UINT8 ConfigType; 2112 2113 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 2114 2115 /* Types for ConfigType above */ 2116 2117 #define ACPI_NHLT_GENERIC 0 2118 #define ACPI_NHLT_MIC 1 2119 #define ACPI_NHLT_RENDER 3 2120 2121 typedef struct acpi_nhlt_mic_device_specific_config 2122 { 2123 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 2124 UINT8 ArrayTypeExt; 2125 2126 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 2127 2128 /* Values for ArrayTypeExt above */ 2129 2130 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2131 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2132 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2133 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2134 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2135 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2136 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2137 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2138 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2139 2140 #define ACPI_NHLT_NO_EXTENSION 0x0 2141 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2142 2143 typedef struct acpi_nhlt_vendor_mic_count 2144 { 2145 UINT8 MicrophoneCount; 2146 2147 } ACPI_NHLT_VENDOR_MIC_COUNT; 2148 2149 typedef struct acpi_nhlt_vendor_mic_config 2150 { 2151 UINT8 Type; 2152 UINT8 Panel; 2153 UINT16 SpeakerPositionDistance; /* mm */ 2154 UINT16 HorizontalOffset; /* mm */ 2155 UINT16 VerticalOffset; /* mm */ 2156 UINT8 FrequencyLowBand; /* 5*Hz */ 2157 UINT8 FrequencyHighBand; /* 500*Hz */ 2158 UINT16 DirectionAngle; /* -180 - + 180 */ 2159 UINT16 ElevationAngle; /* -180 - + 180 */ 2160 UINT16 WorkVerticalAngleBegin; /* -180 - + 180 with 2 deg step */ 2161 UINT16 WorkVerticalAngleEnd; /* -180 - + 180 with 2 deg step */ 2162 UINT16 WorkHorizontalAngleBegin; /* -180 - + 180 with 2 deg step */ 2163 UINT16 WorkHorizontalAngleEnd; /* -180 - + 180 with 2 deg step */ 2164 2165 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2166 2167 /* Values for Type field above */ 2168 2169 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2170 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2171 #define ACPI_NHLT_MIC_CARDIOID 2 2172 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2173 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2174 #define ACPI_NHLT_MIC_8_SHAPED 5 2175 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2176 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2177 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2178 2179 /* Values for Panel field above */ 2180 2181 #define ACPI_NHLT_MIC_POSITION_TOP 0 2182 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2183 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2184 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2185 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2186 #define ACPI_NHLT_MIC_POSITION_BACK 5 2187 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2188 2189 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2190 { 2191 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2192 UINT8 NumberOfMicrophones; 2193 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; /* Indexed by NumberOfMicrophones */ 2194 2195 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2196 2197 /* Microphone SNR and Sensitivity extension */ 2198 2199 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2200 { 2201 UINT32 SNR; 2202 UINT32 Sensitivity; 2203 2204 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2205 2206 /* Render device with feedback */ 2207 2208 typedef struct acpi_nhlt_render_feedback_device_specific_config 2209 { 2210 UINT8 FeedbackVirtualSlot; /* Render slot in case of capture */ 2211 UINT16 FeedbackChannels; /* Informative only */ 2212 UINT16 FeedbackValidBitsPerSample; 2213 2214 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2215 2216 /* Non documented structures */ 2217 2218 typedef struct acpi_nhlt_device_info_count 2219 { 2220 UINT8 StructureCount; 2221 2222 } ACPI_NHLT_DEVICE_INFO_COUNT; 2223 2224 typedef struct acpi_nhlt_device_info 2225 { 2226 UINT8 DeviceId[16]; 2227 UINT8 DeviceInstanceId; 2228 UINT8 DevicePortId; 2229 2230 } ACPI_NHLT_DEVICE_INFO; 2231 2232 2233 /******************************************************************************* 2234 * 2235 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2236 * Version 2 (ACPI 6.2) 2237 * 2238 ******************************************************************************/ 2239 2240 typedef struct acpi_table_pcct 2241 { 2242 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2243 UINT32 Flags; 2244 UINT64 Reserved; 2245 2246 } ACPI_TABLE_PCCT; 2247 2248 /* Values for Flags field above */ 2249 2250 #define ACPI_PCCT_DOORBELL 1 2251 2252 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2253 2254 enum AcpiPcctType 2255 { 2256 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2257 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2258 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2259 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2260 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2261 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2262 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2263 }; 2264 2265 /* 2266 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2267 */ 2268 2269 /* 0: Generic Communications Subspace */ 2270 2271 typedef struct acpi_pcct_subspace 2272 { 2273 ACPI_SUBTABLE_HEADER Header; 2274 UINT8 Reserved[6]; 2275 UINT64 BaseAddress; 2276 UINT64 Length; 2277 ACPI_GENERIC_ADDRESS DoorbellRegister; 2278 UINT64 PreserveMask; 2279 UINT64 WriteMask; 2280 UINT32 Latency; 2281 UINT32 MaxAccessRate; 2282 UINT16 MinTurnaroundTime; 2283 2284 } ACPI_PCCT_SUBSPACE; 2285 2286 2287 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2288 2289 typedef struct acpi_pcct_hw_reduced 2290 { 2291 ACPI_SUBTABLE_HEADER Header; 2292 UINT32 PlatformInterrupt; 2293 UINT8 Flags; 2294 UINT8 Reserved; 2295 UINT64 BaseAddress; 2296 UINT64 Length; 2297 ACPI_GENERIC_ADDRESS DoorbellRegister; 2298 UINT64 PreserveMask; 2299 UINT64 WriteMask; 2300 UINT32 Latency; 2301 UINT32 MaxAccessRate; 2302 UINT16 MinTurnaroundTime; 2303 2304 } ACPI_PCCT_HW_REDUCED; 2305 2306 2307 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2308 2309 typedef struct acpi_pcct_hw_reduced_type2 2310 { 2311 ACPI_SUBTABLE_HEADER Header; 2312 UINT32 PlatformInterrupt; 2313 UINT8 Flags; 2314 UINT8 Reserved; 2315 UINT64 BaseAddress; 2316 UINT64 Length; 2317 ACPI_GENERIC_ADDRESS DoorbellRegister; 2318 UINT64 PreserveMask; 2319 UINT64 WriteMask; 2320 UINT32 Latency; 2321 UINT32 MaxAccessRate; 2322 UINT16 MinTurnaroundTime; 2323 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2324 UINT64 AckPreserveMask; 2325 UINT64 AckWriteMask; 2326 2327 } ACPI_PCCT_HW_REDUCED_TYPE2; 2328 2329 2330 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2331 2332 typedef struct acpi_pcct_ext_pcc_master 2333 { 2334 ACPI_SUBTABLE_HEADER Header; 2335 UINT32 PlatformInterrupt; 2336 UINT8 Flags; 2337 UINT8 Reserved1; 2338 UINT64 BaseAddress; 2339 UINT32 Length; 2340 ACPI_GENERIC_ADDRESS DoorbellRegister; 2341 UINT64 PreserveMask; 2342 UINT64 WriteMask; 2343 UINT32 Latency; 2344 UINT32 MaxAccessRate; 2345 UINT32 MinTurnaroundTime; 2346 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2347 UINT64 AckPreserveMask; 2348 UINT64 AckSetMask; 2349 UINT64 Reserved2; 2350 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2351 UINT64 CmdCompleteMask; 2352 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2353 UINT64 CmdUpdatePreserveMask; 2354 UINT64 CmdUpdateSetMask; 2355 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2356 UINT64 ErrorStatusMask; 2357 2358 } ACPI_PCCT_EXT_PCC_MASTER; 2359 2360 2361 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2362 2363 typedef struct acpi_pcct_ext_pcc_slave 2364 { 2365 ACPI_SUBTABLE_HEADER Header; 2366 UINT32 PlatformInterrupt; 2367 UINT8 Flags; 2368 UINT8 Reserved1; 2369 UINT64 BaseAddress; 2370 UINT32 Length; 2371 ACPI_GENERIC_ADDRESS DoorbellRegister; 2372 UINT64 PreserveMask; 2373 UINT64 WriteMask; 2374 UINT32 Latency; 2375 UINT32 MaxAccessRate; 2376 UINT32 MinTurnaroundTime; 2377 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2378 UINT64 AckPreserveMask; 2379 UINT64 AckSetMask; 2380 UINT64 Reserved2; 2381 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2382 UINT64 CmdCompleteMask; 2383 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2384 UINT64 CmdUpdatePreserveMask; 2385 UINT64 CmdUpdateSetMask; 2386 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2387 UINT64 ErrorStatusMask; 2388 2389 } ACPI_PCCT_EXT_PCC_SLAVE; 2390 2391 /* 5: HW Registers based Communications Subspace */ 2392 2393 typedef struct acpi_pcct_hw_reg 2394 { 2395 ACPI_SUBTABLE_HEADER Header; 2396 UINT16 Version; 2397 UINT64 BaseAddress; 2398 UINT64 Length; 2399 ACPI_GENERIC_ADDRESS DoorbellRegister; 2400 UINT64 DoorbellPreserve; 2401 UINT64 DoorbellWrite; 2402 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2403 UINT64 CmdCompleteMask; 2404 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2405 UINT64 ErrorStatusMask; 2406 UINT32 NominalLatency; 2407 UINT32 MinTurnaroundTime; 2408 2409 } ACPI_PCCT_HW_REG; 2410 2411 2412 /* Values for doorbell flags above */ 2413 2414 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2415 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2416 2417 2418 /* 2419 * PCC memory structures (not part of the ACPI table) 2420 */ 2421 2422 /* Shared Memory Region */ 2423 2424 typedef struct acpi_pcct_shared_memory 2425 { 2426 UINT32 Signature; 2427 UINT16 Command; 2428 UINT16 Status; 2429 2430 } ACPI_PCCT_SHARED_MEMORY; 2431 2432 2433 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2434 2435 typedef struct acpi_pcct_ext_pcc_shared_memory 2436 { 2437 UINT32 Signature; 2438 UINT32 Flags; 2439 UINT32 Length; 2440 UINT32 Command; 2441 2442 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2443 2444 2445 /******************************************************************************* 2446 * 2447 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2448 * Version 0 2449 * 2450 ******************************************************************************/ 2451 2452 typedef struct acpi_table_pdtt 2453 { 2454 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2455 UINT8 TriggerCount; 2456 UINT8 Reserved[3]; 2457 UINT32 ArrayOffset; 2458 2459 } ACPI_TABLE_PDTT; 2460 2461 2462 /* 2463 * PDTT Communication Channel Identifier Structure. 2464 * The number of these structures is defined by TriggerCount above, 2465 * starting at ArrayOffset. 2466 */ 2467 typedef struct acpi_pdtt_channel 2468 { 2469 UINT8 SubchannelId; 2470 UINT8 Flags; 2471 2472 } ACPI_PDTT_CHANNEL; 2473 2474 /* Flags for above */ 2475 2476 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2477 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2478 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2479 2480 2481 /******************************************************************************* 2482 * 2483 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2484 * Version 1 2485 * 2486 ******************************************************************************/ 2487 2488 typedef struct acpi_table_phat 2489 { 2490 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2491 2492 } ACPI_TABLE_PHAT; 2493 2494 /* Common header for PHAT subtables that follow main table */ 2495 2496 typedef struct acpi_phat_header 2497 { 2498 UINT16 Type; 2499 UINT16 Length; 2500 UINT8 Revision; 2501 2502 } ACPI_PHAT_HEADER; 2503 2504 2505 /* Values for Type field above */ 2506 2507 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2508 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2509 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2510 2511 /* 2512 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2513 */ 2514 2515 /* 0: Firmware Version Data Record */ 2516 2517 typedef struct acpi_phat_version_data 2518 { 2519 ACPI_PHAT_HEADER Header; 2520 UINT8 Reserved[3]; 2521 UINT32 ElementCount; 2522 2523 } ACPI_PHAT_VERSION_DATA; 2524 2525 typedef struct acpi_phat_version_element 2526 { 2527 UINT8 Guid[16]; 2528 UINT64 VersionValue; 2529 UINT32 ProducerId; 2530 2531 } ACPI_PHAT_VERSION_ELEMENT; 2532 2533 2534 /* 1: Firmware Health Data Record */ 2535 2536 typedef struct acpi_phat_health_data 2537 { 2538 ACPI_PHAT_HEADER Header; 2539 UINT8 Reserved[2]; 2540 UINT8 Health; 2541 UINT8 DeviceGuid[16]; 2542 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2543 2544 } ACPI_PHAT_HEALTH_DATA; 2545 2546 /* Values for Health field above */ 2547 2548 #define ACPI_PHAT_ERRORS_FOUND 0 2549 #define ACPI_PHAT_NO_ERRORS 1 2550 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2551 #define ACPI_PHAT_ADVISORY 3 2552 2553 2554 /******************************************************************************* 2555 * 2556 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2557 * Version 1 2558 * 2559 ******************************************************************************/ 2560 2561 typedef struct acpi_table_pmtt 2562 { 2563 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2564 UINT32 MemoryDeviceCount; 2565 /* 2566 * Immediately followed by: 2567 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2568 */ 2569 2570 } ACPI_TABLE_PMTT; 2571 2572 2573 /* Common header for PMTT subtables that follow main table */ 2574 2575 typedef struct acpi_pmtt_header 2576 { 2577 UINT8 Type; 2578 UINT8 Reserved1; 2579 UINT16 Length; 2580 UINT16 Flags; 2581 UINT16 Reserved2; 2582 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2583 /* 2584 * Immediately followed by: 2585 * UINT8 TypeSpecificData[] 2586 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2587 */ 2588 2589 } ACPI_PMTT_HEADER; 2590 2591 /* Values for Type field above */ 2592 2593 #define ACPI_PMTT_TYPE_SOCKET 0 2594 #define ACPI_PMTT_TYPE_CONTROLLER 1 2595 #define ACPI_PMTT_TYPE_DIMM 2 2596 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2597 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2598 2599 /* Values for Flags field above */ 2600 2601 #define ACPI_PMTT_TOP_LEVEL 0x0001 2602 #define ACPI_PMTT_PHYSICAL 0x0002 2603 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2604 2605 2606 /* 2607 * PMTT subtables, correspond to Type in acpi_pmtt_header 2608 */ 2609 2610 2611 /* 0: Socket Structure */ 2612 2613 typedef struct acpi_pmtt_socket 2614 { 2615 ACPI_PMTT_HEADER Header; 2616 UINT16 SocketId; 2617 UINT16 Reserved; 2618 2619 } ACPI_PMTT_SOCKET; 2620 /* 2621 * Immediately followed by: 2622 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2623 */ 2624 2625 2626 /* 1: Memory Controller subtable */ 2627 2628 typedef struct acpi_pmtt_controller 2629 { 2630 ACPI_PMTT_HEADER Header; 2631 UINT16 ControllerId; 2632 UINT16 Reserved; 2633 2634 } ACPI_PMTT_CONTROLLER; 2635 /* 2636 * Immediately followed by: 2637 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2638 */ 2639 2640 2641 /* 2: Physical Component Identifier (DIMM) */ 2642 2643 typedef struct acpi_pmtt_physical_component 2644 { 2645 ACPI_PMTT_HEADER Header; 2646 UINT32 BiosHandle; 2647 2648 } ACPI_PMTT_PHYSICAL_COMPONENT; 2649 2650 2651 /* 0xFF: Vendor Specific Data */ 2652 2653 typedef struct acpi_pmtt_vendor_specific 2654 { 2655 ACPI_PMTT_HEADER Header; 2656 UINT8 TypeUuid[16]; 2657 UINT8 Specific[]; 2658 /* 2659 * Immediately followed by: 2660 * UINT8 VendorSpecificData[]; 2661 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2662 */ 2663 2664 } ACPI_PMTT_VENDOR_SPECIFIC; 2665 2666 2667 /******************************************************************************* 2668 * 2669 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2670 * Version 1 2671 * 2672 ******************************************************************************/ 2673 2674 typedef struct acpi_table_pptt 2675 { 2676 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2677 2678 } ACPI_TABLE_PPTT; 2679 2680 /* Values for Type field above */ 2681 2682 enum AcpiPpttType 2683 { 2684 ACPI_PPTT_TYPE_PROCESSOR = 0, 2685 ACPI_PPTT_TYPE_CACHE = 1, 2686 ACPI_PPTT_TYPE_ID = 2, 2687 ACPI_PPTT_TYPE_RESERVED = 3 2688 }; 2689 2690 2691 /* 0: Processor Hierarchy Node Structure */ 2692 2693 typedef struct acpi_pptt_processor 2694 { 2695 ACPI_SUBTABLE_HEADER Header; 2696 UINT16 Reserved; 2697 UINT32 Flags; 2698 UINT32 Parent; 2699 UINT32 AcpiProcessorId; 2700 UINT32 NumberOfPrivResources; 2701 2702 } ACPI_PPTT_PROCESSOR; 2703 2704 /* Flags */ 2705 2706 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2707 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2708 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2709 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2710 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2711 2712 2713 /* 1: Cache Type Structure */ 2714 2715 typedef struct acpi_pptt_cache 2716 { 2717 ACPI_SUBTABLE_HEADER Header; 2718 UINT16 Reserved; 2719 UINT32 Flags; 2720 UINT32 NextLevelOfCache; 2721 UINT32 Size; 2722 UINT32 NumberOfSets; 2723 UINT8 Associativity; 2724 UINT8 Attributes; 2725 UINT16 LineSize; 2726 2727 } ACPI_PPTT_CACHE; 2728 2729 /* 1: Cache Type Structure for PPTT version 3 */ 2730 2731 typedef struct acpi_pptt_cache_v1 2732 { 2733 UINT32 CacheId; 2734 2735 } ACPI_PPTT_CACHE_V1; 2736 2737 2738 /* Flags */ 2739 2740 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2741 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2742 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2743 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2744 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2745 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2746 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2747 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2748 2749 /* Masks for Attributes */ 2750 2751 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2752 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2753 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2754 2755 /* Attributes describing cache */ 2756 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2757 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2758 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2759 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2760 2761 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2762 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2763 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2764 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2765 2766 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2767 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2768 2769 /* 2: ID Structure */ 2770 2771 typedef struct acpi_pptt_id 2772 { 2773 ACPI_SUBTABLE_HEADER Header; 2774 UINT16 Reserved; 2775 UINT32 VendorId; 2776 UINT64 Level1Id; 2777 UINT64 Level2Id; 2778 UINT16 MajorRev; 2779 UINT16 MinorRev; 2780 UINT16 SpinRev; 2781 2782 } ACPI_PPTT_ID; 2783 2784 2785 /******************************************************************************* 2786 * 2787 * PRMT - Platform Runtime Mechanism Table 2788 * Version 1 2789 * 2790 ******************************************************************************/ 2791 2792 typedef struct acpi_table_prmt 2793 { 2794 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2795 2796 } ACPI_TABLE_PRMT; 2797 2798 typedef struct acpi_table_prmt_header 2799 { 2800 UINT8 PlatformGuid[16]; 2801 UINT32 ModuleInfoOffset; 2802 UINT32 ModuleInfoCount; 2803 2804 } ACPI_TABLE_PRMT_HEADER; 2805 2806 typedef struct acpi_prmt_module_header 2807 { 2808 UINT16 Revision; 2809 UINT16 Length; 2810 2811 } ACPI_PRMT_MODULE_HEADER; 2812 2813 typedef struct acpi_prmt_module_info 2814 { 2815 UINT16 Revision; 2816 UINT16 Length; 2817 UINT8 ModuleGuid[16]; 2818 UINT16 MajorRev; 2819 UINT16 MinorRev; 2820 UINT16 HandlerInfoCount; 2821 UINT32 HandlerInfoOffset; 2822 UINT64 MmioListPointer; 2823 2824 } ACPI_PRMT_MODULE_INFO; 2825 2826 typedef struct acpi_prmt_handler_info 2827 { 2828 UINT16 Revision; 2829 UINT16 Length; 2830 UINT8 HandlerGuid[16]; 2831 UINT64 HandlerAddress; 2832 UINT64 StaticDataBufferAddress; 2833 UINT64 AcpiParamBufferAddress; 2834 2835 } ACPI_PRMT_HANDLER_INFO; 2836 2837 2838 /******************************************************************************* 2839 * 2840 * RASF - RAS Feature Table (ACPI 5.0) 2841 * Version 1 2842 * 2843 ******************************************************************************/ 2844 2845 typedef struct acpi_table_rasf 2846 { 2847 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2848 UINT8 ChannelId[12]; 2849 2850 } ACPI_TABLE_RASF; 2851 2852 /* RASF Platform Communication Channel Shared Memory Region */ 2853 2854 typedef struct acpi_rasf_shared_memory 2855 { 2856 UINT32 Signature; 2857 UINT16 Command; 2858 UINT16 Status; 2859 UINT16 Version; 2860 UINT8 Capabilities[16]; 2861 UINT8 SetCapabilities[16]; 2862 UINT16 NumParameterBlocks; 2863 UINT32 SetCapabilitiesStatus; 2864 2865 } ACPI_RASF_SHARED_MEMORY; 2866 2867 /* RASF Parameter Block Structure Header */ 2868 2869 typedef struct acpi_rasf_parameter_block 2870 { 2871 UINT16 Type; 2872 UINT16 Version; 2873 UINT16 Length; 2874 2875 } ACPI_RASF_PARAMETER_BLOCK; 2876 2877 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2878 2879 typedef struct acpi_rasf_patrol_scrub_parameter 2880 { 2881 ACPI_RASF_PARAMETER_BLOCK Header; 2882 UINT16 PatrolScrubCommand; 2883 UINT64 RequestedAddressRange[2]; 2884 UINT64 ActualAddressRange[2]; 2885 UINT16 Flags; 2886 UINT8 RequestedSpeed; 2887 2888 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2889 2890 /* Masks for Flags and Speed fields above */ 2891 2892 #define ACPI_RASF_SCRUBBER_RUNNING 1 2893 #define ACPI_RASF_SPEED (7<<1) 2894 #define ACPI_RASF_SPEED_SLOW (0<<1) 2895 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2896 #define ACPI_RASF_SPEED_FAST (7<<1) 2897 2898 /* Channel Commands */ 2899 2900 enum AcpiRasfCommands 2901 { 2902 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2903 }; 2904 2905 /* Platform RAS Capabilities */ 2906 2907 enum AcpiRasfCapabiliities 2908 { 2909 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2910 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2911 }; 2912 2913 /* Patrol Scrub Commands */ 2914 2915 enum AcpiRasfPatrolScrubCommands 2916 { 2917 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2918 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2919 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2920 }; 2921 2922 /* Channel Command flags */ 2923 2924 #define ACPI_RASF_GENERATE_SCI (1<<15) 2925 2926 /* Status values */ 2927 2928 enum AcpiRasfStatus 2929 { 2930 ACPI_RASF_SUCCESS = 0, 2931 ACPI_RASF_NOT_VALID = 1, 2932 ACPI_RASF_NOT_SUPPORTED = 2, 2933 ACPI_RASF_BUSY = 3, 2934 ACPI_RASF_FAILED = 4, 2935 ACPI_RASF_ABORTED = 5, 2936 ACPI_RASF_INVALID_DATA = 6 2937 }; 2938 2939 /* Status flags */ 2940 2941 #define ACPI_RASF_COMMAND_COMPLETE (1) 2942 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2943 #define ACPI_RASF_ERROR (1<<2) 2944 #define ACPI_RASF_STATUS (0x1F<<3) 2945 2946 2947 /******************************************************************************* 2948 * 2949 * RGRT - Regulatory Graphics Resource Table 2950 * Version 1 2951 * 2952 * Conforms to "ACPI RGRT" available at: 2953 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 2954 * 2955 ******************************************************************************/ 2956 2957 typedef struct acpi_table_rgrt 2958 { 2959 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2960 UINT16 Version; 2961 UINT8 ImageType; 2962 UINT8 Reserved; 2963 UINT8 Image[]; 2964 2965 } ACPI_TABLE_RGRT; 2966 2967 /* ImageType values */ 2968 2969 enum AcpiRgrtImageType 2970 { 2971 ACPI_RGRT_TYPE_RESERVED0 = 0, 2972 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2973 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2974 }; 2975 2976 2977 /******************************************************************************* 2978 * 2979 * SBST - Smart Battery Specification Table 2980 * Version 1 2981 * 2982 ******************************************************************************/ 2983 2984 typedef struct acpi_table_sbst 2985 { 2986 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2987 UINT32 WarningLevel; 2988 UINT32 LowLevel; 2989 UINT32 CriticalLevel; 2990 2991 } ACPI_TABLE_SBST; 2992 2993 2994 /******************************************************************************* 2995 * 2996 * SDEI - Software Delegated Exception Interface Descriptor Table 2997 * 2998 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2999 * May 8th, 2017. Copyright 2017 ARM Ltd. 3000 * 3001 ******************************************************************************/ 3002 3003 typedef struct acpi_table_sdei 3004 { 3005 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3006 3007 } ACPI_TABLE_SDEI; 3008 3009 3010 /******************************************************************************* 3011 * 3012 * SDEV - Secure Devices Table (ACPI 6.2) 3013 * Version 1 3014 * 3015 ******************************************************************************/ 3016 3017 typedef struct acpi_table_sdev 3018 { 3019 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3020 3021 } ACPI_TABLE_SDEV; 3022 3023 3024 typedef struct acpi_sdev_header 3025 { 3026 UINT8 Type; 3027 UINT8 Flags; 3028 UINT16 Length; 3029 3030 } ACPI_SDEV_HEADER; 3031 3032 3033 /* Values for subtable type above */ 3034 3035 enum AcpiSdevType 3036 { 3037 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3038 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3039 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3040 }; 3041 3042 /* Values for flags above */ 3043 3044 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3045 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3046 3047 /* 3048 * SDEV subtables 3049 */ 3050 3051 /* 0: Namespace Device Based Secure Device Structure */ 3052 3053 typedef struct acpi_sdev_namespace 3054 { 3055 ACPI_SDEV_HEADER Header; 3056 UINT16 DeviceIdOffset; 3057 UINT16 DeviceIdLength; 3058 UINT16 VendorDataOffset; 3059 UINT16 VendorDataLength; 3060 3061 } ACPI_SDEV_NAMESPACE; 3062 3063 typedef struct acpi_sdev_secure_component 3064 { 3065 UINT16 SecureComponentOffset; 3066 UINT16 SecureComponentLength; 3067 3068 } ACPI_SDEV_SECURE_COMPONENT; 3069 3070 3071 /* 3072 * SDEV sub-subtables ("Components") for above 3073 */ 3074 typedef struct acpi_sdev_component 3075 { 3076 ACPI_SDEV_HEADER Header; 3077 3078 } ACPI_SDEV_COMPONENT; 3079 3080 3081 /* Values for sub-subtable type above */ 3082 3083 enum AcpiSacType 3084 { 3085 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3086 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3087 }; 3088 3089 typedef struct acpi_sdev_id_component 3090 { 3091 ACPI_SDEV_HEADER Header; 3092 UINT16 HardwareIdOffset; 3093 UINT16 HardwareIdLength; 3094 UINT16 SubsystemIdOffset; 3095 UINT16 SubsystemIdLength; 3096 UINT16 HardwareRevision; 3097 UINT8 HardwareRevPresent; 3098 UINT8 ClassCodePresent; 3099 UINT8 PciBaseClass; 3100 UINT8 PciSubClass; 3101 UINT8 PciProgrammingXface; 3102 3103 } ACPI_SDEV_ID_COMPONENT; 3104 3105 typedef struct acpi_sdev_mem_component 3106 { 3107 ACPI_SDEV_HEADER Header; 3108 UINT32 Reserved; 3109 UINT64 MemoryBaseAddress; 3110 UINT64 MemoryLength; 3111 3112 } ACPI_SDEV_MEM_COMPONENT; 3113 3114 3115 /* 1: PCIe Endpoint Device Based Device Structure */ 3116 3117 typedef struct acpi_sdev_pcie 3118 { 3119 ACPI_SDEV_HEADER Header; 3120 UINT16 Segment; 3121 UINT16 StartBus; 3122 UINT16 PathOffset; 3123 UINT16 PathLength; 3124 UINT16 VendorDataOffset; 3125 UINT16 VendorDataLength; 3126 3127 } ACPI_SDEV_PCIE; 3128 3129 /* 1a: PCIe Endpoint path entry */ 3130 3131 typedef struct acpi_sdev_pcie_path 3132 { 3133 UINT8 Device; 3134 UINT8 Function; 3135 3136 } ACPI_SDEV_PCIE_PATH; 3137 3138 3139 /******************************************************************************* 3140 * 3141 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3142 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3143 * Trust Domain Extensions (Intel TDX)". 3144 * Version 1 3145 * 3146 ******************************************************************************/ 3147 3148 typedef struct acpi_table_svkl 3149 { 3150 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3151 UINT32 Count; 3152 3153 } ACPI_TABLE_SVKL; 3154 3155 typedef struct acpi_svkl_key 3156 { 3157 UINT16 Type; 3158 UINT16 Format; 3159 UINT32 Size; 3160 UINT64 Address; 3161 3162 } ACPI_SVKL_KEY; 3163 3164 enum acpi_svkl_type 3165 { 3166 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3167 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3168 }; 3169 3170 enum acpi_svkl_format 3171 { 3172 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3173 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3174 }; 3175 3176 3177 /******************************************************************************* 3178 * 3179 * TDEL - TD-Event Log 3180 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3181 * Trust Domain Extensions (Intel TDX)". 3182 * September 2020 3183 * 3184 ******************************************************************************/ 3185 3186 typedef struct acpi_table_tdel 3187 { 3188 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3189 UINT32 Reserved; 3190 UINT64 LogAreaMinimumLength; 3191 UINT64 LogAreaStartAddress; 3192 3193 } ACPI_TABLE_TDEL; 3194 3195 /* Reset to default packing */ 3196 3197 #pragma pack() 3198 3199 #endif /* __ACTBL2_H__ */ 3200