1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 183 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 184 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 185 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 186 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 187 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 188 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 189 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 190 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 191 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 192 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 193 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 194 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 195 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 196 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 197 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 198 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 199 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 200 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 201 202 203 /* 204 * All tables must be byte-packed to match the ACPI specification, since 205 * the tables are provided by the system BIOS. 206 */ 207 #pragma pack(1) 208 209 /* 210 * Note: C bitfields are not used for this reason: 211 * 212 * "Bitfields are great and easy to read, but unfortunately the C language 213 * does not specify the layout of bitfields in memory, which means they are 214 * essentially useless for dealing with packed data in on-disk formats or 215 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 216 * this decision was a design error in C. Ritchie could have picked an order 217 * and stuck with it." Norman Ramsey. 218 * See http://stackoverflow.com/a/1053662/41661 219 */ 220 221 222 /******************************************************************************* 223 * 224 * AEST - Arm Error Source Table 225 * 226 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 227 * September 2020. 228 * 229 ******************************************************************************/ 230 231 typedef struct acpi_table_aest 232 { 233 ACPI_TABLE_HEADER Header; 234 235 } ACPI_TABLE_AEST; 236 237 /* Common Subtable header - one per Node Structure (Subtable) */ 238 239 typedef struct acpi_aest_hdr 240 { 241 UINT8 Type; 242 UINT16 Length; 243 UINT8 Reserved; 244 UINT32 NodeSpecificOffset; 245 UINT32 NodeInterfaceOffset; 246 UINT32 NodeInterruptOffset; 247 UINT32 NodeInterruptCount; 248 UINT64 TimestampRate; 249 UINT64 Reserved1; 250 UINT64 ErrorInjectionRate; 251 252 } ACPI_AEST_HEADER; 253 254 /* Values for Type above */ 255 256 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 257 #define ACPI_AEST_MEMORY_ERROR_NODE 1 258 #define ACPI_AEST_SMMU_ERROR_NODE 2 259 #define ACPI_AEST_VENDOR_ERROR_NODE 3 260 #define ACPI_AEST_GIC_ERROR_NODE 4 261 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 262 263 264 /* 265 * AEST subtables (Error nodes) 266 */ 267 268 /* 0: Processor Error */ 269 270 typedef struct acpi_aest_processor 271 { 272 UINT32 ProcessorId; 273 UINT8 ResourceType; 274 UINT8 Reserved; 275 UINT8 Flags; 276 UINT8 Revision; 277 UINT64 ProcessorAffinity; 278 279 } ACPI_AEST_PROCESSOR; 280 281 /* Values for ResourceType above, related structs below */ 282 283 #define ACPI_AEST_CACHE_RESOURCE 0 284 #define ACPI_AEST_TLB_RESOURCE 1 285 #define ACPI_AEST_GENERIC_RESOURCE 2 286 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 287 288 /* 0R: Processor Cache Resource Substructure */ 289 290 typedef struct acpi_aest_processor_cache 291 { 292 UINT32 CacheReference; 293 UINT32 Reserved; 294 295 } ACPI_AEST_PROCESSOR_CACHE; 296 297 /* Values for CacheType above */ 298 299 #define ACPI_AEST_CACHE_DATA 0 300 #define ACPI_AEST_CACHE_INSTRUCTION 1 301 #define ACPI_AEST_CACHE_UNIFIED 2 302 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 303 304 /* 1R: Processor TLB Resource Substructure */ 305 306 typedef struct acpi_aest_processor_tlb 307 { 308 UINT32 TlbLevel; 309 UINT32 Reserved; 310 311 } ACPI_AEST_PROCESSOR_TLB; 312 313 /* 2R: Processor Generic Resource Substructure */ 314 315 typedef struct acpi_aest_processor_generic 316 { 317 UINT32 Resource; 318 319 } ACPI_AEST_PROCESSOR_GENERIC; 320 321 /* 1: Memory Error */ 322 323 typedef struct acpi_aest_memory 324 { 325 UINT32 SratProximityDomain; 326 327 } ACPI_AEST_MEMORY; 328 329 /* 2: Smmu Error */ 330 331 typedef struct acpi_aest_smmu 332 { 333 UINT32 IortNodeReference; 334 UINT32 SubcomponentReference; 335 336 } ACPI_AEST_SMMU; 337 338 /* 3: Vendor Defined */ 339 340 typedef struct acpi_aest_vendor 341 { 342 UINT32 AcpiHid; 343 UINT32 AcpiUid; 344 UINT8 VendorSpecificData[16]; 345 346 } ACPI_AEST_VENDOR; 347 348 /* 4: Gic Error */ 349 350 typedef struct acpi_aest_gic 351 { 352 UINT32 InterfaceType; 353 UINT32 InstanceId; 354 355 } ACPI_AEST_GIC; 356 357 /* Values for InterfaceType above */ 358 359 #define ACPI_AEST_GIC_CPU 0 360 #define ACPI_AEST_GIC_DISTRIBUTOR 1 361 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 362 #define ACPI_AEST_GIC_ITS 3 363 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 364 365 366 /* Node Interface Structure */ 367 368 typedef struct acpi_aest_node_interface 369 { 370 UINT8 Type; 371 UINT8 Reserved[3]; 372 UINT32 Flags; 373 UINT64 Address; 374 UINT32 ErrorRecordIndex; 375 UINT32 ErrorRecordCount; 376 UINT64 ErrorRecordImplemented; 377 UINT64 ErrorStatusReporting; 378 UINT64 AddressingMode; 379 380 } ACPI_AEST_NODE_INTERFACE; 381 382 /* Values for Type field above */ 383 384 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 385 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 386 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 387 388 /* Node Interrupt Structure */ 389 390 typedef struct acpi_aest_node_interrupt 391 { 392 UINT8 Type; 393 UINT8 Reserved[2]; 394 UINT8 Flags; 395 UINT32 Gsiv; 396 UINT8 IortId; 397 UINT8 Reserved1[3]; 398 399 } ACPI_AEST_NODE_INTERRUPT; 400 401 /* Values for Type field above */ 402 403 #define ACPI_AEST_NODE_FAULT_HANDLING 0 404 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 405 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 406 407 408 /******************************************************************************* 409 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 410 * 411 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 412 * ARM DEN0093 v1.1 413 * 414 ******************************************************************************/ 415 typedef struct acpi_table_agdi 416 { 417 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 418 UINT8 Flags; 419 UINT8 Reserved[3]; 420 UINT32 SdeiEvent; 421 UINT32 Gsiv; 422 423 } ACPI_TABLE_AGDI; 424 425 /* Mask for Flags field above */ 426 427 #define ACPI_AGDI_SIGNALING_MODE (1) 428 429 430 /******************************************************************************* 431 * 432 * APMT - ARM Performance Monitoring Unit Table 433 * 434 * Conforms to: 435 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 436 * ARM DEN0117 v1.0 November 25, 2021 437 * 438 ******************************************************************************/ 439 440 typedef struct acpi_table_apmt { 441 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 442 } ACPI_TABLE_APMT; 443 444 #define ACPI_APMT_NODE_ID_LENGTH 4 445 446 /* 447 * APMT subtables 448 */ 449 typedef struct acpi_apmt_node { 450 UINT16 Length; 451 UINT8 Flags; 452 UINT8 Type; 453 UINT32 Id; 454 UINT64 InstPrimary; 455 UINT32 InstSecondary; 456 UINT64 BaseAddress0; 457 UINT64 BaseAddress1; 458 UINT32 OvflwIrq; 459 UINT32 Reserved; 460 UINT32 OvflwIrqFlags; 461 UINT32 ProcAffinity; 462 UINT32 ImplId; 463 } ACPI_APMT_NODE; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 468 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 469 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 470 471 /* Values for Flags dual page field above */ 472 473 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 474 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 475 476 /* Values for Flags processor affinity field above */ 477 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 478 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 479 480 /* Values for Flags 64-bit atomic field above */ 481 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 482 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 483 484 /* Values for Type field above */ 485 486 enum acpi_apmt_node_type { 487 ACPI_APMT_NODE_TYPE_MC = 0x00, 488 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 489 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 490 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 491 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 492 ACPI_APMT_NODE_TYPE_COUNT 493 }; 494 495 /* Masks for ovflw_irq_flags field above */ 496 497 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 498 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 499 500 /* Values for ovflw_irq_flags mode field above */ 501 502 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 503 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 504 505 /* Values for ovflw_irq_flags type field above */ 506 507 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 508 509 510 /******************************************************************************* 511 * 512 * BDAT - BIOS Data ACPI Table 513 * 514 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 515 * Nov 2020 516 * 517 ******************************************************************************/ 518 519 typedef struct acpi_table_bdat 520 { 521 ACPI_TABLE_HEADER Header; 522 ACPI_GENERIC_ADDRESS Gas; 523 524 } ACPI_TABLE_BDAT; 525 526 /******************************************************************************* 527 * 528 * CCEL - CC-Event Log 529 * From: "Guest-Host-Communication Interface (GHCI) for Intel 530 * Trust Domain Extensions (Intel TDX)". Feb 2022 531 * 532 ******************************************************************************/ 533 534 typedef struct acpi_table_ccel 535 { 536 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 537 UINT8 CCType; 538 UINT8 CCSubType; 539 UINT16 Reserved; 540 UINT64 LogAreaMinimumLength; 541 UINT64 LogAreaStartAddress; 542 543 } ACPI_TABLE_CCEL; 544 545 /******************************************************************************* 546 * 547 * IORT - IO Remapping Table 548 * 549 * Conforms to "IO Remapping Table System Software on ARM Platforms", 550 * Document number: ARM DEN 0049E.e, Sep 2022 551 * 552 ******************************************************************************/ 553 554 typedef struct acpi_table_iort 555 { 556 ACPI_TABLE_HEADER Header; 557 UINT32 NodeCount; 558 UINT32 NodeOffset; 559 UINT32 Reserved; 560 561 } ACPI_TABLE_IORT; 562 563 564 /* 565 * IORT subtables 566 */ 567 typedef struct acpi_iort_node 568 { 569 UINT8 Type; 570 UINT16 Length; 571 UINT8 Revision; 572 UINT32 Identifier; 573 UINT32 MappingCount; 574 UINT32 MappingOffset; 575 char NodeData[]; 576 577 } ACPI_IORT_NODE; 578 579 /* Values for subtable Type above */ 580 581 enum AcpiIortNodeType 582 { 583 ACPI_IORT_NODE_ITS_GROUP = 0x00, 584 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 585 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 586 ACPI_IORT_NODE_SMMU = 0x03, 587 ACPI_IORT_NODE_SMMU_V3 = 0x04, 588 ACPI_IORT_NODE_PMCG = 0x05, 589 ACPI_IORT_NODE_RMR = 0x06, 590 }; 591 592 593 typedef struct acpi_iort_id_mapping 594 { 595 UINT32 InputBase; /* Lowest value in input range */ 596 UINT32 IdCount; /* Number of IDs */ 597 UINT32 OutputBase; /* Lowest value in output range */ 598 UINT32 OutputReference; /* A reference to the output node */ 599 UINT32 Flags; 600 601 } ACPI_IORT_ID_MAPPING; 602 603 /* Masks for Flags field above for IORT subtable */ 604 605 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 606 607 608 typedef struct acpi_iort_memory_access 609 { 610 UINT32 CacheCoherency; 611 UINT8 Hints; 612 UINT16 Reserved; 613 UINT8 MemoryFlags; 614 615 } ACPI_IORT_MEMORY_ACCESS; 616 617 /* Values for CacheCoherency field above */ 618 619 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 620 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 621 622 /* Masks for Hints field above */ 623 624 #define ACPI_IORT_HT_TRANSIENT (1) 625 #define ACPI_IORT_HT_WRITE (1<<1) 626 #define ACPI_IORT_HT_READ (1<<2) 627 #define ACPI_IORT_HT_OVERRIDE (1<<3) 628 629 /* Masks for MemoryFlags field above */ 630 631 #define ACPI_IORT_MF_COHERENCY (1) 632 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 633 634 635 /* 636 * IORT node specific subtables 637 */ 638 typedef struct acpi_iort_its_group 639 { 640 UINT32 ItsCount; 641 UINT32 Identifiers[]; /* GIC ITS identifier array */ 642 643 } ACPI_IORT_ITS_GROUP; 644 645 646 typedef struct acpi_iort_named_component 647 { 648 UINT32 NodeFlags; 649 UINT64 MemoryProperties; /* Memory access properties */ 650 UINT8 MemoryAddressLimit; /* Memory address size limit */ 651 char DeviceName[]; /* Path of namespace object */ 652 653 } ACPI_IORT_NAMED_COMPONENT; 654 655 /* Masks for Flags field above */ 656 657 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 658 #define ACPI_IORT_NC_PASID_BITS (31<<1) 659 660 typedef struct acpi_iort_root_complex 661 { 662 UINT64 MemoryProperties; /* Memory access properties */ 663 UINT32 AtsAttribute; 664 UINT32 PciSegmentNumber; 665 UINT8 MemoryAddressLimit; /* Memory address size limit */ 666 UINT16 PasidCapabilities; /* PASID Capabilities */ 667 UINT8 Reserved[]; /* Reserved, must be zero */ 668 669 } ACPI_IORT_ROOT_COMPLEX; 670 671 /* Masks for AtsAttribute field above */ 672 673 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 674 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 675 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 676 677 /* Masks for PasidCapabilities field above */ 678 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 679 680 typedef struct acpi_iort_smmu 681 { 682 UINT64 BaseAddress; /* SMMU base address */ 683 UINT64 Span; /* Length of memory range */ 684 UINT32 Model; 685 UINT32 Flags; 686 UINT32 GlobalInterruptOffset; 687 UINT32 ContextInterruptCount; 688 UINT32 ContextInterruptOffset; 689 UINT32 PmuInterruptCount; 690 UINT32 PmuInterruptOffset; 691 UINT64 Interrupts[]; /* Interrupt array */ 692 693 } ACPI_IORT_SMMU; 694 695 /* Values for Model field above */ 696 697 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 698 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 699 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 700 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 701 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 702 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 703 704 /* Masks for Flags field above */ 705 706 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 707 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 708 709 /* Global interrupt format */ 710 711 typedef struct acpi_iort_smmu_gsi 712 { 713 UINT32 NSgIrpt; 714 UINT32 NSgIrptFlags; 715 UINT32 NSgCfgIrpt; 716 UINT32 NSgCfgIrptFlags; 717 718 } ACPI_IORT_SMMU_GSI; 719 720 721 typedef struct acpi_iort_smmu_v3 722 { 723 UINT64 BaseAddress; /* SMMUv3 base address */ 724 UINT32 Flags; 725 UINT32 Reserved; 726 UINT64 VatosAddress; 727 UINT32 Model; 728 UINT32 EventGsiv; 729 UINT32 PriGsiv; 730 UINT32 GerrGsiv; 731 UINT32 SyncGsiv; 732 UINT32 Pxm; 733 UINT32 IdMappingIndex; 734 735 } ACPI_IORT_SMMU_V3; 736 737 /* Values for Model field above */ 738 739 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 740 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 741 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 742 743 /* Masks for Flags field above */ 744 745 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 746 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 747 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 748 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 749 750 typedef struct acpi_iort_pmcg 751 { 752 UINT64 Page0BaseAddress; 753 UINT32 OverflowGsiv; 754 UINT32 NodeReference; 755 UINT64 Page1BaseAddress; 756 757 } ACPI_IORT_PMCG; 758 759 typedef struct acpi_iort_rmr { 760 UINT32 Flags; 761 UINT32 RmrCount; 762 UINT32 RmrOffset; 763 764 } ACPI_IORT_RMR; 765 766 /* Masks for Flags field above */ 767 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 768 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 769 770 /* 771 * Macro to access the Access Attributes in flags field above: 772 * Access Attributes is encoded in bits 9:2 773 */ 774 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 775 776 /* Values for above Access Attributes */ 777 778 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 779 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 780 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 781 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 782 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 783 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 784 785 typedef struct acpi_iort_rmr_desc { 786 UINT64 BaseAddress; 787 UINT64 Length; 788 UINT32 Reserved; 789 790 } ACPI_IORT_RMR_DESC; 791 792 /******************************************************************************* 793 * 794 * IVRS - I/O Virtualization Reporting Structure 795 * Version 1 796 * 797 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 798 * Revision 1.26, February 2009. 799 * 800 ******************************************************************************/ 801 802 typedef struct acpi_table_ivrs 803 { 804 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 805 UINT32 Info; /* Common virtualization info */ 806 UINT64 Reserved; 807 808 } ACPI_TABLE_IVRS; 809 810 /* Values for Info field above */ 811 812 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 813 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 814 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 815 816 817 /* IVRS subtable header */ 818 819 typedef struct acpi_ivrs_header 820 { 821 UINT8 Type; /* Subtable type */ 822 UINT8 Flags; 823 UINT16 Length; /* Subtable length */ 824 UINT16 DeviceId; /* ID of IOMMU */ 825 826 } ACPI_IVRS_HEADER; 827 828 /* Values for subtable Type above */ 829 830 enum AcpiIvrsType 831 { 832 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 833 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 834 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 835 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 836 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 837 ACPI_IVRS_TYPE_MEMORY3 = 0x22 838 }; 839 840 /* Masks for Flags field above for IVHD subtable */ 841 842 #define ACPI_IVHD_TT_ENABLE (1) 843 #define ACPI_IVHD_PASS_PW (1<<1) 844 #define ACPI_IVHD_RES_PASS_PW (1<<2) 845 #define ACPI_IVHD_ISOC (1<<3) 846 #define ACPI_IVHD_IOTLB (1<<4) 847 848 /* Masks for Flags field above for IVMD subtable */ 849 850 #define ACPI_IVMD_UNITY (1) 851 #define ACPI_IVMD_READ (1<<1) 852 #define ACPI_IVMD_WRITE (1<<2) 853 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 854 855 856 /* 857 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 858 */ 859 860 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 861 862 typedef struct acpi_ivrs_hardware_10 863 { 864 ACPI_IVRS_HEADER Header; 865 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 866 UINT64 BaseAddress; /* IOMMU control registers */ 867 UINT16 PciSegmentGroup; 868 UINT16 Info; /* MSI number and unit ID */ 869 UINT32 FeatureReporting; 870 871 } ACPI_IVRS_HARDWARE1; 872 873 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 874 875 typedef struct acpi_ivrs_hardware_11 876 { 877 ACPI_IVRS_HEADER Header; 878 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 879 UINT64 BaseAddress; /* IOMMU control registers */ 880 UINT16 PciSegmentGroup; 881 UINT16 Info; /* MSI number and unit ID */ 882 UINT32 Attributes; 883 UINT64 EfrRegisterImage; 884 UINT64 Reserved; 885 } ACPI_IVRS_HARDWARE2; 886 887 /* Masks for Info field above */ 888 889 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 890 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 891 892 893 /* 894 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 895 * Upper two bits of the Type field are the (encoded) length of the structure. 896 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 897 * are reserved for future use but not defined. 898 */ 899 typedef struct acpi_ivrs_de_header 900 { 901 UINT8 Type; 902 UINT16 Id; 903 UINT8 DataSetting; 904 905 } ACPI_IVRS_DE_HEADER; 906 907 /* Length of device entry is in the top two bits of Type field above */ 908 909 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 910 911 /* Values for device entry Type field above */ 912 913 enum AcpiIvrsDeviceEntryType 914 { 915 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 916 917 ACPI_IVRS_TYPE_PAD4 = 0, 918 ACPI_IVRS_TYPE_ALL = 1, 919 ACPI_IVRS_TYPE_SELECT = 2, 920 ACPI_IVRS_TYPE_START = 3, 921 ACPI_IVRS_TYPE_END = 4, 922 923 /* 8-byte device entries */ 924 925 ACPI_IVRS_TYPE_PAD8 = 64, 926 ACPI_IVRS_TYPE_NOT_USED = 65, 927 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 928 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 929 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 930 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 931 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 932 933 /* Variable-length device entries */ 934 935 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 936 }; 937 938 /* Values for Data field above */ 939 940 #define ACPI_IVHD_INIT_PASS (1) 941 #define ACPI_IVHD_EINT_PASS (1<<1) 942 #define ACPI_IVHD_NMI_PASS (1<<2) 943 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 944 #define ACPI_IVHD_LINT0_PASS (1<<6) 945 #define ACPI_IVHD_LINT1_PASS (1<<7) 946 947 948 /* Types 0-4: 4-byte device entry */ 949 950 typedef struct acpi_ivrs_device4 951 { 952 ACPI_IVRS_DE_HEADER Header; 953 954 } ACPI_IVRS_DEVICE4; 955 956 /* Types 66-67: 8-byte device entry */ 957 958 typedef struct acpi_ivrs_device8a 959 { 960 ACPI_IVRS_DE_HEADER Header; 961 UINT8 Reserved1; 962 UINT16 UsedId; 963 UINT8 Reserved2; 964 965 } ACPI_IVRS_DEVICE8A; 966 967 /* Types 70-71: 8-byte device entry */ 968 969 typedef struct acpi_ivrs_device8b 970 { 971 ACPI_IVRS_DE_HEADER Header; 972 UINT32 ExtendedData; 973 974 } ACPI_IVRS_DEVICE8B; 975 976 /* Values for ExtendedData above */ 977 978 #define ACPI_IVHD_ATS_DISABLED (1<<31) 979 980 /* Type 72: 8-byte device entry */ 981 982 typedef struct acpi_ivrs_device8c 983 { 984 ACPI_IVRS_DE_HEADER Header; 985 UINT8 Handle; 986 UINT16 UsedId; 987 UINT8 Variety; 988 989 } ACPI_IVRS_DEVICE8C; 990 991 /* Values for Variety field above */ 992 993 #define ACPI_IVHD_IOAPIC 1 994 #define ACPI_IVHD_HPET 2 995 996 /* Type 240: variable-length device entry */ 997 998 typedef struct acpi_ivrs_device_hid 999 { 1000 ACPI_IVRS_DE_HEADER Header; 1001 UINT64 AcpiHid; 1002 UINT64 AcpiCid; 1003 UINT8 UidType; 1004 UINT8 UidLength; 1005 1006 } ACPI_IVRS_DEVICE_HID; 1007 1008 /* Values for UidType above */ 1009 1010 #define ACPI_IVRS_UID_NOT_PRESENT 0 1011 #define ACPI_IVRS_UID_IS_INTEGER 1 1012 #define ACPI_IVRS_UID_IS_STRING 2 1013 1014 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1015 1016 typedef struct acpi_ivrs_memory 1017 { 1018 ACPI_IVRS_HEADER Header; 1019 UINT16 AuxData; 1020 UINT64 Reserved; 1021 UINT64 StartAddress; 1022 UINT64 MemoryLength; 1023 1024 } ACPI_IVRS_MEMORY; 1025 1026 1027 /******************************************************************************* 1028 * 1029 * LPIT - Low Power Idle Table 1030 * 1031 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1032 * 1033 ******************************************************************************/ 1034 1035 typedef struct acpi_table_lpit 1036 { 1037 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1038 1039 } ACPI_TABLE_LPIT; 1040 1041 1042 /* LPIT subtable header */ 1043 1044 typedef struct acpi_lpit_header 1045 { 1046 UINT32 Type; /* Subtable type */ 1047 UINT32 Length; /* Subtable length */ 1048 UINT16 UniqueId; 1049 UINT16 Reserved; 1050 UINT32 Flags; 1051 1052 } ACPI_LPIT_HEADER; 1053 1054 /* Values for subtable Type above */ 1055 1056 enum AcpiLpitType 1057 { 1058 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1059 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1060 }; 1061 1062 /* Masks for Flags field above */ 1063 1064 #define ACPI_LPIT_STATE_DISABLED (1) 1065 #define ACPI_LPIT_NO_COUNTER (1<<1) 1066 1067 /* 1068 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1069 */ 1070 1071 /* 0x00: Native C-state instruction based LPI structure */ 1072 1073 typedef struct acpi_lpit_native 1074 { 1075 ACPI_LPIT_HEADER Header; 1076 ACPI_GENERIC_ADDRESS EntryTrigger; 1077 UINT32 Residency; 1078 UINT32 Latency; 1079 ACPI_GENERIC_ADDRESS ResidencyCounter; 1080 UINT64 CounterFrequency; 1081 1082 } ACPI_LPIT_NATIVE; 1083 1084 1085 /******************************************************************************* 1086 * 1087 * MADT - Multiple APIC Description Table 1088 * Version 3 1089 * 1090 ******************************************************************************/ 1091 1092 typedef struct acpi_table_madt 1093 { 1094 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1095 UINT32 Address; /* Physical address of local APIC */ 1096 UINT32 Flags; 1097 1098 } ACPI_TABLE_MADT; 1099 1100 /* Masks for Flags field above */ 1101 1102 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1103 1104 /* Values for PCATCompat flag */ 1105 1106 #define ACPI_MADT_DUAL_PIC 1 1107 #define ACPI_MADT_MULTIPLE_APIC 0 1108 1109 1110 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1111 1112 enum AcpiMadtType 1113 { 1114 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1115 ACPI_MADT_TYPE_IO_APIC = 1, 1116 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1117 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1118 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1119 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1120 ACPI_MADT_TYPE_IO_SAPIC = 6, 1121 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1122 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1123 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1124 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1125 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1126 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1127 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1128 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1129 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1130 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1131 ACPI_MADT_TYPE_CORE_PIC = 17, 1132 ACPI_MADT_TYPE_LIO_PIC = 18, 1133 ACPI_MADT_TYPE_HT_PIC = 19, 1134 ACPI_MADT_TYPE_EIO_PIC = 20, 1135 ACPI_MADT_TYPE_MSI_PIC = 21, 1136 ACPI_MADT_TYPE_BIO_PIC = 22, 1137 ACPI_MADT_TYPE_LPC_PIC = 23, 1138 ACPI_MADT_TYPE_RINTC = 24, 1139 ACPI_MADT_TYPE_RESERVED = 25, /* 25 to 0x7F are reserved */ 1140 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1141 }; 1142 1143 1144 /* 1145 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1146 */ 1147 1148 /* 0: Processor Local APIC */ 1149 1150 typedef struct acpi_madt_local_apic 1151 { 1152 ACPI_SUBTABLE_HEADER Header; 1153 UINT8 ProcessorId; /* ACPI processor id */ 1154 UINT8 Id; /* Processor's local APIC id */ 1155 UINT32 LapicFlags; 1156 1157 } ACPI_MADT_LOCAL_APIC; 1158 1159 1160 /* 1: IO APIC */ 1161 1162 typedef struct acpi_madt_io_apic 1163 { 1164 ACPI_SUBTABLE_HEADER Header; 1165 UINT8 Id; /* I/O APIC ID */ 1166 UINT8 Reserved; /* Reserved - must be zero */ 1167 UINT32 Address; /* APIC physical address */ 1168 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1169 1170 } ACPI_MADT_IO_APIC; 1171 1172 1173 /* 2: Interrupt Override */ 1174 1175 typedef struct acpi_madt_interrupt_override 1176 { 1177 ACPI_SUBTABLE_HEADER Header; 1178 UINT8 Bus; /* 0 - ISA */ 1179 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1180 UINT32 GlobalIrq; /* Global system interrupt */ 1181 UINT16 IntiFlags; 1182 1183 } ACPI_MADT_INTERRUPT_OVERRIDE; 1184 1185 1186 /* 3: NMI Source */ 1187 1188 typedef struct acpi_madt_nmi_source 1189 { 1190 ACPI_SUBTABLE_HEADER Header; 1191 UINT16 IntiFlags; 1192 UINT32 GlobalIrq; /* Global system interrupt */ 1193 1194 } ACPI_MADT_NMI_SOURCE; 1195 1196 1197 /* 4: Local APIC NMI */ 1198 1199 typedef struct acpi_madt_local_apic_nmi 1200 { 1201 ACPI_SUBTABLE_HEADER Header; 1202 UINT8 ProcessorId; /* ACPI processor id */ 1203 UINT16 IntiFlags; 1204 UINT8 Lint; /* LINTn to which NMI is connected */ 1205 1206 } ACPI_MADT_LOCAL_APIC_NMI; 1207 1208 1209 /* 5: Address Override */ 1210 1211 typedef struct acpi_madt_local_apic_override 1212 { 1213 ACPI_SUBTABLE_HEADER Header; 1214 UINT16 Reserved; /* Reserved, must be zero */ 1215 UINT64 Address; /* APIC physical address */ 1216 1217 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1218 1219 1220 /* 6: I/O Sapic */ 1221 1222 typedef struct acpi_madt_io_sapic 1223 { 1224 ACPI_SUBTABLE_HEADER Header; 1225 UINT8 Id; /* I/O SAPIC ID */ 1226 UINT8 Reserved; /* Reserved, must be zero */ 1227 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1228 UINT64 Address; /* SAPIC physical address */ 1229 1230 } ACPI_MADT_IO_SAPIC; 1231 1232 1233 /* 7: Local Sapic */ 1234 1235 typedef struct acpi_madt_local_sapic 1236 { 1237 ACPI_SUBTABLE_HEADER Header; 1238 UINT8 ProcessorId; /* ACPI processor id */ 1239 UINT8 Id; /* SAPIC ID */ 1240 UINT8 Eid; /* SAPIC EID */ 1241 UINT8 Reserved[3]; /* Reserved, must be zero */ 1242 UINT32 LapicFlags; 1243 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1244 char UidString[]; /* String UID - ACPI 3.0 */ 1245 1246 } ACPI_MADT_LOCAL_SAPIC; 1247 1248 1249 /* 8: Platform Interrupt Source */ 1250 1251 typedef struct acpi_madt_interrupt_source 1252 { 1253 ACPI_SUBTABLE_HEADER Header; 1254 UINT16 IntiFlags; 1255 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1256 UINT8 Id; /* Processor ID */ 1257 UINT8 Eid; /* Processor EID */ 1258 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1259 UINT32 GlobalIrq; /* Global system interrupt */ 1260 UINT32 Flags; /* Interrupt Source Flags */ 1261 1262 } ACPI_MADT_INTERRUPT_SOURCE; 1263 1264 /* Masks for Flags field above */ 1265 1266 #define ACPI_MADT_CPEI_OVERRIDE (1) 1267 1268 1269 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1270 1271 typedef struct acpi_madt_local_x2apic 1272 { 1273 ACPI_SUBTABLE_HEADER Header; 1274 UINT16 Reserved; /* Reserved - must be zero */ 1275 UINT32 LocalApicId; /* Processor x2APIC ID */ 1276 UINT32 LapicFlags; 1277 UINT32 Uid; /* ACPI processor UID */ 1278 1279 } ACPI_MADT_LOCAL_X2APIC; 1280 1281 1282 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1283 1284 typedef struct acpi_madt_local_x2apic_nmi 1285 { 1286 ACPI_SUBTABLE_HEADER Header; 1287 UINT16 IntiFlags; 1288 UINT32 Uid; /* ACPI processor UID */ 1289 UINT8 Lint; /* LINTn to which NMI is connected */ 1290 UINT8 Reserved[3]; /* Reserved - must be zero */ 1291 1292 } ACPI_MADT_LOCAL_X2APIC_NMI; 1293 1294 1295 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1296 1297 typedef struct acpi_madt_generic_interrupt 1298 { 1299 ACPI_SUBTABLE_HEADER Header; 1300 UINT16 Reserved; /* Reserved - must be zero */ 1301 UINT32 CpuInterfaceNumber; 1302 UINT32 Uid; 1303 UINT32 Flags; 1304 UINT32 ParkingVersion; 1305 UINT32 PerformanceInterrupt; 1306 UINT64 ParkedAddress; 1307 UINT64 BaseAddress; 1308 UINT64 GicvBaseAddress; 1309 UINT64 GichBaseAddress; 1310 UINT32 VgicInterrupt; 1311 UINT64 GicrBaseAddress; 1312 UINT64 ArmMpidr; 1313 UINT8 EfficiencyClass; 1314 UINT8 Reserved2[1]; 1315 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1316 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1317 1318 } ACPI_MADT_GENERIC_INTERRUPT; 1319 1320 /* Masks for Flags field above */ 1321 1322 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1323 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1324 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1325 1326 1327 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1328 1329 typedef struct acpi_madt_generic_distributor 1330 { 1331 ACPI_SUBTABLE_HEADER Header; 1332 UINT16 Reserved; /* Reserved - must be zero */ 1333 UINT32 GicId; 1334 UINT64 BaseAddress; 1335 UINT32 GlobalIrqBase; 1336 UINT8 Version; 1337 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1338 1339 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1340 1341 /* Values for Version field above */ 1342 1343 enum AcpiMadtGicVersion 1344 { 1345 ACPI_MADT_GIC_VERSION_NONE = 0, 1346 ACPI_MADT_GIC_VERSION_V1 = 1, 1347 ACPI_MADT_GIC_VERSION_V2 = 2, 1348 ACPI_MADT_GIC_VERSION_V3 = 3, 1349 ACPI_MADT_GIC_VERSION_V4 = 4, 1350 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1351 }; 1352 1353 1354 /* 13: Generic MSI Frame (ACPI 5.1) */ 1355 1356 typedef struct acpi_madt_generic_msi_frame 1357 { 1358 ACPI_SUBTABLE_HEADER Header; 1359 UINT16 Reserved; /* Reserved - must be zero */ 1360 UINT32 MsiFrameId; 1361 UINT64 BaseAddress; 1362 UINT32 Flags; 1363 UINT16 SpiCount; 1364 UINT16 SpiBase; 1365 1366 } ACPI_MADT_GENERIC_MSI_FRAME; 1367 1368 /* Masks for Flags field above */ 1369 1370 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1371 1372 1373 /* 14: Generic Redistributor (ACPI 5.1) */ 1374 1375 typedef struct acpi_madt_generic_redistributor 1376 { 1377 ACPI_SUBTABLE_HEADER Header; 1378 UINT16 Reserved; /* reserved - must be zero */ 1379 UINT64 BaseAddress; 1380 UINT32 Length; 1381 1382 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1383 1384 1385 /* 15: Generic Translator (ACPI 6.0) */ 1386 1387 typedef struct acpi_madt_generic_translator 1388 { 1389 ACPI_SUBTABLE_HEADER Header; 1390 UINT16 Reserved; /* reserved - must be zero */ 1391 UINT32 TranslationId; 1392 UINT64 BaseAddress; 1393 UINT32 Reserved2; 1394 1395 } ACPI_MADT_GENERIC_TRANSLATOR; 1396 1397 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1398 1399 typedef struct acpi_madt_multiproc_wakeup 1400 { 1401 ACPI_SUBTABLE_HEADER Header; 1402 UINT16 MailboxVersion; 1403 UINT32 Reserved; /* reserved - must be zero */ 1404 UINT64 BaseAddress; 1405 1406 } ACPI_MADT_MULTIPROC_WAKEUP; 1407 1408 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1409 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1410 1411 typedef struct acpi_madt_multiproc_wakeup_mailbox 1412 { 1413 UINT16 Command; 1414 UINT16 Reserved; /* reserved - must be zero */ 1415 UINT32 ApicId; 1416 UINT64 WakeupVector; 1417 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1418 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1419 1420 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1421 1422 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1423 1424 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1425 1426 typedef struct acpi_madt_core_pic { 1427 ACPI_SUBTABLE_HEADER Header; 1428 UINT8 Version; 1429 UINT32 ProcessorId; 1430 UINT32 CoreId; 1431 UINT32 Flags; 1432 } ACPI_MADT_CORE_PIC; 1433 1434 /* Values for Version field above */ 1435 1436 enum AcpiMadtCorePicVersion { 1437 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1438 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1439 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1440 }; 1441 1442 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1443 1444 typedef struct acpi_madt_lio_pic { 1445 ACPI_SUBTABLE_HEADER Header; 1446 UINT8 Version; 1447 UINT64 Address; 1448 UINT16 Size; 1449 UINT8 Cascade[2]; 1450 UINT32 CascadeMap[2]; 1451 } ACPI_MADT_LIO_PIC; 1452 1453 /* Values for Version field above */ 1454 1455 enum AcpiMadtLioPicVersion { 1456 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1457 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1458 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1459 }; 1460 1461 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1462 1463 typedef struct acpi_madt_ht_pic { 1464 ACPI_SUBTABLE_HEADER Header; 1465 UINT8 Version; 1466 UINT64 Address; 1467 UINT16 Size; 1468 UINT8 Cascade[8]; 1469 } ACPI_MADT_HT_PIC; 1470 1471 /* Values for Version field above */ 1472 1473 enum AcpiMadtHtPicVersion { 1474 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1475 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1476 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1477 }; 1478 1479 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1480 1481 typedef struct acpi_madt_eio_pic { 1482 ACPI_SUBTABLE_HEADER Header; 1483 UINT8 Version; 1484 UINT8 Cascade; 1485 UINT8 Node; 1486 UINT64 NodeMap; 1487 } ACPI_MADT_EIO_PIC; 1488 1489 /* Values for Version field above */ 1490 1491 enum AcpiMadtEioPicVersion { 1492 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1493 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1494 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1495 }; 1496 1497 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1498 1499 typedef struct acpi_madt_msi_pic { 1500 ACPI_SUBTABLE_HEADER Header; 1501 UINT8 Version; 1502 UINT64 MsgAddress; 1503 UINT32 Start; 1504 UINT32 Count; 1505 } ACPI_MADT_MSI_PIC; 1506 1507 /* Values for Version field above */ 1508 1509 enum AcpiMadtMsiPicVersion { 1510 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1511 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1512 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1513 }; 1514 1515 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1516 1517 typedef struct acpi_madt_bio_pic { 1518 ACPI_SUBTABLE_HEADER Header; 1519 UINT8 Version; 1520 UINT64 Address; 1521 UINT16 Size; 1522 UINT16 Id; 1523 UINT16 GsiBase; 1524 } ACPI_MADT_BIO_PIC; 1525 1526 /* Values for Version field above */ 1527 1528 enum AcpiMadtBioPicVersion { 1529 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1530 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1531 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1532 }; 1533 1534 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1535 1536 typedef struct acpi_madt_lpc_pic { 1537 ACPI_SUBTABLE_HEADER Header; 1538 UINT8 Version; 1539 UINT64 Address; 1540 UINT16 Size; 1541 UINT8 Cascade; 1542 } ACPI_MADT_LPC_PIC; 1543 1544 /* Values for Version field above */ 1545 1546 enum AcpiMadtLpcPicVersion { 1547 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1548 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1549 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1550 }; 1551 1552 /* 24: RISC-V INTC */ 1553 struct acpi_madt_rintc { 1554 ACPI_SUBTABLE_HEADER Header; 1555 UINT8 Version; 1556 UINT8 Reserved; 1557 UINT32 Flags; 1558 UINT64 HartId; 1559 UINT32 Uid; /* ACPI processor UID */ 1560 }; 1561 1562 /* Values for RISC-V INTC Version field above */ 1563 1564 enum AcpiMadtRintcVersion { 1565 ACPI_MADT_RINTC_VERSION_NONE = 0, 1566 ACPI_MADT_RINTC_VERSION_V1 = 1, 1567 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1568 }; 1569 1570 /* 80: OEM data */ 1571 1572 typedef struct acpi_madt_oem_data 1573 { 1574 ACPI_FLEX_ARRAY(UINT8, OemData); 1575 } ACPI_MADT_OEM_DATA; 1576 1577 1578 /* 1579 * Common flags fields for MADT subtables 1580 */ 1581 1582 /* MADT Local APIC flags */ 1583 1584 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1585 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1586 1587 /* MADT MPS INTI flags (IntiFlags) */ 1588 1589 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1590 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1591 1592 /* Values for MPS INTI flags */ 1593 1594 #define ACPI_MADT_POLARITY_CONFORMS 0 1595 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1596 #define ACPI_MADT_POLARITY_RESERVED 2 1597 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1598 1599 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1600 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1601 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1602 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1603 1604 1605 /******************************************************************************* 1606 * 1607 * MCFG - PCI Memory Mapped Configuration table and subtable 1608 * Version 1 1609 * 1610 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1611 * 1612 ******************************************************************************/ 1613 1614 typedef struct acpi_table_mcfg 1615 { 1616 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1617 UINT8 Reserved[8]; 1618 1619 } ACPI_TABLE_MCFG; 1620 1621 1622 /* Subtable */ 1623 1624 typedef struct acpi_mcfg_allocation 1625 { 1626 UINT64 Address; /* Base address, processor-relative */ 1627 UINT16 PciSegment; /* PCI segment group number */ 1628 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1629 UINT8 EndBusNumber; /* Final PCI Bus number */ 1630 UINT32 Reserved; 1631 1632 } ACPI_MCFG_ALLOCATION; 1633 1634 1635 /******************************************************************************* 1636 * 1637 * MCHI - Management Controller Host Interface Table 1638 * Version 1 1639 * 1640 * Conforms to "Management Component Transport Protocol (MCTP) Host 1641 * Interface Specification", Revision 1.0.0a, October 13, 2009 1642 * 1643 ******************************************************************************/ 1644 1645 typedef struct acpi_table_mchi 1646 { 1647 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1648 UINT8 InterfaceType; 1649 UINT8 Protocol; 1650 UINT64 ProtocolData; 1651 UINT8 InterruptType; 1652 UINT8 Gpe; 1653 UINT8 PciDeviceFlag; 1654 UINT32 GlobalInterrupt; 1655 ACPI_GENERIC_ADDRESS ControlRegister; 1656 UINT8 PciSegment; 1657 UINT8 PciBus; 1658 UINT8 PciDevice; 1659 UINT8 PciFunction; 1660 1661 } ACPI_TABLE_MCHI; 1662 1663 /******************************************************************************* 1664 * 1665 * MPAM - Memory System Resource Partitioning and Monitoring 1666 * 1667 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1668 * Document number: ARM DEN 0065, December, 2022. 1669 * 1670 ******************************************************************************/ 1671 1672 /* MPAM RIS locator types. Table 11, Location types */ 1673 enum AcpiMpamLocatorType { 1674 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1675 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1676 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1677 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1678 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1679 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1680 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1681 }; 1682 1683 /* MPAM Functional dependency descriptor. Table 10 */ 1684 typedef struct acpi_mpam_func_deps 1685 { 1686 UINT32 Producer; 1687 UINT32 Reserved; 1688 } ACPI_MPAM_FUNC_DEPS; 1689 1690 /* MPAM Processor cache locator descriptor. Table 13 */ 1691 typedef struct acpi_mpam_resource_cache_locator 1692 { 1693 UINT64 CacheReference; 1694 UINT32 Reserved; 1695 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1696 1697 /* MPAM Memory locator descriptor. Table 14 */ 1698 typedef struct acpi_mpam_resource_memory_locator 1699 { 1700 UINT64 ProximityDomain; 1701 UINT32 Reserved; 1702 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1703 1704 /* MPAM SMMU locator descriptor. Table 15 */ 1705 typedef struct acpi_mpam_resource_smmu_locator 1706 { 1707 UINT64 SmmuInterface; 1708 UINT32 Reserved; 1709 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1710 1711 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1712 typedef struct acpi_mpam_resource_memcache_locator 1713 { 1714 UINT8 Reserved[7]; 1715 UINT8 Level; 1716 UINT32 Reference; 1717 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1718 1719 /* MPAM ACPI device locator descriptor. Table 17 */ 1720 typedef struct acpi_mpam_resource_acpi_locator 1721 { 1722 UINT64 AcpiHwId; 1723 UINT32 AcpiUniqueId; 1724 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1725 1726 /* MPAM Interconnect locator descriptor. Table 18 */ 1727 typedef struct acpi_mpam_resource_interconnect_locator 1728 { 1729 UINT64 InterConnectDescTblOff; 1730 UINT32 Reserved; 1731 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1732 1733 /* MPAM Locator structure. Table 12 */ 1734 typedef struct acpi_mpam_resource_generic_locator 1735 { 1736 UINT64 Descriptor1; 1737 UINT32 Descriptor2; 1738 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1739 1740 typedef union acpi_mpam_resource_locator 1741 { 1742 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1743 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1744 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1745 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1746 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1747 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1748 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1749 } ACPI_MPAM_RESOURCE_LOCATOR; 1750 1751 /* Memory System Component Resource Node Structure Table 9 */ 1752 typedef struct acpi_mpam_resource_node 1753 { 1754 UINT32 Identifier; 1755 UINT8 RISIndex; 1756 UINT16 Reserved1; 1757 UINT8 LocatorType; 1758 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1759 UINT32 NumFunctionalDeps; 1760 } ACPI_MPAM_RESOURCE_NODE; 1761 1762 /* Memory System Component (MSC) Node Structure. Table 4 */ 1763 typedef struct acpi_mpam_msc_node 1764 { 1765 UINT16 Length; 1766 UINT8 InterfaceType; 1767 UINT8 Reserved; 1768 UINT32 Identifier; 1769 UINT64 BaseAddress; 1770 UINT32 MMIOSize; 1771 UINT32 OverflowInterrupt; 1772 UINT32 OverflowInterruptFlags; 1773 UINT32 Reserved1; 1774 UINT32 OverflowInterruptAffinity; 1775 UINT32 ErrorInterrupt; 1776 UINT32 ErrorInterruptFlags; 1777 UINT32 Reserved2; 1778 UINT32 ErrorInterruptAffinity; 1779 UINT32 MaxNrdyUsec; 1780 UINT64 HardwareIdLinkedDevice; 1781 UINT32 InstanceIdLinkedDevice; 1782 UINT32 NumResouceNodes; 1783 } ACPI_MPAM_MSC_NODE; 1784 1785 typedef struct acpi_table_mpam 1786 { 1787 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1788 } ACPI_TABLE_MPAM; 1789 1790 /******************************************************************************* 1791 * 1792 * MPST - Memory Power State Table (ACPI 5.0) 1793 * Version 1 1794 * 1795 ******************************************************************************/ 1796 1797 #define ACPI_MPST_CHANNEL_INFO \ 1798 UINT8 ChannelId; \ 1799 UINT8 Reserved1[3]; \ 1800 UINT16 PowerNodeCount; \ 1801 UINT16 Reserved2; 1802 1803 /* Main table */ 1804 1805 typedef struct acpi_table_mpst 1806 { 1807 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1808 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1809 1810 } ACPI_TABLE_MPST; 1811 1812 1813 /* Memory Platform Communication Channel Info */ 1814 1815 typedef struct acpi_mpst_channel 1816 { 1817 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1818 1819 } ACPI_MPST_CHANNEL; 1820 1821 1822 /* Memory Power Node Structure */ 1823 1824 typedef struct acpi_mpst_power_node 1825 { 1826 UINT8 Flags; 1827 UINT8 Reserved1; 1828 UINT16 NodeId; 1829 UINT32 Length; 1830 UINT64 RangeAddress; 1831 UINT64 RangeLength; 1832 UINT32 NumPowerStates; 1833 UINT32 NumPhysicalComponents; 1834 1835 } ACPI_MPST_POWER_NODE; 1836 1837 /* Values for Flags field above */ 1838 1839 #define ACPI_MPST_ENABLED 1 1840 #define ACPI_MPST_POWER_MANAGED 2 1841 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1842 1843 1844 /* Memory Power State Structure (follows POWER_NODE above) */ 1845 1846 typedef struct acpi_mpst_power_state 1847 { 1848 UINT8 PowerState; 1849 UINT8 InfoIndex; 1850 1851 } ACPI_MPST_POWER_STATE; 1852 1853 1854 /* Physical Component ID Structure (follows POWER_STATE above) */ 1855 1856 typedef struct acpi_mpst_component 1857 { 1858 UINT16 ComponentId; 1859 1860 } ACPI_MPST_COMPONENT; 1861 1862 1863 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1864 1865 typedef struct acpi_mpst_data_hdr 1866 { 1867 UINT16 CharacteristicsCount; 1868 UINT16 Reserved; 1869 1870 } ACPI_MPST_DATA_HDR; 1871 1872 typedef struct acpi_mpst_power_data 1873 { 1874 UINT8 StructureId; 1875 UINT8 Flags; 1876 UINT16 Reserved1; 1877 UINT32 AveragePower; 1878 UINT32 PowerSaving; 1879 UINT64 ExitLatency; 1880 UINT64 Reserved2; 1881 1882 } ACPI_MPST_POWER_DATA; 1883 1884 /* Values for Flags field above */ 1885 1886 #define ACPI_MPST_PRESERVE 1 1887 #define ACPI_MPST_AUTOENTRY 2 1888 #define ACPI_MPST_AUTOEXIT 4 1889 1890 1891 /* Shared Memory Region (not part of an ACPI table) */ 1892 1893 typedef struct acpi_mpst_shared 1894 { 1895 UINT32 Signature; 1896 UINT16 PccCommand; 1897 UINT16 PccStatus; 1898 UINT32 CommandRegister; 1899 UINT32 StatusRegister; 1900 UINT32 PowerStateId; 1901 UINT32 PowerNodeId; 1902 UINT64 EnergyConsumed; 1903 UINT64 AveragePower; 1904 1905 } ACPI_MPST_SHARED; 1906 1907 1908 /******************************************************************************* 1909 * 1910 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1911 * Version 1 1912 * 1913 ******************************************************************************/ 1914 1915 typedef struct acpi_table_msct 1916 { 1917 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1918 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1919 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1920 UINT32 MaxClockDomains; /* Max number of clock domains */ 1921 UINT64 MaxAddress; /* Max physical address in system */ 1922 1923 } ACPI_TABLE_MSCT; 1924 1925 1926 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1927 1928 typedef struct acpi_msct_proximity 1929 { 1930 UINT8 Revision; 1931 UINT8 Length; 1932 UINT32 RangeStart; /* Start of domain range */ 1933 UINT32 RangeEnd; /* End of domain range */ 1934 UINT32 ProcessorCapacity; 1935 UINT64 MemoryCapacity; /* In bytes */ 1936 1937 } ACPI_MSCT_PROXIMITY; 1938 1939 1940 /******************************************************************************* 1941 * 1942 * MSDM - Microsoft Data Management table 1943 * 1944 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1945 * November 29, 2011. Copyright 2011 Microsoft 1946 * 1947 ******************************************************************************/ 1948 1949 /* Basic MSDM table is only the common ACPI header */ 1950 1951 typedef struct acpi_table_msdm 1952 { 1953 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1954 1955 } ACPI_TABLE_MSDM; 1956 1957 1958 /******************************************************************************* 1959 * 1960 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1961 * Version 1 1962 * 1963 ******************************************************************************/ 1964 1965 typedef struct acpi_table_nfit 1966 { 1967 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1968 UINT32 Reserved; /* Reserved, must be zero */ 1969 1970 } ACPI_TABLE_NFIT; 1971 1972 /* Subtable header for NFIT */ 1973 1974 typedef struct acpi_nfit_header 1975 { 1976 UINT16 Type; 1977 UINT16 Length; 1978 1979 } ACPI_NFIT_HEADER; 1980 1981 1982 /* Values for subtable type in ACPI_NFIT_HEADER */ 1983 1984 enum AcpiNfitType 1985 { 1986 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1987 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1988 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1989 ACPI_NFIT_TYPE_SMBIOS = 3, 1990 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1991 ACPI_NFIT_TYPE_DATA_REGION = 5, 1992 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1993 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1994 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1995 }; 1996 1997 /* 1998 * NFIT Subtables 1999 */ 2000 2001 /* 0: System Physical Address Range Structure */ 2002 2003 typedef struct acpi_nfit_system_address 2004 { 2005 ACPI_NFIT_HEADER Header; 2006 UINT16 RangeIndex; 2007 UINT16 Flags; 2008 UINT32 Reserved; /* Reserved, must be zero */ 2009 UINT32 ProximityDomain; 2010 UINT8 RangeGuid[16]; 2011 UINT64 Address; 2012 UINT64 Length; 2013 UINT64 MemoryMapping; 2014 UINT64 LocationCookie; /* ACPI 6.4 */ 2015 2016 } ACPI_NFIT_SYSTEM_ADDRESS; 2017 2018 /* Flags */ 2019 2020 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2021 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2022 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2023 2024 /* Range Type GUIDs appear in the include/acuuid.h file */ 2025 2026 2027 /* 1: Memory Device to System Address Range Map Structure */ 2028 2029 typedef struct acpi_nfit_memory_map 2030 { 2031 ACPI_NFIT_HEADER Header; 2032 UINT32 DeviceHandle; 2033 UINT16 PhysicalId; 2034 UINT16 RegionId; 2035 UINT16 RangeIndex; 2036 UINT16 RegionIndex; 2037 UINT64 RegionSize; 2038 UINT64 RegionOffset; 2039 UINT64 Address; 2040 UINT16 InterleaveIndex; 2041 UINT16 InterleaveWays; 2042 UINT16 Flags; 2043 UINT16 Reserved; /* Reserved, must be zero */ 2044 2045 } ACPI_NFIT_MEMORY_MAP; 2046 2047 /* Flags */ 2048 2049 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2050 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2051 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2052 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2053 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2054 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2055 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2056 2057 2058 /* 2: Interleave Structure */ 2059 2060 typedef struct acpi_nfit_interleave 2061 { 2062 ACPI_NFIT_HEADER Header; 2063 UINT16 InterleaveIndex; 2064 UINT16 Reserved; /* Reserved, must be zero */ 2065 UINT32 LineCount; 2066 UINT32 LineSize; 2067 UINT32 LineOffset[]; /* Variable length */ 2068 2069 } ACPI_NFIT_INTERLEAVE; 2070 2071 2072 /* 3: SMBIOS Management Information Structure */ 2073 2074 typedef struct acpi_nfit_smbios 2075 { 2076 ACPI_NFIT_HEADER Header; 2077 UINT32 Reserved; /* Reserved, must be zero */ 2078 UINT8 Data[]; /* Variable length */ 2079 2080 } ACPI_NFIT_SMBIOS; 2081 2082 2083 /* 4: NVDIMM Control Region Structure */ 2084 2085 typedef struct acpi_nfit_control_region 2086 { 2087 ACPI_NFIT_HEADER Header; 2088 UINT16 RegionIndex; 2089 UINT16 VendorId; 2090 UINT16 DeviceId; 2091 UINT16 RevisionId; 2092 UINT16 SubsystemVendorId; 2093 UINT16 SubsystemDeviceId; 2094 UINT16 SubsystemRevisionId; 2095 UINT8 ValidFields; 2096 UINT8 ManufacturingLocation; 2097 UINT16 ManufacturingDate; 2098 UINT8 Reserved[2]; /* Reserved, must be zero */ 2099 UINT32 SerialNumber; 2100 UINT16 Code; 2101 UINT16 Windows; 2102 UINT64 WindowSize; 2103 UINT64 CommandOffset; 2104 UINT64 CommandSize; 2105 UINT64 StatusOffset; 2106 UINT64 StatusSize; 2107 UINT16 Flags; 2108 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2109 2110 } ACPI_NFIT_CONTROL_REGION; 2111 2112 /* Flags */ 2113 2114 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2115 2116 /* ValidFields bits */ 2117 2118 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2119 2120 2121 /* 5: NVDIMM Block Data Window Region Structure */ 2122 2123 typedef struct acpi_nfit_data_region 2124 { 2125 ACPI_NFIT_HEADER Header; 2126 UINT16 RegionIndex; 2127 UINT16 Windows; 2128 UINT64 Offset; 2129 UINT64 Size; 2130 UINT64 Capacity; 2131 UINT64 StartAddress; 2132 2133 } ACPI_NFIT_DATA_REGION; 2134 2135 2136 /* 6: Flush Hint Address Structure */ 2137 2138 typedef struct acpi_nfit_flush_address 2139 { 2140 ACPI_NFIT_HEADER Header; 2141 UINT32 DeviceHandle; 2142 UINT16 HintCount; 2143 UINT8 Reserved[6]; /* Reserved, must be zero */ 2144 UINT64 HintAddress[]; /* Variable length */ 2145 2146 } ACPI_NFIT_FLUSH_ADDRESS; 2147 2148 2149 /* 7: Platform Capabilities Structure */ 2150 2151 typedef struct acpi_nfit_capabilities 2152 { 2153 ACPI_NFIT_HEADER Header; 2154 UINT8 HighestCapability; 2155 UINT8 Reserved[3]; /* Reserved, must be zero */ 2156 UINT32 Capabilities; 2157 UINT32 Reserved2; 2158 2159 } ACPI_NFIT_CAPABILITIES; 2160 2161 /* Capabilities Flags */ 2162 2163 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2164 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2165 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2166 2167 2168 /* 2169 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2170 */ 2171 typedef struct nfit_device_handle 2172 { 2173 UINT32 Handle; 2174 2175 } NFIT_DEVICE_HANDLE; 2176 2177 /* Device handle construction and extraction macros */ 2178 2179 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2180 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2181 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2182 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2183 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2184 2185 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2186 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2187 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2188 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2189 #define ACPI_NFIT_NODE_ID_OFFSET 16 2190 2191 /* Macro to construct a NFIT/NVDIMM device handle */ 2192 2193 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2194 ((dimm) | \ 2195 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2196 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2197 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2198 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2199 2200 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2201 2202 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2203 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2204 2205 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2206 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2207 2208 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2209 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2210 2211 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2212 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2213 2214 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2215 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2216 2217 2218 /******************************************************************************* 2219 * 2220 * NHLT - Non HD Audio Link Table 2221 * 2222 * Conforms to: Intel Smart Sound Technology NHLT Specification 2223 * Version 0.8.1, January 2020. 2224 * 2225 ******************************************************************************/ 2226 2227 /* Main table */ 2228 2229 typedef struct acpi_table_nhlt 2230 { 2231 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2232 UINT8 EndpointCount; 2233 2234 } ACPI_TABLE_NHLT; 2235 2236 typedef struct acpi_table_nhlt_endpoint_count 2237 { 2238 UINT8 EndpointCount; 2239 2240 } ACPI_TABLE_NHLT_ENDPOINT_COUNT; 2241 2242 typedef struct acpi_nhlt_endpoint 2243 { 2244 UINT32 DescriptorLength; 2245 UINT8 LinkType; 2246 UINT8 InstanceId; 2247 UINT16 VendorId; 2248 UINT16 DeviceId; 2249 UINT16 RevisionId; 2250 UINT32 SubsystemId; 2251 UINT8 DeviceType; 2252 UINT8 Direction; 2253 UINT8 VirtualBusId; 2254 2255 } ACPI_NHLT_ENDPOINT; 2256 2257 /* Types for LinkType field above */ 2258 2259 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 2260 #define ACPI_NHLT_RESERVED_DSP 1 2261 #define ACPI_NHLT_PDM 2 2262 #define ACPI_NHLT_SSP 3 2263 #define ACPI_NHLT_RESERVED_SLIMBUS 4 2264 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 2265 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 2266 2267 /* All other values above are reserved */ 2268 2269 /* Values for DeviceId field above */ 2270 2271 #define ACPI_NHLT_PDM_DMIC 0xAE20 2272 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 2273 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 2274 2275 /* Values for DeviceType field above */ 2276 2277 /* SSP Link */ 2278 2279 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 2280 #define ACPI_NHLT_LINK_FM 1 2281 #define ACPI_NHLT_LINK_MODEM 2 2282 /* 3 is reserved */ 2283 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 2284 2285 /* PDM Link */ 2286 2287 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 2288 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 2289 2290 /* Values for Direction field above */ 2291 2292 #define ACPI_NHLT_DIR_RENDER 0 2293 #define ACPI_NHLT_DIR_CAPTURE 1 2294 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 2295 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 2296 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 2297 2298 /* Capabilities = 2 */ 2299 2300 typedef struct acpi_nhlt_device_specific_config 2301 { 2302 UINT32 CapabilitiesSize; 2303 UINT8 VirtualSlot; 2304 UINT8 ConfigType; 2305 2306 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 2307 2308 /* Capabilities = 3 */ 2309 2310 typedef struct acpi_nhlt_device_specific_config_a 2311 { 2312 UINT32 CapabilitiesSize; 2313 UINT8 VirtualSlot; 2314 UINT8 ConfigType; 2315 UINT8 ArrayType; 2316 2317 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 2318 2319 /* Capabilities = 3 */ 2320 2321 typedef struct acpi_nhlt_device_specific_config_d 2322 { 2323 UINT8 VirtualSlot; 2324 UINT8 ConfigType; 2325 UINT8 ArrayType; 2326 2327 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_D; 2328 2329 /* Values for Config Type above */ 2330 2331 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 2332 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 2333 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 2334 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 2335 2336 /* Capabilities = 0 */ 2337 2338 typedef struct acpi_nhlt_device_specific_config_b 2339 { 2340 UINT32 CapabilitiesSize; 2341 2342 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 2343 2344 /* Capabilities = 1 */ 2345 2346 typedef struct acpi_nhlt_device_specific_config_c 2347 { 2348 UINT32 CapabilitiesSize; 2349 UINT8 VirtualSlot; 2350 2351 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 2352 2353 typedef struct acpi_nhlt_render_device_specific_config 2354 { 2355 UINT32 CapabilitiesSize; 2356 UINT8 VirtualSlot; 2357 2358 } ACPI_NHLT_RENDER_DEVICE_SPECIFIC_CONFIG; 2359 2360 typedef struct acpi_nhlt_wave_extensible 2361 { 2362 UINT16 FormatTag; 2363 UINT16 ChannelCount; 2364 UINT32 SamplesPerSec; 2365 UINT32 AvgBytesPerSec; 2366 UINT16 BlockAlign; 2367 UINT16 BitsPerSample; 2368 UINT16 ExtraFormatSize; 2369 UINT16 ValidBitsPerSample; 2370 UINT32 ChannelMask; 2371 UINT8 SubFormatGuid[16]; 2372 2373 } ACPI_NHLT_WAVE_EXTENSIBLE; 2374 2375 /* Values for ChannelMask above */ 2376 2377 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2378 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2379 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2380 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2381 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2382 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2383 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2384 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2385 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2386 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2387 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2388 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2389 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2390 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2391 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2392 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2393 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2394 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2395 2396 typedef struct acpi_nhlt_format_config 2397 { 2398 ACPI_NHLT_WAVE_EXTENSIBLE Format; 2399 UINT32 CapabilitySize; 2400 UINT8 Capabilities[]; 2401 2402 } ACPI_NHLT_FORMAT_CONFIG; 2403 2404 typedef struct acpi_nhlt_formats_config 2405 { 2406 UINT8 FormatsCount; 2407 2408 } ACPI_NHLT_FORMATS_CONFIG; 2409 2410 typedef struct acpi_nhlt_device_specific_hdr 2411 { 2412 UINT8 VirtualSlot; 2413 UINT8 ConfigType; 2414 2415 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 2416 2417 /* Types for ConfigType above */ 2418 2419 #define ACPI_NHLT_GENERIC 0 2420 #define ACPI_NHLT_MIC 1 2421 #define ACPI_NHLT_RENDER 3 2422 2423 typedef struct acpi_nhlt_mic_device_specific_config 2424 { 2425 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 2426 UINT8 ArrayTypeExt; 2427 2428 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 2429 2430 /* Values for ArrayTypeExt above */ 2431 2432 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2433 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2434 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2435 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2436 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2437 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2438 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2439 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2440 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2441 2442 #define ACPI_NHLT_NO_EXTENSION 0x0 2443 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2444 2445 typedef struct acpi_nhlt_vendor_mic_count 2446 { 2447 UINT8 MicrophoneCount; 2448 2449 } ACPI_NHLT_VENDOR_MIC_COUNT; 2450 2451 typedef struct acpi_nhlt_vendor_mic_config 2452 { 2453 UINT8 Type; 2454 UINT8 Panel; 2455 UINT16 SpeakerPositionDistance; /* mm */ 2456 UINT16 HorizontalOffset; /* mm */ 2457 UINT16 VerticalOffset; /* mm */ 2458 UINT8 FrequencyLowBand; /* 5*Hz */ 2459 UINT8 FrequencyHighBand; /* 500*Hz */ 2460 UINT16 DirectionAngle; /* -180 - + 180 */ 2461 UINT16 ElevationAngle; /* -180 - + 180 */ 2462 UINT16 WorkVerticalAngleBegin; /* -180 - + 180 with 2 deg step */ 2463 UINT16 WorkVerticalAngleEnd; /* -180 - + 180 with 2 deg step */ 2464 UINT16 WorkHorizontalAngleBegin; /* -180 - + 180 with 2 deg step */ 2465 UINT16 WorkHorizontalAngleEnd; /* -180 - + 180 with 2 deg step */ 2466 2467 } ACPI_NHLT_VENDOR_MIC_CONFIG; 2468 2469 /* Values for Type field above */ 2470 2471 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2472 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2473 #define ACPI_NHLT_MIC_CARDIOID 2 2474 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2475 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2476 #define ACPI_NHLT_MIC_8_SHAPED 5 2477 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2478 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2479 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2480 2481 /* Values for Panel field above */ 2482 2483 #define ACPI_NHLT_MIC_POSITION_TOP 0 2484 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2485 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2486 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2487 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2488 #define ACPI_NHLT_MIC_POSITION_BACK 5 2489 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2490 2491 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2492 { 2493 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2494 UINT8 NumberOfMicrophones; 2495 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; /* Indexed by NumberOfMicrophones */ 2496 2497 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2498 2499 /* Microphone SNR and Sensitivity extension */ 2500 2501 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2502 { 2503 UINT32 SNR; 2504 UINT32 Sensitivity; 2505 2506 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2507 2508 /* Render device with feedback */ 2509 2510 typedef struct acpi_nhlt_render_feedback_device_specific_config 2511 { 2512 UINT8 FeedbackVirtualSlot; /* Render slot in case of capture */ 2513 UINT16 FeedbackChannels; /* Informative only */ 2514 UINT16 FeedbackValidBitsPerSample; 2515 2516 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2517 2518 /* Non documented structures */ 2519 2520 typedef struct acpi_nhlt_device_info_count 2521 { 2522 UINT8 StructureCount; 2523 2524 } ACPI_NHLT_DEVICE_INFO_COUNT; 2525 2526 typedef struct acpi_nhlt_device_info 2527 { 2528 UINT8 DeviceId[16]; 2529 UINT8 DeviceInstanceId; 2530 UINT8 DevicePortId; 2531 2532 } ACPI_NHLT_DEVICE_INFO; 2533 2534 2535 /******************************************************************************* 2536 * 2537 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2538 * Version 2 (ACPI 6.2) 2539 * 2540 ******************************************************************************/ 2541 2542 typedef struct acpi_table_pcct 2543 { 2544 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2545 UINT32 Flags; 2546 UINT64 Reserved; 2547 2548 } ACPI_TABLE_PCCT; 2549 2550 /* Values for Flags field above */ 2551 2552 #define ACPI_PCCT_DOORBELL 1 2553 2554 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2555 2556 enum AcpiPcctType 2557 { 2558 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2559 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2560 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2561 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2562 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2563 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2564 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2565 }; 2566 2567 /* 2568 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2569 */ 2570 2571 /* 0: Generic Communications Subspace */ 2572 2573 typedef struct acpi_pcct_subspace 2574 { 2575 ACPI_SUBTABLE_HEADER Header; 2576 UINT8 Reserved[6]; 2577 UINT64 BaseAddress; 2578 UINT64 Length; 2579 ACPI_GENERIC_ADDRESS DoorbellRegister; 2580 UINT64 PreserveMask; 2581 UINT64 WriteMask; 2582 UINT32 Latency; 2583 UINT32 MaxAccessRate; 2584 UINT16 MinTurnaroundTime; 2585 2586 } ACPI_PCCT_SUBSPACE; 2587 2588 2589 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2590 2591 typedef struct acpi_pcct_hw_reduced 2592 { 2593 ACPI_SUBTABLE_HEADER Header; 2594 UINT32 PlatformInterrupt; 2595 UINT8 Flags; 2596 UINT8 Reserved; 2597 UINT64 BaseAddress; 2598 UINT64 Length; 2599 ACPI_GENERIC_ADDRESS DoorbellRegister; 2600 UINT64 PreserveMask; 2601 UINT64 WriteMask; 2602 UINT32 Latency; 2603 UINT32 MaxAccessRate; 2604 UINT16 MinTurnaroundTime; 2605 2606 } ACPI_PCCT_HW_REDUCED; 2607 2608 2609 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2610 2611 typedef struct acpi_pcct_hw_reduced_type2 2612 { 2613 ACPI_SUBTABLE_HEADER Header; 2614 UINT32 PlatformInterrupt; 2615 UINT8 Flags; 2616 UINT8 Reserved; 2617 UINT64 BaseAddress; 2618 UINT64 Length; 2619 ACPI_GENERIC_ADDRESS DoorbellRegister; 2620 UINT64 PreserveMask; 2621 UINT64 WriteMask; 2622 UINT32 Latency; 2623 UINT32 MaxAccessRate; 2624 UINT16 MinTurnaroundTime; 2625 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2626 UINT64 AckPreserveMask; 2627 UINT64 AckWriteMask; 2628 2629 } ACPI_PCCT_HW_REDUCED_TYPE2; 2630 2631 2632 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2633 2634 typedef struct acpi_pcct_ext_pcc_master 2635 { 2636 ACPI_SUBTABLE_HEADER Header; 2637 UINT32 PlatformInterrupt; 2638 UINT8 Flags; 2639 UINT8 Reserved1; 2640 UINT64 BaseAddress; 2641 UINT32 Length; 2642 ACPI_GENERIC_ADDRESS DoorbellRegister; 2643 UINT64 PreserveMask; 2644 UINT64 WriteMask; 2645 UINT32 Latency; 2646 UINT32 MaxAccessRate; 2647 UINT32 MinTurnaroundTime; 2648 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2649 UINT64 AckPreserveMask; 2650 UINT64 AckSetMask; 2651 UINT64 Reserved2; 2652 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2653 UINT64 CmdCompleteMask; 2654 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2655 UINT64 CmdUpdatePreserveMask; 2656 UINT64 CmdUpdateSetMask; 2657 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2658 UINT64 ErrorStatusMask; 2659 2660 } ACPI_PCCT_EXT_PCC_MASTER; 2661 2662 2663 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2664 2665 typedef struct acpi_pcct_ext_pcc_slave 2666 { 2667 ACPI_SUBTABLE_HEADER Header; 2668 UINT32 PlatformInterrupt; 2669 UINT8 Flags; 2670 UINT8 Reserved1; 2671 UINT64 BaseAddress; 2672 UINT32 Length; 2673 ACPI_GENERIC_ADDRESS DoorbellRegister; 2674 UINT64 PreserveMask; 2675 UINT64 WriteMask; 2676 UINT32 Latency; 2677 UINT32 MaxAccessRate; 2678 UINT32 MinTurnaroundTime; 2679 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2680 UINT64 AckPreserveMask; 2681 UINT64 AckSetMask; 2682 UINT64 Reserved2; 2683 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2684 UINT64 CmdCompleteMask; 2685 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2686 UINT64 CmdUpdatePreserveMask; 2687 UINT64 CmdUpdateSetMask; 2688 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2689 UINT64 ErrorStatusMask; 2690 2691 } ACPI_PCCT_EXT_PCC_SLAVE; 2692 2693 /* 5: HW Registers based Communications Subspace */ 2694 2695 typedef struct acpi_pcct_hw_reg 2696 { 2697 ACPI_SUBTABLE_HEADER Header; 2698 UINT16 Version; 2699 UINT64 BaseAddress; 2700 UINT64 Length; 2701 ACPI_GENERIC_ADDRESS DoorbellRegister; 2702 UINT64 DoorbellPreserve; 2703 UINT64 DoorbellWrite; 2704 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2705 UINT64 CmdCompleteMask; 2706 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2707 UINT64 ErrorStatusMask; 2708 UINT32 NominalLatency; 2709 UINT32 MinTurnaroundTime; 2710 2711 } ACPI_PCCT_HW_REG; 2712 2713 2714 /* Values for doorbell flags above */ 2715 2716 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2717 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2718 2719 2720 /* 2721 * PCC memory structures (not part of the ACPI table) 2722 */ 2723 2724 /* Shared Memory Region */ 2725 2726 typedef struct acpi_pcct_shared_memory 2727 { 2728 UINT32 Signature; 2729 UINT16 Command; 2730 UINT16 Status; 2731 2732 } ACPI_PCCT_SHARED_MEMORY; 2733 2734 2735 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2736 2737 typedef struct acpi_pcct_ext_pcc_shared_memory 2738 { 2739 UINT32 Signature; 2740 UINT32 Flags; 2741 UINT32 Length; 2742 UINT32 Command; 2743 2744 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2745 2746 2747 /******************************************************************************* 2748 * 2749 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2750 * Version 0 2751 * 2752 ******************************************************************************/ 2753 2754 typedef struct acpi_table_pdtt 2755 { 2756 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2757 UINT8 TriggerCount; 2758 UINT8 Reserved[3]; 2759 UINT32 ArrayOffset; 2760 2761 } ACPI_TABLE_PDTT; 2762 2763 2764 /* 2765 * PDTT Communication Channel Identifier Structure. 2766 * The number of these structures is defined by TriggerCount above, 2767 * starting at ArrayOffset. 2768 */ 2769 typedef struct acpi_pdtt_channel 2770 { 2771 UINT8 SubchannelId; 2772 UINT8 Flags; 2773 2774 } ACPI_PDTT_CHANNEL; 2775 2776 /* Flags for above */ 2777 2778 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2779 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2780 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2781 2782 2783 /******************************************************************************* 2784 * 2785 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2786 * Version 1 2787 * 2788 ******************************************************************************/ 2789 2790 typedef struct acpi_table_phat 2791 { 2792 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2793 2794 } ACPI_TABLE_PHAT; 2795 2796 /* Common header for PHAT subtables that follow main table */ 2797 2798 typedef struct acpi_phat_header 2799 { 2800 UINT16 Type; 2801 UINT16 Length; 2802 UINT8 Revision; 2803 2804 } ACPI_PHAT_HEADER; 2805 2806 2807 /* Values for Type field above */ 2808 2809 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2810 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2811 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2812 2813 /* 2814 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2815 */ 2816 2817 /* 0: Firmware Version Data Record */ 2818 2819 typedef struct acpi_phat_version_data 2820 { 2821 ACPI_PHAT_HEADER Header; 2822 UINT8 Reserved[3]; 2823 UINT32 ElementCount; 2824 2825 } ACPI_PHAT_VERSION_DATA; 2826 2827 typedef struct acpi_phat_version_element 2828 { 2829 UINT8 Guid[16]; 2830 UINT64 VersionValue; 2831 UINT32 ProducerId; 2832 2833 } ACPI_PHAT_VERSION_ELEMENT; 2834 2835 2836 /* 1: Firmware Health Data Record */ 2837 2838 typedef struct acpi_phat_health_data 2839 { 2840 ACPI_PHAT_HEADER Header; 2841 UINT8 Reserved[2]; 2842 UINT8 Health; 2843 UINT8 DeviceGuid[16]; 2844 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2845 2846 } ACPI_PHAT_HEALTH_DATA; 2847 2848 /* Values for Health field above */ 2849 2850 #define ACPI_PHAT_ERRORS_FOUND 0 2851 #define ACPI_PHAT_NO_ERRORS 1 2852 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2853 #define ACPI_PHAT_ADVISORY 3 2854 2855 2856 /******************************************************************************* 2857 * 2858 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2859 * Version 1 2860 * 2861 ******************************************************************************/ 2862 2863 typedef struct acpi_table_pmtt 2864 { 2865 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2866 UINT32 MemoryDeviceCount; 2867 /* 2868 * Immediately followed by: 2869 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2870 */ 2871 2872 } ACPI_TABLE_PMTT; 2873 2874 2875 /* Common header for PMTT subtables that follow main table */ 2876 2877 typedef struct acpi_pmtt_header 2878 { 2879 UINT8 Type; 2880 UINT8 Reserved1; 2881 UINT16 Length; 2882 UINT16 Flags; 2883 UINT16 Reserved2; 2884 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2885 /* 2886 * Immediately followed by: 2887 * UINT8 TypeSpecificData[] 2888 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2889 */ 2890 2891 } ACPI_PMTT_HEADER; 2892 2893 /* Values for Type field above */ 2894 2895 #define ACPI_PMTT_TYPE_SOCKET 0 2896 #define ACPI_PMTT_TYPE_CONTROLLER 1 2897 #define ACPI_PMTT_TYPE_DIMM 2 2898 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2899 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2900 2901 /* Values for Flags field above */ 2902 2903 #define ACPI_PMTT_TOP_LEVEL 0x0001 2904 #define ACPI_PMTT_PHYSICAL 0x0002 2905 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2906 2907 2908 /* 2909 * PMTT subtables, correspond to Type in acpi_pmtt_header 2910 */ 2911 2912 2913 /* 0: Socket Structure */ 2914 2915 typedef struct acpi_pmtt_socket 2916 { 2917 ACPI_PMTT_HEADER Header; 2918 UINT16 SocketId; 2919 UINT16 Reserved; 2920 2921 } ACPI_PMTT_SOCKET; 2922 /* 2923 * Immediately followed by: 2924 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2925 */ 2926 2927 2928 /* 1: Memory Controller subtable */ 2929 2930 typedef struct acpi_pmtt_controller 2931 { 2932 ACPI_PMTT_HEADER Header; 2933 UINT16 ControllerId; 2934 UINT16 Reserved; 2935 2936 } ACPI_PMTT_CONTROLLER; 2937 /* 2938 * Immediately followed by: 2939 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2940 */ 2941 2942 2943 /* 2: Physical Component Identifier (DIMM) */ 2944 2945 typedef struct acpi_pmtt_physical_component 2946 { 2947 ACPI_PMTT_HEADER Header; 2948 UINT32 BiosHandle; 2949 2950 } ACPI_PMTT_PHYSICAL_COMPONENT; 2951 2952 2953 /* 0xFF: Vendor Specific Data */ 2954 2955 typedef struct acpi_pmtt_vendor_specific 2956 { 2957 ACPI_PMTT_HEADER Header; 2958 UINT8 TypeUuid[16]; 2959 UINT8 Specific[]; 2960 /* 2961 * Immediately followed by: 2962 * UINT8 VendorSpecificData[]; 2963 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2964 */ 2965 2966 } ACPI_PMTT_VENDOR_SPECIFIC; 2967 2968 2969 /******************************************************************************* 2970 * 2971 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2972 * Version 1 2973 * 2974 ******************************************************************************/ 2975 2976 typedef struct acpi_table_pptt 2977 { 2978 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2979 2980 } ACPI_TABLE_PPTT; 2981 2982 /* Values for Type field above */ 2983 2984 enum AcpiPpttType 2985 { 2986 ACPI_PPTT_TYPE_PROCESSOR = 0, 2987 ACPI_PPTT_TYPE_CACHE = 1, 2988 ACPI_PPTT_TYPE_ID = 2, 2989 ACPI_PPTT_TYPE_RESERVED = 3 2990 }; 2991 2992 2993 /* 0: Processor Hierarchy Node Structure */ 2994 2995 typedef struct acpi_pptt_processor 2996 { 2997 ACPI_SUBTABLE_HEADER Header; 2998 UINT16 Reserved; 2999 UINT32 Flags; 3000 UINT32 Parent; 3001 UINT32 AcpiProcessorId; 3002 UINT32 NumberOfPrivResources; 3003 3004 } ACPI_PPTT_PROCESSOR; 3005 3006 /* Flags */ 3007 3008 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 3009 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 3010 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 3011 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 3012 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 3013 3014 3015 /* 1: Cache Type Structure */ 3016 3017 typedef struct acpi_pptt_cache 3018 { 3019 ACPI_SUBTABLE_HEADER Header; 3020 UINT16 Reserved; 3021 UINT32 Flags; 3022 UINT32 NextLevelOfCache; 3023 UINT32 Size; 3024 UINT32 NumberOfSets; 3025 UINT8 Associativity; 3026 UINT8 Attributes; 3027 UINT16 LineSize; 3028 3029 } ACPI_PPTT_CACHE; 3030 3031 /* 1: Cache Type Structure for PPTT version 3 */ 3032 3033 typedef struct acpi_pptt_cache_v1 3034 { 3035 UINT32 CacheId; 3036 3037 } ACPI_PPTT_CACHE_V1; 3038 3039 3040 /* Flags */ 3041 3042 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 3043 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 3044 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 3045 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 3046 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 3047 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 3048 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 3049 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 3050 3051 /* Masks for Attributes */ 3052 3053 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 3054 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 3055 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 3056 3057 /* Attributes describing cache */ 3058 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 3059 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 3060 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 3061 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 3062 3063 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 3064 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 3065 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 3066 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 3067 3068 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 3069 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 3070 3071 /* 2: ID Structure */ 3072 3073 typedef struct acpi_pptt_id 3074 { 3075 ACPI_SUBTABLE_HEADER Header; 3076 UINT16 Reserved; 3077 UINT32 VendorId; 3078 UINT64 Level1Id; 3079 UINT64 Level2Id; 3080 UINT16 MajorRev; 3081 UINT16 MinorRev; 3082 UINT16 SpinRev; 3083 3084 } ACPI_PPTT_ID; 3085 3086 3087 /******************************************************************************* 3088 * 3089 * PRMT - Platform Runtime Mechanism Table 3090 * Version 1 3091 * 3092 ******************************************************************************/ 3093 3094 typedef struct acpi_table_prmt 3095 { 3096 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3097 3098 } ACPI_TABLE_PRMT; 3099 3100 typedef struct acpi_table_prmt_header 3101 { 3102 UINT8 PlatformGuid[16]; 3103 UINT32 ModuleInfoOffset; 3104 UINT32 ModuleInfoCount; 3105 3106 } ACPI_TABLE_PRMT_HEADER; 3107 3108 typedef struct acpi_prmt_module_header 3109 { 3110 UINT16 Revision; 3111 UINT16 Length; 3112 3113 } ACPI_PRMT_MODULE_HEADER; 3114 3115 typedef struct acpi_prmt_module_info 3116 { 3117 UINT16 Revision; 3118 UINT16 Length; 3119 UINT8 ModuleGuid[16]; 3120 UINT16 MajorRev; 3121 UINT16 MinorRev; 3122 UINT16 HandlerInfoCount; 3123 UINT32 HandlerInfoOffset; 3124 UINT64 MmioListPointer; 3125 3126 } ACPI_PRMT_MODULE_INFO; 3127 3128 typedef struct acpi_prmt_handler_info 3129 { 3130 UINT16 Revision; 3131 UINT16 Length; 3132 UINT8 HandlerGuid[16]; 3133 UINT64 HandlerAddress; 3134 UINT64 StaticDataBufferAddress; 3135 UINT64 AcpiParamBufferAddress; 3136 3137 } ACPI_PRMT_HANDLER_INFO; 3138 3139 3140 /******************************************************************************* 3141 * 3142 * RASF - RAS Feature Table (ACPI 5.0) 3143 * Version 1 3144 * 3145 ******************************************************************************/ 3146 3147 typedef struct acpi_table_rasf 3148 { 3149 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3150 UINT8 ChannelId[12]; 3151 3152 } ACPI_TABLE_RASF; 3153 3154 /* RASF Platform Communication Channel Shared Memory Region */ 3155 3156 typedef struct acpi_rasf_shared_memory 3157 { 3158 UINT32 Signature; 3159 UINT16 Command; 3160 UINT16 Status; 3161 UINT16 Version; 3162 UINT8 Capabilities[16]; 3163 UINT8 SetCapabilities[16]; 3164 UINT16 NumParameterBlocks; 3165 UINT32 SetCapabilitiesStatus; 3166 3167 } ACPI_RASF_SHARED_MEMORY; 3168 3169 /* RASF Parameter Block Structure Header */ 3170 3171 typedef struct acpi_rasf_parameter_block 3172 { 3173 UINT16 Type; 3174 UINT16 Version; 3175 UINT16 Length; 3176 3177 } ACPI_RASF_PARAMETER_BLOCK; 3178 3179 /* RASF Parameter Block Structure for PATROL_SCRUB */ 3180 3181 typedef struct acpi_rasf_patrol_scrub_parameter 3182 { 3183 ACPI_RASF_PARAMETER_BLOCK Header; 3184 UINT16 PatrolScrubCommand; 3185 UINT64 RequestedAddressRange[2]; 3186 UINT64 ActualAddressRange[2]; 3187 UINT16 Flags; 3188 UINT8 RequestedSpeed; 3189 3190 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 3191 3192 /* Masks for Flags and Speed fields above */ 3193 3194 #define ACPI_RASF_SCRUBBER_RUNNING 1 3195 #define ACPI_RASF_SPEED (7<<1) 3196 #define ACPI_RASF_SPEED_SLOW (0<<1) 3197 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 3198 #define ACPI_RASF_SPEED_FAST (7<<1) 3199 3200 /* Channel Commands */ 3201 3202 enum AcpiRasfCommands 3203 { 3204 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 3205 }; 3206 3207 /* Platform RAS Capabilities */ 3208 3209 enum AcpiRasfCapabiliities 3210 { 3211 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 3212 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 3213 }; 3214 3215 /* Patrol Scrub Commands */ 3216 3217 enum AcpiRasfPatrolScrubCommands 3218 { 3219 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 3220 ACPI_RASF_START_PATROL_SCRUBBER = 2, 3221 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 3222 }; 3223 3224 /* Channel Command flags */ 3225 3226 #define ACPI_RASF_GENERATE_SCI (1<<15) 3227 3228 /* Status values */ 3229 3230 enum AcpiRasfStatus 3231 { 3232 ACPI_RASF_SUCCESS = 0, 3233 ACPI_RASF_NOT_VALID = 1, 3234 ACPI_RASF_NOT_SUPPORTED = 2, 3235 ACPI_RASF_BUSY = 3, 3236 ACPI_RASF_FAILED = 4, 3237 ACPI_RASF_ABORTED = 5, 3238 ACPI_RASF_INVALID_DATA = 6 3239 }; 3240 3241 /* Status flags */ 3242 3243 #define ACPI_RASF_COMMAND_COMPLETE (1) 3244 #define ACPI_RASF_SCI_DOORBELL (1<<1) 3245 #define ACPI_RASF_ERROR (1<<2) 3246 #define ACPI_RASF_STATUS (0x1F<<3) 3247 3248 3249 /******************************************************************************* 3250 * 3251 * RGRT - Regulatory Graphics Resource Table 3252 * Version 1 3253 * 3254 * Conforms to "ACPI RGRT" available at: 3255 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3256 * 3257 ******************************************************************************/ 3258 3259 typedef struct acpi_table_rgrt 3260 { 3261 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3262 UINT16 Version; 3263 UINT8 ImageType; 3264 UINT8 Reserved; 3265 UINT8 Image[]; 3266 3267 } ACPI_TABLE_RGRT; 3268 3269 /* ImageType values */ 3270 3271 enum AcpiRgrtImageType 3272 { 3273 ACPI_RGRT_TYPE_RESERVED0 = 0, 3274 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3275 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3276 }; 3277 3278 3279 /******************************************************************************* 3280 * 3281 * RHCT - RISC-V Hart Capabilities Table 3282 * Version 1 3283 * 3284 ******************************************************************************/ 3285 3286 typedef struct acpi_table_rhct { 3287 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3288 UINT32 Reserved; 3289 UINT64 TimeBaseFreq; 3290 UINT32 NodeCount; 3291 UINT32 NodeOffset; 3292 } ACPI_TABLE_RHCT; 3293 3294 /* 3295 * RHCT subtables 3296 */ 3297 typedef struct acpi_rhct_node_header { 3298 UINT16 Type; 3299 UINT16 Length; 3300 UINT16 Revision; 3301 } ACPI_RHCT_NODE_HEADER; 3302 3303 /* Values for RHCT subtable Type above */ 3304 3305 enum acpi_rhct_node_type { 3306 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3307 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3308 }; 3309 3310 /* 3311 * RHCT node specific subtables 3312 */ 3313 3314 /* ISA string node structure */ 3315 typedef struct acpi_rhct_isa_string { 3316 UINT16 IsaLength; 3317 char Isa[]; 3318 } ACPI_RHCT_ISA_STRING; 3319 3320 /* Hart Info node structure */ 3321 typedef struct acpi_rhct_hart_info { 3322 UINT16 NumOffsets; 3323 UINT32 Uid; /* ACPI processor UID */ 3324 } ACPI_RHCT_HART_INFO; 3325 3326 /******************************************************************************* 3327 * 3328 * SBST - Smart Battery Specification Table 3329 * Version 1 3330 * 3331 ******************************************************************************/ 3332 3333 typedef struct acpi_table_sbst 3334 { 3335 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3336 UINT32 WarningLevel; 3337 UINT32 LowLevel; 3338 UINT32 CriticalLevel; 3339 3340 } ACPI_TABLE_SBST; 3341 3342 3343 /******************************************************************************* 3344 * 3345 * SDEI - Software Delegated Exception Interface Descriptor Table 3346 * 3347 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3348 * May 8th, 2017. Copyright 2017 ARM Ltd. 3349 * 3350 ******************************************************************************/ 3351 3352 typedef struct acpi_table_sdei 3353 { 3354 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3355 3356 } ACPI_TABLE_SDEI; 3357 3358 3359 /******************************************************************************* 3360 * 3361 * SDEV - Secure Devices Table (ACPI 6.2) 3362 * Version 1 3363 * 3364 ******************************************************************************/ 3365 3366 typedef struct acpi_table_sdev 3367 { 3368 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3369 3370 } ACPI_TABLE_SDEV; 3371 3372 3373 typedef struct acpi_sdev_header 3374 { 3375 UINT8 Type; 3376 UINT8 Flags; 3377 UINT16 Length; 3378 3379 } ACPI_SDEV_HEADER; 3380 3381 3382 /* Values for subtable type above */ 3383 3384 enum AcpiSdevType 3385 { 3386 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3387 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3388 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3389 }; 3390 3391 /* Values for flags above */ 3392 3393 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3394 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3395 3396 /* 3397 * SDEV subtables 3398 */ 3399 3400 /* 0: Namespace Device Based Secure Device Structure */ 3401 3402 typedef struct acpi_sdev_namespace 3403 { 3404 ACPI_SDEV_HEADER Header; 3405 UINT16 DeviceIdOffset; 3406 UINT16 DeviceIdLength; 3407 UINT16 VendorDataOffset; 3408 UINT16 VendorDataLength; 3409 3410 } ACPI_SDEV_NAMESPACE; 3411 3412 typedef struct acpi_sdev_secure_component 3413 { 3414 UINT16 SecureComponentOffset; 3415 UINT16 SecureComponentLength; 3416 3417 } ACPI_SDEV_SECURE_COMPONENT; 3418 3419 3420 /* 3421 * SDEV sub-subtables ("Components") for above 3422 */ 3423 typedef struct acpi_sdev_component 3424 { 3425 ACPI_SDEV_HEADER Header; 3426 3427 } ACPI_SDEV_COMPONENT; 3428 3429 3430 /* Values for sub-subtable type above */ 3431 3432 enum AcpiSacType 3433 { 3434 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3435 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3436 }; 3437 3438 typedef struct acpi_sdev_id_component 3439 { 3440 ACPI_SDEV_HEADER Header; 3441 UINT16 HardwareIdOffset; 3442 UINT16 HardwareIdLength; 3443 UINT16 SubsystemIdOffset; 3444 UINT16 SubsystemIdLength; 3445 UINT16 HardwareRevision; 3446 UINT8 HardwareRevPresent; 3447 UINT8 ClassCodePresent; 3448 UINT8 PciBaseClass; 3449 UINT8 PciSubClass; 3450 UINT8 PciProgrammingXface; 3451 3452 } ACPI_SDEV_ID_COMPONENT; 3453 3454 typedef struct acpi_sdev_mem_component 3455 { 3456 ACPI_SDEV_HEADER Header; 3457 UINT32 Reserved; 3458 UINT64 MemoryBaseAddress; 3459 UINT64 MemoryLength; 3460 3461 } ACPI_SDEV_MEM_COMPONENT; 3462 3463 3464 /* 1: PCIe Endpoint Device Based Device Structure */ 3465 3466 typedef struct acpi_sdev_pcie 3467 { 3468 ACPI_SDEV_HEADER Header; 3469 UINT16 Segment; 3470 UINT16 StartBus; 3471 UINT16 PathOffset; 3472 UINT16 PathLength; 3473 UINT16 VendorDataOffset; 3474 UINT16 VendorDataLength; 3475 3476 } ACPI_SDEV_PCIE; 3477 3478 /* 1a: PCIe Endpoint path entry */ 3479 3480 typedef struct acpi_sdev_pcie_path 3481 { 3482 UINT8 Device; 3483 UINT8 Function; 3484 3485 } ACPI_SDEV_PCIE_PATH; 3486 3487 3488 /******************************************************************************* 3489 * 3490 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3491 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3492 * Trust Domain Extensions (Intel TDX)". 3493 * Version 1 3494 * 3495 ******************************************************************************/ 3496 3497 typedef struct acpi_table_svkl 3498 { 3499 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3500 UINT32 Count; 3501 3502 } ACPI_TABLE_SVKL; 3503 3504 typedef struct acpi_svkl_key 3505 { 3506 UINT16 Type; 3507 UINT16 Format; 3508 UINT32 Size; 3509 UINT64 Address; 3510 3511 } ACPI_SVKL_KEY; 3512 3513 enum acpi_svkl_type 3514 { 3515 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3516 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3517 }; 3518 3519 enum acpi_svkl_format 3520 { 3521 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3522 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3523 }; 3524 3525 3526 /******************************************************************************* 3527 * 3528 * TDEL - TD-Event Log 3529 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3530 * Trust Domain Extensions (Intel TDX)". 3531 * September 2020 3532 * 3533 ******************************************************************************/ 3534 3535 typedef struct acpi_table_tdel 3536 { 3537 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3538 UINT32 Reserved; 3539 UINT64 LogAreaMinimumLength; 3540 UINT64 LogAreaStartAddress; 3541 3542 } ACPI_TABLE_TDEL; 3543 3544 /* Reset to default packing */ 3545 3546 #pragma pack() 3547 3548 #endif /* __ACTBL2_H__ */ 3549