1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2021, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 180 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 181 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 182 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 183 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 184 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 185 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 186 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 187 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 188 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 189 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 190 191 192 /* 193 * All tables must be byte-packed to match the ACPI specification, since 194 * the tables are provided by the system BIOS. 195 */ 196 #pragma pack(1) 197 198 /* 199 * Note: C bitfields are not used for this reason: 200 * 201 * "Bitfields are great and easy to read, but unfortunately the C language 202 * does not specify the layout of bitfields in memory, which means they are 203 * essentially useless for dealing with packed data in on-disk formats or 204 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 205 * this decision was a design error in C. Ritchie could have picked an order 206 * and stuck with it." Norman Ramsey. 207 * See http://stackoverflow.com/a/1053662/41661 208 */ 209 210 211 /******************************************************************************* 212 * 213 * IORT - IO Remapping Table 214 * 215 * Conforms to "IO Remapping Table System Software on ARM Platforms", 216 * Document number: ARM DEN 0049D, March 2018 217 * 218 ******************************************************************************/ 219 220 typedef struct acpi_table_iort 221 { 222 ACPI_TABLE_HEADER Header; 223 UINT32 NodeCount; 224 UINT32 NodeOffset; 225 UINT32 Reserved; 226 227 } ACPI_TABLE_IORT; 228 229 230 /* 231 * IORT subtables 232 */ 233 typedef struct acpi_iort_node 234 { 235 UINT8 Type; 236 UINT16 Length; 237 UINT8 Revision; 238 UINT32 Reserved; 239 UINT32 MappingCount; 240 UINT32 MappingOffset; 241 char NodeData[1]; 242 243 } ACPI_IORT_NODE; 244 245 /* Values for subtable Type above */ 246 247 enum AcpiIortNodeType 248 { 249 ACPI_IORT_NODE_ITS_GROUP = 0x00, 250 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 251 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 252 ACPI_IORT_NODE_SMMU = 0x03, 253 ACPI_IORT_NODE_SMMU_V3 = 0x04, 254 ACPI_IORT_NODE_PMCG = 0x05 255 }; 256 257 258 typedef struct acpi_iort_id_mapping 259 { 260 UINT32 InputBase; /* Lowest value in input range */ 261 UINT32 IdCount; /* Number of IDs */ 262 UINT32 OutputBase; /* Lowest value in output range */ 263 UINT32 OutputReference; /* A reference to the output node */ 264 UINT32 Flags; 265 266 } ACPI_IORT_ID_MAPPING; 267 268 /* Masks for Flags field above for IORT subtable */ 269 270 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 271 272 273 typedef struct acpi_iort_memory_access 274 { 275 UINT32 CacheCoherency; 276 UINT8 Hints; 277 UINT16 Reserved; 278 UINT8 MemoryFlags; 279 280 } ACPI_IORT_MEMORY_ACCESS; 281 282 /* Values for CacheCoherency field above */ 283 284 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 285 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 286 287 /* Masks for Hints field above */ 288 289 #define ACPI_IORT_HT_TRANSIENT (1) 290 #define ACPI_IORT_HT_WRITE (1<<1) 291 #define ACPI_IORT_HT_READ (1<<2) 292 #define ACPI_IORT_HT_OVERRIDE (1<<3) 293 294 /* Masks for MemoryFlags field above */ 295 296 #define ACPI_IORT_MF_COHERENCY (1) 297 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 298 299 300 /* 301 * IORT node specific subtables 302 */ 303 typedef struct acpi_iort_its_group 304 { 305 UINT32 ItsCount; 306 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 307 308 } ACPI_IORT_ITS_GROUP; 309 310 311 typedef struct acpi_iort_named_component 312 { 313 UINT32 NodeFlags; 314 UINT64 MemoryProperties; /* Memory access properties */ 315 UINT8 MemoryAddressLimit; /* Memory address size limit */ 316 char DeviceName[1]; /* Path of namespace object */ 317 318 } ACPI_IORT_NAMED_COMPONENT; 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 323 #define ACPI_IORT_NC_PASID_BITS (31<<1) 324 325 typedef struct acpi_iort_root_complex 326 { 327 UINT64 MemoryProperties; /* Memory access properties */ 328 UINT32 AtsAttribute; 329 UINT32 PciSegmentNumber; 330 UINT8 MemoryAddressLimit; /* Memory address size limit */ 331 UINT8 Reserved[3]; /* Reserved, must be zero */ 332 333 } ACPI_IORT_ROOT_COMPLEX; 334 335 /* Values for AtsAttribute field above */ 336 337 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 338 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 339 340 341 typedef struct acpi_iort_smmu 342 { 343 UINT64 BaseAddress; /* SMMU base address */ 344 UINT64 Span; /* Length of memory range */ 345 UINT32 Model; 346 UINT32 Flags; 347 UINT32 GlobalInterruptOffset; 348 UINT32 ContextInterruptCount; 349 UINT32 ContextInterruptOffset; 350 UINT32 PmuInterruptCount; 351 UINT32 PmuInterruptOffset; 352 UINT64 Interrupts[1]; /* Interrupt array */ 353 354 } ACPI_IORT_SMMU; 355 356 /* Values for Model field above */ 357 358 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 359 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 360 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 361 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 362 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 363 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 364 365 /* Masks for Flags field above */ 366 367 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 368 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 369 370 /* Global interrupt format */ 371 372 typedef struct acpi_iort_smmu_gsi 373 { 374 UINT32 NSgIrpt; 375 UINT32 NSgIrptFlags; 376 UINT32 NSgCfgIrpt; 377 UINT32 NSgCfgIrptFlags; 378 379 } ACPI_IORT_SMMU_GSI; 380 381 382 typedef struct acpi_iort_smmu_v3 383 { 384 UINT64 BaseAddress; /* SMMUv3 base address */ 385 UINT32 Flags; 386 UINT32 Reserved; 387 UINT64 VatosAddress; 388 UINT32 Model; 389 UINT32 EventGsiv; 390 UINT32 PriGsiv; 391 UINT32 GerrGsiv; 392 UINT32 SyncGsiv; 393 UINT32 Pxm; 394 UINT32 IdMappingIndex; 395 396 } ACPI_IORT_SMMU_V3; 397 398 /* Values for Model field above */ 399 400 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 401 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 402 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 403 404 /* Masks for Flags field above */ 405 406 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 407 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 408 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 409 410 typedef struct acpi_iort_pmcg 411 { 412 UINT64 Page0BaseAddress; 413 UINT32 OverflowGsiv; 414 UINT32 NodeReference; 415 UINT64 Page1BaseAddress; 416 417 } ACPI_IORT_PMCG; 418 419 420 /******************************************************************************* 421 * 422 * IVRS - I/O Virtualization Reporting Structure 423 * Version 1 424 * 425 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 426 * Revision 1.26, February 2009. 427 * 428 ******************************************************************************/ 429 430 typedef struct acpi_table_ivrs 431 { 432 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 433 UINT32 Info; /* Common virtualization info */ 434 UINT64 Reserved; 435 436 } ACPI_TABLE_IVRS; 437 438 /* Values for Info field above */ 439 440 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 441 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 442 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 443 444 445 /* IVRS subtable header */ 446 447 typedef struct acpi_ivrs_header 448 { 449 UINT8 Type; /* Subtable type */ 450 UINT8 Flags; 451 UINT16 Length; /* Subtable length */ 452 UINT16 DeviceId; /* ID of IOMMU */ 453 454 } ACPI_IVRS_HEADER; 455 456 /* Values for subtable Type above */ 457 458 enum AcpiIvrsType 459 { 460 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 461 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 462 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 463 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 464 ACPI_IVRS_TYPE_MEMORY3 = 0x22 465 }; 466 467 /* Masks for Flags field above for IVHD subtable */ 468 469 #define ACPI_IVHD_TT_ENABLE (1) 470 #define ACPI_IVHD_PASS_PW (1<<1) 471 #define ACPI_IVHD_RES_PASS_PW (1<<2) 472 #define ACPI_IVHD_ISOC (1<<3) 473 #define ACPI_IVHD_IOTLB (1<<4) 474 475 /* Masks for Flags field above for IVMD subtable */ 476 477 #define ACPI_IVMD_UNITY (1) 478 #define ACPI_IVMD_READ (1<<1) 479 #define ACPI_IVMD_WRITE (1<<2) 480 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 481 482 483 /* 484 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 485 */ 486 487 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 488 489 typedef struct acpi_ivrs_hardware_10 490 { 491 ACPI_IVRS_HEADER Header; 492 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 493 UINT64 BaseAddress; /* IOMMU control registers */ 494 UINT16 PciSegmentGroup; 495 UINT16 Info; /* MSI number and unit ID */ 496 UINT32 FeatureReporting; 497 498 } ACPI_IVRS_HARDWARE1; 499 500 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 501 502 typedef struct acpi_ivrs_hardware_11 503 { 504 ACPI_IVRS_HEADER Header; 505 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 506 UINT64 BaseAddress; /* IOMMU control registers */ 507 UINT16 PciSegmentGroup; 508 UINT16 Info; /* MSI number and unit ID */ 509 UINT32 Attributes; 510 UINT64 EfrRegisterImage; 511 UINT64 Reserved; 512 } ACPI_IVRS_HARDWARE2; 513 514 /* Masks for Info field above */ 515 516 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 517 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 518 519 520 /* 521 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 522 * Upper two bits of the Type field are the (encoded) length of the structure. 523 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 524 * are reserved for future use but not defined. 525 */ 526 typedef struct acpi_ivrs_de_header 527 { 528 UINT8 Type; 529 UINT16 Id; 530 UINT8 DataSetting; 531 532 } ACPI_IVRS_DE_HEADER; 533 534 /* Length of device entry is in the top two bits of Type field above */ 535 536 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 537 538 /* Values for device entry Type field above */ 539 540 enum AcpiIvrsDeviceEntryType 541 { 542 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 543 544 ACPI_IVRS_TYPE_PAD4 = 0, 545 ACPI_IVRS_TYPE_ALL = 1, 546 ACPI_IVRS_TYPE_SELECT = 2, 547 ACPI_IVRS_TYPE_START = 3, 548 ACPI_IVRS_TYPE_END = 4, 549 550 /* 8-byte device entries */ 551 552 ACPI_IVRS_TYPE_PAD8 = 64, 553 ACPI_IVRS_TYPE_NOT_USED = 65, 554 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 555 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 556 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 557 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 558 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */ 559 }; 560 561 /* Values for Data field above */ 562 563 #define ACPI_IVHD_INIT_PASS (1) 564 #define ACPI_IVHD_EINT_PASS (1<<1) 565 #define ACPI_IVHD_NMI_PASS (1<<2) 566 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 567 #define ACPI_IVHD_LINT0_PASS (1<<6) 568 #define ACPI_IVHD_LINT1_PASS (1<<7) 569 570 571 /* Types 0-4: 4-byte device entry */ 572 573 typedef struct acpi_ivrs_device4 574 { 575 ACPI_IVRS_DE_HEADER Header; 576 577 } ACPI_IVRS_DEVICE4; 578 579 /* Types 66-67: 8-byte device entry */ 580 581 typedef struct acpi_ivrs_device8a 582 { 583 ACPI_IVRS_DE_HEADER Header; 584 UINT8 Reserved1; 585 UINT16 UsedId; 586 UINT8 Reserved2; 587 588 } ACPI_IVRS_DEVICE8A; 589 590 /* Types 70-71: 8-byte device entry */ 591 592 typedef struct acpi_ivrs_device8b 593 { 594 ACPI_IVRS_DE_HEADER Header; 595 UINT32 ExtendedData; 596 597 } ACPI_IVRS_DEVICE8B; 598 599 /* Values for ExtendedData above */ 600 601 #define ACPI_IVHD_ATS_DISABLED (1<<31) 602 603 /* Type 72: 8-byte device entry */ 604 605 typedef struct acpi_ivrs_device8c 606 { 607 ACPI_IVRS_DE_HEADER Header; 608 UINT8 Handle; 609 UINT16 UsedId; 610 UINT8 Variety; 611 612 } ACPI_IVRS_DEVICE8C; 613 614 /* Values for Variety field above */ 615 616 #define ACPI_IVHD_IOAPIC 1 617 #define ACPI_IVHD_HPET 2 618 619 620 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 621 622 typedef struct acpi_ivrs_memory 623 { 624 ACPI_IVRS_HEADER Header; 625 UINT16 AuxData; 626 UINT64 Reserved; 627 UINT64 StartAddress; 628 UINT64 MemoryLength; 629 630 } ACPI_IVRS_MEMORY; 631 632 633 /******************************************************************************* 634 * 635 * LPIT - Low Power Idle Table 636 * 637 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 638 * 639 ******************************************************************************/ 640 641 typedef struct acpi_table_lpit 642 { 643 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 644 645 } ACPI_TABLE_LPIT; 646 647 648 /* LPIT subtable header */ 649 650 typedef struct acpi_lpit_header 651 { 652 UINT32 Type; /* Subtable type */ 653 UINT32 Length; /* Subtable length */ 654 UINT16 UniqueId; 655 UINT16 Reserved; 656 UINT32 Flags; 657 658 } ACPI_LPIT_HEADER; 659 660 /* Values for subtable Type above */ 661 662 enum AcpiLpitType 663 { 664 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 665 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 666 }; 667 668 /* Masks for Flags field above */ 669 670 #define ACPI_LPIT_STATE_DISABLED (1) 671 #define ACPI_LPIT_NO_COUNTER (1<<1) 672 673 /* 674 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 675 */ 676 677 /* 0x00: Native C-state instruction based LPI structure */ 678 679 typedef struct acpi_lpit_native 680 { 681 ACPI_LPIT_HEADER Header; 682 ACPI_GENERIC_ADDRESS EntryTrigger; 683 UINT32 Residency; 684 UINT32 Latency; 685 ACPI_GENERIC_ADDRESS ResidencyCounter; 686 UINT64 CounterFrequency; 687 688 } ACPI_LPIT_NATIVE; 689 690 691 /******************************************************************************* 692 * 693 * MADT - Multiple APIC Description Table 694 * Version 3 695 * 696 ******************************************************************************/ 697 698 typedef struct acpi_table_madt 699 { 700 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 701 UINT32 Address; /* Physical address of local APIC */ 702 UINT32 Flags; 703 704 } ACPI_TABLE_MADT; 705 706 /* Masks for Flags field above */ 707 708 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 709 710 /* Values for PCATCompat flag */ 711 712 #define ACPI_MADT_DUAL_PIC 1 713 #define ACPI_MADT_MULTIPLE_APIC 0 714 715 716 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 717 718 enum AcpiMadtType 719 { 720 ACPI_MADT_TYPE_LOCAL_APIC = 0, 721 ACPI_MADT_TYPE_IO_APIC = 1, 722 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 723 ACPI_MADT_TYPE_NMI_SOURCE = 3, 724 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 725 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 726 ACPI_MADT_TYPE_IO_SAPIC = 6, 727 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 728 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 729 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 730 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 731 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 732 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 733 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 734 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 735 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 736 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 737 }; 738 739 740 /* 741 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 742 */ 743 744 /* 0: Processor Local APIC */ 745 746 typedef struct acpi_madt_local_apic 747 { 748 ACPI_SUBTABLE_HEADER Header; 749 UINT8 ProcessorId; /* ACPI processor id */ 750 UINT8 Id; /* Processor's local APIC id */ 751 UINT32 LapicFlags; 752 753 } ACPI_MADT_LOCAL_APIC; 754 755 756 /* 1: IO APIC */ 757 758 typedef struct acpi_madt_io_apic 759 { 760 ACPI_SUBTABLE_HEADER Header; 761 UINT8 Id; /* I/O APIC ID */ 762 UINT8 Reserved; /* Reserved - must be zero */ 763 UINT32 Address; /* APIC physical address */ 764 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 765 766 } ACPI_MADT_IO_APIC; 767 768 769 /* 2: Interrupt Override */ 770 771 typedef struct acpi_madt_interrupt_override 772 { 773 ACPI_SUBTABLE_HEADER Header; 774 UINT8 Bus; /* 0 - ISA */ 775 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 776 UINT32 GlobalIrq; /* Global system interrupt */ 777 UINT16 IntiFlags; 778 779 } ACPI_MADT_INTERRUPT_OVERRIDE; 780 781 782 /* 3: NMI Source */ 783 784 typedef struct acpi_madt_nmi_source 785 { 786 ACPI_SUBTABLE_HEADER Header; 787 UINT16 IntiFlags; 788 UINT32 GlobalIrq; /* Global system interrupt */ 789 790 } ACPI_MADT_NMI_SOURCE; 791 792 793 /* 4: Local APIC NMI */ 794 795 typedef struct acpi_madt_local_apic_nmi 796 { 797 ACPI_SUBTABLE_HEADER Header; 798 UINT8 ProcessorId; /* ACPI processor id */ 799 UINT16 IntiFlags; 800 UINT8 Lint; /* LINTn to which NMI is connected */ 801 802 } ACPI_MADT_LOCAL_APIC_NMI; 803 804 805 /* 5: Address Override */ 806 807 typedef struct acpi_madt_local_apic_override 808 { 809 ACPI_SUBTABLE_HEADER Header; 810 UINT16 Reserved; /* Reserved, must be zero */ 811 UINT64 Address; /* APIC physical address */ 812 813 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 814 815 816 /* 6: I/O Sapic */ 817 818 typedef struct acpi_madt_io_sapic 819 { 820 ACPI_SUBTABLE_HEADER Header; 821 UINT8 Id; /* I/O SAPIC ID */ 822 UINT8 Reserved; /* Reserved, must be zero */ 823 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 824 UINT64 Address; /* SAPIC physical address */ 825 826 } ACPI_MADT_IO_SAPIC; 827 828 829 /* 7: Local Sapic */ 830 831 typedef struct acpi_madt_local_sapic 832 { 833 ACPI_SUBTABLE_HEADER Header; 834 UINT8 ProcessorId; /* ACPI processor id */ 835 UINT8 Id; /* SAPIC ID */ 836 UINT8 Eid; /* SAPIC EID */ 837 UINT8 Reserved[3]; /* Reserved, must be zero */ 838 UINT32 LapicFlags; 839 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 840 char UidString[1]; /* String UID - ACPI 3.0 */ 841 842 } ACPI_MADT_LOCAL_SAPIC; 843 844 845 /* 8: Platform Interrupt Source */ 846 847 typedef struct acpi_madt_interrupt_source 848 { 849 ACPI_SUBTABLE_HEADER Header; 850 UINT16 IntiFlags; 851 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 852 UINT8 Id; /* Processor ID */ 853 UINT8 Eid; /* Processor EID */ 854 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 855 UINT32 GlobalIrq; /* Global system interrupt */ 856 UINT32 Flags; /* Interrupt Source Flags */ 857 858 } ACPI_MADT_INTERRUPT_SOURCE; 859 860 /* Masks for Flags field above */ 861 862 #define ACPI_MADT_CPEI_OVERRIDE (1) 863 864 865 /* 9: Processor Local X2APIC (ACPI 4.0) */ 866 867 typedef struct acpi_madt_local_x2apic 868 { 869 ACPI_SUBTABLE_HEADER Header; 870 UINT16 Reserved; /* Reserved - must be zero */ 871 UINT32 LocalApicId; /* Processor x2APIC ID */ 872 UINT32 LapicFlags; 873 UINT32 Uid; /* ACPI processor UID */ 874 875 } ACPI_MADT_LOCAL_X2APIC; 876 877 878 /* 10: Local X2APIC NMI (ACPI 4.0) */ 879 880 typedef struct acpi_madt_local_x2apic_nmi 881 { 882 ACPI_SUBTABLE_HEADER Header; 883 UINT16 IntiFlags; 884 UINT32 Uid; /* ACPI processor UID */ 885 UINT8 Lint; /* LINTn to which NMI is connected */ 886 UINT8 Reserved[3]; /* Reserved - must be zero */ 887 888 } ACPI_MADT_LOCAL_X2APIC_NMI; 889 890 891 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 892 893 typedef struct acpi_madt_generic_interrupt 894 { 895 ACPI_SUBTABLE_HEADER Header; 896 UINT16 Reserved; /* Reserved - must be zero */ 897 UINT32 CpuInterfaceNumber; 898 UINT32 Uid; 899 UINT32 Flags; 900 UINT32 ParkingVersion; 901 UINT32 PerformanceInterrupt; 902 UINT64 ParkedAddress; 903 UINT64 BaseAddress; 904 UINT64 GicvBaseAddress; 905 UINT64 GichBaseAddress; 906 UINT32 VgicInterrupt; 907 UINT64 GicrBaseAddress; 908 UINT64 ArmMpidr; 909 UINT8 EfficiencyClass; 910 UINT8 Reserved2[1]; 911 UINT16 SpeInterrupt; /* ACPI 6.3 */ 912 913 } ACPI_MADT_GENERIC_INTERRUPT; 914 915 /* Masks for Flags field above */ 916 917 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 918 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 919 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 920 921 922 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 923 924 typedef struct acpi_madt_generic_distributor 925 { 926 ACPI_SUBTABLE_HEADER Header; 927 UINT16 Reserved; /* Reserved - must be zero */ 928 UINT32 GicId; 929 UINT64 BaseAddress; 930 UINT32 GlobalIrqBase; 931 UINT8 Version; 932 UINT8 Reserved2[3]; /* Reserved - must be zero */ 933 934 } ACPI_MADT_GENERIC_DISTRIBUTOR; 935 936 /* Values for Version field above */ 937 938 enum AcpiMadtGicVersion 939 { 940 ACPI_MADT_GIC_VERSION_NONE = 0, 941 ACPI_MADT_GIC_VERSION_V1 = 1, 942 ACPI_MADT_GIC_VERSION_V2 = 2, 943 ACPI_MADT_GIC_VERSION_V3 = 3, 944 ACPI_MADT_GIC_VERSION_V4 = 4, 945 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 946 }; 947 948 949 /* 13: Generic MSI Frame (ACPI 5.1) */ 950 951 typedef struct acpi_madt_generic_msi_frame 952 { 953 ACPI_SUBTABLE_HEADER Header; 954 UINT16 Reserved; /* Reserved - must be zero */ 955 UINT32 MsiFrameId; 956 UINT64 BaseAddress; 957 UINT32 Flags; 958 UINT16 SpiCount; 959 UINT16 SpiBase; 960 961 } ACPI_MADT_GENERIC_MSI_FRAME; 962 963 /* Masks for Flags field above */ 964 965 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 966 967 968 /* 14: Generic Redistributor (ACPI 5.1) */ 969 970 typedef struct acpi_madt_generic_redistributor 971 { 972 ACPI_SUBTABLE_HEADER Header; 973 UINT16 Reserved; /* reserved - must be zero */ 974 UINT64 BaseAddress; 975 UINT32 Length; 976 977 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 978 979 980 /* 15: Generic Translator (ACPI 6.0) */ 981 982 typedef struct acpi_madt_generic_translator 983 { 984 ACPI_SUBTABLE_HEADER Header; 985 UINT16 Reserved; /* reserved - must be zero */ 986 UINT32 TranslationId; 987 UINT64 BaseAddress; 988 UINT32 Reserved2; 989 990 } ACPI_MADT_GENERIC_TRANSLATOR; 991 992 993 /* 994 * Common flags fields for MADT subtables 995 */ 996 997 /* MADT Local APIC flags */ 998 999 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1000 1001 /* MADT MPS INTI flags (IntiFlags) */ 1002 1003 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1004 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1005 1006 /* Values for MPS INTI flags */ 1007 1008 #define ACPI_MADT_POLARITY_CONFORMS 0 1009 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1010 #define ACPI_MADT_POLARITY_RESERVED 2 1011 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1012 1013 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1014 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1015 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1016 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1017 1018 1019 /******************************************************************************* 1020 * 1021 * MCFG - PCI Memory Mapped Configuration table and subtable 1022 * Version 1 1023 * 1024 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1025 * 1026 ******************************************************************************/ 1027 1028 typedef struct acpi_table_mcfg 1029 { 1030 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1031 UINT8 Reserved[8]; 1032 1033 } ACPI_TABLE_MCFG; 1034 1035 1036 /* Subtable */ 1037 1038 typedef struct acpi_mcfg_allocation 1039 { 1040 UINT64 Address; /* Base address, processor-relative */ 1041 UINT16 PciSegment; /* PCI segment group number */ 1042 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1043 UINT8 EndBusNumber; /* Final PCI Bus number */ 1044 UINT32 Reserved; 1045 1046 } ACPI_MCFG_ALLOCATION; 1047 1048 1049 /******************************************************************************* 1050 * 1051 * MCHI - Management Controller Host Interface Table 1052 * Version 1 1053 * 1054 * Conforms to "Management Component Transport Protocol (MCTP) Host 1055 * Interface Specification", Revision 1.0.0a, October 13, 2009 1056 * 1057 ******************************************************************************/ 1058 1059 typedef struct acpi_table_mchi 1060 { 1061 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1062 UINT8 InterfaceType; 1063 UINT8 Protocol; 1064 UINT64 ProtocolData; 1065 UINT8 InterruptType; 1066 UINT8 Gpe; 1067 UINT8 PciDeviceFlag; 1068 UINT32 GlobalInterrupt; 1069 ACPI_GENERIC_ADDRESS ControlRegister; 1070 UINT8 PciSegment; 1071 UINT8 PciBus; 1072 UINT8 PciDevice; 1073 UINT8 PciFunction; 1074 1075 } ACPI_TABLE_MCHI; 1076 1077 1078 /******************************************************************************* 1079 * 1080 * MPST - Memory Power State Table (ACPI 5.0) 1081 * Version 1 1082 * 1083 ******************************************************************************/ 1084 1085 #define ACPI_MPST_CHANNEL_INFO \ 1086 UINT8 ChannelId; \ 1087 UINT8 Reserved1[3]; \ 1088 UINT16 PowerNodeCount; \ 1089 UINT16 Reserved2; 1090 1091 /* Main table */ 1092 1093 typedef struct acpi_table_mpst 1094 { 1095 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1096 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1097 1098 } ACPI_TABLE_MPST; 1099 1100 1101 /* Memory Platform Communication Channel Info */ 1102 1103 typedef struct acpi_mpst_channel 1104 { 1105 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1106 1107 } ACPI_MPST_CHANNEL; 1108 1109 1110 /* Memory Power Node Structure */ 1111 1112 typedef struct acpi_mpst_power_node 1113 { 1114 UINT8 Flags; 1115 UINT8 Reserved1; 1116 UINT16 NodeId; 1117 UINT32 Length; 1118 UINT64 RangeAddress; 1119 UINT64 RangeLength; 1120 UINT32 NumPowerStates; 1121 UINT32 NumPhysicalComponents; 1122 1123 } ACPI_MPST_POWER_NODE; 1124 1125 /* Values for Flags field above */ 1126 1127 #define ACPI_MPST_ENABLED 1 1128 #define ACPI_MPST_POWER_MANAGED 2 1129 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1130 1131 1132 /* Memory Power State Structure (follows POWER_NODE above) */ 1133 1134 typedef struct acpi_mpst_power_state 1135 { 1136 UINT8 PowerState; 1137 UINT8 InfoIndex; 1138 1139 } ACPI_MPST_POWER_STATE; 1140 1141 1142 /* Physical Component ID Structure (follows POWER_STATE above) */ 1143 1144 typedef struct acpi_mpst_component 1145 { 1146 UINT16 ComponentId; 1147 1148 } ACPI_MPST_COMPONENT; 1149 1150 1151 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1152 1153 typedef struct acpi_mpst_data_hdr 1154 { 1155 UINT16 CharacteristicsCount; 1156 UINT16 Reserved; 1157 1158 } ACPI_MPST_DATA_HDR; 1159 1160 typedef struct acpi_mpst_power_data 1161 { 1162 UINT8 StructureId; 1163 UINT8 Flags; 1164 UINT16 Reserved1; 1165 UINT32 AveragePower; 1166 UINT32 PowerSaving; 1167 UINT64 ExitLatency; 1168 UINT64 Reserved2; 1169 1170 } ACPI_MPST_POWER_DATA; 1171 1172 /* Values for Flags field above */ 1173 1174 #define ACPI_MPST_PRESERVE 1 1175 #define ACPI_MPST_AUTOENTRY 2 1176 #define ACPI_MPST_AUTOEXIT 4 1177 1178 1179 /* Shared Memory Region (not part of an ACPI table) */ 1180 1181 typedef struct acpi_mpst_shared 1182 { 1183 UINT32 Signature; 1184 UINT16 PccCommand; 1185 UINT16 PccStatus; 1186 UINT32 CommandRegister; 1187 UINT32 StatusRegister; 1188 UINT32 PowerStateId; 1189 UINT32 PowerNodeId; 1190 UINT64 EnergyConsumed; 1191 UINT64 AveragePower; 1192 1193 } ACPI_MPST_SHARED; 1194 1195 1196 /******************************************************************************* 1197 * 1198 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1199 * Version 1 1200 * 1201 ******************************************************************************/ 1202 1203 typedef struct acpi_table_msct 1204 { 1205 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1206 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1207 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1208 UINT32 MaxClockDomains; /* Max number of clock domains */ 1209 UINT64 MaxAddress; /* Max physical address in system */ 1210 1211 } ACPI_TABLE_MSCT; 1212 1213 1214 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1215 1216 typedef struct acpi_msct_proximity 1217 { 1218 UINT8 Revision; 1219 UINT8 Length; 1220 UINT32 RangeStart; /* Start of domain range */ 1221 UINT32 RangeEnd; /* End of domain range */ 1222 UINT32 ProcessorCapacity; 1223 UINT64 MemoryCapacity; /* In bytes */ 1224 1225 } ACPI_MSCT_PROXIMITY; 1226 1227 1228 /******************************************************************************* 1229 * 1230 * MSDM - Microsoft Data Management table 1231 * 1232 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1233 * November 29, 2011. Copyright 2011 Microsoft 1234 * 1235 ******************************************************************************/ 1236 1237 /* Basic MSDM table is only the common ACPI header */ 1238 1239 typedef struct acpi_table_msdm 1240 { 1241 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1242 1243 } ACPI_TABLE_MSDM; 1244 1245 1246 /******************************************************************************* 1247 * 1248 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1249 * Version 1 1250 * 1251 ******************************************************************************/ 1252 1253 typedef struct acpi_table_nfit 1254 { 1255 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1256 UINT32 Reserved; /* Reserved, must be zero */ 1257 1258 } ACPI_TABLE_NFIT; 1259 1260 /* Subtable header for NFIT */ 1261 1262 typedef struct acpi_nfit_header 1263 { 1264 UINT16 Type; 1265 UINT16 Length; 1266 1267 } ACPI_NFIT_HEADER; 1268 1269 1270 /* Values for subtable type in ACPI_NFIT_HEADER */ 1271 1272 enum AcpiNfitType 1273 { 1274 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1275 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1276 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1277 ACPI_NFIT_TYPE_SMBIOS = 3, 1278 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1279 ACPI_NFIT_TYPE_DATA_REGION = 5, 1280 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1281 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1282 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1283 }; 1284 1285 /* 1286 * NFIT Subtables 1287 */ 1288 1289 /* 0: System Physical Address Range Structure */ 1290 1291 typedef struct acpi_nfit_system_address 1292 { 1293 ACPI_NFIT_HEADER Header; 1294 UINT16 RangeIndex; 1295 UINT16 Flags; 1296 UINT32 Reserved; /* Reserved, must be zero */ 1297 UINT32 ProximityDomain; 1298 UINT8 RangeGuid[16]; 1299 UINT64 Address; 1300 UINT64 Length; 1301 UINT64 MemoryMapping; 1302 1303 } ACPI_NFIT_SYSTEM_ADDRESS; 1304 1305 /* Flags */ 1306 1307 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1308 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1309 1310 /* Range Type GUIDs appear in the include/acuuid.h file */ 1311 1312 1313 /* 1: Memory Device to System Address Range Map Structure */ 1314 1315 typedef struct acpi_nfit_memory_map 1316 { 1317 ACPI_NFIT_HEADER Header; 1318 UINT32 DeviceHandle; 1319 UINT16 PhysicalId; 1320 UINT16 RegionId; 1321 UINT16 RangeIndex; 1322 UINT16 RegionIndex; 1323 UINT64 RegionSize; 1324 UINT64 RegionOffset; 1325 UINT64 Address; 1326 UINT16 InterleaveIndex; 1327 UINT16 InterleaveWays; 1328 UINT16 Flags; 1329 UINT16 Reserved; /* Reserved, must be zero */ 1330 1331 } ACPI_NFIT_MEMORY_MAP; 1332 1333 /* Flags */ 1334 1335 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1336 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1337 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1338 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1339 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1340 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1341 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1342 1343 1344 /* 2: Interleave Structure */ 1345 1346 typedef struct acpi_nfit_interleave 1347 { 1348 ACPI_NFIT_HEADER Header; 1349 UINT16 InterleaveIndex; 1350 UINT16 Reserved; /* Reserved, must be zero */ 1351 UINT32 LineCount; 1352 UINT32 LineSize; 1353 UINT32 LineOffset[1]; /* Variable length */ 1354 1355 } ACPI_NFIT_INTERLEAVE; 1356 1357 1358 /* 3: SMBIOS Management Information Structure */ 1359 1360 typedef struct acpi_nfit_smbios 1361 { 1362 ACPI_NFIT_HEADER Header; 1363 UINT32 Reserved; /* Reserved, must be zero */ 1364 UINT8 Data[1]; /* Variable length */ 1365 1366 } ACPI_NFIT_SMBIOS; 1367 1368 1369 /* 4: NVDIMM Control Region Structure */ 1370 1371 typedef struct acpi_nfit_control_region 1372 { 1373 ACPI_NFIT_HEADER Header; 1374 UINT16 RegionIndex; 1375 UINT16 VendorId; 1376 UINT16 DeviceId; 1377 UINT16 RevisionId; 1378 UINT16 SubsystemVendorId; 1379 UINT16 SubsystemDeviceId; 1380 UINT16 SubsystemRevisionId; 1381 UINT8 ValidFields; 1382 UINT8 ManufacturingLocation; 1383 UINT16 ManufacturingDate; 1384 UINT8 Reserved[2]; /* Reserved, must be zero */ 1385 UINT32 SerialNumber; 1386 UINT16 Code; 1387 UINT16 Windows; 1388 UINT64 WindowSize; 1389 UINT64 CommandOffset; 1390 UINT64 CommandSize; 1391 UINT64 StatusOffset; 1392 UINT64 StatusSize; 1393 UINT16 Flags; 1394 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1395 1396 } ACPI_NFIT_CONTROL_REGION; 1397 1398 /* Flags */ 1399 1400 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1401 1402 /* ValidFields bits */ 1403 1404 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1405 1406 1407 /* 5: NVDIMM Block Data Window Region Structure */ 1408 1409 typedef struct acpi_nfit_data_region 1410 { 1411 ACPI_NFIT_HEADER Header; 1412 UINT16 RegionIndex; 1413 UINT16 Windows; 1414 UINT64 Offset; 1415 UINT64 Size; 1416 UINT64 Capacity; 1417 UINT64 StartAddress; 1418 1419 } ACPI_NFIT_DATA_REGION; 1420 1421 1422 /* 6: Flush Hint Address Structure */ 1423 1424 typedef struct acpi_nfit_flush_address 1425 { 1426 ACPI_NFIT_HEADER Header; 1427 UINT32 DeviceHandle; 1428 UINT16 HintCount; 1429 UINT8 Reserved[6]; /* Reserved, must be zero */ 1430 UINT64 HintAddress[1]; /* Variable length */ 1431 1432 } ACPI_NFIT_FLUSH_ADDRESS; 1433 1434 1435 /* 7: Platform Capabilities Structure */ 1436 1437 typedef struct acpi_nfit_capabilities 1438 { 1439 ACPI_NFIT_HEADER Header; 1440 UINT8 HighestCapability; 1441 UINT8 Reserved[3]; /* Reserved, must be zero */ 1442 UINT32 Capabilities; 1443 UINT32 Reserved2; 1444 1445 } ACPI_NFIT_CAPABILITIES; 1446 1447 /* Capabilities Flags */ 1448 1449 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1450 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1451 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1452 1453 1454 /* 1455 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1456 */ 1457 typedef struct nfit_device_handle 1458 { 1459 UINT32 Handle; 1460 1461 } NFIT_DEVICE_HANDLE; 1462 1463 /* Device handle construction and extraction macros */ 1464 1465 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1466 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1467 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1468 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1469 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1470 1471 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1472 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1473 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1474 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1475 #define ACPI_NFIT_NODE_ID_OFFSET 16 1476 1477 /* Macro to construct a NFIT/NVDIMM device handle */ 1478 1479 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1480 ((dimm) | \ 1481 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1482 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1483 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1484 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1485 1486 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1487 1488 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1489 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1490 1491 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1492 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1493 1494 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1495 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1496 1497 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1498 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1499 1500 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1501 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1502 1503 1504 /******************************************************************************* 1505 * 1506 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1507 * Version 2 (ACPI 6.2) 1508 * 1509 ******************************************************************************/ 1510 1511 typedef struct acpi_table_pcct 1512 { 1513 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1514 UINT32 Flags; 1515 UINT64 Reserved; 1516 1517 } ACPI_TABLE_PCCT; 1518 1519 /* Values for Flags field above */ 1520 1521 #define ACPI_PCCT_DOORBELL 1 1522 1523 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1524 1525 enum AcpiPcctType 1526 { 1527 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1528 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1529 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1530 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1531 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1532 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1533 }; 1534 1535 /* 1536 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1537 */ 1538 1539 /* 0: Generic Communications Subspace */ 1540 1541 typedef struct acpi_pcct_subspace 1542 { 1543 ACPI_SUBTABLE_HEADER Header; 1544 UINT8 Reserved[6]; 1545 UINT64 BaseAddress; 1546 UINT64 Length; 1547 ACPI_GENERIC_ADDRESS DoorbellRegister; 1548 UINT64 PreserveMask; 1549 UINT64 WriteMask; 1550 UINT32 Latency; 1551 UINT32 MaxAccessRate; 1552 UINT16 MinTurnaroundTime; 1553 1554 } ACPI_PCCT_SUBSPACE; 1555 1556 1557 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1558 1559 typedef struct acpi_pcct_hw_reduced 1560 { 1561 ACPI_SUBTABLE_HEADER Header; 1562 UINT32 PlatformInterrupt; 1563 UINT8 Flags; 1564 UINT8 Reserved; 1565 UINT64 BaseAddress; 1566 UINT64 Length; 1567 ACPI_GENERIC_ADDRESS DoorbellRegister; 1568 UINT64 PreserveMask; 1569 UINT64 WriteMask; 1570 UINT32 Latency; 1571 UINT32 MaxAccessRate; 1572 UINT16 MinTurnaroundTime; 1573 1574 } ACPI_PCCT_HW_REDUCED; 1575 1576 1577 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1578 1579 typedef struct acpi_pcct_hw_reduced_type2 1580 { 1581 ACPI_SUBTABLE_HEADER Header; 1582 UINT32 PlatformInterrupt; 1583 UINT8 Flags; 1584 UINT8 Reserved; 1585 UINT64 BaseAddress; 1586 UINT64 Length; 1587 ACPI_GENERIC_ADDRESS DoorbellRegister; 1588 UINT64 PreserveMask; 1589 UINT64 WriteMask; 1590 UINT32 Latency; 1591 UINT32 MaxAccessRate; 1592 UINT16 MinTurnaroundTime; 1593 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1594 UINT64 AckPreserveMask; 1595 UINT64 AckWriteMask; 1596 1597 } ACPI_PCCT_HW_REDUCED_TYPE2; 1598 1599 1600 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1601 1602 typedef struct acpi_pcct_ext_pcc_master 1603 { 1604 ACPI_SUBTABLE_HEADER Header; 1605 UINT32 PlatformInterrupt; 1606 UINT8 Flags; 1607 UINT8 Reserved1; 1608 UINT64 BaseAddress; 1609 UINT32 Length; 1610 ACPI_GENERIC_ADDRESS DoorbellRegister; 1611 UINT64 PreserveMask; 1612 UINT64 WriteMask; 1613 UINT32 Latency; 1614 UINT32 MaxAccessRate; 1615 UINT32 MinTurnaroundTime; 1616 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1617 UINT64 AckPreserveMask; 1618 UINT64 AckSetMask; 1619 UINT64 Reserved2; 1620 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1621 UINT64 CmdCompleteMask; 1622 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1623 UINT64 CmdUpdatePreserveMask; 1624 UINT64 CmdUpdateSetMask; 1625 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1626 UINT64 ErrorStatusMask; 1627 1628 } ACPI_PCCT_EXT_PCC_MASTER; 1629 1630 1631 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1632 1633 typedef struct acpi_pcct_ext_pcc_slave 1634 { 1635 ACPI_SUBTABLE_HEADER Header; 1636 UINT32 PlatformInterrupt; 1637 UINT8 Flags; 1638 UINT8 Reserved1; 1639 UINT64 BaseAddress; 1640 UINT32 Length; 1641 ACPI_GENERIC_ADDRESS DoorbellRegister; 1642 UINT64 PreserveMask; 1643 UINT64 WriteMask; 1644 UINT32 Latency; 1645 UINT32 MaxAccessRate; 1646 UINT32 MinTurnaroundTime; 1647 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1648 UINT64 AckPreserveMask; 1649 UINT64 AckSetMask; 1650 UINT64 Reserved2; 1651 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1652 UINT64 CmdCompleteMask; 1653 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1654 UINT64 CmdUpdatePreserveMask; 1655 UINT64 CmdUpdateSetMask; 1656 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1657 UINT64 ErrorStatusMask; 1658 1659 } ACPI_PCCT_EXT_PCC_SLAVE; 1660 1661 1662 /* Values for doorbell flags above */ 1663 1664 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1665 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1666 1667 1668 /* 1669 * PCC memory structures (not part of the ACPI table) 1670 */ 1671 1672 /* Shared Memory Region */ 1673 1674 typedef struct acpi_pcct_shared_memory 1675 { 1676 UINT32 Signature; 1677 UINT16 Command; 1678 UINT16 Status; 1679 1680 } ACPI_PCCT_SHARED_MEMORY; 1681 1682 1683 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1684 1685 typedef struct acpi_pcct_ext_pcc_shared_memory 1686 { 1687 UINT32 Signature; 1688 UINT32 Flags; 1689 UINT32 Length; 1690 UINT32 Command; 1691 1692 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1693 1694 1695 /******************************************************************************* 1696 * 1697 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1698 * Version 0 1699 * 1700 ******************************************************************************/ 1701 1702 typedef struct acpi_table_pdtt 1703 { 1704 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1705 UINT8 TriggerCount; 1706 UINT8 Reserved[3]; 1707 UINT32 ArrayOffset; 1708 1709 } ACPI_TABLE_PDTT; 1710 1711 1712 /* 1713 * PDTT Communication Channel Identifier Structure. 1714 * The number of these structures is defined by TriggerCount above, 1715 * starting at ArrayOffset. 1716 */ 1717 typedef struct acpi_pdtt_channel 1718 { 1719 UINT8 SubchannelId; 1720 UINT8 Flags; 1721 1722 } ACPI_PDTT_CHANNEL; 1723 1724 /* Flags for above */ 1725 1726 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1727 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1728 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1729 1730 1731 /******************************************************************************* 1732 * 1733 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1734 * Version 1 1735 * 1736 ******************************************************************************/ 1737 1738 typedef struct acpi_table_pmtt 1739 { 1740 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1741 UINT32 Reserved; 1742 1743 } ACPI_TABLE_PMTT; 1744 1745 1746 /* Common header for PMTT subtables that follow main table */ 1747 1748 typedef struct acpi_pmtt_header 1749 { 1750 UINT8 Type; 1751 UINT8 Reserved1; 1752 UINT16 Length; 1753 UINT16 Flags; 1754 UINT16 Reserved2; 1755 1756 } ACPI_PMTT_HEADER; 1757 1758 /* Values for Type field above */ 1759 1760 #define ACPI_PMTT_TYPE_SOCKET 0 1761 #define ACPI_PMTT_TYPE_CONTROLLER 1 1762 #define ACPI_PMTT_TYPE_DIMM 2 1763 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1764 1765 /* Values for Flags field above */ 1766 1767 #define ACPI_PMTT_TOP_LEVEL 0x0001 1768 #define ACPI_PMTT_PHYSICAL 0x0002 1769 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1770 1771 1772 /* 1773 * PMTT subtables, correspond to Type in acpi_pmtt_header 1774 */ 1775 1776 1777 /* 0: Socket Structure */ 1778 1779 typedef struct acpi_pmtt_socket 1780 { 1781 ACPI_PMTT_HEADER Header; 1782 UINT16 SocketId; 1783 UINT16 Reserved; 1784 1785 } ACPI_PMTT_SOCKET; 1786 1787 1788 /* 1: Memory Controller subtable */ 1789 1790 typedef struct acpi_pmtt_controller 1791 { 1792 ACPI_PMTT_HEADER Header; 1793 UINT32 ReadLatency; 1794 UINT32 WriteLatency; 1795 UINT32 ReadBandwidth; 1796 UINT32 WriteBandwidth; 1797 UINT16 AccessWidth; 1798 UINT16 Alignment; 1799 UINT16 Reserved; 1800 UINT16 DomainCount; 1801 1802 } ACPI_PMTT_CONTROLLER; 1803 1804 /* 1a: Proximity Domain substructure */ 1805 1806 typedef struct acpi_pmtt_domain 1807 { 1808 UINT32 ProximityDomain; 1809 1810 } ACPI_PMTT_DOMAIN; 1811 1812 1813 /* 2: Physical Component Identifier (DIMM) */ 1814 1815 typedef struct acpi_pmtt_physical_component 1816 { 1817 ACPI_PMTT_HEADER Header; 1818 UINT16 ComponentId; 1819 UINT16 Reserved; 1820 UINT32 MemorySize; 1821 UINT32 BiosHandle; 1822 1823 } ACPI_PMTT_PHYSICAL_COMPONENT; 1824 1825 1826 /******************************************************************************* 1827 * 1828 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1829 * Version 1 1830 * 1831 ******************************************************************************/ 1832 1833 typedef struct acpi_table_pptt 1834 { 1835 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1836 1837 } ACPI_TABLE_PPTT; 1838 1839 /* Values for Type field above */ 1840 1841 enum AcpiPpttType 1842 { 1843 ACPI_PPTT_TYPE_PROCESSOR = 0, 1844 ACPI_PPTT_TYPE_CACHE = 1, 1845 ACPI_PPTT_TYPE_ID = 2, 1846 ACPI_PPTT_TYPE_RESERVED = 3 1847 }; 1848 1849 1850 /* 0: Processor Hierarchy Node Structure */ 1851 1852 typedef struct acpi_pptt_processor 1853 { 1854 ACPI_SUBTABLE_HEADER Header; 1855 UINT16 Reserved; 1856 UINT32 Flags; 1857 UINT32 Parent; 1858 UINT32 AcpiProcessorId; 1859 UINT32 NumberOfPrivResources; 1860 1861 } ACPI_PPTT_PROCESSOR; 1862 1863 /* Flags */ 1864 1865 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1866 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1867 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1868 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1869 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1870 1871 1872 /* 1: Cache Type Structure */ 1873 1874 typedef struct acpi_pptt_cache 1875 { 1876 ACPI_SUBTABLE_HEADER Header; 1877 UINT16 Reserved; 1878 UINT32 Flags; 1879 UINT32 NextLevelOfCache; 1880 UINT32 Size; 1881 UINT32 NumberOfSets; 1882 UINT8 Associativity; 1883 UINT8 Attributes; 1884 UINT16 LineSize; 1885 1886 } ACPI_PPTT_CACHE; 1887 1888 /* Flags */ 1889 1890 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1891 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1892 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1893 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1894 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1895 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1896 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1897 1898 /* Masks for Attributes */ 1899 1900 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1901 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1902 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1903 1904 /* Attributes describing cache */ 1905 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1906 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1907 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1908 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1909 1910 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1911 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1912 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1913 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1914 1915 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1916 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1917 1918 /* 2: ID Structure */ 1919 1920 typedef struct acpi_pptt_id 1921 { 1922 ACPI_SUBTABLE_HEADER Header; 1923 UINT16 Reserved; 1924 UINT32 VendorId; 1925 UINT64 Level1Id; 1926 UINT64 Level2Id; 1927 UINT16 MajorRev; 1928 UINT16 MinorRev; 1929 UINT16 SpinRev; 1930 1931 } ACPI_PPTT_ID; 1932 1933 1934 /******************************************************************************* 1935 * 1936 * RASF - RAS Feature Table (ACPI 5.0) 1937 * Version 1 1938 * 1939 ******************************************************************************/ 1940 1941 typedef struct acpi_table_rasf 1942 { 1943 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1944 UINT8 ChannelId[12]; 1945 1946 } ACPI_TABLE_RASF; 1947 1948 /* RASF Platform Communication Channel Shared Memory Region */ 1949 1950 typedef struct acpi_rasf_shared_memory 1951 { 1952 UINT32 Signature; 1953 UINT16 Command; 1954 UINT16 Status; 1955 UINT16 Version; 1956 UINT8 Capabilities[16]; 1957 UINT8 SetCapabilities[16]; 1958 UINT16 NumParameterBlocks; 1959 UINT32 SetCapabilitiesStatus; 1960 1961 } ACPI_RASF_SHARED_MEMORY; 1962 1963 /* RASF Parameter Block Structure Header */ 1964 1965 typedef struct acpi_rasf_parameter_block 1966 { 1967 UINT16 Type; 1968 UINT16 Version; 1969 UINT16 Length; 1970 1971 } ACPI_RASF_PARAMETER_BLOCK; 1972 1973 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1974 1975 typedef struct acpi_rasf_patrol_scrub_parameter 1976 { 1977 ACPI_RASF_PARAMETER_BLOCK Header; 1978 UINT16 PatrolScrubCommand; 1979 UINT64 RequestedAddressRange[2]; 1980 UINT64 ActualAddressRange[2]; 1981 UINT16 Flags; 1982 UINT8 RequestedSpeed; 1983 1984 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 1985 1986 /* Masks for Flags and Speed fields above */ 1987 1988 #define ACPI_RASF_SCRUBBER_RUNNING 1 1989 #define ACPI_RASF_SPEED (7<<1) 1990 #define ACPI_RASF_SPEED_SLOW (0<<1) 1991 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1992 #define ACPI_RASF_SPEED_FAST (7<<1) 1993 1994 /* Channel Commands */ 1995 1996 enum AcpiRasfCommands 1997 { 1998 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1999 }; 2000 2001 /* Platform RAS Capabilities */ 2002 2003 enum AcpiRasfCapabiliities 2004 { 2005 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2006 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2007 }; 2008 2009 /* Patrol Scrub Commands */ 2010 2011 enum AcpiRasfPatrolScrubCommands 2012 { 2013 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2014 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2015 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2016 }; 2017 2018 /* Channel Command flags */ 2019 2020 #define ACPI_RASF_GENERATE_SCI (1<<15) 2021 2022 /* Status values */ 2023 2024 enum AcpiRasfStatus 2025 { 2026 ACPI_RASF_SUCCESS = 0, 2027 ACPI_RASF_NOT_VALID = 1, 2028 ACPI_RASF_NOT_SUPPORTED = 2, 2029 ACPI_RASF_BUSY = 3, 2030 ACPI_RASF_FAILED = 4, 2031 ACPI_RASF_ABORTED = 5, 2032 ACPI_RASF_INVALID_DATA = 6 2033 }; 2034 2035 /* Status flags */ 2036 2037 #define ACPI_RASF_COMMAND_COMPLETE (1) 2038 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2039 #define ACPI_RASF_ERROR (1<<2) 2040 #define ACPI_RASF_STATUS (0x1F<<3) 2041 2042 2043 /******************************************************************************* 2044 * 2045 * SBST - Smart Battery Specification Table 2046 * Version 1 2047 * 2048 ******************************************************************************/ 2049 2050 typedef struct acpi_table_sbst 2051 { 2052 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2053 UINT32 WarningLevel; 2054 UINT32 LowLevel; 2055 UINT32 CriticalLevel; 2056 2057 } ACPI_TABLE_SBST; 2058 2059 2060 /******************************************************************************* 2061 * 2062 * SDEI - Software Delegated Exception Interface Descriptor Table 2063 * 2064 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2065 * May 8th, 2017. Copyright 2017 ARM Ltd. 2066 * 2067 ******************************************************************************/ 2068 2069 typedef struct acpi_table_sdei 2070 { 2071 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2072 2073 } ACPI_TABLE_SDEI; 2074 2075 2076 /******************************************************************************* 2077 * 2078 * SDEV - Secure Devices Table (ACPI 6.2) 2079 * Version 1 2080 * 2081 ******************************************************************************/ 2082 2083 typedef struct acpi_table_sdev 2084 { 2085 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2086 2087 } ACPI_TABLE_SDEV; 2088 2089 2090 typedef struct acpi_sdev_header 2091 { 2092 UINT8 Type; 2093 UINT8 Flags; 2094 UINT16 Length; 2095 2096 } ACPI_SDEV_HEADER; 2097 2098 2099 /* Values for subtable type above */ 2100 2101 enum AcpiSdevType 2102 { 2103 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2104 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2105 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2106 }; 2107 2108 /* Values for flags above */ 2109 2110 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2111 2112 /* 2113 * SDEV subtables 2114 */ 2115 2116 /* 0: Namespace Device Based Secure Device Structure */ 2117 2118 typedef struct acpi_sdev_namespace 2119 { 2120 ACPI_SDEV_HEADER Header; 2121 UINT16 DeviceIdOffset; 2122 UINT16 DeviceIdLength; 2123 UINT16 VendorDataOffset; 2124 UINT16 VendorDataLength; 2125 2126 } ACPI_SDEV_NAMESPACE; 2127 2128 /* 1: PCIe Endpoint Device Based Device Structure */ 2129 2130 typedef struct acpi_sdev_pcie 2131 { 2132 ACPI_SDEV_HEADER Header; 2133 UINT16 Segment; 2134 UINT16 StartBus; 2135 UINT16 PathOffset; 2136 UINT16 PathLength; 2137 UINT16 VendorDataOffset; 2138 UINT16 VendorDataLength; 2139 2140 } ACPI_SDEV_PCIE; 2141 2142 /* 1a: PCIe Endpoint path entry */ 2143 2144 typedef struct acpi_sdev_pcie_path 2145 { 2146 UINT8 Device; 2147 UINT8 Function; 2148 2149 } ACPI_SDEV_PCIE_PATH; 2150 2151 2152 /* Reset to default packing */ 2153 2154 #pragma pack() 2155 2156 #endif /* __ACTBL2_H__ */ 2157