1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 180 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 182 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 183 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 184 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 185 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 186 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 187 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 188 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 189 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 190 191 192 /* 193 * All tables must be byte-packed to match the ACPI specification, since 194 * the tables are provided by the system BIOS. 195 */ 196 #pragma pack(1) 197 198 /* 199 * Note: C bitfields are not used for this reason: 200 * 201 * "Bitfields are great and easy to read, but unfortunately the C language 202 * does not specify the layout of bitfields in memory, which means they are 203 * essentially useless for dealing with packed data in on-disk formats or 204 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 205 * this decision was a design error in C. Ritchie could have picked an order 206 * and stuck with it." Norman Ramsey. 207 * See http://stackoverflow.com/a/1053662/41661 208 */ 209 210 211 /******************************************************************************* 212 * 213 * IORT - IO Remapping Table 214 * 215 * Conforms to "IO Remapping Table System Software on ARM Platforms", 216 * Document number: ARM DEN 0049C, May 2017 217 * 218 ******************************************************************************/ 219 220 typedef struct acpi_table_iort 221 { 222 ACPI_TABLE_HEADER Header; 223 UINT32 NodeCount; 224 UINT32 NodeOffset; 225 UINT32 Reserved; 226 227 } ACPI_TABLE_IORT; 228 229 230 /* 231 * IORT subtables 232 */ 233 typedef struct acpi_iort_node 234 { 235 UINT8 Type; 236 UINT16 Length; 237 UINT8 Revision; 238 UINT32 Reserved; 239 UINT32 MappingCount; 240 UINT32 MappingOffset; 241 char NodeData[1]; 242 243 } ACPI_IORT_NODE; 244 245 /* Values for subtable Type above */ 246 247 enum AcpiIortNodeType 248 { 249 ACPI_IORT_NODE_ITS_GROUP = 0x00, 250 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 251 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 252 ACPI_IORT_NODE_SMMU = 0x03, 253 ACPI_IORT_NODE_SMMU_V3 = 0x04 254 }; 255 256 257 typedef struct acpi_iort_id_mapping 258 { 259 UINT32 InputBase; /* Lowest value in input range */ 260 UINT32 IdCount; /* Number of IDs */ 261 UINT32 OutputBase; /* Lowest value in output range */ 262 UINT32 OutputReference; /* A reference to the output node */ 263 UINT32 Flags; 264 265 } ACPI_IORT_ID_MAPPING; 266 267 /* Masks for Flags field above for IORT subtable */ 268 269 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 270 271 272 typedef struct acpi_iort_memory_access 273 { 274 UINT32 CacheCoherency; 275 UINT8 Hints; 276 UINT16 Reserved; 277 UINT8 MemoryFlags; 278 279 } ACPI_IORT_MEMORY_ACCESS; 280 281 /* Values for CacheCoherency field above */ 282 283 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 284 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 285 286 /* Masks for Hints field above */ 287 288 #define ACPI_IORT_HT_TRANSIENT (1) 289 #define ACPI_IORT_HT_WRITE (1<<1) 290 #define ACPI_IORT_HT_READ (1<<2) 291 #define ACPI_IORT_HT_OVERRIDE (1<<3) 292 293 /* Masks for MemoryFlags field above */ 294 295 #define ACPI_IORT_MF_COHERENCY (1) 296 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 297 298 299 /* 300 * IORT node specific subtables 301 */ 302 typedef struct acpi_iort_its_group 303 { 304 UINT32 ItsCount; 305 UINT32 Identifiers[1]; /* GIC ITS identifier arrary */ 306 307 } ACPI_IORT_ITS_GROUP; 308 309 310 typedef struct acpi_iort_named_component 311 { 312 UINT32 NodeFlags; 313 UINT64 MemoryProperties; /* Memory access properties */ 314 UINT8 MemoryAddressLimit; /* Memory address size limit */ 315 char DeviceName[1]; /* Path of namespace object */ 316 317 } ACPI_IORT_NAMED_COMPONENT; 318 319 320 typedef struct acpi_iort_root_complex 321 { 322 UINT64 MemoryProperties; /* Memory access properties */ 323 UINT32 AtsAttribute; 324 UINT32 PciSegmentNumber; 325 326 } ACPI_IORT_ROOT_COMPLEX; 327 328 /* Values for AtsAttribute field above */ 329 330 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 331 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 332 333 334 typedef struct acpi_iort_smmu 335 { 336 UINT64 BaseAddress; /* SMMU base address */ 337 UINT64 Span; /* Length of memory range */ 338 UINT32 Model; 339 UINT32 Flags; 340 UINT32 GlobalInterruptOffset; 341 UINT32 ContextInterruptCount; 342 UINT32 ContextInterruptOffset; 343 UINT32 PmuInterruptCount; 344 UINT32 PmuInterruptOffset; 345 UINT64 Interrupts[1]; /* Interrupt array */ 346 347 } ACPI_IORT_SMMU; 348 349 /* Values for Model field above */ 350 351 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 352 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 353 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 354 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 355 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 356 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 357 358 /* Masks for Flags field above */ 359 360 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 361 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 362 363 /* Global interrupt format */ 364 365 typedef struct acpi_iort_smmu_gsi 366 { 367 UINT32 NSgIrpt; 368 UINT32 NSgIrptFlags; 369 UINT32 NSgCfgIrpt; 370 UINT32 NSgCfgIrptFlags; 371 372 } ACPI_IORT_SMMU_GSI; 373 374 375 typedef struct acpi_iort_smmu_v3 376 { 377 UINT64 BaseAddress; /* SMMUv3 base address */ 378 UINT32 Flags; 379 UINT32 Reserved; 380 UINT64 VatosAddress; 381 UINT32 Model; 382 UINT32 EventGsiv; 383 UINT32 PriGsiv; 384 UINT32 GerrGsiv; 385 UINT32 SyncGsiv; 386 UINT8 Pxm; 387 UINT8 Reserved1; 388 UINT16 Reserved2; 389 UINT32 IdMappingIndex; 390 391 } ACPI_IORT_SMMU_V3; 392 393 /* Values for Model field above */ 394 395 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 396 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 397 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 398 399 /* Masks for Flags field above */ 400 401 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 402 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) 403 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 404 405 406 /******************************************************************************* 407 * 408 * IVRS - I/O Virtualization Reporting Structure 409 * Version 1 410 * 411 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 412 * Revision 1.26, February 2009. 413 * 414 ******************************************************************************/ 415 416 typedef struct acpi_table_ivrs 417 { 418 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 419 UINT32 Info; /* Common virtualization info */ 420 UINT64 Reserved; 421 422 } ACPI_TABLE_IVRS; 423 424 /* Values for Info field above */ 425 426 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 427 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 428 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 429 430 431 /* IVRS subtable header */ 432 433 typedef struct acpi_ivrs_header 434 { 435 UINT8 Type; /* Subtable type */ 436 UINT8 Flags; 437 UINT16 Length; /* Subtable length */ 438 UINT16 DeviceId; /* ID of IOMMU */ 439 440 } ACPI_IVRS_HEADER; 441 442 /* Values for subtable Type above */ 443 444 enum AcpiIvrsType 445 { 446 ACPI_IVRS_TYPE_HARDWARE = 0x10, 447 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 448 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 449 ACPI_IVRS_TYPE_MEMORY3 = 0x22 450 }; 451 452 /* Masks for Flags field above for IVHD subtable */ 453 454 #define ACPI_IVHD_TT_ENABLE (1) 455 #define ACPI_IVHD_PASS_PW (1<<1) 456 #define ACPI_IVHD_RES_PASS_PW (1<<2) 457 #define ACPI_IVHD_ISOC (1<<3) 458 #define ACPI_IVHD_IOTLB (1<<4) 459 460 /* Masks for Flags field above for IVMD subtable */ 461 462 #define ACPI_IVMD_UNITY (1) 463 #define ACPI_IVMD_READ (1<<1) 464 #define ACPI_IVMD_WRITE (1<<2) 465 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 466 467 468 /* 469 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 470 */ 471 472 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 473 474 typedef struct acpi_ivrs_hardware 475 { 476 ACPI_IVRS_HEADER Header; 477 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 478 UINT64 BaseAddress; /* IOMMU control registers */ 479 UINT16 PciSegmentGroup; 480 UINT16 Info; /* MSI number and unit ID */ 481 UINT32 Reserved; 482 483 } ACPI_IVRS_HARDWARE; 484 485 /* Masks for Info field above */ 486 487 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 488 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 489 490 491 /* 492 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 493 * Upper two bits of the Type field are the (encoded) length of the structure. 494 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 495 * are reserved for future use but not defined. 496 */ 497 typedef struct acpi_ivrs_de_header 498 { 499 UINT8 Type; 500 UINT16 Id; 501 UINT8 DataSetting; 502 503 } ACPI_IVRS_DE_HEADER; 504 505 /* Length of device entry is in the top two bits of Type field above */ 506 507 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 508 509 /* Values for device entry Type field above */ 510 511 enum AcpiIvrsDeviceEntryType 512 { 513 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 514 515 ACPI_IVRS_TYPE_PAD4 = 0, 516 ACPI_IVRS_TYPE_ALL = 1, 517 ACPI_IVRS_TYPE_SELECT = 2, 518 ACPI_IVRS_TYPE_START = 3, 519 ACPI_IVRS_TYPE_END = 4, 520 521 /* 8-byte device entries */ 522 523 ACPI_IVRS_TYPE_PAD8 = 64, 524 ACPI_IVRS_TYPE_NOT_USED = 65, 525 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 526 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 527 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 528 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 529 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */ 530 }; 531 532 /* Values for Data field above */ 533 534 #define ACPI_IVHD_INIT_PASS (1) 535 #define ACPI_IVHD_EINT_PASS (1<<1) 536 #define ACPI_IVHD_NMI_PASS (1<<2) 537 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 538 #define ACPI_IVHD_LINT0_PASS (1<<6) 539 #define ACPI_IVHD_LINT1_PASS (1<<7) 540 541 542 /* Types 0-4: 4-byte device entry */ 543 544 typedef struct acpi_ivrs_device4 545 { 546 ACPI_IVRS_DE_HEADER Header; 547 548 } ACPI_IVRS_DEVICE4; 549 550 /* Types 66-67: 8-byte device entry */ 551 552 typedef struct acpi_ivrs_device8a 553 { 554 ACPI_IVRS_DE_HEADER Header; 555 UINT8 Reserved1; 556 UINT16 UsedId; 557 UINT8 Reserved2; 558 559 } ACPI_IVRS_DEVICE8A; 560 561 /* Types 70-71: 8-byte device entry */ 562 563 typedef struct acpi_ivrs_device8b 564 { 565 ACPI_IVRS_DE_HEADER Header; 566 UINT32 ExtendedData; 567 568 } ACPI_IVRS_DEVICE8B; 569 570 /* Values for ExtendedData above */ 571 572 #define ACPI_IVHD_ATS_DISABLED (1<<31) 573 574 /* Type 72: 8-byte device entry */ 575 576 typedef struct acpi_ivrs_device8c 577 { 578 ACPI_IVRS_DE_HEADER Header; 579 UINT8 Handle; 580 UINT16 UsedId; 581 UINT8 Variety; 582 583 } ACPI_IVRS_DEVICE8C; 584 585 /* Values for Variety field above */ 586 587 #define ACPI_IVHD_IOAPIC 1 588 #define ACPI_IVHD_HPET 2 589 590 591 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 592 593 typedef struct acpi_ivrs_memory 594 { 595 ACPI_IVRS_HEADER Header; 596 UINT16 AuxData; 597 UINT64 Reserved; 598 UINT64 StartAddress; 599 UINT64 MemoryLength; 600 601 } ACPI_IVRS_MEMORY; 602 603 604 /******************************************************************************* 605 * 606 * LPIT - Low Power Idle Table 607 * 608 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 609 * 610 ******************************************************************************/ 611 612 typedef struct acpi_table_lpit 613 { 614 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 615 616 } ACPI_TABLE_LPIT; 617 618 619 /* LPIT subtable header */ 620 621 typedef struct acpi_lpit_header 622 { 623 UINT32 Type; /* Subtable type */ 624 UINT32 Length; /* Subtable length */ 625 UINT16 UniqueId; 626 UINT16 Reserved; 627 UINT32 Flags; 628 629 } ACPI_LPIT_HEADER; 630 631 /* Values for subtable Type above */ 632 633 enum AcpiLpitType 634 { 635 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 636 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 637 }; 638 639 /* Masks for Flags field above */ 640 641 #define ACPI_LPIT_STATE_DISABLED (1) 642 #define ACPI_LPIT_NO_COUNTER (1<<1) 643 644 /* 645 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 646 */ 647 648 /* 0x00: Native C-state instruction based LPI structure */ 649 650 typedef struct acpi_lpit_native 651 { 652 ACPI_LPIT_HEADER Header; 653 ACPI_GENERIC_ADDRESS EntryTrigger; 654 UINT32 Residency; 655 UINT32 Latency; 656 ACPI_GENERIC_ADDRESS ResidencyCounter; 657 UINT64 CounterFrequency; 658 659 } ACPI_LPIT_NATIVE; 660 661 662 /******************************************************************************* 663 * 664 * MADT - Multiple APIC Description Table 665 * Version 3 666 * 667 ******************************************************************************/ 668 669 typedef struct acpi_table_madt 670 { 671 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 672 UINT32 Address; /* Physical address of local APIC */ 673 UINT32 Flags; 674 675 } ACPI_TABLE_MADT; 676 677 /* Masks for Flags field above */ 678 679 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 680 681 /* Values for PCATCompat flag */ 682 683 #define ACPI_MADT_DUAL_PIC 1 684 #define ACPI_MADT_MULTIPLE_APIC 0 685 686 687 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 688 689 enum AcpiMadtType 690 { 691 ACPI_MADT_TYPE_LOCAL_APIC = 0, 692 ACPI_MADT_TYPE_IO_APIC = 1, 693 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 694 ACPI_MADT_TYPE_NMI_SOURCE = 3, 695 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 696 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 697 ACPI_MADT_TYPE_IO_SAPIC = 6, 698 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 699 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 700 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 701 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 702 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 703 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 704 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 705 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 706 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 707 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 708 }; 709 710 711 /* 712 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 713 */ 714 715 /* 0: Processor Local APIC */ 716 717 typedef struct acpi_madt_local_apic 718 { 719 ACPI_SUBTABLE_HEADER Header; 720 UINT8 ProcessorId; /* ACPI processor id */ 721 UINT8 Id; /* Processor's local APIC id */ 722 UINT32 LapicFlags; 723 724 } ACPI_MADT_LOCAL_APIC; 725 726 727 /* 1: IO APIC */ 728 729 typedef struct acpi_madt_io_apic 730 { 731 ACPI_SUBTABLE_HEADER Header; 732 UINT8 Id; /* I/O APIC ID */ 733 UINT8 Reserved; /* Reserved - must be zero */ 734 UINT32 Address; /* APIC physical address */ 735 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 736 737 } ACPI_MADT_IO_APIC; 738 739 740 /* 2: Interrupt Override */ 741 742 typedef struct acpi_madt_interrupt_override 743 { 744 ACPI_SUBTABLE_HEADER Header; 745 UINT8 Bus; /* 0 - ISA */ 746 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 747 UINT32 GlobalIrq; /* Global system interrupt */ 748 UINT16 IntiFlags; 749 750 } ACPI_MADT_INTERRUPT_OVERRIDE; 751 752 753 /* 3: NMI Source */ 754 755 typedef struct acpi_madt_nmi_source 756 { 757 ACPI_SUBTABLE_HEADER Header; 758 UINT16 IntiFlags; 759 UINT32 GlobalIrq; /* Global system interrupt */ 760 761 } ACPI_MADT_NMI_SOURCE; 762 763 764 /* 4: Local APIC NMI */ 765 766 typedef struct acpi_madt_local_apic_nmi 767 { 768 ACPI_SUBTABLE_HEADER Header; 769 UINT8 ProcessorId; /* ACPI processor id */ 770 UINT16 IntiFlags; 771 UINT8 Lint; /* LINTn to which NMI is connected */ 772 773 } ACPI_MADT_LOCAL_APIC_NMI; 774 775 776 /* 5: Address Override */ 777 778 typedef struct acpi_madt_local_apic_override 779 { 780 ACPI_SUBTABLE_HEADER Header; 781 UINT16 Reserved; /* Reserved, must be zero */ 782 UINT64 Address; /* APIC physical address */ 783 784 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 785 786 787 /* 6: I/O Sapic */ 788 789 typedef struct acpi_madt_io_sapic 790 { 791 ACPI_SUBTABLE_HEADER Header; 792 UINT8 Id; /* I/O SAPIC ID */ 793 UINT8 Reserved; /* Reserved, must be zero */ 794 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 795 UINT64 Address; /* SAPIC physical address */ 796 797 } ACPI_MADT_IO_SAPIC; 798 799 800 /* 7: Local Sapic */ 801 802 typedef struct acpi_madt_local_sapic 803 { 804 ACPI_SUBTABLE_HEADER Header; 805 UINT8 ProcessorId; /* ACPI processor id */ 806 UINT8 Id; /* SAPIC ID */ 807 UINT8 Eid; /* SAPIC EID */ 808 UINT8 Reserved[3]; /* Reserved, must be zero */ 809 UINT32 LapicFlags; 810 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 811 char UidString[1]; /* String UID - ACPI 3.0 */ 812 813 } ACPI_MADT_LOCAL_SAPIC; 814 815 816 /* 8: Platform Interrupt Source */ 817 818 typedef struct acpi_madt_interrupt_source 819 { 820 ACPI_SUBTABLE_HEADER Header; 821 UINT16 IntiFlags; 822 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 823 UINT8 Id; /* Processor ID */ 824 UINT8 Eid; /* Processor EID */ 825 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 826 UINT32 GlobalIrq; /* Global system interrupt */ 827 UINT32 Flags; /* Interrupt Source Flags */ 828 829 } ACPI_MADT_INTERRUPT_SOURCE; 830 831 /* Masks for Flags field above */ 832 833 #define ACPI_MADT_CPEI_OVERRIDE (1) 834 835 836 /* 9: Processor Local X2APIC (ACPI 4.0) */ 837 838 typedef struct acpi_madt_local_x2apic 839 { 840 ACPI_SUBTABLE_HEADER Header; 841 UINT16 Reserved; /* Reserved - must be zero */ 842 UINT32 LocalApicId; /* Processor x2APIC ID */ 843 UINT32 LapicFlags; 844 UINT32 Uid; /* ACPI processor UID */ 845 846 } ACPI_MADT_LOCAL_X2APIC; 847 848 849 /* 10: Local X2APIC NMI (ACPI 4.0) */ 850 851 typedef struct acpi_madt_local_x2apic_nmi 852 { 853 ACPI_SUBTABLE_HEADER Header; 854 UINT16 IntiFlags; 855 UINT32 Uid; /* ACPI processor UID */ 856 UINT8 Lint; /* LINTn to which NMI is connected */ 857 UINT8 Reserved[3]; /* Reserved - must be zero */ 858 859 } ACPI_MADT_LOCAL_X2APIC_NMI; 860 861 862 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 863 864 typedef struct acpi_madt_generic_interrupt 865 { 866 ACPI_SUBTABLE_HEADER Header; 867 UINT16 Reserved; /* Reserved - must be zero */ 868 UINT32 CpuInterfaceNumber; 869 UINT32 Uid; 870 UINT32 Flags; 871 UINT32 ParkingVersion; 872 UINT32 PerformanceInterrupt; 873 UINT64 ParkedAddress; 874 UINT64 BaseAddress; 875 UINT64 GicvBaseAddress; 876 UINT64 GichBaseAddress; 877 UINT32 VgicInterrupt; 878 UINT64 GicrBaseAddress; 879 UINT64 ArmMpidr; 880 UINT8 EfficiencyClass; 881 UINT8 Reserved2[3]; 882 883 } ACPI_MADT_GENERIC_INTERRUPT; 884 885 /* Masks for Flags field above */ 886 887 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 888 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 889 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 890 891 892 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 893 894 typedef struct acpi_madt_generic_distributor 895 { 896 ACPI_SUBTABLE_HEADER Header; 897 UINT16 Reserved; /* Reserved - must be zero */ 898 UINT32 GicId; 899 UINT64 BaseAddress; 900 UINT32 GlobalIrqBase; 901 UINT8 Version; 902 UINT8 Reserved2[3]; /* Reserved - must be zero */ 903 904 } ACPI_MADT_GENERIC_DISTRIBUTOR; 905 906 /* Values for Version field above */ 907 908 enum AcpiMadtGicVersion 909 { 910 ACPI_MADT_GIC_VERSION_NONE = 0, 911 ACPI_MADT_GIC_VERSION_V1 = 1, 912 ACPI_MADT_GIC_VERSION_V2 = 2, 913 ACPI_MADT_GIC_VERSION_V3 = 3, 914 ACPI_MADT_GIC_VERSION_V4 = 4, 915 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 916 }; 917 918 919 /* 13: Generic MSI Frame (ACPI 5.1) */ 920 921 typedef struct acpi_madt_generic_msi_frame 922 { 923 ACPI_SUBTABLE_HEADER Header; 924 UINT16 Reserved; /* Reserved - must be zero */ 925 UINT32 MsiFrameId; 926 UINT64 BaseAddress; 927 UINT32 Flags; 928 UINT16 SpiCount; 929 UINT16 SpiBase; 930 931 } ACPI_MADT_GENERIC_MSI_FRAME; 932 933 /* Masks for Flags field above */ 934 935 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 936 937 938 /* 14: Generic Redistributor (ACPI 5.1) */ 939 940 typedef struct acpi_madt_generic_redistributor 941 { 942 ACPI_SUBTABLE_HEADER Header; 943 UINT16 Reserved; /* reserved - must be zero */ 944 UINT64 BaseAddress; 945 UINT32 Length; 946 947 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 948 949 950 /* 15: Generic Translator (ACPI 6.0) */ 951 952 typedef struct acpi_madt_generic_translator 953 { 954 ACPI_SUBTABLE_HEADER Header; 955 UINT16 Reserved; /* reserved - must be zero */ 956 UINT32 TranslationId; 957 UINT64 BaseAddress; 958 UINT32 Reserved2; 959 960 } ACPI_MADT_GENERIC_TRANSLATOR; 961 962 963 /* 964 * Common flags fields for MADT subtables 965 */ 966 967 /* MADT Local APIC flags */ 968 969 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 970 971 /* MADT MPS INTI flags (IntiFlags) */ 972 973 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 974 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 975 976 /* Values for MPS INTI flags */ 977 978 #define ACPI_MADT_POLARITY_CONFORMS 0 979 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 980 #define ACPI_MADT_POLARITY_RESERVED 2 981 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 982 983 #define ACPI_MADT_TRIGGER_CONFORMS (0) 984 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 985 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 986 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 987 988 989 /******************************************************************************* 990 * 991 * MCFG - PCI Memory Mapped Configuration table and subtable 992 * Version 1 993 * 994 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 995 * 996 ******************************************************************************/ 997 998 typedef struct acpi_table_mcfg 999 { 1000 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1001 UINT8 Reserved[8]; 1002 1003 } ACPI_TABLE_MCFG; 1004 1005 1006 /* Subtable */ 1007 1008 typedef struct acpi_mcfg_allocation 1009 { 1010 UINT64 Address; /* Base address, processor-relative */ 1011 UINT16 PciSegment; /* PCI segment group number */ 1012 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1013 UINT8 EndBusNumber; /* Final PCI Bus number */ 1014 UINT32 Reserved; 1015 1016 } ACPI_MCFG_ALLOCATION; 1017 1018 1019 /******************************************************************************* 1020 * 1021 * MCHI - Management Controller Host Interface Table 1022 * Version 1 1023 * 1024 * Conforms to "Management Component Transport Protocol (MCTP) Host 1025 * Interface Specification", Revision 1.0.0a, October 13, 2009 1026 * 1027 ******************************************************************************/ 1028 1029 typedef struct acpi_table_mchi 1030 { 1031 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1032 UINT8 InterfaceType; 1033 UINT8 Protocol; 1034 UINT64 ProtocolData; 1035 UINT8 InterruptType; 1036 UINT8 Gpe; 1037 UINT8 PciDeviceFlag; 1038 UINT32 GlobalInterrupt; 1039 ACPI_GENERIC_ADDRESS ControlRegister; 1040 UINT8 PciSegment; 1041 UINT8 PciBus; 1042 UINT8 PciDevice; 1043 UINT8 PciFunction; 1044 1045 } ACPI_TABLE_MCHI; 1046 1047 1048 /******************************************************************************* 1049 * 1050 * MPST - Memory Power State Table (ACPI 5.0) 1051 * Version 1 1052 * 1053 ******************************************************************************/ 1054 1055 #define ACPI_MPST_CHANNEL_INFO \ 1056 UINT8 ChannelId; \ 1057 UINT8 Reserved1[3]; \ 1058 UINT16 PowerNodeCount; \ 1059 UINT16 Reserved2; 1060 1061 /* Main table */ 1062 1063 typedef struct acpi_table_mpst 1064 { 1065 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1066 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1067 1068 } ACPI_TABLE_MPST; 1069 1070 1071 /* Memory Platform Communication Channel Info */ 1072 1073 typedef struct acpi_mpst_channel 1074 { 1075 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1076 1077 } ACPI_MPST_CHANNEL; 1078 1079 1080 /* Memory Power Node Structure */ 1081 1082 typedef struct acpi_mpst_power_node 1083 { 1084 UINT8 Flags; 1085 UINT8 Reserved1; 1086 UINT16 NodeId; 1087 UINT32 Length; 1088 UINT64 RangeAddress; 1089 UINT64 RangeLength; 1090 UINT32 NumPowerStates; 1091 UINT32 NumPhysicalComponents; 1092 1093 } ACPI_MPST_POWER_NODE; 1094 1095 /* Values for Flags field above */ 1096 1097 #define ACPI_MPST_ENABLED 1 1098 #define ACPI_MPST_POWER_MANAGED 2 1099 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1100 1101 1102 /* Memory Power State Structure (follows POWER_NODE above) */ 1103 1104 typedef struct acpi_mpst_power_state 1105 { 1106 UINT8 PowerState; 1107 UINT8 InfoIndex; 1108 1109 } ACPI_MPST_POWER_STATE; 1110 1111 1112 /* Physical Component ID Structure (follows POWER_STATE above) */ 1113 1114 typedef struct acpi_mpst_component 1115 { 1116 UINT16 ComponentId; 1117 1118 } ACPI_MPST_COMPONENT; 1119 1120 1121 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1122 1123 typedef struct acpi_mpst_data_hdr 1124 { 1125 UINT16 CharacteristicsCount; 1126 UINT16 Reserved; 1127 1128 } ACPI_MPST_DATA_HDR; 1129 1130 typedef struct acpi_mpst_power_data 1131 { 1132 UINT8 StructureId; 1133 UINT8 Flags; 1134 UINT16 Reserved1; 1135 UINT32 AveragePower; 1136 UINT32 PowerSaving; 1137 UINT64 ExitLatency; 1138 UINT64 Reserved2; 1139 1140 } ACPI_MPST_POWER_DATA; 1141 1142 /* Values for Flags field above */ 1143 1144 #define ACPI_MPST_PRESERVE 1 1145 #define ACPI_MPST_AUTOENTRY 2 1146 #define ACPI_MPST_AUTOEXIT 4 1147 1148 1149 /* Shared Memory Region (not part of an ACPI table) */ 1150 1151 typedef struct acpi_mpst_shared 1152 { 1153 UINT32 Signature; 1154 UINT16 PccCommand; 1155 UINT16 PccStatus; 1156 UINT32 CommandRegister; 1157 UINT32 StatusRegister; 1158 UINT32 PowerStateId; 1159 UINT32 PowerNodeId; 1160 UINT64 EnergyConsumed; 1161 UINT64 AveragePower; 1162 1163 } ACPI_MPST_SHARED; 1164 1165 1166 /******************************************************************************* 1167 * 1168 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1169 * Version 1 1170 * 1171 ******************************************************************************/ 1172 1173 typedef struct acpi_table_msct 1174 { 1175 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1176 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1177 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1178 UINT32 MaxClockDomains; /* Max number of clock domains */ 1179 UINT64 MaxAddress; /* Max physical address in system */ 1180 1181 } ACPI_TABLE_MSCT; 1182 1183 1184 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1185 1186 typedef struct acpi_msct_proximity 1187 { 1188 UINT8 Revision; 1189 UINT8 Length; 1190 UINT32 RangeStart; /* Start of domain range */ 1191 UINT32 RangeEnd; /* End of domain range */ 1192 UINT32 ProcessorCapacity; 1193 UINT64 MemoryCapacity; /* In bytes */ 1194 1195 } ACPI_MSCT_PROXIMITY; 1196 1197 1198 /******************************************************************************* 1199 * 1200 * MSDM - Microsoft Data Management table 1201 * 1202 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1203 * November 29, 2011. Copyright 2011 Microsoft 1204 * 1205 ******************************************************************************/ 1206 1207 /* Basic MSDM table is only the common ACPI header */ 1208 1209 typedef struct acpi_table_msdm 1210 { 1211 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1212 1213 } ACPI_TABLE_MSDM; 1214 1215 1216 /******************************************************************************* 1217 * 1218 * MTMR - MID Timer Table 1219 * Version 1 1220 * 1221 * Conforms to "Simple Firmware Interface Specification", 1222 * Draft 0.8.2, Oct 19, 2010 1223 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 1224 * 1225 ******************************************************************************/ 1226 1227 typedef struct acpi_table_mtmr 1228 { 1229 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1230 1231 } ACPI_TABLE_MTMR; 1232 1233 /* MTMR entry */ 1234 1235 typedef struct acpi_mtmr_entry 1236 { 1237 ACPI_GENERIC_ADDRESS PhysicalAddress; 1238 UINT32 Frequency; 1239 UINT32 Irq; 1240 1241 } ACPI_MTMR_ENTRY; 1242 1243 1244 /******************************************************************************* 1245 * 1246 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1247 * Version 1 1248 * 1249 ******************************************************************************/ 1250 1251 typedef struct acpi_table_nfit 1252 { 1253 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1254 UINT32 Reserved; /* Reserved, must be zero */ 1255 1256 } ACPI_TABLE_NFIT; 1257 1258 /* Subtable header for NFIT */ 1259 1260 typedef struct acpi_nfit_header 1261 { 1262 UINT16 Type; 1263 UINT16 Length; 1264 1265 } ACPI_NFIT_HEADER; 1266 1267 1268 /* Values for subtable type in ACPI_NFIT_HEADER */ 1269 1270 enum AcpiNfitType 1271 { 1272 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1273 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1274 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1275 ACPI_NFIT_TYPE_SMBIOS = 3, 1276 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1277 ACPI_NFIT_TYPE_DATA_REGION = 5, 1278 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1279 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1280 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1281 }; 1282 1283 /* 1284 * NFIT Subtables 1285 */ 1286 1287 /* 0: System Physical Address Range Structure */ 1288 1289 typedef struct acpi_nfit_system_address 1290 { 1291 ACPI_NFIT_HEADER Header; 1292 UINT16 RangeIndex; 1293 UINT16 Flags; 1294 UINT32 Reserved; /* Reserved, must be zero */ 1295 UINT32 ProximityDomain; 1296 UINT8 RangeGuid[16]; 1297 UINT64 Address; 1298 UINT64 Length; 1299 UINT64 MemoryMapping; 1300 1301 } ACPI_NFIT_SYSTEM_ADDRESS; 1302 1303 /* Flags */ 1304 1305 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1306 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1307 1308 /* Range Type GUIDs appear in the include/acuuid.h file */ 1309 1310 1311 /* 1: Memory Device to System Address Range Map Structure */ 1312 1313 typedef struct acpi_nfit_memory_map 1314 { 1315 ACPI_NFIT_HEADER Header; 1316 UINT32 DeviceHandle; 1317 UINT16 PhysicalId; 1318 UINT16 RegionId; 1319 UINT16 RangeIndex; 1320 UINT16 RegionIndex; 1321 UINT64 RegionSize; 1322 UINT64 RegionOffset; 1323 UINT64 Address; 1324 UINT16 InterleaveIndex; 1325 UINT16 InterleaveWays; 1326 UINT16 Flags; 1327 UINT16 Reserved; /* Reserved, must be zero */ 1328 1329 } ACPI_NFIT_MEMORY_MAP; 1330 1331 /* Flags */ 1332 1333 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1334 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1335 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1336 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1337 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1338 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1339 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1340 1341 1342 /* 2: Interleave Structure */ 1343 1344 typedef struct acpi_nfit_interleave 1345 { 1346 ACPI_NFIT_HEADER Header; 1347 UINT16 InterleaveIndex; 1348 UINT16 Reserved; /* Reserved, must be zero */ 1349 UINT32 LineCount; 1350 UINT32 LineSize; 1351 UINT32 LineOffset[1]; /* Variable length */ 1352 1353 } ACPI_NFIT_INTERLEAVE; 1354 1355 1356 /* 3: SMBIOS Management Information Structure */ 1357 1358 typedef struct acpi_nfit_smbios 1359 { 1360 ACPI_NFIT_HEADER Header; 1361 UINT32 Reserved; /* Reserved, must be zero */ 1362 UINT8 Data[1]; /* Variable length */ 1363 1364 } ACPI_NFIT_SMBIOS; 1365 1366 1367 /* 4: NVDIMM Control Region Structure */ 1368 1369 typedef struct acpi_nfit_control_region 1370 { 1371 ACPI_NFIT_HEADER Header; 1372 UINT16 RegionIndex; 1373 UINT16 VendorId; 1374 UINT16 DeviceId; 1375 UINT16 RevisionId; 1376 UINT16 SubsystemVendorId; 1377 UINT16 SubsystemDeviceId; 1378 UINT16 SubsystemRevisionId; 1379 UINT8 ValidFields; 1380 UINT8 ManufacturingLocation; 1381 UINT16 ManufacturingDate; 1382 UINT8 Reserved[2]; /* Reserved, must be zero */ 1383 UINT32 SerialNumber; 1384 UINT16 Code; 1385 UINT16 Windows; 1386 UINT64 WindowSize; 1387 UINT64 CommandOffset; 1388 UINT64 CommandSize; 1389 UINT64 StatusOffset; 1390 UINT64 StatusSize; 1391 UINT16 Flags; 1392 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1393 1394 } ACPI_NFIT_CONTROL_REGION; 1395 1396 /* Flags */ 1397 1398 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1399 1400 /* ValidFields bits */ 1401 1402 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1403 1404 1405 /* 5: NVDIMM Block Data Window Region Structure */ 1406 1407 typedef struct acpi_nfit_data_region 1408 { 1409 ACPI_NFIT_HEADER Header; 1410 UINT16 RegionIndex; 1411 UINT16 Windows; 1412 UINT64 Offset; 1413 UINT64 Size; 1414 UINT64 Capacity; 1415 UINT64 StartAddress; 1416 1417 } ACPI_NFIT_DATA_REGION; 1418 1419 1420 /* 6: Flush Hint Address Structure */ 1421 1422 typedef struct acpi_nfit_flush_address 1423 { 1424 ACPI_NFIT_HEADER Header; 1425 UINT32 DeviceHandle; 1426 UINT16 HintCount; 1427 UINT8 Reserved[6]; /* Reserved, must be zero */ 1428 UINT64 HintAddress[1]; /* Variable length */ 1429 1430 } ACPI_NFIT_FLUSH_ADDRESS; 1431 1432 1433 /* 7: Platform Capabilities Structure */ 1434 1435 typedef struct acpi_nfit_capabilities 1436 { 1437 ACPI_NFIT_HEADER Header; 1438 UINT8 HighestCapability; 1439 UINT8 Reserved[3]; /* Reserved, must be zero */ 1440 UINT32 Capabilities; 1441 UINT32 Reserved2; 1442 1443 } ACPI_NFIT_CAPABILITIES; 1444 1445 /* Capabilities Flags */ 1446 1447 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1448 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1449 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1450 1451 1452 /* 1453 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1454 */ 1455 typedef struct nfit_device_handle 1456 { 1457 UINT32 Handle; 1458 1459 } NFIT_DEVICE_HANDLE; 1460 1461 /* Device handle construction and extraction macros */ 1462 1463 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1464 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1465 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1466 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1467 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1468 1469 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1470 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1471 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1472 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1473 #define ACPI_NFIT_NODE_ID_OFFSET 16 1474 1475 /* Macro to construct a NFIT/NVDIMM device handle */ 1476 1477 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1478 ((dimm) | \ 1479 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1480 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1481 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1482 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1483 1484 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1485 1486 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1487 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1488 1489 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1490 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1491 1492 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1493 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1494 1495 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1496 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1497 1498 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1499 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1500 1501 1502 /******************************************************************************* 1503 * 1504 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1505 * Version 2 (ACPI 6.2) 1506 * 1507 ******************************************************************************/ 1508 1509 typedef struct acpi_table_pcct 1510 { 1511 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1512 UINT32 Flags; 1513 UINT64 Reserved; 1514 1515 } ACPI_TABLE_PCCT; 1516 1517 /* Values for Flags field above */ 1518 1519 #define ACPI_PCCT_DOORBELL 1 1520 1521 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1522 1523 enum AcpiPcctType 1524 { 1525 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1526 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1527 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1528 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1529 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1530 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1531 }; 1532 1533 /* 1534 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1535 */ 1536 1537 /* 0: Generic Communications Subspace */ 1538 1539 typedef struct acpi_pcct_subspace 1540 { 1541 ACPI_SUBTABLE_HEADER Header; 1542 UINT8 Reserved[6]; 1543 UINT64 BaseAddress; 1544 UINT64 Length; 1545 ACPI_GENERIC_ADDRESS DoorbellRegister; 1546 UINT64 PreserveMask; 1547 UINT64 WriteMask; 1548 UINT32 Latency; 1549 UINT32 MaxAccessRate; 1550 UINT16 MinTurnaroundTime; 1551 1552 } ACPI_PCCT_SUBSPACE; 1553 1554 1555 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1556 1557 typedef struct acpi_pcct_hw_reduced 1558 { 1559 ACPI_SUBTABLE_HEADER Header; 1560 UINT32 PlatformInterrupt; 1561 UINT8 Flags; 1562 UINT8 Reserved; 1563 UINT64 BaseAddress; 1564 UINT64 Length; 1565 ACPI_GENERIC_ADDRESS DoorbellRegister; 1566 UINT64 PreserveMask; 1567 UINT64 WriteMask; 1568 UINT32 Latency; 1569 UINT32 MaxAccessRate; 1570 UINT16 MinTurnaroundTime; 1571 1572 } ACPI_PCCT_HW_REDUCED; 1573 1574 1575 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1576 1577 typedef struct acpi_pcct_hw_reduced_type2 1578 { 1579 ACPI_SUBTABLE_HEADER Header; 1580 UINT32 PlatformInterrupt; 1581 UINT8 Flags; 1582 UINT8 Reserved; 1583 UINT64 BaseAddress; 1584 UINT64 Length; 1585 ACPI_GENERIC_ADDRESS DoorbellRegister; 1586 UINT64 PreserveMask; 1587 UINT64 WriteMask; 1588 UINT32 Latency; 1589 UINT32 MaxAccessRate; 1590 UINT16 MinTurnaroundTime; 1591 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1592 UINT64 AckPreserveMask; 1593 UINT64 AckWriteMask; 1594 1595 } ACPI_PCCT_HW_REDUCED_TYPE2; 1596 1597 1598 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1599 1600 typedef struct acpi_pcct_ext_pcc_master 1601 { 1602 ACPI_SUBTABLE_HEADER Header; 1603 UINT32 PlatformInterrupt; 1604 UINT8 Flags; 1605 UINT8 Reserved1; 1606 UINT64 BaseAddress; 1607 UINT32 Length; 1608 ACPI_GENERIC_ADDRESS DoorbellRegister; 1609 UINT64 PreserveMask; 1610 UINT64 WriteMask; 1611 UINT32 Latency; 1612 UINT32 MaxAccessRate; 1613 UINT32 MinTurnaroundTime; 1614 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1615 UINT64 AckPreserveMask; 1616 UINT64 AckSetMask; 1617 UINT64 Reserved2; 1618 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1619 UINT64 CmdCompleteMask; 1620 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1621 UINT64 CmdUpdatePreserveMask; 1622 UINT64 CmdUpdateSetMask; 1623 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1624 UINT64 ErrorStatusMask; 1625 1626 } ACPI_PCCT_EXT_PCC_MASTER; 1627 1628 1629 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1630 1631 typedef struct acpi_pcct_ext_pcc_slave 1632 { 1633 ACPI_SUBTABLE_HEADER Header; 1634 UINT32 PlatformInterrupt; 1635 UINT8 Flags; 1636 UINT8 Reserved1; 1637 UINT64 BaseAddress; 1638 UINT32 Length; 1639 ACPI_GENERIC_ADDRESS DoorbellRegister; 1640 UINT64 PreserveMask; 1641 UINT64 WriteMask; 1642 UINT32 Latency; 1643 UINT32 MaxAccessRate; 1644 UINT32 MinTurnaroundTime; 1645 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1646 UINT64 AckPreserveMask; 1647 UINT64 AckSetMask; 1648 UINT64 Reserved2; 1649 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1650 UINT64 CmdCompleteMask; 1651 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1652 UINT64 CmdUpdatePreserveMask; 1653 UINT64 CmdUpdateSetMask; 1654 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1655 UINT64 ErrorStatusMask; 1656 1657 } ACPI_PCCT_EXT_PCC_SLAVE; 1658 1659 1660 /* Values for doorbell flags above */ 1661 1662 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1663 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1664 1665 1666 /* 1667 * PCC memory structures (not part of the ACPI table) 1668 */ 1669 1670 /* Shared Memory Region */ 1671 1672 typedef struct acpi_pcct_shared_memory 1673 { 1674 UINT32 Signature; 1675 UINT16 Command; 1676 UINT16 Status; 1677 1678 } ACPI_PCCT_SHARED_MEMORY; 1679 1680 1681 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1682 1683 typedef struct acpi_pcct_ext_pcc_shared_memory 1684 { 1685 UINT32 Signature; 1686 UINT32 Flags; 1687 UINT32 Length; 1688 UINT32 Command; 1689 1690 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1691 1692 1693 /******************************************************************************* 1694 * 1695 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1696 * Version 0 1697 * 1698 ******************************************************************************/ 1699 1700 typedef struct acpi_table_pdtt 1701 { 1702 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1703 UINT8 TriggerCount; 1704 UINT8 Reserved[3]; 1705 UINT32 ArrayOffset; 1706 1707 } ACPI_TABLE_PDTT; 1708 1709 1710 /* 1711 * PDTT Communication Channel Identifier Structure. 1712 * The number of these structures is defined by TriggerCount above, 1713 * starting at ArrayOffset. 1714 */ 1715 typedef struct acpi_pdtt_channel 1716 { 1717 UINT8 SubchannelId; 1718 UINT8 Flags; 1719 1720 } ACPI_PDTT_CHANNEL; 1721 1722 /* Flags for above */ 1723 1724 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1725 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1726 1727 1728 /******************************************************************************* 1729 * 1730 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1731 * Version 1 1732 * 1733 ******************************************************************************/ 1734 1735 typedef struct acpi_table_pmtt 1736 { 1737 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1738 UINT32 Reserved; 1739 1740 } ACPI_TABLE_PMTT; 1741 1742 1743 /* Common header for PMTT subtables that follow main table */ 1744 1745 typedef struct acpi_pmtt_header 1746 { 1747 UINT8 Type; 1748 UINT8 Reserved1; 1749 UINT16 Length; 1750 UINT16 Flags; 1751 UINT16 Reserved2; 1752 1753 } ACPI_PMTT_HEADER; 1754 1755 /* Values for Type field above */ 1756 1757 #define ACPI_PMTT_TYPE_SOCKET 0 1758 #define ACPI_PMTT_TYPE_CONTROLLER 1 1759 #define ACPI_PMTT_TYPE_DIMM 2 1760 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1761 1762 /* Values for Flags field above */ 1763 1764 #define ACPI_PMTT_TOP_LEVEL 0x0001 1765 #define ACPI_PMTT_PHYSICAL 0x0002 1766 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1767 1768 1769 /* 1770 * PMTT subtables, correspond to Type in acpi_pmtt_header 1771 */ 1772 1773 1774 /* 0: Socket Structure */ 1775 1776 typedef struct acpi_pmtt_socket 1777 { 1778 ACPI_PMTT_HEADER Header; 1779 UINT16 SocketId; 1780 UINT16 Reserved; 1781 1782 } ACPI_PMTT_SOCKET; 1783 1784 1785 /* 1: Memory Controller subtable */ 1786 1787 typedef struct acpi_pmtt_controller 1788 { 1789 ACPI_PMTT_HEADER Header; 1790 UINT32 ReadLatency; 1791 UINT32 WriteLatency; 1792 UINT32 ReadBandwidth; 1793 UINT32 WriteBandwidth; 1794 UINT16 AccessWidth; 1795 UINT16 Alignment; 1796 UINT16 Reserved; 1797 UINT16 DomainCount; 1798 1799 } ACPI_PMTT_CONTROLLER; 1800 1801 /* 1a: Proximity Domain substructure */ 1802 1803 typedef struct acpi_pmtt_domain 1804 { 1805 UINT32 ProximityDomain; 1806 1807 } ACPI_PMTT_DOMAIN; 1808 1809 1810 /* 2: Physical Component Identifier (DIMM) */ 1811 1812 typedef struct acpi_pmtt_physical_component 1813 { 1814 ACPI_PMTT_HEADER Header; 1815 UINT16 ComponentId; 1816 UINT16 Reserved; 1817 UINT32 MemorySize; 1818 UINT32 BiosHandle; 1819 1820 } ACPI_PMTT_PHYSICAL_COMPONENT; 1821 1822 1823 /******************************************************************************* 1824 * 1825 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1826 * Version 1 1827 * 1828 ******************************************************************************/ 1829 1830 typedef struct acpi_table_pptt 1831 { 1832 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1833 1834 } ACPI_TABLE_PPTT; 1835 1836 /* Values for Type field above */ 1837 1838 enum AcpiPpttType 1839 { 1840 ACPI_PPTT_TYPE_PROCESSOR = 0, 1841 ACPI_PPTT_TYPE_CACHE = 1, 1842 ACPI_PPTT_TYPE_ID = 2, 1843 ACPI_PPTT_TYPE_RESERVED = 3 1844 }; 1845 1846 1847 /* 0: Processor Hierarchy Node Structure */ 1848 1849 typedef struct acpi_pptt_processor 1850 { 1851 ACPI_SUBTABLE_HEADER Header; 1852 UINT16 Reserved; 1853 UINT32 Flags; 1854 UINT32 Parent; 1855 UINT32 AcpiProcessorId; 1856 UINT32 NumberOfPrivResources; 1857 1858 } ACPI_PPTT_PROCESSOR; 1859 1860 /* Flags */ 1861 1862 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1863 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1864 1865 1866 /* 1: Cache Type Structure */ 1867 1868 typedef struct acpi_pptt_cache 1869 { 1870 ACPI_SUBTABLE_HEADER Header; 1871 UINT16 Reserved; 1872 UINT32 Flags; 1873 UINT32 NextLevelOfCache; 1874 UINT32 Size; 1875 UINT32 NumberOfSets; 1876 UINT8 Associativity; 1877 UINT8 Attributes; 1878 UINT16 LineSize; 1879 1880 } ACPI_PPTT_CACHE; 1881 1882 /* Flags */ 1883 1884 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1885 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1886 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1887 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1888 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1889 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1890 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1891 1892 /* Masks for Attributes */ 1893 1894 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1895 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1896 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1897 1898 /* Attributes describing cache */ 1899 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1900 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1901 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1902 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1903 1904 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1905 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1906 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1907 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1908 1909 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1910 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1911 1912 /* 2: ID Structure */ 1913 1914 typedef struct acpi_pptt_id 1915 { 1916 ACPI_SUBTABLE_HEADER Header; 1917 UINT16 Reserved; 1918 UINT32 VendorId; 1919 UINT64 Level1Id; 1920 UINT64 Level2Id; 1921 UINT16 MajorRev; 1922 UINT16 MinorRev; 1923 UINT16 SpinRev; 1924 1925 } ACPI_PPTT_ID; 1926 1927 1928 /******************************************************************************* 1929 * 1930 * RASF - RAS Feature Table (ACPI 5.0) 1931 * Version 1 1932 * 1933 ******************************************************************************/ 1934 1935 typedef struct acpi_table_rasf 1936 { 1937 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1938 UINT8 ChannelId[12]; 1939 1940 } ACPI_TABLE_RASF; 1941 1942 /* RASF Platform Communication Channel Shared Memory Region */ 1943 1944 typedef struct acpi_rasf_shared_memory 1945 { 1946 UINT32 Signature; 1947 UINT16 Command; 1948 UINT16 Status; 1949 UINT16 Version; 1950 UINT8 Capabilities[16]; 1951 UINT8 SetCapabilities[16]; 1952 UINT16 NumParameterBlocks; 1953 UINT32 SetCapabilitiesStatus; 1954 1955 } ACPI_RASF_SHARED_MEMORY; 1956 1957 /* RASF Parameter Block Structure Header */ 1958 1959 typedef struct acpi_rasf_parameter_block 1960 { 1961 UINT16 Type; 1962 UINT16 Version; 1963 UINT16 Length; 1964 1965 } ACPI_RASF_PARAMETER_BLOCK; 1966 1967 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1968 1969 typedef struct acpi_rasf_patrol_scrub_parameter 1970 { 1971 ACPI_RASF_PARAMETER_BLOCK Header; 1972 UINT16 PatrolScrubCommand; 1973 UINT64 RequestedAddressRange[2]; 1974 UINT64 ActualAddressRange[2]; 1975 UINT16 Flags; 1976 UINT8 RequestedSpeed; 1977 1978 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 1979 1980 /* Masks for Flags and Speed fields above */ 1981 1982 #define ACPI_RASF_SCRUBBER_RUNNING 1 1983 #define ACPI_RASF_SPEED (7<<1) 1984 #define ACPI_RASF_SPEED_SLOW (0<<1) 1985 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1986 #define ACPI_RASF_SPEED_FAST (7<<1) 1987 1988 /* Channel Commands */ 1989 1990 enum AcpiRasfCommands 1991 { 1992 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1993 }; 1994 1995 /* Platform RAS Capabilities */ 1996 1997 enum AcpiRasfCapabiliities 1998 { 1999 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2000 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2001 }; 2002 2003 /* Patrol Scrub Commands */ 2004 2005 enum AcpiRasfPatrolScrubCommands 2006 { 2007 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2008 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2009 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2010 }; 2011 2012 /* Channel Command flags */ 2013 2014 #define ACPI_RASF_GENERATE_SCI (1<<15) 2015 2016 /* Status values */ 2017 2018 enum AcpiRasfStatus 2019 { 2020 ACPI_RASF_SUCCESS = 0, 2021 ACPI_RASF_NOT_VALID = 1, 2022 ACPI_RASF_NOT_SUPPORTED = 2, 2023 ACPI_RASF_BUSY = 3, 2024 ACPI_RASF_FAILED = 4, 2025 ACPI_RASF_ABORTED = 5, 2026 ACPI_RASF_INVALID_DATA = 6 2027 }; 2028 2029 /* Status flags */ 2030 2031 #define ACPI_RASF_COMMAND_COMPLETE (1) 2032 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2033 #define ACPI_RASF_ERROR (1<<2) 2034 #define ACPI_RASF_STATUS (0x1F<<3) 2035 2036 2037 /******************************************************************************* 2038 * 2039 * SBST - Smart Battery Specification Table 2040 * Version 1 2041 * 2042 ******************************************************************************/ 2043 2044 typedef struct acpi_table_sbst 2045 { 2046 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2047 UINT32 WarningLevel; 2048 UINT32 LowLevel; 2049 UINT32 CriticalLevel; 2050 2051 } ACPI_TABLE_SBST; 2052 2053 2054 /******************************************************************************* 2055 * 2056 * SDEI - Software Delegated Exception Interface Descriptor Table 2057 * 2058 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2059 * May 8th, 2017. Copyright 2017 ARM Ltd. 2060 * 2061 ******************************************************************************/ 2062 2063 typedef struct acpi_table_sdei 2064 { 2065 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2066 2067 } ACPI_TABLE_SDEI; 2068 2069 2070 /******************************************************************************* 2071 * 2072 * SDEV - Secure Devices Table (ACPI 6.2) 2073 * Version 1 2074 * 2075 ******************************************************************************/ 2076 2077 typedef struct acpi_table_sdev 2078 { 2079 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2080 2081 } ACPI_TABLE_SDEV; 2082 2083 2084 typedef struct acpi_sdev_header 2085 { 2086 UINT8 Type; 2087 UINT8 Flags; 2088 UINT16 Length; 2089 2090 } ACPI_SDEV_HEADER; 2091 2092 2093 /* Values for subtable type above */ 2094 2095 enum AcpiSdevType 2096 { 2097 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2098 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2099 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2100 }; 2101 2102 /* Values for flags above */ 2103 2104 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2105 2106 /* 2107 * SDEV subtables 2108 */ 2109 2110 /* 0: Namespace Device Based Secure Device Structure */ 2111 2112 typedef struct acpi_sdev_namespace 2113 { 2114 ACPI_SDEV_HEADER Header; 2115 UINT16 DeviceIdOffset; 2116 UINT16 DeviceIdLength; 2117 UINT16 VendorDataOffset; 2118 UINT16 VendorDataLength; 2119 2120 } ACPI_SDEV_NAMESPACE; 2121 2122 /* 1: PCIe Endpoint Device Based Device Structure */ 2123 2124 typedef struct acpi_sdev_pcie 2125 { 2126 ACPI_SDEV_HEADER Header; 2127 UINT16 Segment; 2128 UINT16 StartBus; 2129 UINT16 PathOffset; 2130 UINT16 PathLength; 2131 UINT16 VendorDataOffset; 2132 UINT16 VendorDataLength; 2133 2134 } ACPI_SDEV_PCIE; 2135 2136 /* 1a: PCIe Endpoint path entry */ 2137 2138 typedef struct acpi_sdev_pcie_path 2139 { 2140 UINT8 Device; 2141 UINT8 Function; 2142 2143 } ACPI_SDEV_PCIE_PATH; 2144 2145 2146 /* Reset to default packing */ 2147 2148 #pragma pack() 2149 2150 #endif /* __ACTBL2_H__ */ 2151