1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2021, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 172 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 173 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 174 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 175 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 176 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 177 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 178 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 179 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 180 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 182 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 183 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 184 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 185 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 186 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 187 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 188 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 189 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 190 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 191 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 192 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 193 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 194 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 195 196 197 /* 198 * All tables must be byte-packed to match the ACPI specification, since 199 * the tables are provided by the system BIOS. 200 */ 201 #pragma pack(1) 202 203 /* 204 * Note: C bitfields are not used for this reason: 205 * 206 * "Bitfields are great and easy to read, but unfortunately the C language 207 * does not specify the layout of bitfields in memory, which means they are 208 * essentially useless for dealing with packed data in on-disk formats or 209 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 210 * this decision was a design error in C. Ritchie could have picked an order 211 * and stuck with it." Norman Ramsey. 212 * See http://stackoverflow.com/a/1053662/41661 213 */ 214 215 216 /******************************************************************************* 217 * 218 * AEST - Arm Error Source Table 219 * 220 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 221 * September 2020. 222 * 223 ******************************************************************************/ 224 225 typedef struct acpi_table_aest 226 { 227 ACPI_TABLE_HEADER Header; 228 void *NodeArray[]; 229 230 } ACPI_TABLE_AEST; 231 232 /* Common Subtable header - one per Node Structure (Subtable) */ 233 234 typedef struct acpi_aest_hdr 235 { 236 UINT8 Type; 237 UINT16 Length; 238 UINT8 Reserved; 239 UINT32 NodeSpecificOffset; 240 UINT32 NodeInterfaceOffset; 241 UINT32 NodeInterruptOffset; 242 UINT32 NodeInterruptCount; 243 UINT64 TimestampRate; 244 UINT64 Reserved1; 245 UINT64 ErrorInjectionRate; 246 247 } ACPI_AEST_HEADER; 248 249 /* Values for Type above */ 250 251 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 252 #define ACPI_AEST_MEMORY_ERROR_NODE 1 253 #define ACPI_AEST_SMMU_ERROR_NODE 2 254 #define ACPI_AEST_VENDOR_ERROR_NODE 3 255 #define ACPI_AEST_GIC_ERROR_NODE 4 256 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 257 258 259 /* 260 * AEST subtables (Error nodes) 261 */ 262 263 /* 0: Processor Error */ 264 265 typedef struct acpi_aest_processor 266 { 267 UINT32 ProcessorId; 268 UINT8 ResourceType; 269 UINT8 Reserved; 270 UINT8 Flags; 271 UINT8 Revision; 272 UINT64 ProcessorAffinity; 273 274 } ACPI_AEST_PROCESSOR; 275 276 /* Values for ResourceType above, related structs below */ 277 278 #define ACPI_AEST_CACHE_RESOURCE 0 279 #define ACPI_AEST_TLB_RESOURCE 1 280 #define ACPI_AEST_GENERIC_RESOURCE 2 281 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 282 283 /* 0R: Processor Cache Resource Substructure */ 284 285 typedef struct acpi_aest_processor_cache 286 { 287 UINT32 CacheReference; 288 UINT32 Reserved; 289 290 } ACPI_AEST_PROCESSOR_CACHE; 291 292 /* Values for CacheType above */ 293 294 #define ACPI_AEST_CACHE_DATA 0 295 #define ACPI_AEST_CACHE_INSTRUCTION 1 296 #define ACPI_AEST_CACHE_UNIFIED 2 297 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 298 299 /* 1R: Processor TLB Resource Substructure */ 300 301 typedef struct acpi_aest_processor_tlb 302 { 303 UINT32 TlbLevel; 304 UINT32 Reserved; 305 306 } ACPI_AEST_PROCESSOR_TLB; 307 308 /* 2R: Processor Generic Resource Substructure */ 309 310 typedef struct acpi_aest_processor_generic 311 { 312 UINT8 *Resource; 313 314 } ACPI_AEST_PROCESSOR_GENERIC; 315 316 /* 1: Memory Error */ 317 318 typedef struct acpi_aest_memory 319 { 320 UINT32 SratProximityDomain; 321 322 } ACPI_AEST_MEMORY; 323 324 /* 2: Smmu Error */ 325 326 typedef struct acpi_aest_smmu 327 { 328 UINT32 IortNodeReference; 329 UINT32 SubcomponentReference; 330 331 } ACPI_AEST_SMMU; 332 333 /* 3: Vendor Defined */ 334 335 typedef struct acpi_aest_vendor 336 { 337 UINT32 AcpiHid; 338 UINT32 AcpiUid; 339 UINT8 VendorSpecificData[16]; 340 341 } ACPI_AEST_VENDOR; 342 343 /* 4: Gic Error */ 344 345 typedef struct acpi_aest_gic 346 { 347 UINT32 InterfaceType; 348 UINT32 InstanceId; 349 350 } ACPI_AEST_GIC; 351 352 /* Values for InterfaceType above */ 353 354 #define ACPI_AEST_GIC_CPU 0 355 #define ACPI_AEST_GIC_DISTRIBUTOR 1 356 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 357 #define ACPI_AEST_GIC_ITS 3 358 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 359 360 361 /* Node Interface Structure */ 362 363 typedef struct acpi_aest_node_interface 364 { 365 UINT8 Type; 366 UINT8 Reserved[3]; 367 UINT32 Flags; 368 UINT64 Address; 369 UINT32 ErrorRecordIndex; 370 UINT32 ErrorRecordCount; 371 UINT64 ErrorRecordImplemented; 372 UINT64 ErrorStatusReporting; 373 UINT64 AddressingMode; 374 375 } ACPI_AEST_NODE_INTERFACE; 376 377 /* Values for Type field above */ 378 379 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 380 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 381 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 382 383 /* Node Interrupt Structure */ 384 385 typedef struct acpi_aest_node_interrupt 386 { 387 UINT8 Type; 388 UINT8 Reserved[2]; 389 UINT8 Flags; 390 UINT32 Gsiv; 391 UINT8 IortId; 392 UINT8 Reserved1[3]; 393 394 } ACPI_AEST_NODE_INTERRUPT; 395 396 /* Values for Type field above */ 397 398 #define ACPI_AEST_NODE_FAULT_HANDLING 0 399 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 400 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 401 402 403 /******************************************************************************* 404 * 405 * BDAT - BIOS Data ACPI Table 406 * 407 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 408 * Nov 2020 409 * 410 ******************************************************************************/ 411 412 typedef struct acpi_table_bdat 413 { 414 ACPI_TABLE_HEADER Header; 415 ACPI_GENERIC_ADDRESS Gas; 416 417 } ACPI_TABLE_BDAT; 418 419 420 /******************************************************************************* 421 * 422 * IORT - IO Remapping Table 423 * 424 * Conforms to "IO Remapping Table System Software on ARM Platforms", 425 * Document number: ARM DEN 0049E.b, Feb 2021 426 * 427 ******************************************************************************/ 428 429 typedef struct acpi_table_iort 430 { 431 ACPI_TABLE_HEADER Header; 432 UINT32 NodeCount; 433 UINT32 NodeOffset; 434 UINT32 Reserved; 435 436 } ACPI_TABLE_IORT; 437 438 439 /* 440 * IORT subtables 441 */ 442 typedef struct acpi_iort_node 443 { 444 UINT8 Type; 445 UINT16 Length; 446 UINT8 Revision; 447 UINT32 Identifier; 448 UINT32 MappingCount; 449 UINT32 MappingOffset; 450 char NodeData[1]; 451 452 } ACPI_IORT_NODE; 453 454 /* Values for subtable Type above */ 455 456 enum AcpiIortNodeType 457 { 458 ACPI_IORT_NODE_ITS_GROUP = 0x00, 459 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 460 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 461 ACPI_IORT_NODE_SMMU = 0x03, 462 ACPI_IORT_NODE_SMMU_V3 = 0x04, 463 ACPI_IORT_NODE_PMCG = 0x05, 464 ACPI_IORT_NODE_RMR = 0x06, 465 }; 466 467 468 typedef struct acpi_iort_id_mapping 469 { 470 UINT32 InputBase; /* Lowest value in input range */ 471 UINT32 IdCount; /* Number of IDs */ 472 UINT32 OutputBase; /* Lowest value in output range */ 473 UINT32 OutputReference; /* A reference to the output node */ 474 UINT32 Flags; 475 476 } ACPI_IORT_ID_MAPPING; 477 478 /* Masks for Flags field above for IORT subtable */ 479 480 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 481 482 483 typedef struct acpi_iort_memory_access 484 { 485 UINT32 CacheCoherency; 486 UINT8 Hints; 487 UINT16 Reserved; 488 UINT8 MemoryFlags; 489 490 } ACPI_IORT_MEMORY_ACCESS; 491 492 /* Values for CacheCoherency field above */ 493 494 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 495 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 496 497 /* Masks for Hints field above */ 498 499 #define ACPI_IORT_HT_TRANSIENT (1) 500 #define ACPI_IORT_HT_WRITE (1<<1) 501 #define ACPI_IORT_HT_READ (1<<2) 502 #define ACPI_IORT_HT_OVERRIDE (1<<3) 503 504 /* Masks for MemoryFlags field above */ 505 506 #define ACPI_IORT_MF_COHERENCY (1) 507 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 508 509 510 /* 511 * IORT node specific subtables 512 */ 513 typedef struct acpi_iort_its_group 514 { 515 UINT32 ItsCount; 516 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 517 518 } ACPI_IORT_ITS_GROUP; 519 520 521 typedef struct acpi_iort_named_component 522 { 523 UINT32 NodeFlags; 524 UINT64 MemoryProperties; /* Memory access properties */ 525 UINT8 MemoryAddressLimit; /* Memory address size limit */ 526 char DeviceName[1]; /* Path of namespace object */ 527 528 } ACPI_IORT_NAMED_COMPONENT; 529 530 /* Masks for Flags field above */ 531 532 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 533 #define ACPI_IORT_NC_PASID_BITS (31<<1) 534 535 typedef struct acpi_iort_root_complex 536 { 537 UINT64 MemoryProperties; /* Memory access properties */ 538 UINT32 AtsAttribute; 539 UINT32 PciSegmentNumber; 540 UINT8 MemoryAddressLimit; /* Memory address size limit */ 541 UINT8 Reserved[3]; /* Reserved, must be zero */ 542 543 } ACPI_IORT_ROOT_COMPLEX; 544 545 /* Masks for AtsAttribute field above */ 546 547 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 548 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 549 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 550 551 552 typedef struct acpi_iort_smmu 553 { 554 UINT64 BaseAddress; /* SMMU base address */ 555 UINT64 Span; /* Length of memory range */ 556 UINT32 Model; 557 UINT32 Flags; 558 UINT32 GlobalInterruptOffset; 559 UINT32 ContextInterruptCount; 560 UINT32 ContextInterruptOffset; 561 UINT32 PmuInterruptCount; 562 UINT32 PmuInterruptOffset; 563 UINT64 Interrupts[1]; /* Interrupt array */ 564 565 } ACPI_IORT_SMMU; 566 567 /* Values for Model field above */ 568 569 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 570 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 571 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 572 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 573 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 574 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 575 576 /* Masks for Flags field above */ 577 578 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 579 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 580 581 /* Global interrupt format */ 582 583 typedef struct acpi_iort_smmu_gsi 584 { 585 UINT32 NSgIrpt; 586 UINT32 NSgIrptFlags; 587 UINT32 NSgCfgIrpt; 588 UINT32 NSgCfgIrptFlags; 589 590 } ACPI_IORT_SMMU_GSI; 591 592 593 typedef struct acpi_iort_smmu_v3 594 { 595 UINT64 BaseAddress; /* SMMUv3 base address */ 596 UINT32 Flags; 597 UINT32 Reserved; 598 UINT64 VatosAddress; 599 UINT32 Model; 600 UINT32 EventGsiv; 601 UINT32 PriGsiv; 602 UINT32 GerrGsiv; 603 UINT32 SyncGsiv; 604 UINT32 Pxm; 605 UINT32 IdMappingIndex; 606 607 } ACPI_IORT_SMMU_V3; 608 609 /* Values for Model field above */ 610 611 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 612 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 613 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 614 615 /* Masks for Flags field above */ 616 617 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 618 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 619 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 620 621 typedef struct acpi_iort_pmcg 622 { 623 UINT64 Page0BaseAddress; 624 UINT32 OverflowGsiv; 625 UINT32 NodeReference; 626 UINT64 Page1BaseAddress; 627 628 } ACPI_IORT_PMCG; 629 630 typedef struct acpi_iort_rmr { 631 UINT32 Flags; 632 UINT32 RmrCount; 633 UINT32 RmrOffset; 634 635 } ACPI_IORT_RMR; 636 637 typedef struct acpi_iort_rmr_desc { 638 UINT64 BaseAddress; 639 UINT64 Length; 640 UINT32 Reserved; 641 642 } ACPI_IORT_RMR_DESC; 643 644 /******************************************************************************* 645 * 646 * IVRS - I/O Virtualization Reporting Structure 647 * Version 1 648 * 649 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 650 * Revision 1.26, February 2009. 651 * 652 ******************************************************************************/ 653 654 typedef struct acpi_table_ivrs 655 { 656 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 657 UINT32 Info; /* Common virtualization info */ 658 UINT64 Reserved; 659 660 } ACPI_TABLE_IVRS; 661 662 /* Values for Info field above */ 663 664 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 665 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 666 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 667 668 669 /* IVRS subtable header */ 670 671 typedef struct acpi_ivrs_header 672 { 673 UINT8 Type; /* Subtable type */ 674 UINT8 Flags; 675 UINT16 Length; /* Subtable length */ 676 UINT16 DeviceId; /* ID of IOMMU */ 677 678 } ACPI_IVRS_HEADER; 679 680 /* Values for subtable Type above */ 681 682 enum AcpiIvrsType 683 { 684 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 685 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 686 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 687 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 688 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 689 ACPI_IVRS_TYPE_MEMORY3 = 0x22 690 }; 691 692 /* Masks for Flags field above for IVHD subtable */ 693 694 #define ACPI_IVHD_TT_ENABLE (1) 695 #define ACPI_IVHD_PASS_PW (1<<1) 696 #define ACPI_IVHD_RES_PASS_PW (1<<2) 697 #define ACPI_IVHD_ISOC (1<<3) 698 #define ACPI_IVHD_IOTLB (1<<4) 699 700 /* Masks for Flags field above for IVMD subtable */ 701 702 #define ACPI_IVMD_UNITY (1) 703 #define ACPI_IVMD_READ (1<<1) 704 #define ACPI_IVMD_WRITE (1<<2) 705 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 706 707 708 /* 709 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 710 */ 711 712 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 713 714 typedef struct acpi_ivrs_hardware_10 715 { 716 ACPI_IVRS_HEADER Header; 717 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 718 UINT64 BaseAddress; /* IOMMU control registers */ 719 UINT16 PciSegmentGroup; 720 UINT16 Info; /* MSI number and unit ID */ 721 UINT32 FeatureReporting; 722 723 } ACPI_IVRS_HARDWARE1; 724 725 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 726 727 typedef struct acpi_ivrs_hardware_11 728 { 729 ACPI_IVRS_HEADER Header; 730 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 731 UINT64 BaseAddress; /* IOMMU control registers */ 732 UINT16 PciSegmentGroup; 733 UINT16 Info; /* MSI number and unit ID */ 734 UINT32 Attributes; 735 UINT64 EfrRegisterImage; 736 UINT64 Reserved; 737 } ACPI_IVRS_HARDWARE2; 738 739 /* Masks for Info field above */ 740 741 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 742 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 743 744 745 /* 746 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 747 * Upper two bits of the Type field are the (encoded) length of the structure. 748 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 749 * are reserved for future use but not defined. 750 */ 751 typedef struct acpi_ivrs_de_header 752 { 753 UINT8 Type; 754 UINT16 Id; 755 UINT8 DataSetting; 756 757 } ACPI_IVRS_DE_HEADER; 758 759 /* Length of device entry is in the top two bits of Type field above */ 760 761 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 762 763 /* Values for device entry Type field above */ 764 765 enum AcpiIvrsDeviceEntryType 766 { 767 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 768 769 ACPI_IVRS_TYPE_PAD4 = 0, 770 ACPI_IVRS_TYPE_ALL = 1, 771 ACPI_IVRS_TYPE_SELECT = 2, 772 ACPI_IVRS_TYPE_START = 3, 773 ACPI_IVRS_TYPE_END = 4, 774 775 /* 8-byte device entries */ 776 777 ACPI_IVRS_TYPE_PAD8 = 64, 778 ACPI_IVRS_TYPE_NOT_USED = 65, 779 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 780 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 781 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 782 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 783 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 784 785 /* Variable-length device entries */ 786 787 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 788 }; 789 790 /* Values for Data field above */ 791 792 #define ACPI_IVHD_INIT_PASS (1) 793 #define ACPI_IVHD_EINT_PASS (1<<1) 794 #define ACPI_IVHD_NMI_PASS (1<<2) 795 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 796 #define ACPI_IVHD_LINT0_PASS (1<<6) 797 #define ACPI_IVHD_LINT1_PASS (1<<7) 798 799 800 /* Types 0-4: 4-byte device entry */ 801 802 typedef struct acpi_ivrs_device4 803 { 804 ACPI_IVRS_DE_HEADER Header; 805 806 } ACPI_IVRS_DEVICE4; 807 808 /* Types 66-67: 8-byte device entry */ 809 810 typedef struct acpi_ivrs_device8a 811 { 812 ACPI_IVRS_DE_HEADER Header; 813 UINT8 Reserved1; 814 UINT16 UsedId; 815 UINT8 Reserved2; 816 817 } ACPI_IVRS_DEVICE8A; 818 819 /* Types 70-71: 8-byte device entry */ 820 821 typedef struct acpi_ivrs_device8b 822 { 823 ACPI_IVRS_DE_HEADER Header; 824 UINT32 ExtendedData; 825 826 } ACPI_IVRS_DEVICE8B; 827 828 /* Values for ExtendedData above */ 829 830 #define ACPI_IVHD_ATS_DISABLED (1<<31) 831 832 /* Type 72: 8-byte device entry */ 833 834 typedef struct acpi_ivrs_device8c 835 { 836 ACPI_IVRS_DE_HEADER Header; 837 UINT8 Handle; 838 UINT16 UsedId; 839 UINT8 Variety; 840 841 } ACPI_IVRS_DEVICE8C; 842 843 /* Values for Variety field above */ 844 845 #define ACPI_IVHD_IOAPIC 1 846 #define ACPI_IVHD_HPET 2 847 848 /* Type 240: variable-length device entry */ 849 850 typedef struct acpi_ivrs_device_hid 851 { 852 ACPI_IVRS_DE_HEADER Header; 853 UINT64 AcpiHid; 854 UINT64 AcpiCid; 855 UINT8 UidType; 856 UINT8 UidLength; 857 858 } ACPI_IVRS_DEVICE_HID; 859 860 /* Values for UidType above */ 861 862 #define ACPI_IVRS_UID_NOT_PRESENT 0 863 #define ACPI_IVRS_UID_IS_INTEGER 1 864 #define ACPI_IVRS_UID_IS_STRING 2 865 866 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 867 868 typedef struct acpi_ivrs_memory 869 { 870 ACPI_IVRS_HEADER Header; 871 UINT16 AuxData; 872 UINT64 Reserved; 873 UINT64 StartAddress; 874 UINT64 MemoryLength; 875 876 } ACPI_IVRS_MEMORY; 877 878 879 /******************************************************************************* 880 * 881 * LPIT - Low Power Idle Table 882 * 883 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 884 * 885 ******************************************************************************/ 886 887 typedef struct acpi_table_lpit 888 { 889 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 890 891 } ACPI_TABLE_LPIT; 892 893 894 /* LPIT subtable header */ 895 896 typedef struct acpi_lpit_header 897 { 898 UINT32 Type; /* Subtable type */ 899 UINT32 Length; /* Subtable length */ 900 UINT16 UniqueId; 901 UINT16 Reserved; 902 UINT32 Flags; 903 904 } ACPI_LPIT_HEADER; 905 906 /* Values for subtable Type above */ 907 908 enum AcpiLpitType 909 { 910 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 911 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 912 }; 913 914 /* Masks for Flags field above */ 915 916 #define ACPI_LPIT_STATE_DISABLED (1) 917 #define ACPI_LPIT_NO_COUNTER (1<<1) 918 919 /* 920 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 921 */ 922 923 /* 0x00: Native C-state instruction based LPI structure */ 924 925 typedef struct acpi_lpit_native 926 { 927 ACPI_LPIT_HEADER Header; 928 ACPI_GENERIC_ADDRESS EntryTrigger; 929 UINT32 Residency; 930 UINT32 Latency; 931 ACPI_GENERIC_ADDRESS ResidencyCounter; 932 UINT64 CounterFrequency; 933 934 } ACPI_LPIT_NATIVE; 935 936 937 /******************************************************************************* 938 * 939 * MADT - Multiple APIC Description Table 940 * Version 3 941 * 942 ******************************************************************************/ 943 944 typedef struct acpi_table_madt 945 { 946 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 947 UINT32 Address; /* Physical address of local APIC */ 948 UINT32 Flags; 949 950 } ACPI_TABLE_MADT; 951 952 /* Masks for Flags field above */ 953 954 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 955 956 /* Values for PCATCompat flag */ 957 958 #define ACPI_MADT_DUAL_PIC 1 959 #define ACPI_MADT_MULTIPLE_APIC 0 960 961 962 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 963 964 enum AcpiMadtType 965 { 966 ACPI_MADT_TYPE_LOCAL_APIC = 0, 967 ACPI_MADT_TYPE_IO_APIC = 1, 968 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 969 ACPI_MADT_TYPE_NMI_SOURCE = 3, 970 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 971 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 972 ACPI_MADT_TYPE_IO_SAPIC = 6, 973 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 974 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 975 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 976 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 977 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 978 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 979 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 980 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 981 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 982 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 983 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 984 }; 985 986 987 /* 988 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 989 */ 990 991 /* 0: Processor Local APIC */ 992 993 typedef struct acpi_madt_local_apic 994 { 995 ACPI_SUBTABLE_HEADER Header; 996 UINT8 ProcessorId; /* ACPI processor id */ 997 UINT8 Id; /* Processor's local APIC id */ 998 UINT32 LapicFlags; 999 1000 } ACPI_MADT_LOCAL_APIC; 1001 1002 1003 /* 1: IO APIC */ 1004 1005 typedef struct acpi_madt_io_apic 1006 { 1007 ACPI_SUBTABLE_HEADER Header; 1008 UINT8 Id; /* I/O APIC ID */ 1009 UINT8 Reserved; /* Reserved - must be zero */ 1010 UINT32 Address; /* APIC physical address */ 1011 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1012 1013 } ACPI_MADT_IO_APIC; 1014 1015 1016 /* 2: Interrupt Override */ 1017 1018 typedef struct acpi_madt_interrupt_override 1019 { 1020 ACPI_SUBTABLE_HEADER Header; 1021 UINT8 Bus; /* 0 - ISA */ 1022 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1023 UINT32 GlobalIrq; /* Global system interrupt */ 1024 UINT16 IntiFlags; 1025 1026 } ACPI_MADT_INTERRUPT_OVERRIDE; 1027 1028 1029 /* 3: NMI Source */ 1030 1031 typedef struct acpi_madt_nmi_source 1032 { 1033 ACPI_SUBTABLE_HEADER Header; 1034 UINT16 IntiFlags; 1035 UINT32 GlobalIrq; /* Global system interrupt */ 1036 1037 } ACPI_MADT_NMI_SOURCE; 1038 1039 1040 /* 4: Local APIC NMI */ 1041 1042 typedef struct acpi_madt_local_apic_nmi 1043 { 1044 ACPI_SUBTABLE_HEADER Header; 1045 UINT8 ProcessorId; /* ACPI processor id */ 1046 UINT16 IntiFlags; 1047 UINT8 Lint; /* LINTn to which NMI is connected */ 1048 1049 } ACPI_MADT_LOCAL_APIC_NMI; 1050 1051 1052 /* 5: Address Override */ 1053 1054 typedef struct acpi_madt_local_apic_override 1055 { 1056 ACPI_SUBTABLE_HEADER Header; 1057 UINT16 Reserved; /* Reserved, must be zero */ 1058 UINT64 Address; /* APIC physical address */ 1059 1060 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1061 1062 1063 /* 6: I/O Sapic */ 1064 1065 typedef struct acpi_madt_io_sapic 1066 { 1067 ACPI_SUBTABLE_HEADER Header; 1068 UINT8 Id; /* I/O SAPIC ID */ 1069 UINT8 Reserved; /* Reserved, must be zero */ 1070 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1071 UINT64 Address; /* SAPIC physical address */ 1072 1073 } ACPI_MADT_IO_SAPIC; 1074 1075 1076 /* 7: Local Sapic */ 1077 1078 typedef struct acpi_madt_local_sapic 1079 { 1080 ACPI_SUBTABLE_HEADER Header; 1081 UINT8 ProcessorId; /* ACPI processor id */ 1082 UINT8 Id; /* SAPIC ID */ 1083 UINT8 Eid; /* SAPIC EID */ 1084 UINT8 Reserved[3]; /* Reserved, must be zero */ 1085 UINT32 LapicFlags; 1086 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1087 char UidString[1]; /* String UID - ACPI 3.0 */ 1088 1089 } ACPI_MADT_LOCAL_SAPIC; 1090 1091 1092 /* 8: Platform Interrupt Source */ 1093 1094 typedef struct acpi_madt_interrupt_source 1095 { 1096 ACPI_SUBTABLE_HEADER Header; 1097 UINT16 IntiFlags; 1098 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1099 UINT8 Id; /* Processor ID */ 1100 UINT8 Eid; /* Processor EID */ 1101 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1102 UINT32 GlobalIrq; /* Global system interrupt */ 1103 UINT32 Flags; /* Interrupt Source Flags */ 1104 1105 } ACPI_MADT_INTERRUPT_SOURCE; 1106 1107 /* Masks for Flags field above */ 1108 1109 #define ACPI_MADT_CPEI_OVERRIDE (1) 1110 1111 1112 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1113 1114 typedef struct acpi_madt_local_x2apic 1115 { 1116 ACPI_SUBTABLE_HEADER Header; 1117 UINT16 Reserved; /* Reserved - must be zero */ 1118 UINT32 LocalApicId; /* Processor x2APIC ID */ 1119 UINT32 LapicFlags; 1120 UINT32 Uid; /* ACPI processor UID */ 1121 1122 } ACPI_MADT_LOCAL_X2APIC; 1123 1124 1125 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1126 1127 typedef struct acpi_madt_local_x2apic_nmi 1128 { 1129 ACPI_SUBTABLE_HEADER Header; 1130 UINT16 IntiFlags; 1131 UINT32 Uid; /* ACPI processor UID */ 1132 UINT8 Lint; /* LINTn to which NMI is connected */ 1133 UINT8 Reserved[3]; /* Reserved - must be zero */ 1134 1135 } ACPI_MADT_LOCAL_X2APIC_NMI; 1136 1137 1138 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1139 1140 typedef struct acpi_madt_generic_interrupt 1141 { 1142 ACPI_SUBTABLE_HEADER Header; 1143 UINT16 Reserved; /* Reserved - must be zero */ 1144 UINT32 CpuInterfaceNumber; 1145 UINT32 Uid; 1146 UINT32 Flags; 1147 UINT32 ParkingVersion; 1148 UINT32 PerformanceInterrupt; 1149 UINT64 ParkedAddress; 1150 UINT64 BaseAddress; 1151 UINT64 GicvBaseAddress; 1152 UINT64 GichBaseAddress; 1153 UINT32 VgicInterrupt; 1154 UINT64 GicrBaseAddress; 1155 UINT64 ArmMpidr; 1156 UINT8 EfficiencyClass; 1157 UINT8 Reserved2[1]; 1158 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1159 1160 } ACPI_MADT_GENERIC_INTERRUPT; 1161 1162 /* Masks for Flags field above */ 1163 1164 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1165 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1166 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1167 1168 1169 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1170 1171 typedef struct acpi_madt_generic_distributor 1172 { 1173 ACPI_SUBTABLE_HEADER Header; 1174 UINT16 Reserved; /* Reserved - must be zero */ 1175 UINT32 GicId; 1176 UINT64 BaseAddress; 1177 UINT32 GlobalIrqBase; 1178 UINT8 Version; 1179 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1180 1181 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1182 1183 /* Values for Version field above */ 1184 1185 enum AcpiMadtGicVersion 1186 { 1187 ACPI_MADT_GIC_VERSION_NONE = 0, 1188 ACPI_MADT_GIC_VERSION_V1 = 1, 1189 ACPI_MADT_GIC_VERSION_V2 = 2, 1190 ACPI_MADT_GIC_VERSION_V3 = 3, 1191 ACPI_MADT_GIC_VERSION_V4 = 4, 1192 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1193 }; 1194 1195 1196 /* 13: Generic MSI Frame (ACPI 5.1) */ 1197 1198 typedef struct acpi_madt_generic_msi_frame 1199 { 1200 ACPI_SUBTABLE_HEADER Header; 1201 UINT16 Reserved; /* Reserved - must be zero */ 1202 UINT32 MsiFrameId; 1203 UINT64 BaseAddress; 1204 UINT32 Flags; 1205 UINT16 SpiCount; 1206 UINT16 SpiBase; 1207 1208 } ACPI_MADT_GENERIC_MSI_FRAME; 1209 1210 /* Masks for Flags field above */ 1211 1212 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1213 1214 1215 /* 14: Generic Redistributor (ACPI 5.1) */ 1216 1217 typedef struct acpi_madt_generic_redistributor 1218 { 1219 ACPI_SUBTABLE_HEADER Header; 1220 UINT16 Reserved; /* reserved - must be zero */ 1221 UINT64 BaseAddress; 1222 UINT32 Length; 1223 1224 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1225 1226 1227 /* 15: Generic Translator (ACPI 6.0) */ 1228 1229 typedef struct acpi_madt_generic_translator 1230 { 1231 ACPI_SUBTABLE_HEADER Header; 1232 UINT16 Reserved; /* reserved - must be zero */ 1233 UINT32 TranslationId; 1234 UINT64 BaseAddress; 1235 UINT32 Reserved2; 1236 1237 } ACPI_MADT_GENERIC_TRANSLATOR; 1238 1239 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1240 1241 typedef struct acpi_madt_multiproc_wakeup 1242 { 1243 ACPI_SUBTABLE_HEADER Header; 1244 UINT16 MailboxVersion; 1245 UINT32 Reserved; /* reserved - must be zero */ 1246 UINT64 BaseAddress; 1247 1248 } ACPI_MADT_MULTIPROC_WAKEUP; 1249 1250 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1251 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1252 1253 typedef struct acpi_madt_multiproc_wakeup_mailbox 1254 { 1255 UINT16 Command; 1256 UINT16 Reserved; /* reserved - must be zero */ 1257 UINT32 ApicId; 1258 UINT64 WakeupVector; 1259 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1260 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1261 1262 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1263 1264 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1265 1266 1267 /* 1268 * Common flags fields for MADT subtables 1269 */ 1270 1271 /* MADT Local APIC flags */ 1272 1273 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1274 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1275 1276 /* MADT MPS INTI flags (IntiFlags) */ 1277 1278 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1279 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1280 1281 /* Values for MPS INTI flags */ 1282 1283 #define ACPI_MADT_POLARITY_CONFORMS 0 1284 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1285 #define ACPI_MADT_POLARITY_RESERVED 2 1286 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1287 1288 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1289 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1290 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1291 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1292 1293 1294 /******************************************************************************* 1295 * 1296 * MCFG - PCI Memory Mapped Configuration table and subtable 1297 * Version 1 1298 * 1299 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1300 * 1301 ******************************************************************************/ 1302 1303 typedef struct acpi_table_mcfg 1304 { 1305 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1306 UINT8 Reserved[8]; 1307 1308 } ACPI_TABLE_MCFG; 1309 1310 1311 /* Subtable */ 1312 1313 typedef struct acpi_mcfg_allocation 1314 { 1315 UINT64 Address; /* Base address, processor-relative */ 1316 UINT16 PciSegment; /* PCI segment group number */ 1317 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1318 UINT8 EndBusNumber; /* Final PCI Bus number */ 1319 UINT32 Reserved; 1320 1321 } ACPI_MCFG_ALLOCATION; 1322 1323 1324 /******************************************************************************* 1325 * 1326 * MCHI - Management Controller Host Interface Table 1327 * Version 1 1328 * 1329 * Conforms to "Management Component Transport Protocol (MCTP) Host 1330 * Interface Specification", Revision 1.0.0a, October 13, 2009 1331 * 1332 ******************************************************************************/ 1333 1334 typedef struct acpi_table_mchi 1335 { 1336 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1337 UINT8 InterfaceType; 1338 UINT8 Protocol; 1339 UINT64 ProtocolData; 1340 UINT8 InterruptType; 1341 UINT8 Gpe; 1342 UINT8 PciDeviceFlag; 1343 UINT32 GlobalInterrupt; 1344 ACPI_GENERIC_ADDRESS ControlRegister; 1345 UINT8 PciSegment; 1346 UINT8 PciBus; 1347 UINT8 PciDevice; 1348 UINT8 PciFunction; 1349 1350 } ACPI_TABLE_MCHI; 1351 1352 1353 /******************************************************************************* 1354 * 1355 * MPST - Memory Power State Table (ACPI 5.0) 1356 * Version 1 1357 * 1358 ******************************************************************************/ 1359 1360 #define ACPI_MPST_CHANNEL_INFO \ 1361 UINT8 ChannelId; \ 1362 UINT8 Reserved1[3]; \ 1363 UINT16 PowerNodeCount; \ 1364 UINT16 Reserved2; 1365 1366 /* Main table */ 1367 1368 typedef struct acpi_table_mpst 1369 { 1370 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1371 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1372 1373 } ACPI_TABLE_MPST; 1374 1375 1376 /* Memory Platform Communication Channel Info */ 1377 1378 typedef struct acpi_mpst_channel 1379 { 1380 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1381 1382 } ACPI_MPST_CHANNEL; 1383 1384 1385 /* Memory Power Node Structure */ 1386 1387 typedef struct acpi_mpst_power_node 1388 { 1389 UINT8 Flags; 1390 UINT8 Reserved1; 1391 UINT16 NodeId; 1392 UINT32 Length; 1393 UINT64 RangeAddress; 1394 UINT64 RangeLength; 1395 UINT32 NumPowerStates; 1396 UINT32 NumPhysicalComponents; 1397 1398 } ACPI_MPST_POWER_NODE; 1399 1400 /* Values for Flags field above */ 1401 1402 #define ACPI_MPST_ENABLED 1 1403 #define ACPI_MPST_POWER_MANAGED 2 1404 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1405 1406 1407 /* Memory Power State Structure (follows POWER_NODE above) */ 1408 1409 typedef struct acpi_mpst_power_state 1410 { 1411 UINT8 PowerState; 1412 UINT8 InfoIndex; 1413 1414 } ACPI_MPST_POWER_STATE; 1415 1416 1417 /* Physical Component ID Structure (follows POWER_STATE above) */ 1418 1419 typedef struct acpi_mpst_component 1420 { 1421 UINT16 ComponentId; 1422 1423 } ACPI_MPST_COMPONENT; 1424 1425 1426 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1427 1428 typedef struct acpi_mpst_data_hdr 1429 { 1430 UINT16 CharacteristicsCount; 1431 UINT16 Reserved; 1432 1433 } ACPI_MPST_DATA_HDR; 1434 1435 typedef struct acpi_mpst_power_data 1436 { 1437 UINT8 StructureId; 1438 UINT8 Flags; 1439 UINT16 Reserved1; 1440 UINT32 AveragePower; 1441 UINT32 PowerSaving; 1442 UINT64 ExitLatency; 1443 UINT64 Reserved2; 1444 1445 } ACPI_MPST_POWER_DATA; 1446 1447 /* Values for Flags field above */ 1448 1449 #define ACPI_MPST_PRESERVE 1 1450 #define ACPI_MPST_AUTOENTRY 2 1451 #define ACPI_MPST_AUTOEXIT 4 1452 1453 1454 /* Shared Memory Region (not part of an ACPI table) */ 1455 1456 typedef struct acpi_mpst_shared 1457 { 1458 UINT32 Signature; 1459 UINT16 PccCommand; 1460 UINT16 PccStatus; 1461 UINT32 CommandRegister; 1462 UINT32 StatusRegister; 1463 UINT32 PowerStateId; 1464 UINT32 PowerNodeId; 1465 UINT64 EnergyConsumed; 1466 UINT64 AveragePower; 1467 1468 } ACPI_MPST_SHARED; 1469 1470 1471 /******************************************************************************* 1472 * 1473 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1474 * Version 1 1475 * 1476 ******************************************************************************/ 1477 1478 typedef struct acpi_table_msct 1479 { 1480 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1481 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1482 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1483 UINT32 MaxClockDomains; /* Max number of clock domains */ 1484 UINT64 MaxAddress; /* Max physical address in system */ 1485 1486 } ACPI_TABLE_MSCT; 1487 1488 1489 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1490 1491 typedef struct acpi_msct_proximity 1492 { 1493 UINT8 Revision; 1494 UINT8 Length; 1495 UINT32 RangeStart; /* Start of domain range */ 1496 UINT32 RangeEnd; /* End of domain range */ 1497 UINT32 ProcessorCapacity; 1498 UINT64 MemoryCapacity; /* In bytes */ 1499 1500 } ACPI_MSCT_PROXIMITY; 1501 1502 1503 /******************************************************************************* 1504 * 1505 * MSDM - Microsoft Data Management table 1506 * 1507 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1508 * November 29, 2011. Copyright 2011 Microsoft 1509 * 1510 ******************************************************************************/ 1511 1512 /* Basic MSDM table is only the common ACPI header */ 1513 1514 typedef struct acpi_table_msdm 1515 { 1516 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1517 1518 } ACPI_TABLE_MSDM; 1519 1520 1521 /******************************************************************************* 1522 * 1523 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1524 * Version 1 1525 * 1526 ******************************************************************************/ 1527 1528 typedef struct acpi_table_nfit 1529 { 1530 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1531 UINT32 Reserved; /* Reserved, must be zero */ 1532 1533 } ACPI_TABLE_NFIT; 1534 1535 /* Subtable header for NFIT */ 1536 1537 typedef struct acpi_nfit_header 1538 { 1539 UINT16 Type; 1540 UINT16 Length; 1541 1542 } ACPI_NFIT_HEADER; 1543 1544 1545 /* Values for subtable type in ACPI_NFIT_HEADER */ 1546 1547 enum AcpiNfitType 1548 { 1549 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1550 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1551 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1552 ACPI_NFIT_TYPE_SMBIOS = 3, 1553 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1554 ACPI_NFIT_TYPE_DATA_REGION = 5, 1555 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1556 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1557 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1558 }; 1559 1560 /* 1561 * NFIT Subtables 1562 */ 1563 1564 /* 0: System Physical Address Range Structure */ 1565 1566 typedef struct acpi_nfit_system_address 1567 { 1568 ACPI_NFIT_HEADER Header; 1569 UINT16 RangeIndex; 1570 UINT16 Flags; 1571 UINT32 Reserved; /* Reserved, must be zero */ 1572 UINT32 ProximityDomain; 1573 UINT8 RangeGuid[16]; 1574 UINT64 Address; 1575 UINT64 Length; 1576 UINT64 MemoryMapping; 1577 UINT64 LocationCookie; /* ACPI 6.4 */ 1578 1579 } ACPI_NFIT_SYSTEM_ADDRESS; 1580 1581 /* Flags */ 1582 1583 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1584 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1585 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1586 1587 /* Range Type GUIDs appear in the include/acuuid.h file */ 1588 1589 1590 /* 1: Memory Device to System Address Range Map Structure */ 1591 1592 typedef struct acpi_nfit_memory_map 1593 { 1594 ACPI_NFIT_HEADER Header; 1595 UINT32 DeviceHandle; 1596 UINT16 PhysicalId; 1597 UINT16 RegionId; 1598 UINT16 RangeIndex; 1599 UINT16 RegionIndex; 1600 UINT64 RegionSize; 1601 UINT64 RegionOffset; 1602 UINT64 Address; 1603 UINT16 InterleaveIndex; 1604 UINT16 InterleaveWays; 1605 UINT16 Flags; 1606 UINT16 Reserved; /* Reserved, must be zero */ 1607 1608 } ACPI_NFIT_MEMORY_MAP; 1609 1610 /* Flags */ 1611 1612 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1613 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1614 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1615 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1616 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1617 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1618 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1619 1620 1621 /* 2: Interleave Structure */ 1622 1623 typedef struct acpi_nfit_interleave 1624 { 1625 ACPI_NFIT_HEADER Header; 1626 UINT16 InterleaveIndex; 1627 UINT16 Reserved; /* Reserved, must be zero */ 1628 UINT32 LineCount; 1629 UINT32 LineSize; 1630 UINT32 LineOffset[1]; /* Variable length */ 1631 1632 } ACPI_NFIT_INTERLEAVE; 1633 1634 1635 /* 3: SMBIOS Management Information Structure */ 1636 1637 typedef struct acpi_nfit_smbios 1638 { 1639 ACPI_NFIT_HEADER Header; 1640 UINT32 Reserved; /* Reserved, must be zero */ 1641 UINT8 Data[1]; /* Variable length */ 1642 1643 } ACPI_NFIT_SMBIOS; 1644 1645 1646 /* 4: NVDIMM Control Region Structure */ 1647 1648 typedef struct acpi_nfit_control_region 1649 { 1650 ACPI_NFIT_HEADER Header; 1651 UINT16 RegionIndex; 1652 UINT16 VendorId; 1653 UINT16 DeviceId; 1654 UINT16 RevisionId; 1655 UINT16 SubsystemVendorId; 1656 UINT16 SubsystemDeviceId; 1657 UINT16 SubsystemRevisionId; 1658 UINT8 ValidFields; 1659 UINT8 ManufacturingLocation; 1660 UINT16 ManufacturingDate; 1661 UINT8 Reserved[2]; /* Reserved, must be zero */ 1662 UINT32 SerialNumber; 1663 UINT16 Code; 1664 UINT16 Windows; 1665 UINT64 WindowSize; 1666 UINT64 CommandOffset; 1667 UINT64 CommandSize; 1668 UINT64 StatusOffset; 1669 UINT64 StatusSize; 1670 UINT16 Flags; 1671 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1672 1673 } ACPI_NFIT_CONTROL_REGION; 1674 1675 /* Flags */ 1676 1677 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1678 1679 /* ValidFields bits */ 1680 1681 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1682 1683 1684 /* 5: NVDIMM Block Data Window Region Structure */ 1685 1686 typedef struct acpi_nfit_data_region 1687 { 1688 ACPI_NFIT_HEADER Header; 1689 UINT16 RegionIndex; 1690 UINT16 Windows; 1691 UINT64 Offset; 1692 UINT64 Size; 1693 UINT64 Capacity; 1694 UINT64 StartAddress; 1695 1696 } ACPI_NFIT_DATA_REGION; 1697 1698 1699 /* 6: Flush Hint Address Structure */ 1700 1701 typedef struct acpi_nfit_flush_address 1702 { 1703 ACPI_NFIT_HEADER Header; 1704 UINT32 DeviceHandle; 1705 UINT16 HintCount; 1706 UINT8 Reserved[6]; /* Reserved, must be zero */ 1707 UINT64 HintAddress[1]; /* Variable length */ 1708 1709 } ACPI_NFIT_FLUSH_ADDRESS; 1710 1711 1712 /* 7: Platform Capabilities Structure */ 1713 1714 typedef struct acpi_nfit_capabilities 1715 { 1716 ACPI_NFIT_HEADER Header; 1717 UINT8 HighestCapability; 1718 UINT8 Reserved[3]; /* Reserved, must be zero */ 1719 UINT32 Capabilities; 1720 UINT32 Reserved2; 1721 1722 } ACPI_NFIT_CAPABILITIES; 1723 1724 /* Capabilities Flags */ 1725 1726 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1727 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1728 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1729 1730 1731 /* 1732 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1733 */ 1734 typedef struct nfit_device_handle 1735 { 1736 UINT32 Handle; 1737 1738 } NFIT_DEVICE_HANDLE; 1739 1740 /* Device handle construction and extraction macros */ 1741 1742 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1743 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1744 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1745 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1746 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1747 1748 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1749 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1750 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1751 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1752 #define ACPI_NFIT_NODE_ID_OFFSET 16 1753 1754 /* Macro to construct a NFIT/NVDIMM device handle */ 1755 1756 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1757 ((dimm) | \ 1758 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1759 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1760 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1761 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1762 1763 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1764 1765 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1766 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1767 1768 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1769 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1770 1771 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1772 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1773 1774 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1775 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1776 1777 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1778 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1779 1780 1781 /******************************************************************************* 1782 * 1783 * NHLT - Non HD Audio Link Table 1784 * 1785 * Conforms to: Intel Smart Sound Technology NHLT Specification 1786 * Version 0.8.1, January 2020. 1787 * 1788 ******************************************************************************/ 1789 1790 /* Main table */ 1791 1792 typedef struct acpi_table_nhlt 1793 { 1794 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1795 UINT8 EndpointCount; 1796 1797 } ACPI_TABLE_NHLT; 1798 1799 typedef struct acpi_nhlt_endpoint 1800 { 1801 UINT32 DescriptorLength; 1802 UINT8 LinkType; 1803 UINT8 InstanceId; 1804 UINT16 VendorId; 1805 UINT16 DeviceId; 1806 UINT16 RevisionId; 1807 UINT32 SubsystemId; 1808 UINT8 DeviceType; 1809 UINT8 Direction; 1810 UINT8 VirtualBusId; 1811 1812 } ACPI_NHLT_ENDPOINT; 1813 1814 /* Types for LinkType field above */ 1815 1816 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1817 #define ACPI_NHLT_RESERVED_DSP 1 1818 #define ACPI_NHLT_PDM 2 1819 #define ACPI_NHLT_SSP 3 1820 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1821 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1822 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1823 1824 /* All other values above are reserved */ 1825 1826 /* Values for DeviceId field above */ 1827 1828 #define ACPI_NHLT_PDM_DMIC 0xAE20 1829 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1830 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1831 1832 /* Values for DeviceType field above */ 1833 1834 /* SSP Link */ 1835 1836 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1837 #define ACPI_NHLT_LINK_FM 1 1838 #define ACPI_NHLT_LINK_MODEM 2 1839 /* 3 is reserved */ 1840 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1841 1842 /* PDM Link */ 1843 1844 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1845 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1846 1847 /* Values for Direction field above */ 1848 1849 #define ACPI_NHLT_DIR_RENDER 0 1850 #define ACPI_NHLT_DIR_CAPTURE 1 1851 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1852 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1853 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1854 1855 typedef struct acpi_nhlt_device_specific_config 1856 { 1857 UINT32 CapabilitiesSize; 1858 UINT8 VirtualSlot; 1859 UINT8 ConfigType; 1860 1861 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG; 1862 1863 typedef struct acpi_nhlt_device_specific_config_a 1864 { 1865 UINT32 CapabilitiesSize; 1866 UINT8 VirtualSlot; 1867 UINT8 ConfigType; 1868 UINT8 ArrayType; 1869 1870 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_A; 1871 1872 /* Values for Config Type above */ 1873 1874 #define ACPI_NHLT_TYPE_MIC_ARRAY 0x01 1875 #define ACPI_NHLT_TYPE_GENERIC 0x00 1876 1877 /* Mask for Extension field of ArrayType */ 1878 1879 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x10 1880 1881 typedef struct acpi_nhlt_device_specific_config_b 1882 { 1883 UINT32 CapabilitiesSize; 1884 1885 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_B; 1886 1887 typedef struct acpi_nhlt_device_specific_config_c 1888 { 1889 UINT32 CapabilitiesSize; 1890 UINT8 VirtualSlot; 1891 1892 } ACPI_NHLT_DEVICE_SPECIFIC_CONFIG_C; 1893 1894 typedef struct acpi_nhlt_wave_extensible 1895 { 1896 UINT16 FormatTag; 1897 UINT16 ChannelCount; 1898 UINT32 SamplesPerSec; 1899 UINT32 AvgBytesPerSec; 1900 UINT16 BlockAlign; 1901 UINT16 BitsPerSample; 1902 UINT16 ExtraFormatSize; 1903 UINT16 ValidBitsPerSample; 1904 UINT32 ChannelMask; 1905 UINT8 SubFormatGuid[16]; 1906 1907 } ACPI_NHLT_WAVE_EXTENSIBLE; 1908 1909 /* Values for ChannelMask above */ 1910 1911 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1912 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1913 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1914 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1915 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1916 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1917 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1918 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1919 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1920 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1921 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1922 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1923 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1924 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1925 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1926 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1927 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1928 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1929 1930 typedef struct acpi_nhlt_format_config 1931 { 1932 ACPI_NHLT_WAVE_EXTENSIBLE Format; 1933 UINT32 CapabilitySize; 1934 UINT8 Capabilities[]; 1935 1936 } ACPI_NHLT_FORMAT_CONFIG; 1937 1938 typedef struct acpi_nhlt_formats_config 1939 { 1940 UINT8 FormatsCount; 1941 1942 } ACPI_NHLT_FORMATS_CONFIG; 1943 1944 typedef struct acpi_nhlt_device_specific_hdr 1945 { 1946 UINT8 VirtualSlot; 1947 UINT8 ConfigType; 1948 1949 } ACPI_NHLT_DEVICE_SPECIFIC_HDR; 1950 1951 /* Types for ConfigType above */ 1952 1953 #define ACPI_NHLT_GENERIC 0 1954 #define ACPI_NHLT_MIC 1 1955 #define ACPI_NHLT_RENDER 3 1956 1957 typedef struct acpi_nhlt_mic_device_specific_config 1958 { 1959 ACPI_NHLT_DEVICE_SPECIFIC_HDR DeviceConfig; 1960 UINT8 ArrayTypeExt; 1961 1962 } ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG; 1963 1964 /* Values for ArrayTypeExt above */ 1965 1966 #define SMALL_LINEAR_2ELEMENT 0x0A 1967 #define BIG_LINEAR_2ELEMENT 0x0B 1968 #define FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1969 #define PLANAR_LSHAPED_4ELEMENT 0x0D 1970 #define SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1971 #define VENDOR_DEFINED 0x0F 1972 #define ARRAY_TYPE_MASK 0x0F 1973 #define ARRAY_TYPE_EXT_MASK 0x10 1974 1975 #define NO_EXTENSION 0x0 1976 #define MIC_SNR_SENSITIVITY_EXT 0x1 1977 1978 1979 typedef struct acpi_nhlt_vendor_mic_config 1980 { 1981 UINT8 Type; 1982 UINT8 Panel; 1983 UINT16 SpeakerPositionDistance; // mm 1984 UINT16 HorizontalOffset; // mm 1985 UINT16 VerticalOffset; // mm 1986 UINT8 FrequencyLowBand; // 5*Hz 1987 UINT8 FrequencyHighBand; // 500*Hz 1988 UINT16 DirectionAngle; // -180 - + 180 1989 UINT16 ElevationAngle; // -180 - + 180 1990 UINT16 WorkVerticalAngleBegin; // -180 - + 180 with 2 deg step 1991 UINT16 WorkVerticalAngleEnd; // -180 - + 180 with 2 deg step 1992 UINT16 WorkHorizontalAngleBegin; // -180 - + 180 with 2 deg step 1993 UINT16 WorkHorizontalAngleEnd; // -180 - + 180 with 2 deg step 1994 1995 } ACPI_NHLT_VENDOR_MIC_CONFIG; 1996 1997 /* Values for Type field above */ 1998 1999 #define MIC_OMNIDIRECTIONAL 0 2000 #define MIC_SUBCARDIOID 1 2001 #define MIC_CARDIOID 2 2002 #define MIC_SUPER_CARDIOID 3 2003 #define MIC_HYPER_CARDIOID 4 2004 #define MIC_8_SHAPED 5 2005 #define MIC_VENDOR_DEFINED 7 2006 2007 /* Values for Panel field above */ 2008 2009 #define MIC_TOP 0 2010 #define MIC_BOTTOM 1 2011 #define MIC_LEFT 2 2012 #define MIC_RIGHT 3 2013 #define MIC_FRONT 4 2014 #define MIC_REAR 5 2015 2016 typedef struct acpi_nhlt_vendor_mic_device_specific_config 2017 { 2018 ACPI_NHLT_MIC_DEVICE_SPECIFIC_CONFIG MicArrayDeviceConfig; 2019 UINT8 NumberOfMicrophones; 2020 ACPI_NHLT_VENDOR_MIC_CONFIG MicConfig[]; // Indexed by NumberOfMicrophones 2021 2022 } ACPI_NHLT_VENDOR_MIC_DEVICE_SPECIFIC_CONFIG; 2023 2024 /* Microphone SNR and Sensitivity extension */ 2025 2026 typedef struct acpi_nhlt_mic_snr_sensitivity_extension 2027 { 2028 UINT32 SNR; 2029 UINT32 Sensitivity; 2030 2031 } ACPI_NHLT_MIC_SNR_SENSITIVITY_EXTENSION; 2032 2033 typedef struct acpi_nhlt_render_feedback_device_specific_config 2034 { 2035 ACPI_NHLT_DEVICE_SPECIFIC_CONFIG DeviceConfig; 2036 UINT8 FeedbackVirtualSlot; // Render slot in case of capture 2037 UINT16 FeedbackChannels; // Informative only 2038 UINT16 FeedbackValidBitsPerSample; 2039 2040 } ACPI_NHLT_RENDER_FEEDBACK_DEVICE_SPECIFIC_CONFIG; 2041 2042 /* Linux-specific structures */ 2043 2044 typedef struct acpi_nhlt_linux_specific_count 2045 { 2046 UINT8 StructureCount; 2047 2048 } ACPI_NHLT_LINUX_SPECIFIC_COUNT; 2049 2050 typedef struct acpi_nhlt_linux_specific_data 2051 { 2052 UINT8 DeviceId[16]; 2053 UINT8 DeviceInstanceId; 2054 UINT8 DevicePortId; 2055 UINT8 Filler[18]; 2056 2057 } ACPI_NHLT_LINUX_SPECIFIC_DATA; 2058 2059 typedef struct acpi_nhlt_table_terminator 2060 { 2061 UINT32 TerminatorValue; 2062 UINT32 TerminatorSignature; 2063 2064 } ACPI_NHLT_TABLE_TERMINATOR; 2065 2066 2067 /******************************************************************************* 2068 * 2069 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2070 * Version 2 (ACPI 6.2) 2071 * 2072 ******************************************************************************/ 2073 2074 typedef struct acpi_table_pcct 2075 { 2076 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2077 UINT32 Flags; 2078 UINT64 Reserved; 2079 2080 } ACPI_TABLE_PCCT; 2081 2082 /* Values for Flags field above */ 2083 2084 #define ACPI_PCCT_DOORBELL 1 2085 2086 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2087 2088 enum AcpiPcctType 2089 { 2090 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2091 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2092 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2093 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2094 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2095 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2096 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2097 }; 2098 2099 /* 2100 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2101 */ 2102 2103 /* 0: Generic Communications Subspace */ 2104 2105 typedef struct acpi_pcct_subspace 2106 { 2107 ACPI_SUBTABLE_HEADER Header; 2108 UINT8 Reserved[6]; 2109 UINT64 BaseAddress; 2110 UINT64 Length; 2111 ACPI_GENERIC_ADDRESS DoorbellRegister; 2112 UINT64 PreserveMask; 2113 UINT64 WriteMask; 2114 UINT32 Latency; 2115 UINT32 MaxAccessRate; 2116 UINT16 MinTurnaroundTime; 2117 2118 } ACPI_PCCT_SUBSPACE; 2119 2120 2121 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2122 2123 typedef struct acpi_pcct_hw_reduced 2124 { 2125 ACPI_SUBTABLE_HEADER Header; 2126 UINT32 PlatformInterrupt; 2127 UINT8 Flags; 2128 UINT8 Reserved; 2129 UINT64 BaseAddress; 2130 UINT64 Length; 2131 ACPI_GENERIC_ADDRESS DoorbellRegister; 2132 UINT64 PreserveMask; 2133 UINT64 WriteMask; 2134 UINT32 Latency; 2135 UINT32 MaxAccessRate; 2136 UINT16 MinTurnaroundTime; 2137 2138 } ACPI_PCCT_HW_REDUCED; 2139 2140 2141 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2142 2143 typedef struct acpi_pcct_hw_reduced_type2 2144 { 2145 ACPI_SUBTABLE_HEADER Header; 2146 UINT32 PlatformInterrupt; 2147 UINT8 Flags; 2148 UINT8 Reserved; 2149 UINT64 BaseAddress; 2150 UINT64 Length; 2151 ACPI_GENERIC_ADDRESS DoorbellRegister; 2152 UINT64 PreserveMask; 2153 UINT64 WriteMask; 2154 UINT32 Latency; 2155 UINT32 MaxAccessRate; 2156 UINT16 MinTurnaroundTime; 2157 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2158 UINT64 AckPreserveMask; 2159 UINT64 AckWriteMask; 2160 2161 } ACPI_PCCT_HW_REDUCED_TYPE2; 2162 2163 2164 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2165 2166 typedef struct acpi_pcct_ext_pcc_master 2167 { 2168 ACPI_SUBTABLE_HEADER Header; 2169 UINT32 PlatformInterrupt; 2170 UINT8 Flags; 2171 UINT8 Reserved1; 2172 UINT64 BaseAddress; 2173 UINT32 Length; 2174 ACPI_GENERIC_ADDRESS DoorbellRegister; 2175 UINT64 PreserveMask; 2176 UINT64 WriteMask; 2177 UINT32 Latency; 2178 UINT32 MaxAccessRate; 2179 UINT32 MinTurnaroundTime; 2180 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2181 UINT64 AckPreserveMask; 2182 UINT64 AckSetMask; 2183 UINT64 Reserved2; 2184 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2185 UINT64 CmdCompleteMask; 2186 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2187 UINT64 CmdUpdatePreserveMask; 2188 UINT64 CmdUpdateSetMask; 2189 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2190 UINT64 ErrorStatusMask; 2191 2192 } ACPI_PCCT_EXT_PCC_MASTER; 2193 2194 2195 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2196 2197 typedef struct acpi_pcct_ext_pcc_slave 2198 { 2199 ACPI_SUBTABLE_HEADER Header; 2200 UINT32 PlatformInterrupt; 2201 UINT8 Flags; 2202 UINT8 Reserved1; 2203 UINT64 BaseAddress; 2204 UINT32 Length; 2205 ACPI_GENERIC_ADDRESS DoorbellRegister; 2206 UINT64 PreserveMask; 2207 UINT64 WriteMask; 2208 UINT32 Latency; 2209 UINT32 MaxAccessRate; 2210 UINT32 MinTurnaroundTime; 2211 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2212 UINT64 AckPreserveMask; 2213 UINT64 AckSetMask; 2214 UINT64 Reserved2; 2215 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2216 UINT64 CmdCompleteMask; 2217 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2218 UINT64 CmdUpdatePreserveMask; 2219 UINT64 CmdUpdateSetMask; 2220 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2221 UINT64 ErrorStatusMask; 2222 2223 } ACPI_PCCT_EXT_PCC_SLAVE; 2224 2225 /* 5: HW Registers based Communications Subspace */ 2226 2227 typedef struct acpi_pcct_hw_reg 2228 { 2229 ACPI_SUBTABLE_HEADER Header; 2230 UINT16 Version; 2231 UINT64 BaseAddress; 2232 UINT64 Length; 2233 ACPI_GENERIC_ADDRESS DoorbellRegister; 2234 UINT64 DoorbellPreserve; 2235 UINT64 DoorbellWrite; 2236 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2237 UINT64 CmdCompleteMask; 2238 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2239 UINT64 ErrorStatusMask; 2240 UINT32 NominalLatency; 2241 UINT32 MinTurnaroundTime; 2242 2243 } ACPI_PCCT_HW_REG; 2244 2245 2246 /* Values for doorbell flags above */ 2247 2248 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2249 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2250 2251 2252 /* 2253 * PCC memory structures (not part of the ACPI table) 2254 */ 2255 2256 /* Shared Memory Region */ 2257 2258 typedef struct acpi_pcct_shared_memory 2259 { 2260 UINT32 Signature; 2261 UINT16 Command; 2262 UINT16 Status; 2263 2264 } ACPI_PCCT_SHARED_MEMORY; 2265 2266 2267 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2268 2269 typedef struct acpi_pcct_ext_pcc_shared_memory 2270 { 2271 UINT32 Signature; 2272 UINT32 Flags; 2273 UINT32 Length; 2274 UINT32 Command; 2275 2276 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2277 2278 2279 /******************************************************************************* 2280 * 2281 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2282 * Version 0 2283 * 2284 ******************************************************************************/ 2285 2286 typedef struct acpi_table_pdtt 2287 { 2288 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2289 UINT8 TriggerCount; 2290 UINT8 Reserved[3]; 2291 UINT32 ArrayOffset; 2292 2293 } ACPI_TABLE_PDTT; 2294 2295 2296 /* 2297 * PDTT Communication Channel Identifier Structure. 2298 * The number of these structures is defined by TriggerCount above, 2299 * starting at ArrayOffset. 2300 */ 2301 typedef struct acpi_pdtt_channel 2302 { 2303 UINT8 SubchannelId; 2304 UINT8 Flags; 2305 2306 } ACPI_PDTT_CHANNEL; 2307 2308 /* Flags for above */ 2309 2310 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2311 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2312 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2313 2314 2315 /******************************************************************************* 2316 * 2317 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2318 * Version 1 2319 * 2320 ******************************************************************************/ 2321 2322 typedef struct acpi_table_phat 2323 { 2324 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2325 2326 } ACPI_TABLE_PHAT; 2327 2328 /* Common header for PHAT subtables that follow main table */ 2329 2330 typedef struct acpi_phat_header 2331 { 2332 UINT16 Type; 2333 UINT16 Length; 2334 UINT8 Revision; 2335 2336 } ACPI_PHAT_HEADER; 2337 2338 2339 /* Values for Type field above */ 2340 2341 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2342 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2343 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2344 2345 /* 2346 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2347 */ 2348 2349 /* 0: Firmware Version Data Record */ 2350 2351 typedef struct acpi_phat_version_data 2352 { 2353 ACPI_PHAT_HEADER Header; 2354 UINT8 Reserved[3]; 2355 UINT32 ElementCount; 2356 2357 } ACPI_PHAT_VERSION_DATA; 2358 2359 typedef struct acpi_phat_version_element 2360 { 2361 UINT8 Guid[16]; 2362 UINT64 VersionValue; 2363 UINT32 ProducerId; 2364 2365 } ACPI_PHAT_VERSION_ELEMENT; 2366 2367 2368 /* 1: Firmware Health Data Record */ 2369 2370 typedef struct acpi_phat_health_data 2371 { 2372 ACPI_PHAT_HEADER Header; 2373 UINT8 Reserved[2]; 2374 UINT8 Health; 2375 UINT8 DeviceGuid[16]; 2376 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2377 2378 } ACPI_PHAT_HEALTH_DATA; 2379 2380 /* Values for Health field above */ 2381 2382 #define ACPI_PHAT_ERRORS_FOUND 0 2383 #define ACPI_PHAT_NO_ERRORS 1 2384 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2385 #define ACPI_PHAT_ADVISORY 3 2386 2387 2388 /******************************************************************************* 2389 * 2390 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2391 * Version 1 2392 * 2393 ******************************************************************************/ 2394 2395 typedef struct acpi_table_pmtt 2396 { 2397 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2398 UINT32 MemoryDeviceCount; 2399 /* 2400 * Immediately followed by: 2401 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2402 */ 2403 2404 } ACPI_TABLE_PMTT; 2405 2406 2407 /* Common header for PMTT subtables that follow main table */ 2408 2409 typedef struct acpi_pmtt_header 2410 { 2411 UINT8 Type; 2412 UINT8 Reserved1; 2413 UINT16 Length; 2414 UINT16 Flags; 2415 UINT16 Reserved2; 2416 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2417 /* 2418 * Immediately followed by: 2419 * UINT8 TypeSpecificData[] 2420 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2421 */ 2422 2423 } ACPI_PMTT_HEADER; 2424 2425 /* Values for Type field above */ 2426 2427 #define ACPI_PMTT_TYPE_SOCKET 0 2428 #define ACPI_PMTT_TYPE_CONTROLLER 1 2429 #define ACPI_PMTT_TYPE_DIMM 2 2430 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2431 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2432 2433 /* Values for Flags field above */ 2434 2435 #define ACPI_PMTT_TOP_LEVEL 0x0001 2436 #define ACPI_PMTT_PHYSICAL 0x0002 2437 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2438 2439 2440 /* 2441 * PMTT subtables, correspond to Type in acpi_pmtt_header 2442 */ 2443 2444 2445 /* 0: Socket Structure */ 2446 2447 typedef struct acpi_pmtt_socket 2448 { 2449 ACPI_PMTT_HEADER Header; 2450 UINT16 SocketId; 2451 UINT16 Reserved; 2452 2453 } ACPI_PMTT_SOCKET; 2454 /* 2455 * Immediately followed by: 2456 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2457 */ 2458 2459 2460 /* 1: Memory Controller subtable */ 2461 2462 typedef struct acpi_pmtt_controller 2463 { 2464 ACPI_PMTT_HEADER Header; 2465 UINT16 ControllerId; 2466 UINT16 Reserved; 2467 2468 } ACPI_PMTT_CONTROLLER; 2469 /* 2470 * Immediately followed by: 2471 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2472 */ 2473 2474 2475 /* 2: Physical Component Identifier (DIMM) */ 2476 2477 typedef struct acpi_pmtt_physical_component 2478 { 2479 ACPI_PMTT_HEADER Header; 2480 UINT32 BiosHandle; 2481 2482 } ACPI_PMTT_PHYSICAL_COMPONENT; 2483 2484 2485 /* 0xFF: Vendor Specific Data */ 2486 2487 typedef struct acpi_pmtt_vendor_specific 2488 { 2489 ACPI_PMTT_HEADER Header; 2490 UINT8 TypeUuid[16]; 2491 UINT8 Specific[]; 2492 /* 2493 * Immediately followed by: 2494 * UINT8 VendorSpecificData[]; 2495 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2496 */ 2497 2498 } ACPI_PMTT_VENDOR_SPECIFIC; 2499 2500 2501 /******************************************************************************* 2502 * 2503 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2504 * Version 1 2505 * 2506 ******************************************************************************/ 2507 2508 typedef struct acpi_table_pptt 2509 { 2510 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2511 2512 } ACPI_TABLE_PPTT; 2513 2514 /* Values for Type field above */ 2515 2516 enum AcpiPpttType 2517 { 2518 ACPI_PPTT_TYPE_PROCESSOR = 0, 2519 ACPI_PPTT_TYPE_CACHE = 1, 2520 ACPI_PPTT_TYPE_ID = 2, 2521 ACPI_PPTT_TYPE_RESERVED = 3 2522 }; 2523 2524 2525 /* 0: Processor Hierarchy Node Structure */ 2526 2527 typedef struct acpi_pptt_processor 2528 { 2529 ACPI_SUBTABLE_HEADER Header; 2530 UINT16 Reserved; 2531 UINT32 Flags; 2532 UINT32 Parent; 2533 UINT32 AcpiProcessorId; 2534 UINT32 NumberOfPrivResources; 2535 2536 } ACPI_PPTT_PROCESSOR; 2537 2538 /* Flags */ 2539 2540 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2541 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2542 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2543 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2544 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2545 2546 2547 /* 1: Cache Type Structure */ 2548 2549 typedef struct acpi_pptt_cache 2550 { 2551 ACPI_SUBTABLE_HEADER Header; 2552 UINT16 Reserved; 2553 UINT32 Flags; 2554 UINT32 NextLevelOfCache; 2555 UINT32 Size; 2556 UINT32 NumberOfSets; 2557 UINT8 Associativity; 2558 UINT8 Attributes; 2559 UINT16 LineSize; 2560 2561 } ACPI_PPTT_CACHE; 2562 2563 /* 1: Cache Type Structure for PPTT version 3 */ 2564 2565 typedef struct acpi_pptt_cache_v1 2566 { 2567 UINT32 CacheId; 2568 2569 } ACPI_PPTT_CACHE_V1; 2570 2571 2572 /* Flags */ 2573 2574 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2575 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2576 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2577 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2578 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2579 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2580 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2581 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2582 2583 /* Masks for Attributes */ 2584 2585 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2586 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2587 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2588 2589 /* Attributes describing cache */ 2590 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2591 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2592 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2593 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2594 2595 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2596 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2597 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2598 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2599 2600 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2601 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2602 2603 /* 2: ID Structure */ 2604 2605 typedef struct acpi_pptt_id 2606 { 2607 ACPI_SUBTABLE_HEADER Header; 2608 UINT16 Reserved; 2609 UINT32 VendorId; 2610 UINT64 Level1Id; 2611 UINT64 Level2Id; 2612 UINT16 MajorRev; 2613 UINT16 MinorRev; 2614 UINT16 SpinRev; 2615 2616 } ACPI_PPTT_ID; 2617 2618 2619 /******************************************************************************* 2620 * 2621 * PRMT - Platform Runtime Mechanism Table 2622 * Version 1 2623 * 2624 ******************************************************************************/ 2625 2626 typedef struct acpi_table_prmt 2627 { 2628 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2629 2630 } ACPI_TABLE_PRMT; 2631 2632 typedef struct acpi_table_prmt_header 2633 { 2634 UINT8 PlatformGuid[16]; 2635 UINT32 ModuleInfoOffset; 2636 UINT32 ModuleInfoCount; 2637 2638 } ACPI_TABLE_PRMT_HEADER; 2639 2640 typedef struct acpi_prmt_module_header 2641 { 2642 UINT16 Revision; 2643 UINT16 Length; 2644 2645 } ACPI_PRMT_MODULE_HEADER; 2646 2647 typedef struct acpi_prmt_module_info 2648 { 2649 UINT16 Revision; 2650 UINT16 Length; 2651 UINT8 ModuleGuid[16]; 2652 UINT16 MajorRev; 2653 UINT16 MinorRev; 2654 UINT16 HandlerInfoCount; 2655 UINT32 HandlerInfoOffset; 2656 UINT64 MmioListPointer; 2657 2658 } ACPI_PRMT_MODULE_INFO; 2659 2660 typedef struct acpi_prmt_handler_info 2661 { 2662 UINT16 Revision; 2663 UINT16 Length; 2664 UINT8 HandlerGuid[16]; 2665 UINT64 HandlerAddress; 2666 UINT64 StaticDataBufferAddress; 2667 UINT64 AcpiParamBufferAddress; 2668 2669 } ACPI_PRMT_HANDLER_INFO; 2670 2671 2672 /******************************************************************************* 2673 * 2674 * RASF - RAS Feature Table (ACPI 5.0) 2675 * Version 1 2676 * 2677 ******************************************************************************/ 2678 2679 typedef struct acpi_table_rasf 2680 { 2681 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2682 UINT8 ChannelId[12]; 2683 2684 } ACPI_TABLE_RASF; 2685 2686 /* RASF Platform Communication Channel Shared Memory Region */ 2687 2688 typedef struct acpi_rasf_shared_memory 2689 { 2690 UINT32 Signature; 2691 UINT16 Command; 2692 UINT16 Status; 2693 UINT16 Version; 2694 UINT8 Capabilities[16]; 2695 UINT8 SetCapabilities[16]; 2696 UINT16 NumParameterBlocks; 2697 UINT32 SetCapabilitiesStatus; 2698 2699 } ACPI_RASF_SHARED_MEMORY; 2700 2701 /* RASF Parameter Block Structure Header */ 2702 2703 typedef struct acpi_rasf_parameter_block 2704 { 2705 UINT16 Type; 2706 UINT16 Version; 2707 UINT16 Length; 2708 2709 } ACPI_RASF_PARAMETER_BLOCK; 2710 2711 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2712 2713 typedef struct acpi_rasf_patrol_scrub_parameter 2714 { 2715 ACPI_RASF_PARAMETER_BLOCK Header; 2716 UINT16 PatrolScrubCommand; 2717 UINT64 RequestedAddressRange[2]; 2718 UINT64 ActualAddressRange[2]; 2719 UINT16 Flags; 2720 UINT8 RequestedSpeed; 2721 2722 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2723 2724 /* Masks for Flags and Speed fields above */ 2725 2726 #define ACPI_RASF_SCRUBBER_RUNNING 1 2727 #define ACPI_RASF_SPEED (7<<1) 2728 #define ACPI_RASF_SPEED_SLOW (0<<1) 2729 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2730 #define ACPI_RASF_SPEED_FAST (7<<1) 2731 2732 /* Channel Commands */ 2733 2734 enum AcpiRasfCommands 2735 { 2736 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2737 }; 2738 2739 /* Platform RAS Capabilities */ 2740 2741 enum AcpiRasfCapabiliities 2742 { 2743 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2744 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2745 }; 2746 2747 /* Patrol Scrub Commands */ 2748 2749 enum AcpiRasfPatrolScrubCommands 2750 { 2751 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2752 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2753 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2754 }; 2755 2756 /* Channel Command flags */ 2757 2758 #define ACPI_RASF_GENERATE_SCI (1<<15) 2759 2760 /* Status values */ 2761 2762 enum AcpiRasfStatus 2763 { 2764 ACPI_RASF_SUCCESS = 0, 2765 ACPI_RASF_NOT_VALID = 1, 2766 ACPI_RASF_NOT_SUPPORTED = 2, 2767 ACPI_RASF_BUSY = 3, 2768 ACPI_RASF_FAILED = 4, 2769 ACPI_RASF_ABORTED = 5, 2770 ACPI_RASF_INVALID_DATA = 6 2771 }; 2772 2773 /* Status flags */ 2774 2775 #define ACPI_RASF_COMMAND_COMPLETE (1) 2776 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2777 #define ACPI_RASF_ERROR (1<<2) 2778 #define ACPI_RASF_STATUS (0x1F<<3) 2779 2780 2781 /******************************************************************************* 2782 * 2783 * RGRT - Regulatory Graphics Resource Table 2784 * Version 1 2785 * 2786 * Conforms to "ACPI RGRT" available at: 2787 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 2788 * 2789 ******************************************************************************/ 2790 2791 typedef struct acpi_table_rgrt 2792 { 2793 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2794 UINT16 Version; 2795 UINT8 ImageType; 2796 UINT8 Reserved; 2797 UINT8 Image[0]; 2798 2799 } ACPI_TABLE_RGRT; 2800 2801 /* ImageType values */ 2802 2803 enum AcpiRgrtImageType 2804 { 2805 ACPI_RGRT_TYPE_RESERVED0 = 0, 2806 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2807 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2808 }; 2809 2810 2811 /******************************************************************************* 2812 * 2813 * SBST - Smart Battery Specification Table 2814 * Version 1 2815 * 2816 ******************************************************************************/ 2817 2818 typedef struct acpi_table_sbst 2819 { 2820 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2821 UINT32 WarningLevel; 2822 UINT32 LowLevel; 2823 UINT32 CriticalLevel; 2824 2825 } ACPI_TABLE_SBST; 2826 2827 2828 /******************************************************************************* 2829 * 2830 * SDEI - Software Delegated Exception Interface Descriptor Table 2831 * 2832 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2833 * May 8th, 2017. Copyright 2017 ARM Ltd. 2834 * 2835 ******************************************************************************/ 2836 2837 typedef struct acpi_table_sdei 2838 { 2839 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2840 2841 } ACPI_TABLE_SDEI; 2842 2843 2844 /******************************************************************************* 2845 * 2846 * SDEV - Secure Devices Table (ACPI 6.2) 2847 * Version 1 2848 * 2849 ******************************************************************************/ 2850 2851 typedef struct acpi_table_sdev 2852 { 2853 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2854 2855 } ACPI_TABLE_SDEV; 2856 2857 2858 typedef struct acpi_sdev_header 2859 { 2860 UINT8 Type; 2861 UINT8 Flags; 2862 UINT16 Length; 2863 2864 } ACPI_SDEV_HEADER; 2865 2866 2867 /* Values for subtable type above */ 2868 2869 enum AcpiSdevType 2870 { 2871 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2872 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2873 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2874 }; 2875 2876 /* Values for flags above */ 2877 2878 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2879 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2880 2881 /* 2882 * SDEV subtables 2883 */ 2884 2885 /* 0: Namespace Device Based Secure Device Structure */ 2886 2887 typedef struct acpi_sdev_namespace 2888 { 2889 ACPI_SDEV_HEADER Header; 2890 UINT16 DeviceIdOffset; 2891 UINT16 DeviceIdLength; 2892 UINT16 VendorDataOffset; 2893 UINT16 VendorDataLength; 2894 2895 } ACPI_SDEV_NAMESPACE; 2896 2897 typedef struct acpi_sdev_secure_component 2898 { 2899 UINT16 SecureComponentOffset; 2900 UINT16 SecureComponentLength; 2901 2902 } ACPI_SDEV_SECURE_COMPONENT; 2903 2904 2905 /* 2906 * SDEV sub-subtables ("Components") for above 2907 */ 2908 typedef struct acpi_sdev_component 2909 { 2910 ACPI_SDEV_HEADER Header; 2911 2912 } ACPI_SDEV_COMPONENT; 2913 2914 2915 /* Values for sub-subtable type above */ 2916 2917 enum AcpiSacType 2918 { 2919 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2920 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2921 }; 2922 2923 typedef struct acpi_sdev_id_component 2924 { 2925 ACPI_SDEV_HEADER Header; 2926 UINT16 HardwareIdOffset; 2927 UINT16 HardwareIdLength; 2928 UINT16 SubsystemIdOffset; 2929 UINT16 SubsystemIdLength; 2930 UINT16 HardwareRevision; 2931 UINT8 HardwareRevPresent; 2932 UINT8 ClassCodePresent; 2933 UINT8 PciBaseClass; 2934 UINT8 PciSubClass; 2935 UINT8 PciProgrammingXface; 2936 2937 } ACPI_SDEV_ID_COMPONENT; 2938 2939 typedef struct acpi_sdev_mem_component 2940 { 2941 ACPI_SDEV_HEADER Header; 2942 UINT32 Reserved; 2943 UINT64 MemoryBaseAddress; 2944 UINT64 MemoryLength; 2945 2946 } ACPI_SDEV_MEM_COMPONENT; 2947 2948 2949 /* 1: PCIe Endpoint Device Based Device Structure */ 2950 2951 typedef struct acpi_sdev_pcie 2952 { 2953 ACPI_SDEV_HEADER Header; 2954 UINT16 Segment; 2955 UINT16 StartBus; 2956 UINT16 PathOffset; 2957 UINT16 PathLength; 2958 UINT16 VendorDataOffset; 2959 UINT16 VendorDataLength; 2960 2961 } ACPI_SDEV_PCIE; 2962 2963 /* 1a: PCIe Endpoint path entry */ 2964 2965 typedef struct acpi_sdev_pcie_path 2966 { 2967 UINT8 Device; 2968 UINT8 Function; 2969 2970 } ACPI_SDEV_PCIE_PATH; 2971 2972 2973 /******************************************************************************* 2974 * 2975 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2976 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2977 * Trust Domain Extensions (Intel TDX)". 2978 * Version 1 2979 * 2980 ******************************************************************************/ 2981 2982 typedef struct acpi_table_svkl 2983 { 2984 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2985 UINT32 Count; 2986 2987 } ACPI_TABLE_SVKL; 2988 2989 typedef struct acpi_svkl_key 2990 { 2991 UINT16 Type; 2992 UINT16 Format; 2993 UINT32 Size; 2994 UINT64 Address; 2995 2996 } ACPI_SVKL_KEY; 2997 2998 enum acpi_svkl_type 2999 { 3000 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3001 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3002 }; 3003 3004 enum acpi_svkl_format 3005 { 3006 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3007 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3008 }; 3009 3010 3011 /* Reset to default packing */ 3012 3013 #pragma pack() 3014 3015 #endif /* __ACTBL2_H__ */ 3016