1a9f12690SJung-uk Kim /****************************************************************************** 2a9f12690SJung-uk Kim * 3a9f12690SJung-uk Kim * Name: actbl.h - Basic ACPI Table Definitions 4a9f12690SJung-uk Kim * 5a9f12690SJung-uk Kim *****************************************************************************/ 6a9f12690SJung-uk Kim 7a9f12690SJung-uk Kim /****************************************************************************** 8a9f12690SJung-uk Kim * 9a9f12690SJung-uk Kim * 1. Copyright Notice 10a9f12690SJung-uk Kim * 11a9f12690SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2009, Intel Corp. 12a9f12690SJung-uk Kim * All rights reserved. 13a9f12690SJung-uk Kim * 14a9f12690SJung-uk Kim * 2. License 15a9f12690SJung-uk Kim * 16a9f12690SJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property 17a9f12690SJung-uk Kim * rights. You may have additional license terms from the party that provided 18a9f12690SJung-uk Kim * you this software, covering your right to use that party's intellectual 19a9f12690SJung-uk Kim * property rights. 20a9f12690SJung-uk Kim * 21a9f12690SJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22a9f12690SJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an 23a9f12690SJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24a9f12690SJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy, 25a9f12690SJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered 26a9f12690SJung-uk Kim * Code in any form, with the right to sublicense such rights; and 27a9f12690SJung-uk Kim * 28a9f12690SJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29a9f12690SJung-uk Kim * license (with the right to sublicense), under only those claims of Intel 30a9f12690SJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell, 31a9f12690SJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof 32a9f12690SJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright 33a9f12690SJung-uk Kim * license, and in no event shall the patent license extend to any additions 34a9f12690SJung-uk Kim * to or modifications of the Original Intel Code. No other license or right 35a9f12690SJung-uk Kim * is granted directly or by implication, estoppel or otherwise; 36a9f12690SJung-uk Kim * 37a9f12690SJung-uk Kim * The above copyright and patent license is granted only if the following 38a9f12690SJung-uk Kim * conditions are met: 39a9f12690SJung-uk Kim * 40a9f12690SJung-uk Kim * 3. Conditions 41a9f12690SJung-uk Kim * 42a9f12690SJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43a9f12690SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 44a9f12690SJung-uk Kim * Code or modification with rights to further distribute source must include 45a9f12690SJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions, 46a9f12690SJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition, 47a9f12690SJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to 48a9f12690SJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered 49a9f12690SJung-uk Kim * Code and the date of any change. Licensee must include in that file the 50a9f12690SJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee 51a9f12690SJung-uk Kim * must include a prominent statement that the modification is derived, 52a9f12690SJung-uk Kim * directly or indirectly, from Original Intel Code. 53a9f12690SJung-uk Kim * 54a9f12690SJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55a9f12690SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 56a9f12690SJung-uk Kim * Code or modification without rights to further distribute source must 57a9f12690SJung-uk Kim * include the following Disclaimer and Export Compliance provision in the 58a9f12690SJung-uk Kim * documentation and/or other materials provided with distribution. In 59a9f12690SJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any 60a9f12690SJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the 61a9f12690SJung-uk Kim * license from Licensee to its licensee is limited to the intellectual 62a9f12690SJung-uk Kim * property embodied in the software Licensee provides to its licensee, and 63a9f12690SJung-uk Kim * not to intellectual property embodied in modifications its licensee may 64a9f12690SJung-uk Kim * make. 65a9f12690SJung-uk Kim * 66a9f12690SJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any 67a9f12690SJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the 68a9f12690SJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance 69a9f12690SJung-uk Kim * provision in the documentation and/or other materials provided with the 70a9f12690SJung-uk Kim * distribution. 71a9f12690SJung-uk Kim * 72a9f12690SJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original 73a9f12690SJung-uk Kim * Intel Code. 74a9f12690SJung-uk Kim * 75a9f12690SJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76a9f12690SJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or 77a9f12690SJung-uk Kim * other dealings in products derived from or relating to the Covered Code 78a9f12690SJung-uk Kim * without prior written authorization from Intel. 79a9f12690SJung-uk Kim * 80a9f12690SJung-uk Kim * 4. Disclaimer and Export Compliance 81a9f12690SJung-uk Kim * 82a9f12690SJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83a9f12690SJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84a9f12690SJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85a9f12690SJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86a9f12690SJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87a9f12690SJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88a9f12690SJung-uk Kim * PARTICULAR PURPOSE. 89a9f12690SJung-uk Kim * 90a9f12690SJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91a9f12690SJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92a9f12690SJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93a9f12690SJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94a9f12690SJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95a9f12690SJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96a9f12690SJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97a9f12690SJung-uk Kim * LIMITED REMEDY. 98a9f12690SJung-uk Kim * 99a9f12690SJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this 100a9f12690SJung-uk Kim * software or system incorporating such software without first obtaining any 101a9f12690SJung-uk Kim * required license or other approval from the U. S. Department of Commerce or 102a9f12690SJung-uk Kim * any other agency or department of the United States Government. In the 103a9f12690SJung-uk Kim * event Licensee exports any such software from the United States or 104a9f12690SJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall 105a9f12690SJung-uk Kim * ensure that the distribution and export/re-export of the software is in 106a9f12690SJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the 107a9f12690SJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108a9f12690SJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process, 109a9f12690SJung-uk Kim * software, or service, directly or indirectly, to any country for which the 110a9f12690SJung-uk Kim * United States government or any agency thereof requires an export license, 111a9f12690SJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining 112a9f12690SJung-uk Kim * such license, approval or letter. 113a9f12690SJung-uk Kim * 114a9f12690SJung-uk Kim *****************************************************************************/ 115a9f12690SJung-uk Kim 116a9f12690SJung-uk Kim #ifndef __ACTBL_H__ 117a9f12690SJung-uk Kim #define __ACTBL_H__ 118a9f12690SJung-uk Kim 119a9f12690SJung-uk Kim /* 120a9f12690SJung-uk Kim * Values for description table header signatures. Useful because they make 121a9f12690SJung-uk Kim * it more difficult to inadvertently type in the wrong signature. 122a9f12690SJung-uk Kim */ 123a9f12690SJung-uk Kim #define ACPI_SIG_DSDT "DSDT" /* Differentiated System Description Table */ 124a9f12690SJung-uk Kim #define ACPI_SIG_FADT "FACP" /* Fixed ACPI Description Table */ 125a9f12690SJung-uk Kim #define ACPI_SIG_FACS "FACS" /* Firmware ACPI Control Structure */ 126a9f12690SJung-uk Kim #define ACPI_SIG_PSDT "PSDT" /* Persistent System Description Table */ 127a9f12690SJung-uk Kim #define ACPI_SIG_RSDP "RSD PTR " /* Root System Description Pointer */ 128a9f12690SJung-uk Kim #define ACPI_SIG_RSDT "RSDT" /* Root System Description Table */ 129a9f12690SJung-uk Kim #define ACPI_SIG_XSDT "XSDT" /* Extended System Description Table */ 130a9f12690SJung-uk Kim #define ACPI_SIG_SSDT "SSDT" /* Secondary System Description Table */ 131a9f12690SJung-uk Kim #define ACPI_RSDP_NAME "RSDP" /* Short name for RSDP, not signature */ 132a9f12690SJung-uk Kim 133a9f12690SJung-uk Kim 134a9f12690SJung-uk Kim /* 135a9f12690SJung-uk Kim * All tables and structures must be byte-packed to match the ACPI 136a9f12690SJung-uk Kim * specification, since the tables are provided by the system BIOS 137a9f12690SJung-uk Kim */ 138a9f12690SJung-uk Kim #pragma pack(1) 139a9f12690SJung-uk Kim 140a9f12690SJung-uk Kim 141a9f12690SJung-uk Kim /* 142a9f12690SJung-uk Kim * These are the ACPI tables that are directly consumed by the subsystem. 143a9f12690SJung-uk Kim * 144a9f12690SJung-uk Kim * The RSDP and FACS do not use the common ACPI table header. All other ACPI 145a9f12690SJung-uk Kim * tables use the header. 146a9f12690SJung-uk Kim * 147a9f12690SJung-uk Kim * Note about bitfields: The UINT8 type is used for bitfields in ACPI tables. 148a9f12690SJung-uk Kim * This is the only type that is even remotely portable. Anything else is not 149a9f12690SJung-uk Kim * portable, so do not use any other bitfield types. 150a9f12690SJung-uk Kim */ 151a9f12690SJung-uk Kim 152a9f12690SJung-uk Kim /******************************************************************************* 153a9f12690SJung-uk Kim * 154a9f12690SJung-uk Kim * ACPI Table Header. This common header is used by all tables except the 155a9f12690SJung-uk Kim * RSDP and FACS. The define is used for direct inclusion of header into 156a9f12690SJung-uk Kim * other ACPI tables 157a9f12690SJung-uk Kim * 158a9f12690SJung-uk Kim ******************************************************************************/ 159a9f12690SJung-uk Kim 160a9f12690SJung-uk Kim typedef struct acpi_table_header 161a9f12690SJung-uk Kim { 162a9f12690SJung-uk Kim char Signature[ACPI_NAME_SIZE]; /* ASCII table signature */ 163a9f12690SJung-uk Kim UINT32 Length; /* Length of table in bytes, including this header */ 164a9f12690SJung-uk Kim UINT8 Revision; /* ACPI Specification minor version # */ 165a9f12690SJung-uk Kim UINT8 Checksum; /* To make sum of entire table == 0 */ 166a9f12690SJung-uk Kim char OemId[ACPI_OEM_ID_SIZE]; /* ASCII OEM identification */ 167a9f12690SJung-uk Kim char OemTableId[ACPI_OEM_TABLE_ID_SIZE]; /* ASCII OEM table identification */ 168a9f12690SJung-uk Kim UINT32 OemRevision; /* OEM revision number */ 169a9f12690SJung-uk Kim char AslCompilerId[ACPI_NAME_SIZE]; /* ASCII ASL compiler vendor ID */ 170a9f12690SJung-uk Kim UINT32 AslCompilerRevision; /* ASL compiler version */ 171a9f12690SJung-uk Kim 172a9f12690SJung-uk Kim } ACPI_TABLE_HEADER; 173a9f12690SJung-uk Kim 174a9f12690SJung-uk Kim 175a9f12690SJung-uk Kim /* 176a9f12690SJung-uk Kim * GAS - Generic Address Structure (ACPI 2.0+) 177a9f12690SJung-uk Kim * 178a9f12690SJung-uk Kim * Note: Since this structure is used in the ACPI tables, it is byte aligned. 179a9f12690SJung-uk Kim * If misalignment is not supported, access to the Address field must be 180a9f12690SJung-uk Kim * performed with care. 181a9f12690SJung-uk Kim */ 182a9f12690SJung-uk Kim typedef struct acpi_generic_address 183a9f12690SJung-uk Kim { 184a9f12690SJung-uk Kim UINT8 SpaceId; /* Address space where struct or register exists */ 185a9f12690SJung-uk Kim UINT8 BitWidth; /* Size in bits of given register */ 186a9f12690SJung-uk Kim UINT8 BitOffset; /* Bit offset within the register */ 187a9f12690SJung-uk Kim UINT8 AccessWidth; /* Minimum Access size (ACPI 3.0) */ 188a9f12690SJung-uk Kim UINT64 Address; /* 64-bit address of struct or register */ 189a9f12690SJung-uk Kim 190a9f12690SJung-uk Kim } ACPI_GENERIC_ADDRESS; 191a9f12690SJung-uk Kim 192a9f12690SJung-uk Kim 193a9f12690SJung-uk Kim /******************************************************************************* 194a9f12690SJung-uk Kim * 195a9f12690SJung-uk Kim * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 196a9f12690SJung-uk Kim * 197a9f12690SJung-uk Kim ******************************************************************************/ 198a9f12690SJung-uk Kim 199a9f12690SJung-uk Kim typedef struct acpi_table_rsdp 200a9f12690SJung-uk Kim { 201a9f12690SJung-uk Kim char Signature[8]; /* ACPI signature, contains "RSD PTR " */ 202a9f12690SJung-uk Kim UINT8 Checksum; /* ACPI 1.0 checksum */ 203a9f12690SJung-uk Kim char OemId[ACPI_OEM_ID_SIZE]; /* OEM identification */ 204a9f12690SJung-uk Kim UINT8 Revision; /* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */ 205a9f12690SJung-uk Kim UINT32 RsdtPhysicalAddress; /* 32-bit physical address of the RSDT */ 206a9f12690SJung-uk Kim UINT32 Length; /* Table length in bytes, including header (ACPI 2.0+) */ 207a9f12690SJung-uk Kim UINT64 XsdtPhysicalAddress; /* 64-bit physical address of the XSDT (ACPI 2.0+) */ 208a9f12690SJung-uk Kim UINT8 ExtendedChecksum; /* Checksum of entire table (ACPI 2.0+) */ 209a9f12690SJung-uk Kim UINT8 Reserved[3]; /* Reserved, must be zero */ 210a9f12690SJung-uk Kim 211a9f12690SJung-uk Kim } ACPI_TABLE_RSDP; 212a9f12690SJung-uk Kim 213a9f12690SJung-uk Kim #define ACPI_RSDP_REV0_SIZE 20 /* Size of original ACPI 1.0 RSDP */ 214a9f12690SJung-uk Kim 215a9f12690SJung-uk Kim 216a9f12690SJung-uk Kim /******************************************************************************* 217a9f12690SJung-uk Kim * 218a9f12690SJung-uk Kim * RSDT/XSDT - Root System Description Tables 219a9f12690SJung-uk Kim * 220a9f12690SJung-uk Kim ******************************************************************************/ 221a9f12690SJung-uk Kim 222a9f12690SJung-uk Kim typedef struct acpi_table_rsdt 223a9f12690SJung-uk Kim { 224a9f12690SJung-uk Kim ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 225a9f12690SJung-uk Kim UINT32 TableOffsetEntry[1]; /* Array of pointers to ACPI tables */ 226a9f12690SJung-uk Kim 227a9f12690SJung-uk Kim } ACPI_TABLE_RSDT; 228a9f12690SJung-uk Kim 229a9f12690SJung-uk Kim typedef struct acpi_table_xsdt 230a9f12690SJung-uk Kim { 231a9f12690SJung-uk Kim ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 232a9f12690SJung-uk Kim UINT64 TableOffsetEntry[1]; /* Array of pointers to ACPI tables */ 233a9f12690SJung-uk Kim 234a9f12690SJung-uk Kim } ACPI_TABLE_XSDT; 235a9f12690SJung-uk Kim 236a9f12690SJung-uk Kim 237a9f12690SJung-uk Kim /******************************************************************************* 238a9f12690SJung-uk Kim * 239a9f12690SJung-uk Kim * FACS - Firmware ACPI Control Structure (FACS) 240a9f12690SJung-uk Kim * 241a9f12690SJung-uk Kim ******************************************************************************/ 242a9f12690SJung-uk Kim 243a9f12690SJung-uk Kim typedef struct acpi_table_facs 244a9f12690SJung-uk Kim { 245a9f12690SJung-uk Kim char Signature[4]; /* ASCII table signature */ 246a9f12690SJung-uk Kim UINT32 Length; /* Length of structure, in bytes */ 247a9f12690SJung-uk Kim UINT32 HardwareSignature; /* Hardware configuration signature */ 248a9f12690SJung-uk Kim UINT32 FirmwareWakingVector; /* 32-bit physical address of the Firmware Waking Vector */ 249a9f12690SJung-uk Kim UINT32 GlobalLock; /* Global Lock for shared hardware resources */ 250a9f12690SJung-uk Kim UINT32 Flags; 251a9f12690SJung-uk Kim UINT64 XFirmwareWakingVector; /* 64-bit version of the Firmware Waking Vector (ACPI 2.0+) */ 252a9f12690SJung-uk Kim UINT8 Version; /* Version of this table (ACPI 2.0+) */ 253a9f12690SJung-uk Kim UINT8 Reserved[31]; /* Reserved, must be zero */ 254a9f12690SJung-uk Kim 255a9f12690SJung-uk Kim } ACPI_TABLE_FACS; 256a9f12690SJung-uk Kim 257a9f12690SJung-uk Kim /* Flag macros */ 258a9f12690SJung-uk Kim 259a9f12690SJung-uk Kim #define ACPI_FACS_S4_BIOS_PRESENT (1) /* 00: S4BIOS support is present */ 260a9f12690SJung-uk Kim 261a9f12690SJung-uk Kim /* Global lock flags */ 262a9f12690SJung-uk Kim 263a9f12690SJung-uk Kim #define ACPI_GLOCK_PENDING 0x01 /* 00: Pending global lock ownership */ 264a9f12690SJung-uk Kim #define ACPI_GLOCK_OWNED 0x02 /* 01: Global lock is owned */ 265a9f12690SJung-uk Kim 266a9f12690SJung-uk Kim 267a9f12690SJung-uk Kim /******************************************************************************* 268a9f12690SJung-uk Kim * 269a9f12690SJung-uk Kim * FADT - Fixed ACPI Description Table (Signature "FACP") 270a9f12690SJung-uk Kim * 271a9f12690SJung-uk Kim ******************************************************************************/ 272a9f12690SJung-uk Kim 273a9f12690SJung-uk Kim /* Fields common to all versions of the FADT */ 274a9f12690SJung-uk Kim 275a9f12690SJung-uk Kim typedef struct acpi_table_fadt 276a9f12690SJung-uk Kim { 277a9f12690SJung-uk Kim ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 278a9f12690SJung-uk Kim UINT32 Facs; /* 32-bit physical address of FACS */ 279a9f12690SJung-uk Kim UINT32 Dsdt; /* 32-bit physical address of DSDT */ 280a9f12690SJung-uk Kim UINT8 Model; /* System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */ 281a9f12690SJung-uk Kim UINT8 PreferredProfile; /* Conveys preferred power management profile to OSPM. */ 282a9f12690SJung-uk Kim UINT16 SciInterrupt; /* System vector of SCI interrupt */ 283a9f12690SJung-uk Kim UINT32 SmiCommand; /* 32-bit Port address of SMI command port */ 284a9f12690SJung-uk Kim UINT8 AcpiEnable; /* Value to write to smi_cmd to enable ACPI */ 285a9f12690SJung-uk Kim UINT8 AcpiDisable; /* Value to write to smi_cmd to disable ACPI */ 286a9f12690SJung-uk Kim UINT8 S4BiosRequest; /* Value to write to SMI CMD to enter S4BIOS state */ 287a9f12690SJung-uk Kim UINT8 PstateControl; /* Processor performance state control*/ 288a9f12690SJung-uk Kim UINT32 Pm1aEventBlock; /* 32-bit Port address of Power Mgt 1a Event Reg Blk */ 289a9f12690SJung-uk Kim UINT32 Pm1bEventBlock; /* 32-bit Port address of Power Mgt 1b Event Reg Blk */ 290a9f12690SJung-uk Kim UINT32 Pm1aControlBlock; /* 32-bit Port address of Power Mgt 1a Control Reg Blk */ 291a9f12690SJung-uk Kim UINT32 Pm1bControlBlock; /* 32-bit Port address of Power Mgt 1b Control Reg Blk */ 292a9f12690SJung-uk Kim UINT32 Pm2ControlBlock; /* 32-bit Port address of Power Mgt 2 Control Reg Blk */ 293a9f12690SJung-uk Kim UINT32 PmTimerBlock; /* 32-bit Port address of Power Mgt Timer Ctrl Reg Blk */ 294a9f12690SJung-uk Kim UINT32 Gpe0Block; /* 32-bit Port address of General Purpose Event 0 Reg Blk */ 295a9f12690SJung-uk Kim UINT32 Gpe1Block; /* 32-bit Port address of General Purpose Event 1 Reg Blk */ 296a9f12690SJung-uk Kim UINT8 Pm1EventLength; /* Byte Length of ports at Pm1xEventBlock */ 297a9f12690SJung-uk Kim UINT8 Pm1ControlLength; /* Byte Length of ports at Pm1xControlBlock */ 298a9f12690SJung-uk Kim UINT8 Pm2ControlLength; /* Byte Length of ports at Pm2ControlBlock */ 299a9f12690SJung-uk Kim UINT8 PmTimerLength; /* Byte Length of ports at PmTimerBlock */ 300a9f12690SJung-uk Kim UINT8 Gpe0BlockLength; /* Byte Length of ports at Gpe0Block */ 301a9f12690SJung-uk Kim UINT8 Gpe1BlockLength; /* Byte Length of ports at Gpe1Block */ 302a9f12690SJung-uk Kim UINT8 Gpe1Base; /* Offset in GPE number space where GPE1 events start */ 303a9f12690SJung-uk Kim UINT8 CstControl; /* Support for the _CST object and C States change notification */ 304a9f12690SJung-uk Kim UINT16 C2Latency; /* Worst case HW latency to enter/exit C2 state */ 305a9f12690SJung-uk Kim UINT16 C3Latency; /* Worst case HW latency to enter/exit C3 state */ 306a9f12690SJung-uk Kim UINT16 FlushSize; /* Processor's memory cache line width, in bytes */ 307a9f12690SJung-uk Kim UINT16 FlushStride; /* Number of flush strides that need to be read */ 308a9f12690SJung-uk Kim UINT8 DutyOffset; /* Processor duty cycle index in processor's P_CNT reg */ 309a9f12690SJung-uk Kim UINT8 DutyWidth; /* Processor duty cycle value bit width in P_CNT register */ 310a9f12690SJung-uk Kim UINT8 DayAlarm; /* Index to day-of-month alarm in RTC CMOS RAM */ 311a9f12690SJung-uk Kim UINT8 MonthAlarm; /* Index to month-of-year alarm in RTC CMOS RAM */ 312a9f12690SJung-uk Kim UINT8 Century; /* Index to century in RTC CMOS RAM */ 313a9f12690SJung-uk Kim UINT16 BootFlags; /* IA-PC Boot Architecture Flags (see below for individual flags) */ 314a9f12690SJung-uk Kim UINT8 Reserved; /* Reserved, must be zero */ 315a9f12690SJung-uk Kim UINT32 Flags; /* Miscellaneous flag bits (see below for individual flags) */ 316a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS ResetRegister; /* 64-bit address of the Reset register */ 317a9f12690SJung-uk Kim UINT8 ResetValue; /* Value to write to the ResetRegister port to reset the system */ 318a9f12690SJung-uk Kim UINT8 Reserved4[3]; /* Reserved, must be zero */ 319a9f12690SJung-uk Kim UINT64 XFacs; /* 64-bit physical address of FACS */ 320a9f12690SJung-uk Kim UINT64 XDsdt; /* 64-bit physical address of DSDT */ 321a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPm1aEventBlock; /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ 322a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPm1bEventBlock; /* 64-bit Extended Power Mgt 1b Event Reg Blk address */ 323a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPm1aControlBlock; /* 64-bit Extended Power Mgt 1a Control Reg Blk address */ 324a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPm1bControlBlock; /* 64-bit Extended Power Mgt 1b Control Reg Blk address */ 325a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPm2ControlBlock; /* 64-bit Extended Power Mgt 2 Control Reg Blk address */ 326a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XPmTimerBlock; /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */ 327a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XGpe0Block; /* 64-bit Extended General Purpose Event 0 Reg Blk address */ 328a9f12690SJung-uk Kim ACPI_GENERIC_ADDRESS XGpe1Block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */ 329a9f12690SJung-uk Kim 330a9f12690SJung-uk Kim } ACPI_TABLE_FADT; 331a9f12690SJung-uk Kim 332a9f12690SJung-uk Kim 333a9f12690SJung-uk Kim /* FADT Boot Architecture Flags (BootFlags) */ 334a9f12690SJung-uk Kim 335a9f12690SJung-uk Kim #define ACPI_FADT_LEGACY_DEVICES (1) /* 00: [V2] System has LPC or ISA bus devices */ 336a9f12690SJung-uk Kim #define ACPI_FADT_8042 (1<<1) /* 01: [V3] System has an 8042 controller on port 60/64 */ 337a9f12690SJung-uk Kim #define ACPI_FADT_NO_VGA (1<<2) /* 02: [V4] It is not safe to probe for VGA hardware */ 338a9f12690SJung-uk Kim #define ACPI_FADT_NO_MSI (1<<3) /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */ 339a9f12690SJung-uk Kim #define ACPI_FADT_NO_ASPM (1<<4) /* 04: [V4] PCIe ASPM control must not be enabled */ 340a9f12690SJung-uk Kim 341a9f12690SJung-uk Kim /* FADT flags */ 342a9f12690SJung-uk Kim 343a9f12690SJung-uk Kim #define ACPI_FADT_WBINVD (1) /* 00: [V1] The wbinvd instruction works properly */ 344a9f12690SJung-uk Kim #define ACPI_FADT_WBINVD_FLUSH (1<<1) /* 01: [V1] wbinvd flushes but does not invalidate caches */ 345a9f12690SJung-uk Kim #define ACPI_FADT_C1_SUPPORTED (1<<2) /* 02: [V1] All processors support C1 state */ 346a9f12690SJung-uk Kim #define ACPI_FADT_C2_MP_SUPPORTED (1<<3) /* 03: [V1] C2 state works on MP system */ 347a9f12690SJung-uk Kim #define ACPI_FADT_POWER_BUTTON (1<<4) /* 04: [V1] Power button is handled as a control method device */ 348a9f12690SJung-uk Kim #define ACPI_FADT_SLEEP_BUTTON (1<<5) /* 05: [V1] Sleep button is handled as a control method device */ 349a9f12690SJung-uk Kim #define ACPI_FADT_FIXED_RTC (1<<6) /* 06: [V1] RTC wakeup status not in fixed register space */ 350a9f12690SJung-uk Kim #define ACPI_FADT_S4_RTC_WAKE (1<<7) /* 07: [V1] RTC alarm can wake system from S4 */ 351a9f12690SJung-uk Kim #define ACPI_FADT_32BIT_TIMER (1<<8) /* 08: [V1] ACPI timer width is 32-bit (0=24-bit) */ 352a9f12690SJung-uk Kim #define ACPI_FADT_DOCKING_SUPPORTED (1<<9) /* 09: [V1] Docking supported */ 353a9f12690SJung-uk Kim #define ACPI_FADT_RESET_REGISTER (1<<10) /* 10: [V2] System reset via the FADT RESET_REG supported */ 354a9f12690SJung-uk Kim #define ACPI_FADT_SEALED_CASE (1<<11) /* 11: [V3] No internal expansion capabilities and case is sealed */ 355a9f12690SJung-uk Kim #define ACPI_FADT_HEADLESS (1<<12) /* 12: [V3] No local video capabilities or local input devices */ 356a9f12690SJung-uk Kim #define ACPI_FADT_SLEEP_TYPE (1<<13) /* 13: [V3] Must execute native instruction after writing SLP_TYPx register */ 357a9f12690SJung-uk Kim #define ACPI_FADT_PCI_EXPRESS_WAKE (1<<14) /* 14: [V4] System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */ 358a9f12690SJung-uk Kim #define ACPI_FADT_PLATFORM_CLOCK (1<<15) /* 15: [V4] OSPM should use platform-provided timer (ACPI 3.0) */ 359a9f12690SJung-uk Kim #define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */ 360a9f12690SJung-uk Kim #define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */ 361a9f12690SJung-uk Kim #define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */ 362a9f12690SJung-uk Kim #define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local xAPICs must use physical dest mode (ACPI 3.0) */ 363a9f12690SJung-uk Kim 364a9f12690SJung-uk Kim 365a9f12690SJung-uk Kim /* FADT Prefered Power Management Profiles */ 366a9f12690SJung-uk Kim 367a9f12690SJung-uk Kim enum AcpiPreferedPmProfiles 368a9f12690SJung-uk Kim { 369a9f12690SJung-uk Kim PM_UNSPECIFIED = 0, 370a9f12690SJung-uk Kim PM_DESKTOP = 1, 371a9f12690SJung-uk Kim PM_MOBILE = 2, 372a9f12690SJung-uk Kim PM_WORKSTATION = 3, 373a9f12690SJung-uk Kim PM_ENTERPRISE_SERVER = 4, 374a9f12690SJung-uk Kim PM_SOHO_SERVER = 5, 375a9f12690SJung-uk Kim PM_APPLIANCE_PC = 6 376a9f12690SJung-uk Kim }; 377a9f12690SJung-uk Kim 378a9f12690SJung-uk Kim 379a9f12690SJung-uk Kim /* Reset to default packing */ 380a9f12690SJung-uk Kim 381a9f12690SJung-uk Kim #pragma pack() 382a9f12690SJung-uk Kim 383a9f12690SJung-uk Kim 384a9f12690SJung-uk Kim typedef union acpi_name_union 385a9f12690SJung-uk Kim { 386a9f12690SJung-uk Kim UINT32 Integer; 387a9f12690SJung-uk Kim char Ascii[4]; 388a9f12690SJung-uk Kim 389a9f12690SJung-uk Kim } ACPI_NAME_UNION; 390a9f12690SJung-uk Kim 391a9f12690SJung-uk Kim /* 392a9f12690SJung-uk Kim * Internal ACPI Table Descriptor. One per ACPI table 393a9f12690SJung-uk Kim */ 394a9f12690SJung-uk Kim typedef struct acpi_table_desc 395a9f12690SJung-uk Kim { 396a9f12690SJung-uk Kim ACPI_PHYSICAL_ADDRESS Address; 397a9f12690SJung-uk Kim ACPI_TABLE_HEADER *Pointer; 398a9f12690SJung-uk Kim UINT32 Length; /* Length fixed at 32 bits */ 399a9f12690SJung-uk Kim ACPI_NAME_UNION Signature; 400a9f12690SJung-uk Kim ACPI_OWNER_ID OwnerId; 401a9f12690SJung-uk Kim UINT8 Flags; 402a9f12690SJung-uk Kim 403a9f12690SJung-uk Kim } ACPI_TABLE_DESC; 404a9f12690SJung-uk Kim 405a9f12690SJung-uk Kim /* Flags for above */ 406a9f12690SJung-uk Kim 407a9f12690SJung-uk Kim #define ACPI_TABLE_ORIGIN_UNKNOWN (0) 408a9f12690SJung-uk Kim #define ACPI_TABLE_ORIGIN_MAPPED (1) 409a9f12690SJung-uk Kim #define ACPI_TABLE_ORIGIN_ALLOCATED (2) 410a9f12690SJung-uk Kim #define ACPI_TABLE_ORIGIN_OVERRIDE (4) 411a9f12690SJung-uk Kim #define ACPI_TABLE_ORIGIN_MASK (7) 412a9f12690SJung-uk Kim #define ACPI_TABLE_IS_LOADED (8) 413a9f12690SJung-uk Kim 414a9f12690SJung-uk Kim 415a9f12690SJung-uk Kim /* 416a9f12690SJung-uk Kim * Get the remaining ACPI tables 417a9f12690SJung-uk Kim */ 418a9f12690SJung-uk Kim #include "actbl1.h" 419a9f12690SJung-uk Kim 420a9f12690SJung-uk Kim /* Macros used to generate offsets to specific table fields */ 421a9f12690SJung-uk Kim 422a9f12690SJung-uk Kim #define ACPI_FADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FADT, f) 423a9f12690SJung-uk Kim 424a9f12690SJung-uk Kim #endif /* __ACTBL_H__ */ 425