1*af051161SJung-uk Kim /******************************************************************************* 2*af051161SJung-uk Kim * 3*af051161SJung-uk Kim * Module Name: utresdecode - Resource descriptor keyword strings 4*af051161SJung-uk Kim * 5*af051161SJung-uk Kim ******************************************************************************/ 6*af051161SJung-uk Kim 7*af051161SJung-uk Kim /****************************************************************************** 8*af051161SJung-uk Kim * 9*af051161SJung-uk Kim * 1. Copyright Notice 10*af051161SJung-uk Kim * 11*af051161SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp. 12*af051161SJung-uk Kim * All rights reserved. 13*af051161SJung-uk Kim * 14*af051161SJung-uk Kim * 2. License 15*af051161SJung-uk Kim * 16*af051161SJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property 17*af051161SJung-uk Kim * rights. You may have additional license terms from the party that provided 18*af051161SJung-uk Kim * you this software, covering your right to use that party's intellectual 19*af051161SJung-uk Kim * property rights. 20*af051161SJung-uk Kim * 21*af051161SJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22*af051161SJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an 23*af051161SJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24*af051161SJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy, 25*af051161SJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered 26*af051161SJung-uk Kim * Code in any form, with the right to sublicense such rights; and 27*af051161SJung-uk Kim * 28*af051161SJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29*af051161SJung-uk Kim * license (with the right to sublicense), under only those claims of Intel 30*af051161SJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell, 31*af051161SJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof 32*af051161SJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright 33*af051161SJung-uk Kim * license, and in no event shall the patent license extend to any additions 34*af051161SJung-uk Kim * to or modifications of the Original Intel Code. No other license or right 35*af051161SJung-uk Kim * is granted directly or by implication, estoppel or otherwise; 36*af051161SJung-uk Kim * 37*af051161SJung-uk Kim * The above copyright and patent license is granted only if the following 38*af051161SJung-uk Kim * conditions are met: 39*af051161SJung-uk Kim * 40*af051161SJung-uk Kim * 3. Conditions 41*af051161SJung-uk Kim * 42*af051161SJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43*af051161SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 44*af051161SJung-uk Kim * Code or modification with rights to further distribute source must include 45*af051161SJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions, 46*af051161SJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition, 47*af051161SJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to 48*af051161SJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered 49*af051161SJung-uk Kim * Code and the date of any change. Licensee must include in that file the 50*af051161SJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee 51*af051161SJung-uk Kim * must include a prominent statement that the modification is derived, 52*af051161SJung-uk Kim * directly or indirectly, from Original Intel Code. 53*af051161SJung-uk Kim * 54*af051161SJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55*af051161SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 56*af051161SJung-uk Kim * Code or modification without rights to further distribute source must 57*af051161SJung-uk Kim * include the following Disclaimer and Export Compliance provision in the 58*af051161SJung-uk Kim * documentation and/or other materials provided with distribution. In 59*af051161SJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any 60*af051161SJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the 61*af051161SJung-uk Kim * license from Licensee to its licensee is limited to the intellectual 62*af051161SJung-uk Kim * property embodied in the software Licensee provides to its licensee, and 63*af051161SJung-uk Kim * not to intellectual property embodied in modifications its licensee may 64*af051161SJung-uk Kim * make. 65*af051161SJung-uk Kim * 66*af051161SJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any 67*af051161SJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the 68*af051161SJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance 69*af051161SJung-uk Kim * provision in the documentation and/or other materials provided with the 70*af051161SJung-uk Kim * distribution. 71*af051161SJung-uk Kim * 72*af051161SJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original 73*af051161SJung-uk Kim * Intel Code. 74*af051161SJung-uk Kim * 75*af051161SJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76*af051161SJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or 77*af051161SJung-uk Kim * other dealings in products derived from or relating to the Covered Code 78*af051161SJung-uk Kim * without prior written authorization from Intel. 79*af051161SJung-uk Kim * 80*af051161SJung-uk Kim * 4. Disclaimer and Export Compliance 81*af051161SJung-uk Kim * 82*af051161SJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83*af051161SJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84*af051161SJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85*af051161SJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86*af051161SJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87*af051161SJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88*af051161SJung-uk Kim * PARTICULAR PURPOSE. 89*af051161SJung-uk Kim * 90*af051161SJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91*af051161SJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92*af051161SJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93*af051161SJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94*af051161SJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95*af051161SJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96*af051161SJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97*af051161SJung-uk Kim * LIMITED REMEDY. 98*af051161SJung-uk Kim * 99*af051161SJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this 100*af051161SJung-uk Kim * software or system incorporating such software without first obtaining any 101*af051161SJung-uk Kim * required license or other approval from the U. S. Department of Commerce or 102*af051161SJung-uk Kim * any other agency or department of the United States Government. In the 103*af051161SJung-uk Kim * event Licensee exports any such software from the United States or 104*af051161SJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall 105*af051161SJung-uk Kim * ensure that the distribution and export/re-export of the software is in 106*af051161SJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the 107*af051161SJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108*af051161SJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process, 109*af051161SJung-uk Kim * software, or service, directly or indirectly, to any country for which the 110*af051161SJung-uk Kim * United States government or any agency thereof requires an export license, 111*af051161SJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining 112*af051161SJung-uk Kim * such license, approval or letter. 113*af051161SJung-uk Kim * 114*af051161SJung-uk Kim ***************************************************************************** 115*af051161SJung-uk Kim * 116*af051161SJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 117*af051161SJung-uk Kim * following license: 118*af051161SJung-uk Kim * 119*af051161SJung-uk Kim * Redistribution and use in source and binary forms, with or without 120*af051161SJung-uk Kim * modification, are permitted provided that the following conditions 121*af051161SJung-uk Kim * are met: 122*af051161SJung-uk Kim * 1. Redistributions of source code must retain the above copyright 123*af051161SJung-uk Kim * notice, this list of conditions, and the following disclaimer, 124*af051161SJung-uk Kim * without modification. 125*af051161SJung-uk Kim * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126*af051161SJung-uk Kim * substantially similar to the "NO WARRANTY" disclaimer below 127*af051161SJung-uk Kim * ("Disclaimer") and any redistribution must be conditioned upon 128*af051161SJung-uk Kim * including a substantially similar Disclaimer requirement for further 129*af051161SJung-uk Kim * binary redistribution. 130*af051161SJung-uk Kim * 3. Neither the names of the above-listed copyright holders nor the names 131*af051161SJung-uk Kim * of any contributors may be used to endorse or promote products derived 132*af051161SJung-uk Kim * from this software without specific prior written permission. 133*af051161SJung-uk Kim * 134*af051161SJung-uk Kim * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135*af051161SJung-uk Kim * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136*af051161SJung-uk Kim * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137*af051161SJung-uk Kim * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138*af051161SJung-uk Kim * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139*af051161SJung-uk Kim * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140*af051161SJung-uk Kim * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141*af051161SJung-uk Kim * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142*af051161SJung-uk Kim * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143*af051161SJung-uk Kim * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144*af051161SJung-uk Kim * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145*af051161SJung-uk Kim * 146*af051161SJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 147*af051161SJung-uk Kim * GNU General Public License ("GPL") version 2 as published by the Free 148*af051161SJung-uk Kim * Software Foundation. 149*af051161SJung-uk Kim * 150*af051161SJung-uk Kim *****************************************************************************/ 151*af051161SJung-uk Kim 152*af051161SJung-uk Kim #include <contrib/dev/acpica/include/acpi.h> 153*af051161SJung-uk Kim #include <contrib/dev/acpica/include/accommon.h> 154*af051161SJung-uk Kim #include <contrib/dev/acpica/include/acresrc.h> 155*af051161SJung-uk Kim 156*af051161SJung-uk Kim 157*af051161SJung-uk Kim #define _COMPONENT ACPI_UTILITIES 158*af051161SJung-uk Kim ACPI_MODULE_NAME ("utresdecode") 159*af051161SJung-uk Kim 160*af051161SJung-uk Kim 161*af051161SJung-uk Kim #if defined (ACPI_DEBUG_OUTPUT) || \ 162*af051161SJung-uk Kim defined (ACPI_DISASSEMBLER) || \ 163*af051161SJung-uk Kim defined (ACPI_DEBUGGER) 164*af051161SJung-uk Kim 165*af051161SJung-uk Kim /* 166*af051161SJung-uk Kim * Strings used to decode resource descriptors. 167*af051161SJung-uk Kim * Used by both the disassembler and the debugger resource dump routines 168*af051161SJung-uk Kim */ 169*af051161SJung-uk Kim const char *AcpiGbl_BmDecode[] = 170*af051161SJung-uk Kim { 171*af051161SJung-uk Kim "NotBusMaster", 172*af051161SJung-uk Kim "BusMaster" 173*af051161SJung-uk Kim }; 174*af051161SJung-uk Kim 175*af051161SJung-uk Kim const char *AcpiGbl_ConfigDecode[] = 176*af051161SJung-uk Kim { 177*af051161SJung-uk Kim "0 - Good Configuration", 178*af051161SJung-uk Kim "1 - Acceptable Configuration", 179*af051161SJung-uk Kim "2 - Suboptimal Configuration", 180*af051161SJung-uk Kim "3 - ***Invalid Configuration***", 181*af051161SJung-uk Kim }; 182*af051161SJung-uk Kim 183*af051161SJung-uk Kim const char *AcpiGbl_ConsumeDecode[] = 184*af051161SJung-uk Kim { 185*af051161SJung-uk Kim "ResourceProducer", 186*af051161SJung-uk Kim "ResourceConsumer" 187*af051161SJung-uk Kim }; 188*af051161SJung-uk Kim 189*af051161SJung-uk Kim const char *AcpiGbl_DecDecode[] = 190*af051161SJung-uk Kim { 191*af051161SJung-uk Kim "PosDecode", 192*af051161SJung-uk Kim "SubDecode" 193*af051161SJung-uk Kim }; 194*af051161SJung-uk Kim 195*af051161SJung-uk Kim const char *AcpiGbl_HeDecode[] = 196*af051161SJung-uk Kim { 197*af051161SJung-uk Kim "Level", 198*af051161SJung-uk Kim "Edge" 199*af051161SJung-uk Kim }; 200*af051161SJung-uk Kim 201*af051161SJung-uk Kim const char *AcpiGbl_IoDecode[] = 202*af051161SJung-uk Kim { 203*af051161SJung-uk Kim "Decode10", 204*af051161SJung-uk Kim "Decode16" 205*af051161SJung-uk Kim }; 206*af051161SJung-uk Kim 207*af051161SJung-uk Kim const char *AcpiGbl_LlDecode[] = 208*af051161SJung-uk Kim { 209*af051161SJung-uk Kim "ActiveHigh", 210*af051161SJung-uk Kim "ActiveLow", 211*af051161SJung-uk Kim "ActiveBoth", 212*af051161SJung-uk Kim "Reserved" 213*af051161SJung-uk Kim }; 214*af051161SJung-uk Kim 215*af051161SJung-uk Kim const char *AcpiGbl_MaxDecode[] = 216*af051161SJung-uk Kim { 217*af051161SJung-uk Kim "MaxNotFixed", 218*af051161SJung-uk Kim "MaxFixed" 219*af051161SJung-uk Kim }; 220*af051161SJung-uk Kim 221*af051161SJung-uk Kim const char *AcpiGbl_MemDecode[] = 222*af051161SJung-uk Kim { 223*af051161SJung-uk Kim "NonCacheable", 224*af051161SJung-uk Kim "Cacheable", 225*af051161SJung-uk Kim "WriteCombining", 226*af051161SJung-uk Kim "Prefetchable" 227*af051161SJung-uk Kim }; 228*af051161SJung-uk Kim 229*af051161SJung-uk Kim const char *AcpiGbl_MinDecode[] = 230*af051161SJung-uk Kim { 231*af051161SJung-uk Kim "MinNotFixed", 232*af051161SJung-uk Kim "MinFixed" 233*af051161SJung-uk Kim }; 234*af051161SJung-uk Kim 235*af051161SJung-uk Kim const char *AcpiGbl_MtpDecode[] = 236*af051161SJung-uk Kim { 237*af051161SJung-uk Kim "AddressRangeMemory", 238*af051161SJung-uk Kim "AddressRangeReserved", 239*af051161SJung-uk Kim "AddressRangeACPI", 240*af051161SJung-uk Kim "AddressRangeNVS" 241*af051161SJung-uk Kim }; 242*af051161SJung-uk Kim 243*af051161SJung-uk Kim const char *AcpiGbl_RngDecode[] = 244*af051161SJung-uk Kim { 245*af051161SJung-uk Kim "InvalidRanges", 246*af051161SJung-uk Kim "NonISAOnlyRanges", 247*af051161SJung-uk Kim "ISAOnlyRanges", 248*af051161SJung-uk Kim "EntireRange" 249*af051161SJung-uk Kim }; 250*af051161SJung-uk Kim 251*af051161SJung-uk Kim const char *AcpiGbl_RwDecode[] = 252*af051161SJung-uk Kim { 253*af051161SJung-uk Kim "ReadOnly", 254*af051161SJung-uk Kim "ReadWrite" 255*af051161SJung-uk Kim }; 256*af051161SJung-uk Kim 257*af051161SJung-uk Kim const char *AcpiGbl_ShrDecode[] = 258*af051161SJung-uk Kim { 259*af051161SJung-uk Kim "Exclusive", 260*af051161SJung-uk Kim "Shared", 261*af051161SJung-uk Kim "ExclusiveAndWake", /* ACPI 5.0 */ 262*af051161SJung-uk Kim "SharedAndWake" /* ACPI 5.0 */ 263*af051161SJung-uk Kim }; 264*af051161SJung-uk Kim 265*af051161SJung-uk Kim const char *AcpiGbl_SizDecode[] = 266*af051161SJung-uk Kim { 267*af051161SJung-uk Kim "Transfer8", 268*af051161SJung-uk Kim "Transfer8_16", 269*af051161SJung-uk Kim "Transfer16", 270*af051161SJung-uk Kim "InvalidSize" 271*af051161SJung-uk Kim }; 272*af051161SJung-uk Kim 273*af051161SJung-uk Kim const char *AcpiGbl_TrsDecode[] = 274*af051161SJung-uk Kim { 275*af051161SJung-uk Kim "DenseTranslation", 276*af051161SJung-uk Kim "SparseTranslation" 277*af051161SJung-uk Kim }; 278*af051161SJung-uk Kim 279*af051161SJung-uk Kim const char *AcpiGbl_TtpDecode[] = 280*af051161SJung-uk Kim { 281*af051161SJung-uk Kim "TypeStatic", 282*af051161SJung-uk Kim "TypeTranslation" 283*af051161SJung-uk Kim }; 284*af051161SJung-uk Kim 285*af051161SJung-uk Kim const char *AcpiGbl_TypDecode[] = 286*af051161SJung-uk Kim { 287*af051161SJung-uk Kim "Compatibility", 288*af051161SJung-uk Kim "TypeA", 289*af051161SJung-uk Kim "TypeB", 290*af051161SJung-uk Kim "TypeF" 291*af051161SJung-uk Kim }; 292*af051161SJung-uk Kim 293*af051161SJung-uk Kim const char *AcpiGbl_PpcDecode[] = 294*af051161SJung-uk Kim { 295*af051161SJung-uk Kim "PullDefault", 296*af051161SJung-uk Kim "PullUp", 297*af051161SJung-uk Kim "PullDown", 298*af051161SJung-uk Kim "PullNone" 299*af051161SJung-uk Kim }; 300*af051161SJung-uk Kim 301*af051161SJung-uk Kim const char *AcpiGbl_IorDecode[] = 302*af051161SJung-uk Kim { 303*af051161SJung-uk Kim "IoRestrictionNone", 304*af051161SJung-uk Kim "IoRestrictionInputOnly", 305*af051161SJung-uk Kim "IoRestrictionOutputOnly", 306*af051161SJung-uk Kim "IoRestrictionNoneAndPreserve" 307*af051161SJung-uk Kim }; 308*af051161SJung-uk Kim 309*af051161SJung-uk Kim const char *AcpiGbl_DtsDecode[] = 310*af051161SJung-uk Kim { 311*af051161SJung-uk Kim "Width8bit", 312*af051161SJung-uk Kim "Width16bit", 313*af051161SJung-uk Kim "Width32bit", 314*af051161SJung-uk Kim "Width64bit", 315*af051161SJung-uk Kim "Width128bit", 316*af051161SJung-uk Kim "Width256bit", 317*af051161SJung-uk Kim }; 318*af051161SJung-uk Kim 319*af051161SJung-uk Kim /* GPIO connection type */ 320*af051161SJung-uk Kim 321*af051161SJung-uk Kim const char *AcpiGbl_CtDecode[] = 322*af051161SJung-uk Kim { 323*af051161SJung-uk Kim "Interrupt", 324*af051161SJung-uk Kim "I/O" 325*af051161SJung-uk Kim }; 326*af051161SJung-uk Kim 327*af051161SJung-uk Kim /* Serial bus type */ 328*af051161SJung-uk Kim 329*af051161SJung-uk Kim const char *AcpiGbl_SbtDecode[] = 330*af051161SJung-uk Kim { 331*af051161SJung-uk Kim "/* UNKNOWN serial bus type */", 332*af051161SJung-uk Kim "I2C", 333*af051161SJung-uk Kim "SPI", 334*af051161SJung-uk Kim "UART" 335*af051161SJung-uk Kim }; 336*af051161SJung-uk Kim 337*af051161SJung-uk Kim /* I2C serial bus access mode */ 338*af051161SJung-uk Kim 339*af051161SJung-uk Kim const char *AcpiGbl_AmDecode[] = 340*af051161SJung-uk Kim { 341*af051161SJung-uk Kim "AddressingMode7Bit", 342*af051161SJung-uk Kim "AddressingMode10Bit" 343*af051161SJung-uk Kim }; 344*af051161SJung-uk Kim 345*af051161SJung-uk Kim /* I2C serial bus slave mode */ 346*af051161SJung-uk Kim 347*af051161SJung-uk Kim const char *AcpiGbl_SmDecode[] = 348*af051161SJung-uk Kim { 349*af051161SJung-uk Kim "ControllerInitiated", 350*af051161SJung-uk Kim "DeviceInitiated" 351*af051161SJung-uk Kim }; 352*af051161SJung-uk Kim 353*af051161SJung-uk Kim /* SPI serial bus wire mode */ 354*af051161SJung-uk Kim 355*af051161SJung-uk Kim const char *AcpiGbl_WmDecode[] = 356*af051161SJung-uk Kim { 357*af051161SJung-uk Kim "FourWireMode", 358*af051161SJung-uk Kim "ThreeWireMode" 359*af051161SJung-uk Kim }; 360*af051161SJung-uk Kim 361*af051161SJung-uk Kim /* SPI serial clock phase */ 362*af051161SJung-uk Kim 363*af051161SJung-uk Kim const char *AcpiGbl_CphDecode[] = 364*af051161SJung-uk Kim { 365*af051161SJung-uk Kim "ClockPhaseFirst", 366*af051161SJung-uk Kim "ClockPhaseSecond" 367*af051161SJung-uk Kim }; 368*af051161SJung-uk Kim 369*af051161SJung-uk Kim /* SPI serial bus clock polarity */ 370*af051161SJung-uk Kim 371*af051161SJung-uk Kim const char *AcpiGbl_CpoDecode[] = 372*af051161SJung-uk Kim { 373*af051161SJung-uk Kim "ClockPolarityLow", 374*af051161SJung-uk Kim "ClockPolarityHigh" 375*af051161SJung-uk Kim }; 376*af051161SJung-uk Kim 377*af051161SJung-uk Kim /* SPI serial bus device polarity */ 378*af051161SJung-uk Kim 379*af051161SJung-uk Kim const char *AcpiGbl_DpDecode[] = 380*af051161SJung-uk Kim { 381*af051161SJung-uk Kim "PolarityLow", 382*af051161SJung-uk Kim "PolarityHigh" 383*af051161SJung-uk Kim }; 384*af051161SJung-uk Kim 385*af051161SJung-uk Kim /* UART serial bus endian */ 386*af051161SJung-uk Kim 387*af051161SJung-uk Kim const char *AcpiGbl_EdDecode[] = 388*af051161SJung-uk Kim { 389*af051161SJung-uk Kim "LittleEndian", 390*af051161SJung-uk Kim "BigEndian" 391*af051161SJung-uk Kim }; 392*af051161SJung-uk Kim 393*af051161SJung-uk Kim /* UART serial bus bits per byte */ 394*af051161SJung-uk Kim 395*af051161SJung-uk Kim const char *AcpiGbl_BpbDecode[] = 396*af051161SJung-uk Kim { 397*af051161SJung-uk Kim "DataBitsFive", 398*af051161SJung-uk Kim "DataBitsSix", 399*af051161SJung-uk Kim "DataBitsSeven", 400*af051161SJung-uk Kim "DataBitsEight", 401*af051161SJung-uk Kim "DataBitsNine", 402*af051161SJung-uk Kim "/* UNKNOWN Bits per byte */", 403*af051161SJung-uk Kim "/* UNKNOWN Bits per byte */", 404*af051161SJung-uk Kim "/* UNKNOWN Bits per byte */" 405*af051161SJung-uk Kim }; 406*af051161SJung-uk Kim 407*af051161SJung-uk Kim /* UART serial bus stop bits */ 408*af051161SJung-uk Kim 409*af051161SJung-uk Kim const char *AcpiGbl_SbDecode[] = 410*af051161SJung-uk Kim { 411*af051161SJung-uk Kim "StopBitsZero", 412*af051161SJung-uk Kim "StopBitsOne", 413*af051161SJung-uk Kim "StopBitsOnePlusHalf", 414*af051161SJung-uk Kim "StopBitsTwo" 415*af051161SJung-uk Kim }; 416*af051161SJung-uk Kim 417*af051161SJung-uk Kim /* UART serial bus flow control */ 418*af051161SJung-uk Kim 419*af051161SJung-uk Kim const char *AcpiGbl_FcDecode[] = 420*af051161SJung-uk Kim { 421*af051161SJung-uk Kim "FlowControlNone", 422*af051161SJung-uk Kim "FlowControlHardware", 423*af051161SJung-uk Kim "FlowControlXON", 424*af051161SJung-uk Kim "/* UNKNOWN flow control keyword */" 425*af051161SJung-uk Kim }; 426*af051161SJung-uk Kim 427*af051161SJung-uk Kim /* UART serial bus parity type */ 428*af051161SJung-uk Kim 429*af051161SJung-uk Kim const char *AcpiGbl_PtDecode[] = 430*af051161SJung-uk Kim { 431*af051161SJung-uk Kim "ParityTypeNone", 432*af051161SJung-uk Kim "ParityTypeEven", 433*af051161SJung-uk Kim "ParityTypeOdd", 434*af051161SJung-uk Kim "ParityTypeMark", 435*af051161SJung-uk Kim "ParityTypeSpace", 436*af051161SJung-uk Kim "/* UNKNOWN parity keyword */", 437*af051161SJung-uk Kim "/* UNKNOWN parity keyword */", 438*af051161SJung-uk Kim "/* UNKNOWN parity keyword */" 439*af051161SJung-uk Kim }; 440*af051161SJung-uk Kim 441*af051161SJung-uk Kim /* PinConfig type */ 442*af051161SJung-uk Kim 443*af051161SJung-uk Kim const char *AcpiGbl_PtypDecode[] = 444*af051161SJung-uk Kim { 445*af051161SJung-uk Kim "Default", 446*af051161SJung-uk Kim "Bias Pull-up", 447*af051161SJung-uk Kim "Bias Pull-down", 448*af051161SJung-uk Kim "Bias Default", 449*af051161SJung-uk Kim "Bias Disable", 450*af051161SJung-uk Kim "Bias High Impedance", 451*af051161SJung-uk Kim "Bias Bus Hold", 452*af051161SJung-uk Kim "Drive Open Drain", 453*af051161SJung-uk Kim "Drive Open Source", 454*af051161SJung-uk Kim "Drive Push Pull", 455*af051161SJung-uk Kim "Drive Strength", 456*af051161SJung-uk Kim "Slew Rate", 457*af051161SJung-uk Kim "Input Debounce", 458*af051161SJung-uk Kim "Input Schmitt Trigger", 459*af051161SJung-uk Kim }; 460*af051161SJung-uk Kim 461*af051161SJung-uk Kim #endif 462