xref: /freebsd/sys/contrib/dev/acpica/components/hardware/hwregs.c (revision 0d84335f991f528c6f038e79dd5cc0a7770532da)
1a159c266SJung-uk Kim /*******************************************************************************
2a159c266SJung-uk Kim  *
3a159c266SJung-uk Kim  * Module Name: hwregs - Read/write access functions for the various ACPI
4a159c266SJung-uk Kim  *                       control and status registers.
5a159c266SJung-uk Kim  *
6a159c266SJung-uk Kim  ******************************************************************************/
7a159c266SJung-uk Kim 
8*0d84335fSJung-uk Kim /******************************************************************************
9*0d84335fSJung-uk Kim  *
10*0d84335fSJung-uk Kim  * 1. Copyright Notice
11*0d84335fSJung-uk Kim  *
12*0d84335fSJung-uk Kim  * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
13a159c266SJung-uk Kim  * All rights reserved.
14a159c266SJung-uk Kim  *
15*0d84335fSJung-uk Kim  * 2. License
16*0d84335fSJung-uk Kim  *
17*0d84335fSJung-uk Kim  * 2.1. This is your license from Intel Corp. under its intellectual property
18*0d84335fSJung-uk Kim  * rights. You may have additional license terms from the party that provided
19*0d84335fSJung-uk Kim  * you this software, covering your right to use that party's intellectual
20*0d84335fSJung-uk Kim  * property rights.
21*0d84335fSJung-uk Kim  *
22*0d84335fSJung-uk Kim  * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
23*0d84335fSJung-uk Kim  * copy of the source code appearing in this file ("Covered Code") an
24*0d84335fSJung-uk Kim  * irrevocable, perpetual, worldwide license under Intel's copyrights in the
25*0d84335fSJung-uk Kim  * base code distributed originally by Intel ("Original Intel Code") to copy,
26*0d84335fSJung-uk Kim  * make derivatives, distribute, use and display any portion of the Covered
27*0d84335fSJung-uk Kim  * Code in any form, with the right to sublicense such rights; and
28*0d84335fSJung-uk Kim  *
29*0d84335fSJung-uk Kim  * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
30*0d84335fSJung-uk Kim  * license (with the right to sublicense), under only those claims of Intel
31*0d84335fSJung-uk Kim  * patents that are infringed by the Original Intel Code, to make, use, sell,
32*0d84335fSJung-uk Kim  * offer to sell, and import the Covered Code and derivative works thereof
33*0d84335fSJung-uk Kim  * solely to the minimum extent necessary to exercise the above copyright
34*0d84335fSJung-uk Kim  * license, and in no event shall the patent license extend to any additions
35*0d84335fSJung-uk Kim  * to or modifications of the Original Intel Code. No other license or right
36*0d84335fSJung-uk Kim  * is granted directly or by implication, estoppel or otherwise;
37*0d84335fSJung-uk Kim  *
38*0d84335fSJung-uk Kim  * The above copyright and patent license is granted only if the following
39*0d84335fSJung-uk Kim  * conditions are met:
40*0d84335fSJung-uk Kim  *
41*0d84335fSJung-uk Kim  * 3. Conditions
42*0d84335fSJung-uk Kim  *
43*0d84335fSJung-uk Kim  * 3.1. Redistribution of Source with Rights to Further Distribute Source.
44*0d84335fSJung-uk Kim  * Redistribution of source code of any substantial portion of the Covered
45*0d84335fSJung-uk Kim  * Code or modification with rights to further distribute source must include
46*0d84335fSJung-uk Kim  * the above Copyright Notice, the above License, this list of Conditions,
47*0d84335fSJung-uk Kim  * and the following Disclaimer and Export Compliance provision. In addition,
48*0d84335fSJung-uk Kim  * Licensee must cause all Covered Code to which Licensee contributes to
49*0d84335fSJung-uk Kim  * contain a file documenting the changes Licensee made to create that Covered
50*0d84335fSJung-uk Kim  * Code and the date of any change. Licensee must include in that file the
51*0d84335fSJung-uk Kim  * documentation of any changes made by any predecessor Licensee. Licensee
52*0d84335fSJung-uk Kim  * must include a prominent statement that the modification is derived,
53*0d84335fSJung-uk Kim  * directly or indirectly, from Original Intel Code.
54*0d84335fSJung-uk Kim  *
55*0d84335fSJung-uk Kim  * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
56*0d84335fSJung-uk Kim  * Redistribution of source code of any substantial portion of the Covered
57*0d84335fSJung-uk Kim  * Code or modification without rights to further distribute source must
58*0d84335fSJung-uk Kim  * include the following Disclaimer and Export Compliance provision in the
59*0d84335fSJung-uk Kim  * documentation and/or other materials provided with distribution. In
60*0d84335fSJung-uk Kim  * addition, Licensee may not authorize further sublicense of source of any
61*0d84335fSJung-uk Kim  * portion of the Covered Code, and must include terms to the effect that the
62*0d84335fSJung-uk Kim  * license from Licensee to its licensee is limited to the intellectual
63*0d84335fSJung-uk Kim  * property embodied in the software Licensee provides to its licensee, and
64*0d84335fSJung-uk Kim  * not to intellectual property embodied in modifications its licensee may
65*0d84335fSJung-uk Kim  * make.
66*0d84335fSJung-uk Kim  *
67*0d84335fSJung-uk Kim  * 3.3. Redistribution of Executable. Redistribution in executable form of any
68*0d84335fSJung-uk Kim  * substantial portion of the Covered Code or modification must reproduce the
69*0d84335fSJung-uk Kim  * above Copyright Notice, and the following Disclaimer and Export Compliance
70*0d84335fSJung-uk Kim  * provision in the documentation and/or other materials provided with the
71*0d84335fSJung-uk Kim  * distribution.
72*0d84335fSJung-uk Kim  *
73*0d84335fSJung-uk Kim  * 3.4. Intel retains all right, title, and interest in and to the Original
74*0d84335fSJung-uk Kim  * Intel Code.
75*0d84335fSJung-uk Kim  *
76*0d84335fSJung-uk Kim  * 3.5. Neither the name Intel nor any other trademark owned or controlled by
77*0d84335fSJung-uk Kim  * Intel shall be used in advertising or otherwise to promote the sale, use or
78*0d84335fSJung-uk Kim  * other dealings in products derived from or relating to the Covered Code
79*0d84335fSJung-uk Kim  * without prior written authorization from Intel.
80*0d84335fSJung-uk Kim  *
81*0d84335fSJung-uk Kim  * 4. Disclaimer and Export Compliance
82*0d84335fSJung-uk Kim  *
83*0d84335fSJung-uk Kim  * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
84*0d84335fSJung-uk Kim  * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
85*0d84335fSJung-uk Kim  * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
86*0d84335fSJung-uk Kim  * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
87*0d84335fSJung-uk Kim  * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
88*0d84335fSJung-uk Kim  * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
89*0d84335fSJung-uk Kim  * PARTICULAR PURPOSE.
90*0d84335fSJung-uk Kim  *
91*0d84335fSJung-uk Kim  * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
92*0d84335fSJung-uk Kim  * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
93*0d84335fSJung-uk Kim  * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
94*0d84335fSJung-uk Kim  * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
95*0d84335fSJung-uk Kim  * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
96*0d84335fSJung-uk Kim  * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
97*0d84335fSJung-uk Kim  * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
98*0d84335fSJung-uk Kim  * LIMITED REMEDY.
99*0d84335fSJung-uk Kim  *
100*0d84335fSJung-uk Kim  * 4.3. Licensee shall not export, either directly or indirectly, any of this
101*0d84335fSJung-uk Kim  * software or system incorporating such software without first obtaining any
102*0d84335fSJung-uk Kim  * required license or other approval from the U. S. Department of Commerce or
103*0d84335fSJung-uk Kim  * any other agency or department of the United States Government. In the
104*0d84335fSJung-uk Kim  * event Licensee exports any such software from the United States or
105*0d84335fSJung-uk Kim  * re-exports any such software from a foreign destination, Licensee shall
106*0d84335fSJung-uk Kim  * ensure that the distribution and export/re-export of the software is in
107*0d84335fSJung-uk Kim  * compliance with all laws, regulations, orders, or other restrictions of the
108*0d84335fSJung-uk Kim  * U.S. Export Administration Regulations. Licensee agrees that neither it nor
109*0d84335fSJung-uk Kim  * any of its subsidiaries will export/re-export any technical data, process,
110*0d84335fSJung-uk Kim  * software, or service, directly or indirectly, to any country for which the
111*0d84335fSJung-uk Kim  * United States government or any agency thereof requires an export license,
112*0d84335fSJung-uk Kim  * other governmental approval, or letter of assurance, without first obtaining
113*0d84335fSJung-uk Kim  * such license, approval or letter.
114*0d84335fSJung-uk Kim  *
115*0d84335fSJung-uk Kim  *****************************************************************************
116*0d84335fSJung-uk Kim  *
117*0d84335fSJung-uk Kim  * Alternatively, you may choose to be licensed under the terms of the
118*0d84335fSJung-uk Kim  * following license:
119*0d84335fSJung-uk Kim  *
120a159c266SJung-uk Kim  * Redistribution and use in source and binary forms, with or without
121a159c266SJung-uk Kim  * modification, are permitted provided that the following conditions
122a159c266SJung-uk Kim  * are met:
123a159c266SJung-uk Kim  * 1. Redistributions of source code must retain the above copyright
124a159c266SJung-uk Kim  *    notice, this list of conditions, and the following disclaimer,
125a159c266SJung-uk Kim  *    without modification.
126a159c266SJung-uk Kim  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
127a159c266SJung-uk Kim  *    substantially similar to the "NO WARRANTY" disclaimer below
128a159c266SJung-uk Kim  *    ("Disclaimer") and any redistribution must be conditioned upon
129a159c266SJung-uk Kim  *    including a substantially similar Disclaimer requirement for further
130a159c266SJung-uk Kim  *    binary redistribution.
131a159c266SJung-uk Kim  * 3. Neither the names of the above-listed copyright holders nor the names
132a159c266SJung-uk Kim  *    of any contributors may be used to endorse or promote products derived
133a159c266SJung-uk Kim  *    from this software without specific prior written permission.
134a159c266SJung-uk Kim  *
135*0d84335fSJung-uk Kim  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
136*0d84335fSJung-uk Kim  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
137*0d84335fSJung-uk Kim  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
138*0d84335fSJung-uk Kim  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
139*0d84335fSJung-uk Kim  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
140*0d84335fSJung-uk Kim  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
141*0d84335fSJung-uk Kim  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
142*0d84335fSJung-uk Kim  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
143*0d84335fSJung-uk Kim  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
144*0d84335fSJung-uk Kim  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
145*0d84335fSJung-uk Kim  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
146*0d84335fSJung-uk Kim  *
147*0d84335fSJung-uk Kim  * Alternatively, you may choose to be licensed under the terms of the
148a159c266SJung-uk Kim  * GNU General Public License ("GPL") version 2 as published by the Free
149a159c266SJung-uk Kim  * Software Foundation.
150a159c266SJung-uk Kim  *
151*0d84335fSJung-uk Kim  *****************************************************************************/
152a159c266SJung-uk Kim 
153a159c266SJung-uk Kim #include <contrib/dev/acpica/include/acpi.h>
154a159c266SJung-uk Kim #include <contrib/dev/acpica/include/accommon.h>
155a159c266SJung-uk Kim #include <contrib/dev/acpica/include/acevents.h>
156a159c266SJung-uk Kim 
157a159c266SJung-uk Kim #define _COMPONENT          ACPI_HARDWARE
158a159c266SJung-uk Kim         ACPI_MODULE_NAME    ("hwregs")
159a159c266SJung-uk Kim 
160a159c266SJung-uk Kim 
161a159c266SJung-uk Kim #if (!ACPI_REDUCED_HARDWARE)
162a159c266SJung-uk Kim 
163a159c266SJung-uk Kim /* Local Prototypes */
164a159c266SJung-uk Kim 
16528482948SJung-uk Kim static UINT8
16628482948SJung-uk Kim AcpiHwGetAccessBitWidth (
16728482948SJung-uk Kim     UINT64                  Address,
16828482948SJung-uk Kim     ACPI_GENERIC_ADDRESS    *Reg,
16928482948SJung-uk Kim     UINT8                   MaxBitWidth);
17028482948SJung-uk Kim 
171a159c266SJung-uk Kim static ACPI_STATUS
172a159c266SJung-uk Kim AcpiHwReadMultiple (
173a159c266SJung-uk Kim     UINT32                  *Value,
174a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterA,
175a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterB);
176a159c266SJung-uk Kim 
177a159c266SJung-uk Kim static ACPI_STATUS
178a159c266SJung-uk Kim AcpiHwWriteMultiple (
179a159c266SJung-uk Kim     UINT32                  Value,
180a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterA,
181a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterB);
182a159c266SJung-uk Kim 
183a159c266SJung-uk Kim #endif /* !ACPI_REDUCED_HARDWARE */
184a159c266SJung-uk Kim 
185f8146b88SJung-uk Kim 
186f8146b88SJung-uk Kim /******************************************************************************
187f8146b88SJung-uk Kim  *
18828482948SJung-uk Kim  * FUNCTION:    AcpiHwGetAccessBitWidth
18928482948SJung-uk Kim  *
19028482948SJung-uk Kim  * PARAMETERS:  Address             - GAS register address
19128482948SJung-uk Kim  *              Reg                 - GAS register structure
19228482948SJung-uk Kim  *              MaxBitWidth         - Max BitWidth supported (32 or 64)
19328482948SJung-uk Kim  *
19428482948SJung-uk Kim  * RETURN:      Status
19528482948SJung-uk Kim  *
19628482948SJung-uk Kim  * DESCRIPTION: Obtain optimal access bit width
19728482948SJung-uk Kim  *
19828482948SJung-uk Kim  ******************************************************************************/
19928482948SJung-uk Kim 
20028482948SJung-uk Kim static UINT8
20128482948SJung-uk Kim AcpiHwGetAccessBitWidth (
20228482948SJung-uk Kim     UINT64                  Address,
20328482948SJung-uk Kim     ACPI_GENERIC_ADDRESS    *Reg,
20428482948SJung-uk Kim     UINT8                   MaxBitWidth)
20528482948SJung-uk Kim {
20628482948SJung-uk Kim     UINT8                   AccessBitWidth;
20728482948SJung-uk Kim 
20828482948SJung-uk Kim 
20928482948SJung-uk Kim     /*
21028482948SJung-uk Kim      * GAS format "register", used by FADT:
21128482948SJung-uk Kim      *  1. Detected if BitOffset is 0 and BitWidth is 8/16/32/64;
21228482948SJung-uk Kim      *  2. AccessSize field is ignored and BitWidth field is used for
21328482948SJung-uk Kim      *     determining the boundary of the IO accesses.
21428482948SJung-uk Kim      * GAS format "region", used by APEI registers:
21528482948SJung-uk Kim      *  1. Detected if BitOffset is not 0 or BitWidth is not 8/16/32/64;
21628482948SJung-uk Kim      *  2. AccessSize field is used for determining the boundary of the
21728482948SJung-uk Kim      *     IO accesses;
21828482948SJung-uk Kim      *  3. BitOffset/BitWidth fields are used to describe the "region".
21928482948SJung-uk Kim      *
22028482948SJung-uk Kim      * Note: This algorithm assumes that the "Address" fields should always
22128482948SJung-uk Kim      *       contain aligned values.
22228482948SJung-uk Kim      */
22328482948SJung-uk Kim     if (!Reg->BitOffset && Reg->BitWidth &&
22428482948SJung-uk Kim         ACPI_IS_POWER_OF_TWO (Reg->BitWidth) &&
22528482948SJung-uk Kim         ACPI_IS_ALIGNED (Reg->BitWidth, 8))
22628482948SJung-uk Kim     {
22728482948SJung-uk Kim         AccessBitWidth = Reg->BitWidth;
22828482948SJung-uk Kim     }
22928482948SJung-uk Kim     else if (Reg->AccessWidth)
23028482948SJung-uk Kim     {
23128482948SJung-uk Kim         AccessBitWidth = (1 << (Reg->AccessWidth + 2));
23228482948SJung-uk Kim     }
23328482948SJung-uk Kim     else
23428482948SJung-uk Kim     {
23528482948SJung-uk Kim         AccessBitWidth = ACPI_ROUND_UP_POWER_OF_TWO_8 (
23628482948SJung-uk Kim             Reg->BitOffset + Reg->BitWidth);
23728482948SJung-uk Kim         if (AccessBitWidth <= 8)
23828482948SJung-uk Kim         {
23928482948SJung-uk Kim             AccessBitWidth = 8;
24028482948SJung-uk Kim         }
24128482948SJung-uk Kim         else
24228482948SJung-uk Kim         {
24328482948SJung-uk Kim             while (!ACPI_IS_ALIGNED (Address, AccessBitWidth >> 3))
24428482948SJung-uk Kim             {
24528482948SJung-uk Kim                 AccessBitWidth >>= 1;
24628482948SJung-uk Kim             }
24728482948SJung-uk Kim         }
24828482948SJung-uk Kim     }
24928482948SJung-uk Kim 
25028482948SJung-uk Kim     /* Maximum IO port access bit width is 32 */
25128482948SJung-uk Kim 
25228482948SJung-uk Kim     if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_IO)
25328482948SJung-uk Kim     {
25428482948SJung-uk Kim         MaxBitWidth = 32;
25528482948SJung-uk Kim     }
25628482948SJung-uk Kim 
25728482948SJung-uk Kim     /*
25828482948SJung-uk Kim      * Return access width according to the requested maximum access bit width,
25928482948SJung-uk Kim      * as the caller should know the format of the register and may enforce
26028482948SJung-uk Kim      * a 32-bit accesses.
26128482948SJung-uk Kim      */
26228482948SJung-uk Kim     if (AccessBitWidth < MaxBitWidth)
26328482948SJung-uk Kim     {
26428482948SJung-uk Kim         return (AccessBitWidth);
26528482948SJung-uk Kim     }
26628482948SJung-uk Kim     return (MaxBitWidth);
26728482948SJung-uk Kim }
26828482948SJung-uk Kim 
26928482948SJung-uk Kim 
27028482948SJung-uk Kim /******************************************************************************
27128482948SJung-uk Kim  *
272a159c266SJung-uk Kim  * FUNCTION:    AcpiHwValidateRegister
273a159c266SJung-uk Kim  *
274a159c266SJung-uk Kim  * PARAMETERS:  Reg                 - GAS register structure
275a159c266SJung-uk Kim  *              MaxBitWidth         - Max BitWidth supported (32 or 64)
276a159c266SJung-uk Kim  *              Address             - Pointer to where the gas->address
277a159c266SJung-uk Kim  *                                    is returned
278a159c266SJung-uk Kim  *
279a159c266SJung-uk Kim  * RETURN:      Status
280a159c266SJung-uk Kim  *
281a159c266SJung-uk Kim  * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
282a159c266SJung-uk Kim  *              pointer, Address, SpaceId, BitWidth, and BitOffset.
283a159c266SJung-uk Kim  *
284a159c266SJung-uk Kim  ******************************************************************************/
285a159c266SJung-uk Kim 
286a159c266SJung-uk Kim ACPI_STATUS
287a159c266SJung-uk Kim AcpiHwValidateRegister (
288a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *Reg,
289a159c266SJung-uk Kim     UINT8                   MaxBitWidth,
290a159c266SJung-uk Kim     UINT64                  *Address)
291a159c266SJung-uk Kim {
29228482948SJung-uk Kim     UINT8                   BitWidth;
29328482948SJung-uk Kim     UINT8                   AccessWidth;
29428482948SJung-uk Kim 
295a159c266SJung-uk Kim 
296a159c266SJung-uk Kim     /* Must have a valid pointer to a GAS structure */
297a159c266SJung-uk Kim 
298a159c266SJung-uk Kim     if (!Reg)
299a159c266SJung-uk Kim     {
300a159c266SJung-uk Kim         return (AE_BAD_PARAMETER);
301a159c266SJung-uk Kim     }
302a159c266SJung-uk Kim 
303a159c266SJung-uk Kim     /*
304a159c266SJung-uk Kim      * Copy the target address. This handles possible alignment issues.
305a159c266SJung-uk Kim      * Address must not be null. A null address also indicates an optional
306a159c266SJung-uk Kim      * ACPI register that is not supported, so no error message.
307a159c266SJung-uk Kim      */
308a159c266SJung-uk Kim     ACPI_MOVE_64_TO_64 (Address, &Reg->Address);
309a159c266SJung-uk Kim     if (!(*Address))
310a159c266SJung-uk Kim     {
311a159c266SJung-uk Kim         return (AE_BAD_ADDRESS);
312a159c266SJung-uk Kim     }
313a159c266SJung-uk Kim 
314a159c266SJung-uk Kim     /* Validate the SpaceID */
315a159c266SJung-uk Kim 
316a159c266SJung-uk Kim     if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
317a159c266SJung-uk Kim         (Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO))
318a159c266SJung-uk Kim     {
319a159c266SJung-uk Kim         ACPI_ERROR ((AE_INFO,
320a159c266SJung-uk Kim             "Unsupported address space: 0x%X", Reg->SpaceId));
321a159c266SJung-uk Kim         return (AE_SUPPORT);
322a159c266SJung-uk Kim     }
323a159c266SJung-uk Kim 
32428482948SJung-uk Kim     /* Validate the AccessWidth */
325a159c266SJung-uk Kim 
32628482948SJung-uk Kim     if (Reg->AccessWidth > 4)
327a159c266SJung-uk Kim     {
328a159c266SJung-uk Kim         ACPI_ERROR ((AE_INFO,
32928482948SJung-uk Kim             "Unsupported register access width: 0x%X", Reg->AccessWidth));
330a159c266SJung-uk Kim         return (AE_SUPPORT);
331a159c266SJung-uk Kim     }
332a159c266SJung-uk Kim 
33328482948SJung-uk Kim     /* Validate the BitWidth, convert AccessWidth into number of bits */
334a159c266SJung-uk Kim 
33528482948SJung-uk Kim     AccessWidth = AcpiHwGetAccessBitWidth (*Address, Reg, MaxBitWidth);
33628482948SJung-uk Kim     BitWidth = ACPI_ROUND_UP (Reg->BitOffset + Reg->BitWidth, AccessWidth);
33728482948SJung-uk Kim     if (MaxBitWidth < BitWidth)
338a159c266SJung-uk Kim     {
339a159c266SJung-uk Kim         ACPI_WARNING ((AE_INFO,
34028482948SJung-uk Kim             "Requested bit width 0x%X is smaller than register bit width 0x%X",
34128482948SJung-uk Kim             MaxBitWidth, BitWidth));
34228482948SJung-uk Kim         return (AE_SUPPORT);
343a159c266SJung-uk Kim     }
344a159c266SJung-uk Kim 
345a159c266SJung-uk Kim     return (AE_OK);
346a159c266SJung-uk Kim }
347a159c266SJung-uk Kim 
348a159c266SJung-uk Kim 
349a159c266SJung-uk Kim /******************************************************************************
350a159c266SJung-uk Kim  *
351a159c266SJung-uk Kim  * FUNCTION:    AcpiHwRead
352a159c266SJung-uk Kim  *
353a159c266SJung-uk Kim  * PARAMETERS:  Value               - Where the value is returned
354a159c266SJung-uk Kim  *              Reg                 - GAS register structure
355a159c266SJung-uk Kim  *
356a159c266SJung-uk Kim  * RETURN:      Status
357a159c266SJung-uk Kim  *
358a159c266SJung-uk Kim  * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
359a159c266SJung-uk Kim  *              version of AcpiRead, used internally since the overhead of
360a159c266SJung-uk Kim  *              64-bit values is not needed.
361a159c266SJung-uk Kim  *
362a159c266SJung-uk Kim  * LIMITATIONS: <These limitations also apply to AcpiHwWrite>
363a159c266SJung-uk Kim  *      SpaceID must be SystemMemory or SystemIO.
364a159c266SJung-uk Kim  *
365a159c266SJung-uk Kim  ******************************************************************************/
366a159c266SJung-uk Kim 
367a159c266SJung-uk Kim ACPI_STATUS
368a159c266SJung-uk Kim AcpiHwRead (
369a159c266SJung-uk Kim     UINT32                  *Value,
370a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *Reg)
371a159c266SJung-uk Kim {
372a159c266SJung-uk Kim     UINT64                  Address;
37328482948SJung-uk Kim     UINT8                   AccessWidth;
37428482948SJung-uk Kim     UINT32                  BitWidth;
37528482948SJung-uk Kim     UINT8                   BitOffset;
376a159c266SJung-uk Kim     UINT64                  Value64;
37728482948SJung-uk Kim     UINT32                  Value32;
37828482948SJung-uk Kim     UINT8                   Index;
379a159c266SJung-uk Kim     ACPI_STATUS             Status;
380a159c266SJung-uk Kim 
381a159c266SJung-uk Kim 
382a159c266SJung-uk Kim     ACPI_FUNCTION_NAME (HwRead);
383a159c266SJung-uk Kim 
384a159c266SJung-uk Kim 
385a159c266SJung-uk Kim     /* Validate contents of the GAS register */
386a159c266SJung-uk Kim 
387a159c266SJung-uk Kim     Status = AcpiHwValidateRegister (Reg, 32, &Address);
388a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
389a159c266SJung-uk Kim     {
390a159c266SJung-uk Kim         return (Status);
391a159c266SJung-uk Kim     }
392a159c266SJung-uk Kim 
39328482948SJung-uk Kim     /*
39428482948SJung-uk Kim      * Initialize entire 32-bit return value to zero, convert AccessWidth
39528482948SJung-uk Kim      * into number of bits based
39628482948SJung-uk Kim      */
397a159c266SJung-uk Kim     *Value = 0;
39828482948SJung-uk Kim     AccessWidth = AcpiHwGetAccessBitWidth (Address, Reg, 32);
39928482948SJung-uk Kim     BitWidth = Reg->BitOffset + Reg->BitWidth;
40028482948SJung-uk Kim     BitOffset = Reg->BitOffset;
401a159c266SJung-uk Kim 
402a159c266SJung-uk Kim     /*
403a159c266SJung-uk Kim      * Two address spaces supported: Memory or IO. PCI_Config is
404a159c266SJung-uk Kim      * not supported here because the GAS structure is insufficient
405a159c266SJung-uk Kim      */
40628482948SJung-uk Kim     Index = 0;
40728482948SJung-uk Kim     while (BitWidth)
40828482948SJung-uk Kim     {
40928482948SJung-uk Kim         if (BitOffset >= AccessWidth)
41028482948SJung-uk Kim         {
41128482948SJung-uk Kim             Value32 = 0;
41228482948SJung-uk Kim             BitOffset -= AccessWidth;
41328482948SJung-uk Kim         }
41428482948SJung-uk Kim         else
41528482948SJung-uk Kim         {
416a159c266SJung-uk Kim             if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY)
417a159c266SJung-uk Kim             {
418a159c266SJung-uk Kim                 Status = AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS)
41928482948SJung-uk Kim                     Address + Index * ACPI_DIV_8 (AccessWidth),
42028482948SJung-uk Kim                     &Value64, AccessWidth);
42128482948SJung-uk Kim                 Value32 = (UINT32) Value64;
422a159c266SJung-uk Kim             }
423a159c266SJung-uk Kim             else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
424a159c266SJung-uk Kim             {
425a159c266SJung-uk Kim                 Status = AcpiHwReadPort ((ACPI_IO_ADDRESS)
42628482948SJung-uk Kim                     Address + Index * ACPI_DIV_8 (AccessWidth),
42728482948SJung-uk Kim                     &Value32, AccessWidth);
42828482948SJung-uk Kim             }
42928482948SJung-uk Kim         }
43028482948SJung-uk Kim 
43128482948SJung-uk Kim         /*
43228482948SJung-uk Kim          * Use offset style bit writes because "Index * AccessWidth" is
43328482948SJung-uk Kim          * ensured to be less than 32-bits by AcpiHwValidateRegister().
43428482948SJung-uk Kim          */
43528482948SJung-uk Kim         ACPI_SET_BITS (Value, Index * AccessWidth,
43628482948SJung-uk Kim             ACPI_MASK_BITS_ABOVE_32 (AccessWidth), Value32);
43728482948SJung-uk Kim 
43828482948SJung-uk Kim         BitWidth -= BitWidth > AccessWidth ? AccessWidth : BitWidth;
43928482948SJung-uk Kim         Index++;
440a159c266SJung-uk Kim     }
441a159c266SJung-uk Kim 
442a159c266SJung-uk Kim     ACPI_DEBUG_PRINT ((ACPI_DB_IO,
443a159c266SJung-uk Kim         "Read:  %8.8X width %2d from %8.8X%8.8X (%s)\n",
44428482948SJung-uk Kim         *Value, AccessWidth, ACPI_FORMAT_UINT64 (Address),
445a159c266SJung-uk Kim         AcpiUtGetRegionName (Reg->SpaceId)));
446a159c266SJung-uk Kim 
447a159c266SJung-uk Kim     return (Status);
448a159c266SJung-uk Kim }
449a159c266SJung-uk Kim 
450a159c266SJung-uk Kim 
451a159c266SJung-uk Kim /******************************************************************************
452a159c266SJung-uk Kim  *
453a159c266SJung-uk Kim  * FUNCTION:    AcpiHwWrite
454a159c266SJung-uk Kim  *
455a159c266SJung-uk Kim  * PARAMETERS:  Value               - Value to be written
456a159c266SJung-uk Kim  *              Reg                 - GAS register structure
457a159c266SJung-uk Kim  *
458a159c266SJung-uk Kim  * RETURN:      Status
459a159c266SJung-uk Kim  *
460a159c266SJung-uk Kim  * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
461a159c266SJung-uk Kim  *              version of AcpiWrite, used internally since the overhead of
462a159c266SJung-uk Kim  *              64-bit values is not needed.
463a159c266SJung-uk Kim  *
464a159c266SJung-uk Kim  ******************************************************************************/
465a159c266SJung-uk Kim 
466a159c266SJung-uk Kim ACPI_STATUS
467a159c266SJung-uk Kim AcpiHwWrite (
468a159c266SJung-uk Kim     UINT32                  Value,
469a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *Reg)
470a159c266SJung-uk Kim {
471a159c266SJung-uk Kim     UINT64                  Address;
47228482948SJung-uk Kim     UINT8                   AccessWidth;
47328482948SJung-uk Kim     UINT32                  BitWidth;
47428482948SJung-uk Kim     UINT8                   BitOffset;
47528482948SJung-uk Kim     UINT64                  Value64;
47628482948SJung-uk Kim     UINT32                  Value32;
47728482948SJung-uk Kim     UINT8                   Index;
478a159c266SJung-uk Kim     ACPI_STATUS             Status;
479a159c266SJung-uk Kim 
480a159c266SJung-uk Kim 
481a159c266SJung-uk Kim     ACPI_FUNCTION_NAME (HwWrite);
482a159c266SJung-uk Kim 
483a159c266SJung-uk Kim 
484a159c266SJung-uk Kim     /* Validate contents of the GAS register */
485a159c266SJung-uk Kim 
486a159c266SJung-uk Kim     Status = AcpiHwValidateRegister (Reg, 32, &Address);
487a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
488a159c266SJung-uk Kim     {
489a159c266SJung-uk Kim         return (Status);
490a159c266SJung-uk Kim     }
491a159c266SJung-uk Kim 
49228482948SJung-uk Kim     /* Convert AccessWidth into number of bits based */
49328482948SJung-uk Kim 
49428482948SJung-uk Kim     AccessWidth = AcpiHwGetAccessBitWidth (Address, Reg, 32);
49528482948SJung-uk Kim     BitWidth = Reg->BitOffset + Reg->BitWidth;
49628482948SJung-uk Kim     BitOffset = Reg->BitOffset;
49728482948SJung-uk Kim 
498a159c266SJung-uk Kim     /*
499a159c266SJung-uk Kim      * Two address spaces supported: Memory or IO. PCI_Config is
500a159c266SJung-uk Kim      * not supported here because the GAS structure is insufficient
501a159c266SJung-uk Kim      */
50228482948SJung-uk Kim     Index = 0;
50328482948SJung-uk Kim     while (BitWidth)
50428482948SJung-uk Kim     {
50528482948SJung-uk Kim         /*
50628482948SJung-uk Kim          * Use offset style bit reads because "Index * AccessWidth" is
50728482948SJung-uk Kim          * ensured to be less than 32-bits by AcpiHwValidateRegister().
50828482948SJung-uk Kim          */
50928482948SJung-uk Kim         Value32 = ACPI_GET_BITS (&Value, Index * AccessWidth,
51028482948SJung-uk Kim             ACPI_MASK_BITS_ABOVE_32 (AccessWidth));
51128482948SJung-uk Kim 
51228482948SJung-uk Kim         if (BitOffset >= AccessWidth)
51328482948SJung-uk Kim         {
51428482948SJung-uk Kim             BitOffset -= AccessWidth;
51528482948SJung-uk Kim         }
51628482948SJung-uk Kim         else
51728482948SJung-uk Kim         {
518a159c266SJung-uk Kim             if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY)
519a159c266SJung-uk Kim             {
52028482948SJung-uk Kim                 Value64 = (UINT64) Value32;
521a159c266SJung-uk Kim                 Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS)
52228482948SJung-uk Kim                     Address + Index * ACPI_DIV_8 (AccessWidth),
52328482948SJung-uk Kim                     Value64, AccessWidth);
524a159c266SJung-uk Kim             }
525a159c266SJung-uk Kim             else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
526a159c266SJung-uk Kim             {
527a159c266SJung-uk Kim                 Status = AcpiHwWritePort ((ACPI_IO_ADDRESS)
52828482948SJung-uk Kim                     Address + Index * ACPI_DIV_8 (AccessWidth),
52928482948SJung-uk Kim                     Value32, AccessWidth);
53028482948SJung-uk Kim             }
53128482948SJung-uk Kim         }
53228482948SJung-uk Kim 
53328482948SJung-uk Kim         /*
53428482948SJung-uk Kim          * Index * AccessWidth is ensured to be less than 32-bits by
53528482948SJung-uk Kim          * AcpiHwValidateRegister().
53628482948SJung-uk Kim          */
53728482948SJung-uk Kim         BitWidth -= BitWidth > AccessWidth ? AccessWidth : BitWidth;
53828482948SJung-uk Kim         Index++;
539a159c266SJung-uk Kim     }
540a159c266SJung-uk Kim 
541a159c266SJung-uk Kim     ACPI_DEBUG_PRINT ((ACPI_DB_IO,
542a159c266SJung-uk Kim         "Wrote: %8.8X width %2d   to %8.8X%8.8X (%s)\n",
54328482948SJung-uk Kim         Value, AccessWidth, ACPI_FORMAT_UINT64 (Address),
544a159c266SJung-uk Kim         AcpiUtGetRegionName (Reg->SpaceId)));
545a159c266SJung-uk Kim 
546a159c266SJung-uk Kim     return (Status);
547a159c266SJung-uk Kim }
548a159c266SJung-uk Kim 
549a159c266SJung-uk Kim 
550a159c266SJung-uk Kim #if (!ACPI_REDUCED_HARDWARE)
551a159c266SJung-uk Kim /*******************************************************************************
552a159c266SJung-uk Kim  *
553a159c266SJung-uk Kim  * FUNCTION:    AcpiHwClearAcpiStatus
554a159c266SJung-uk Kim  *
555a159c266SJung-uk Kim  * PARAMETERS:  None
556a159c266SJung-uk Kim  *
557a159c266SJung-uk Kim  * RETURN:      Status
558a159c266SJung-uk Kim  *
559a159c266SJung-uk Kim  * DESCRIPTION: Clears all fixed and general purpose status bits
560a159c266SJung-uk Kim  *
561a159c266SJung-uk Kim  ******************************************************************************/
562a159c266SJung-uk Kim 
563a159c266SJung-uk Kim ACPI_STATUS
564a159c266SJung-uk Kim AcpiHwClearAcpiStatus (
565a159c266SJung-uk Kim     void)
566a159c266SJung-uk Kim {
567a159c266SJung-uk Kim     ACPI_STATUS             Status;
568a159c266SJung-uk Kim     ACPI_CPU_FLAGS          LockFlags = 0;
569a159c266SJung-uk Kim 
570a159c266SJung-uk Kim 
571a159c266SJung-uk Kim     ACPI_FUNCTION_TRACE (HwClearAcpiStatus);
572a159c266SJung-uk Kim 
573a159c266SJung-uk Kim 
574a159c266SJung-uk Kim     ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
575a159c266SJung-uk Kim         ACPI_BITMASK_ALL_FIXED_STATUS,
576a159c266SJung-uk Kim         ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address)));
577a159c266SJung-uk Kim 
578a159c266SJung-uk Kim     LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock);
579a159c266SJung-uk Kim 
580a159c266SJung-uk Kim     /* Clear the fixed events in PM1 A/B */
581a159c266SJung-uk Kim 
582a159c266SJung-uk Kim     Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS,
583a159c266SJung-uk Kim         ACPI_BITMASK_ALL_FIXED_STATUS);
584313a0c13SJung-uk Kim 
585313a0c13SJung-uk Kim     AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags);
586313a0c13SJung-uk Kim 
587a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
588a159c266SJung-uk Kim     {
589313a0c13SJung-uk Kim         goto Exit;
590a159c266SJung-uk Kim     }
591a159c266SJung-uk Kim 
592a159c266SJung-uk Kim     /* Clear the GPE Bits in all GPE registers in all GPE blocks */
593a159c266SJung-uk Kim 
594a159c266SJung-uk Kim     Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL);
595a159c266SJung-uk Kim 
596313a0c13SJung-uk Kim Exit:
597a159c266SJung-uk Kim     return_ACPI_STATUS (Status);
598a159c266SJung-uk Kim }
599a159c266SJung-uk Kim 
600a159c266SJung-uk Kim 
601a159c266SJung-uk Kim /*******************************************************************************
602a159c266SJung-uk Kim  *
603a159c266SJung-uk Kim  * FUNCTION:    AcpiHwGetBitRegisterInfo
604a159c266SJung-uk Kim  *
605a159c266SJung-uk Kim  * PARAMETERS:  RegisterId          - Index of ACPI Register to access
606a159c266SJung-uk Kim  *
607a159c266SJung-uk Kim  * RETURN:      The bitmask to be used when accessing the register
608a159c266SJung-uk Kim  *
609a159c266SJung-uk Kim  * DESCRIPTION: Map RegisterId into a register bitmask.
610a159c266SJung-uk Kim  *
611a159c266SJung-uk Kim  ******************************************************************************/
612a159c266SJung-uk Kim 
613a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *
614a159c266SJung-uk Kim AcpiHwGetBitRegisterInfo (
615a159c266SJung-uk Kim     UINT32                  RegisterId)
616a159c266SJung-uk Kim {
617a159c266SJung-uk Kim     ACPI_FUNCTION_ENTRY ();
618a159c266SJung-uk Kim 
619a159c266SJung-uk Kim 
620a159c266SJung-uk Kim     if (RegisterId > ACPI_BITREG_MAX)
621a159c266SJung-uk Kim     {
622a159c266SJung-uk Kim         ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: 0x%X", RegisterId));
623a159c266SJung-uk Kim         return (NULL);
624a159c266SJung-uk Kim     }
625a159c266SJung-uk Kim 
626a159c266SJung-uk Kim     return (&AcpiGbl_BitRegisterInfo[RegisterId]);
627a159c266SJung-uk Kim }
628a159c266SJung-uk Kim 
629a159c266SJung-uk Kim 
630a159c266SJung-uk Kim /******************************************************************************
631a159c266SJung-uk Kim  *
632a159c266SJung-uk Kim  * FUNCTION:    AcpiHwWritePm1Control
633a159c266SJung-uk Kim  *
634a159c266SJung-uk Kim  * PARAMETERS:  Pm1aControl         - Value to be written to PM1A control
635a159c266SJung-uk Kim  *              Pm1bControl         - Value to be written to PM1B control
636a159c266SJung-uk Kim  *
637a159c266SJung-uk Kim  * RETURN:      Status
638a159c266SJung-uk Kim  *
639a159c266SJung-uk Kim  * DESCRIPTION: Write the PM1 A/B control registers. These registers are
640a159c266SJung-uk Kim  *              different than than the PM1 A/B status and enable registers
641a159c266SJung-uk Kim  *              in that different values can be written to the A/B registers.
642a159c266SJung-uk Kim  *              Most notably, the SLP_TYP bits can be different, as per the
643a159c266SJung-uk Kim  *              values returned from the _Sx predefined methods.
644a159c266SJung-uk Kim  *
645a159c266SJung-uk Kim  ******************************************************************************/
646a159c266SJung-uk Kim 
647a159c266SJung-uk Kim ACPI_STATUS
648a159c266SJung-uk Kim AcpiHwWritePm1Control (
649a159c266SJung-uk Kim     UINT32                  Pm1aControl,
650a159c266SJung-uk Kim     UINT32                  Pm1bControl)
651a159c266SJung-uk Kim {
652a159c266SJung-uk Kim     ACPI_STATUS             Status;
653a159c266SJung-uk Kim 
654a159c266SJung-uk Kim 
655a159c266SJung-uk Kim     ACPI_FUNCTION_TRACE (HwWritePm1Control);
656a159c266SJung-uk Kim 
657a159c266SJung-uk Kim 
658a159c266SJung-uk Kim     Status = AcpiHwWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock);
659a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
660a159c266SJung-uk Kim     {
661a159c266SJung-uk Kim         return_ACPI_STATUS (Status);
662a159c266SJung-uk Kim     }
663a159c266SJung-uk Kim 
664a159c266SJung-uk Kim     if (AcpiGbl_FADT.XPm1bControlBlock.Address)
665a159c266SJung-uk Kim     {
666a159c266SJung-uk Kim         Status = AcpiHwWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock);
667a159c266SJung-uk Kim     }
668a159c266SJung-uk Kim     return_ACPI_STATUS (Status);
669a159c266SJung-uk Kim }
670a159c266SJung-uk Kim 
671a159c266SJung-uk Kim 
672a159c266SJung-uk Kim /******************************************************************************
673a159c266SJung-uk Kim  *
674a159c266SJung-uk Kim  * FUNCTION:    AcpiHwRegisterRead
675a159c266SJung-uk Kim  *
676a159c266SJung-uk Kim  * PARAMETERS:  RegisterId          - ACPI Register ID
677a159c266SJung-uk Kim  *              ReturnValue         - Where the register value is returned
678a159c266SJung-uk Kim  *
679a159c266SJung-uk Kim  * RETURN:      Status and the value read.
680a159c266SJung-uk Kim  *
681a159c266SJung-uk Kim  * DESCRIPTION: Read from the specified ACPI register
682a159c266SJung-uk Kim  *
683a159c266SJung-uk Kim  ******************************************************************************/
684a159c266SJung-uk Kim 
685a159c266SJung-uk Kim ACPI_STATUS
686a159c266SJung-uk Kim AcpiHwRegisterRead (
687a159c266SJung-uk Kim     UINT32                  RegisterId,
688a159c266SJung-uk Kim     UINT32                  *ReturnValue)
689a159c266SJung-uk Kim {
690a159c266SJung-uk Kim     UINT32                  Value = 0;
691a159c266SJung-uk Kim     ACPI_STATUS             Status;
692a159c266SJung-uk Kim 
693a159c266SJung-uk Kim 
694a159c266SJung-uk Kim     ACPI_FUNCTION_TRACE (HwRegisterRead);
695a159c266SJung-uk Kim 
696a159c266SJung-uk Kim 
697a159c266SJung-uk Kim     switch (RegisterId)
698a159c266SJung-uk Kim     {
699a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_STATUS:           /* PM1 A/B: 16-bit access each */
700a159c266SJung-uk Kim 
701a159c266SJung-uk Kim         Status = AcpiHwReadMultiple (&Value,
702a159c266SJung-uk Kim             &AcpiGbl_XPm1aStatus,
703a159c266SJung-uk Kim             &AcpiGbl_XPm1bStatus);
704a159c266SJung-uk Kim         break;
705a159c266SJung-uk Kim 
706a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_ENABLE:           /* PM1 A/B: 16-bit access each */
707a159c266SJung-uk Kim 
708a159c266SJung-uk Kim         Status = AcpiHwReadMultiple (&Value,
709a159c266SJung-uk Kim             &AcpiGbl_XPm1aEnable,
710a159c266SJung-uk Kim             &AcpiGbl_XPm1bEnable);
711a159c266SJung-uk Kim         break;
712a159c266SJung-uk Kim 
713a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_CONTROL:          /* PM1 A/B: 16-bit access each */
714a159c266SJung-uk Kim 
715a159c266SJung-uk Kim         Status = AcpiHwReadMultiple (&Value,
716a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1aControlBlock,
717a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1bControlBlock);
718a159c266SJung-uk Kim 
719a159c266SJung-uk Kim         /*
720a159c266SJung-uk Kim          * Zero the write-only bits. From the ACPI specification, "Hardware
721a159c266SJung-uk Kim          * Write-Only Bits": "Upon reads to registers with write-only bits,
722a159c266SJung-uk Kim          * software masks out all write-only bits."
723a159c266SJung-uk Kim          */
724a159c266SJung-uk Kim         Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
725a159c266SJung-uk Kim         break;
726a159c266SJung-uk Kim 
727a159c266SJung-uk Kim     case ACPI_REGISTER_PM2_CONTROL:          /* 8-bit access */
728a159c266SJung-uk Kim 
729a159c266SJung-uk Kim         Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPm2ControlBlock);
730a159c266SJung-uk Kim         break;
731a159c266SJung-uk Kim 
732a159c266SJung-uk Kim     case ACPI_REGISTER_PM_TIMER:             /* 32-bit access */
733a159c266SJung-uk Kim 
734a159c266SJung-uk Kim         Status = AcpiHwRead (&Value, &AcpiGbl_FADT.XPmTimerBlock);
735a159c266SJung-uk Kim         break;
736a159c266SJung-uk Kim 
737a159c266SJung-uk Kim     case ACPI_REGISTER_SMI_COMMAND_BLOCK:    /* 8-bit access */
738a159c266SJung-uk Kim 
739a159c266SJung-uk Kim         Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8);
740a159c266SJung-uk Kim         break;
741a159c266SJung-uk Kim 
742a159c266SJung-uk Kim     default:
743a9d8d09cSJung-uk Kim 
744a159c266SJung-uk Kim         ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X",
745a159c266SJung-uk Kim             RegisterId));
746a159c266SJung-uk Kim         Status = AE_BAD_PARAMETER;
747a159c266SJung-uk Kim         break;
748a159c266SJung-uk Kim     }
749a159c266SJung-uk Kim 
750a159c266SJung-uk Kim     if (ACPI_SUCCESS (Status))
751a159c266SJung-uk Kim     {
752a159c266SJung-uk Kim         *ReturnValue = Value;
753a159c266SJung-uk Kim     }
754a159c266SJung-uk Kim 
755a159c266SJung-uk Kim     return_ACPI_STATUS (Status);
756a159c266SJung-uk Kim }
757a159c266SJung-uk Kim 
758a159c266SJung-uk Kim 
759a159c266SJung-uk Kim /******************************************************************************
760a159c266SJung-uk Kim  *
761a159c266SJung-uk Kim  * FUNCTION:    AcpiHwRegisterWrite
762a159c266SJung-uk Kim  *
763a159c266SJung-uk Kim  * PARAMETERS:  RegisterId          - ACPI Register ID
764a159c266SJung-uk Kim  *              Value               - The value to write
765a159c266SJung-uk Kim  *
766a159c266SJung-uk Kim  * RETURN:      Status
767a159c266SJung-uk Kim  *
768a159c266SJung-uk Kim  * DESCRIPTION: Write to the specified ACPI register
769a159c266SJung-uk Kim  *
770a159c266SJung-uk Kim  * NOTE: In accordance with the ACPI specification, this function automatically
771a159c266SJung-uk Kim  * preserves the value of the following bits, meaning that these bits cannot be
772a159c266SJung-uk Kim  * changed via this interface:
773a159c266SJung-uk Kim  *
774a159c266SJung-uk Kim  * PM1_CONTROL[0] = SCI_EN
775a159c266SJung-uk Kim  * PM1_CONTROL[9]
776a159c266SJung-uk Kim  * PM1_STATUS[11]
777a159c266SJung-uk Kim  *
778a159c266SJung-uk Kim  * ACPI References:
779a159c266SJung-uk Kim  * 1) Hardware Ignored Bits: When software writes to a register with ignored
780a159c266SJung-uk Kim  *      bit fields, it preserves the ignored bit fields
781a159c266SJung-uk Kim  * 2) SCI_EN: OSPM always preserves this bit position
782a159c266SJung-uk Kim  *
783a159c266SJung-uk Kim  ******************************************************************************/
784a159c266SJung-uk Kim 
785a159c266SJung-uk Kim ACPI_STATUS
786a159c266SJung-uk Kim AcpiHwRegisterWrite (
787a159c266SJung-uk Kim     UINT32                  RegisterId,
788a159c266SJung-uk Kim     UINT32                  Value)
789a159c266SJung-uk Kim {
790a159c266SJung-uk Kim     ACPI_STATUS             Status;
791a159c266SJung-uk Kim     UINT32                  ReadValue;
792a159c266SJung-uk Kim 
793a159c266SJung-uk Kim 
794a159c266SJung-uk Kim     ACPI_FUNCTION_TRACE (HwRegisterWrite);
795a159c266SJung-uk Kim 
796a159c266SJung-uk Kim 
797a159c266SJung-uk Kim     switch (RegisterId)
798a159c266SJung-uk Kim     {
799a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_STATUS:           /* PM1 A/B: 16-bit access each */
800a159c266SJung-uk Kim         /*
801a159c266SJung-uk Kim          * Handle the "ignored" bit in PM1 Status. According to the ACPI
802a159c266SJung-uk Kim          * specification, ignored bits are to be preserved when writing.
803a159c266SJung-uk Kim          * Normally, this would mean a read/modify/write sequence. However,
804a159c266SJung-uk Kim          * preserving a bit in the status register is different. Writing a
805a159c266SJung-uk Kim          * one clears the status, and writing a zero preserves the status.
806a159c266SJung-uk Kim          * Therefore, we must always write zero to the ignored bit.
807a159c266SJung-uk Kim          *
808a159c266SJung-uk Kim          * This behavior is clarified in the ACPI 4.0 specification.
809a159c266SJung-uk Kim          */
810a159c266SJung-uk Kim         Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
811a159c266SJung-uk Kim 
812a159c266SJung-uk Kim         Status = AcpiHwWriteMultiple (Value,
813a159c266SJung-uk Kim             &AcpiGbl_XPm1aStatus,
814a159c266SJung-uk Kim             &AcpiGbl_XPm1bStatus);
815a159c266SJung-uk Kim         break;
816a159c266SJung-uk Kim 
817a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_ENABLE:           /* PM1 A/B: 16-bit access each */
818a159c266SJung-uk Kim 
819a159c266SJung-uk Kim         Status = AcpiHwWriteMultiple (Value,
820a159c266SJung-uk Kim             &AcpiGbl_XPm1aEnable,
821a159c266SJung-uk Kim             &AcpiGbl_XPm1bEnable);
822a159c266SJung-uk Kim         break;
823a159c266SJung-uk Kim 
824a159c266SJung-uk Kim     case ACPI_REGISTER_PM1_CONTROL:          /* PM1 A/B: 16-bit access each */
825a159c266SJung-uk Kim         /*
826a159c266SJung-uk Kim          * Perform a read first to preserve certain bits (per ACPI spec)
827a159c266SJung-uk Kim          * Note: This includes SCI_EN, we never want to change this bit
828a159c266SJung-uk Kim          */
829a159c266SJung-uk Kim         Status = AcpiHwReadMultiple (&ReadValue,
830a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1aControlBlock,
831a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1bControlBlock);
832a159c266SJung-uk Kim         if (ACPI_FAILURE (Status))
833a159c266SJung-uk Kim         {
834a159c266SJung-uk Kim             goto Exit;
835a159c266SJung-uk Kim         }
836a159c266SJung-uk Kim 
837a159c266SJung-uk Kim         /* Insert the bits to be preserved */
838a159c266SJung-uk Kim 
839a159c266SJung-uk Kim         ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue);
840a159c266SJung-uk Kim 
841a159c266SJung-uk Kim         /* Now we can write the data */
842a159c266SJung-uk Kim 
843a159c266SJung-uk Kim         Status = AcpiHwWriteMultiple (Value,
844a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1aControlBlock,
845a159c266SJung-uk Kim             &AcpiGbl_FADT.XPm1bControlBlock);
846a159c266SJung-uk Kim         break;
847a159c266SJung-uk Kim 
848a159c266SJung-uk Kim     case ACPI_REGISTER_PM2_CONTROL:          /* 8-bit access */
849a159c266SJung-uk Kim         /*
850a159c266SJung-uk Kim          * For control registers, all reserved bits must be preserved,
851a159c266SJung-uk Kim          * as per the ACPI spec.
852a159c266SJung-uk Kim          */
853a159c266SJung-uk Kim         Status = AcpiHwRead (&ReadValue, &AcpiGbl_FADT.XPm2ControlBlock);
854a159c266SJung-uk Kim         if (ACPI_FAILURE (Status))
855a159c266SJung-uk Kim         {
856a159c266SJung-uk Kim             goto Exit;
857a159c266SJung-uk Kim         }
858a159c266SJung-uk Kim 
859a159c266SJung-uk Kim         /* Insert the bits to be preserved */
860a159c266SJung-uk Kim 
861a159c266SJung-uk Kim         ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue);
862a159c266SJung-uk Kim 
863a159c266SJung-uk Kim         Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock);
864a159c266SJung-uk Kim         break;
865a159c266SJung-uk Kim 
866a159c266SJung-uk Kim     case ACPI_REGISTER_PM_TIMER:             /* 32-bit access */
867a159c266SJung-uk Kim 
868a159c266SJung-uk Kim         Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPmTimerBlock);
869a159c266SJung-uk Kim         break;
870a159c266SJung-uk Kim 
871a159c266SJung-uk Kim     case ACPI_REGISTER_SMI_COMMAND_BLOCK:    /* 8-bit access */
872a159c266SJung-uk Kim 
873a159c266SJung-uk Kim         /* SMI_CMD is currently always in IO space */
874a159c266SJung-uk Kim 
875a159c266SJung-uk Kim         Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8);
876a159c266SJung-uk Kim         break;
877a159c266SJung-uk Kim 
878a159c266SJung-uk Kim     default:
879a9d8d09cSJung-uk Kim 
880a159c266SJung-uk Kim         ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X",
881a159c266SJung-uk Kim             RegisterId));
882a159c266SJung-uk Kim         Status = AE_BAD_PARAMETER;
883a159c266SJung-uk Kim         break;
884a159c266SJung-uk Kim     }
885a159c266SJung-uk Kim 
886a159c266SJung-uk Kim Exit:
887a159c266SJung-uk Kim     return_ACPI_STATUS (Status);
888a159c266SJung-uk Kim }
889a159c266SJung-uk Kim 
890a159c266SJung-uk Kim 
891a159c266SJung-uk Kim /******************************************************************************
892a159c266SJung-uk Kim  *
893a159c266SJung-uk Kim  * FUNCTION:    AcpiHwReadMultiple
894a159c266SJung-uk Kim  *
895a159c266SJung-uk Kim  * PARAMETERS:  Value               - Where the register value is returned
896a159c266SJung-uk Kim  *              RegisterA           - First ACPI register (required)
897a159c266SJung-uk Kim  *              RegisterB           - Second ACPI register (optional)
898a159c266SJung-uk Kim  *
899a159c266SJung-uk Kim  * RETURN:      Status
900a159c266SJung-uk Kim  *
901a159c266SJung-uk Kim  * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
902a159c266SJung-uk Kim  *
903a159c266SJung-uk Kim  ******************************************************************************/
904a159c266SJung-uk Kim 
905a159c266SJung-uk Kim static ACPI_STATUS
906a159c266SJung-uk Kim AcpiHwReadMultiple (
907a159c266SJung-uk Kim     UINT32                  *Value,
908a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterA,
909a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterB)
910a159c266SJung-uk Kim {
911a159c266SJung-uk Kim     UINT32                  ValueA = 0;
912a159c266SJung-uk Kim     UINT32                  ValueB = 0;
913a159c266SJung-uk Kim     ACPI_STATUS             Status;
914a159c266SJung-uk Kim 
915a159c266SJung-uk Kim 
916a159c266SJung-uk Kim     /* The first register is always required */
917a159c266SJung-uk Kim 
918a159c266SJung-uk Kim     Status = AcpiHwRead (&ValueA, RegisterA);
919a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
920a159c266SJung-uk Kim     {
921a159c266SJung-uk Kim         return (Status);
922a159c266SJung-uk Kim     }
923a159c266SJung-uk Kim 
924a159c266SJung-uk Kim     /* Second register is optional */
925a159c266SJung-uk Kim 
926a159c266SJung-uk Kim     if (RegisterB->Address)
927a159c266SJung-uk Kim     {
928a159c266SJung-uk Kim         Status = AcpiHwRead (&ValueB, RegisterB);
929a159c266SJung-uk Kim         if (ACPI_FAILURE (Status))
930a159c266SJung-uk Kim         {
931a159c266SJung-uk Kim             return (Status);
932a159c266SJung-uk Kim         }
933a159c266SJung-uk Kim     }
934a159c266SJung-uk Kim 
935a159c266SJung-uk Kim     /*
936a159c266SJung-uk Kim      * OR the two return values together. No shifting or masking is necessary,
937a159c266SJung-uk Kim      * because of how the PM1 registers are defined in the ACPI specification:
938a159c266SJung-uk Kim      *
939a159c266SJung-uk Kim      * "Although the bits can be split between the two register blocks (each
940a159c266SJung-uk Kim      * register block has a unique pointer within the FADT), the bit positions
941a159c266SJung-uk Kim      * are maintained. The register block with unimplemented bits (that is,
942a159c266SJung-uk Kim      * those implemented in the other register block) always returns zeros,
943a159c266SJung-uk Kim      * and writes have no side effects"
944a159c266SJung-uk Kim      */
945a159c266SJung-uk Kim     *Value = (ValueA | ValueB);
946a159c266SJung-uk Kim     return (AE_OK);
947a159c266SJung-uk Kim }
948a159c266SJung-uk Kim 
949a159c266SJung-uk Kim 
950a159c266SJung-uk Kim /******************************************************************************
951a159c266SJung-uk Kim  *
952a159c266SJung-uk Kim  * FUNCTION:    AcpiHwWriteMultiple
953a159c266SJung-uk Kim  *
954a159c266SJung-uk Kim  * PARAMETERS:  Value               - The value to write
955a159c266SJung-uk Kim  *              RegisterA           - First ACPI register (required)
956a159c266SJung-uk Kim  *              RegisterB           - Second ACPI register (optional)
957a159c266SJung-uk Kim  *
958a159c266SJung-uk Kim  * RETURN:      Status
959a159c266SJung-uk Kim  *
960a159c266SJung-uk Kim  * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
961a159c266SJung-uk Kim  *
962a159c266SJung-uk Kim  ******************************************************************************/
963a159c266SJung-uk Kim 
964a159c266SJung-uk Kim static ACPI_STATUS
965a159c266SJung-uk Kim AcpiHwWriteMultiple (
966a159c266SJung-uk Kim     UINT32                  Value,
967a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterA,
968a159c266SJung-uk Kim     ACPI_GENERIC_ADDRESS    *RegisterB)
969a159c266SJung-uk Kim {
970a159c266SJung-uk Kim     ACPI_STATUS             Status;
971a159c266SJung-uk Kim 
972a159c266SJung-uk Kim 
973a159c266SJung-uk Kim     /* The first register is always required */
974a159c266SJung-uk Kim 
975a159c266SJung-uk Kim     Status = AcpiHwWrite (Value, RegisterA);
976a159c266SJung-uk Kim     if (ACPI_FAILURE (Status))
977a159c266SJung-uk Kim     {
978a159c266SJung-uk Kim         return (Status);
979a159c266SJung-uk Kim     }
980a159c266SJung-uk Kim 
981a159c266SJung-uk Kim     /*
982a159c266SJung-uk Kim      * Second register is optional
983a159c266SJung-uk Kim      *
984a159c266SJung-uk Kim      * No bit shifting or clearing is necessary, because of how the PM1
985a159c266SJung-uk Kim      * registers are defined in the ACPI specification:
986a159c266SJung-uk Kim      *
987a159c266SJung-uk Kim      * "Although the bits can be split between the two register blocks (each
988a159c266SJung-uk Kim      * register block has a unique pointer within the FADT), the bit positions
989a159c266SJung-uk Kim      * are maintained. The register block with unimplemented bits (that is,
990a159c266SJung-uk Kim      * those implemented in the other register block) always returns zeros,
991a159c266SJung-uk Kim      * and writes have no side effects"
992a159c266SJung-uk Kim      */
993a159c266SJung-uk Kim     if (RegisterB->Address)
994a159c266SJung-uk Kim     {
995a159c266SJung-uk Kim         Status = AcpiHwWrite (Value, RegisterB);
996a159c266SJung-uk Kim     }
997a159c266SJung-uk Kim 
998a159c266SJung-uk Kim     return (Status);
999a159c266SJung-uk Kim }
1000a159c266SJung-uk Kim 
1001a159c266SJung-uk Kim #endif /* !ACPI_REDUCED_HARDWARE */
1002