1*ff879b07SJung-uk Kim /****************************************************************************** 2*ff879b07SJung-uk Kim * 3*ff879b07SJung-uk Kim * Module Name: dmtbinfo1 - Table info for non-AML tables 4*ff879b07SJung-uk Kim * 5*ff879b07SJung-uk Kim *****************************************************************************/ 6*ff879b07SJung-uk Kim 7*ff879b07SJung-uk Kim /****************************************************************************** 8*ff879b07SJung-uk Kim * 9*ff879b07SJung-uk Kim * 1. Copyright Notice 10*ff879b07SJung-uk Kim * 11*ff879b07SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp. 12*ff879b07SJung-uk Kim * All rights reserved. 13*ff879b07SJung-uk Kim * 14*ff879b07SJung-uk Kim * 2. License 15*ff879b07SJung-uk Kim * 16*ff879b07SJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property 17*ff879b07SJung-uk Kim * rights. You may have additional license terms from the party that provided 18*ff879b07SJung-uk Kim * you this software, covering your right to use that party's intellectual 19*ff879b07SJung-uk Kim * property rights. 20*ff879b07SJung-uk Kim * 21*ff879b07SJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22*ff879b07SJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an 23*ff879b07SJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24*ff879b07SJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy, 25*ff879b07SJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered 26*ff879b07SJung-uk Kim * Code in any form, with the right to sublicense such rights; and 27*ff879b07SJung-uk Kim * 28*ff879b07SJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29*ff879b07SJung-uk Kim * license (with the right to sublicense), under only those claims of Intel 30*ff879b07SJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell, 31*ff879b07SJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof 32*ff879b07SJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright 33*ff879b07SJung-uk Kim * license, and in no event shall the patent license extend to any additions 34*ff879b07SJung-uk Kim * to or modifications of the Original Intel Code. No other license or right 35*ff879b07SJung-uk Kim * is granted directly or by implication, estoppel or otherwise; 36*ff879b07SJung-uk Kim * 37*ff879b07SJung-uk Kim * The above copyright and patent license is granted only if the following 38*ff879b07SJung-uk Kim * conditions are met: 39*ff879b07SJung-uk Kim * 40*ff879b07SJung-uk Kim * 3. Conditions 41*ff879b07SJung-uk Kim * 42*ff879b07SJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43*ff879b07SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 44*ff879b07SJung-uk Kim * Code or modification with rights to further distribute source must include 45*ff879b07SJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions, 46*ff879b07SJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition, 47*ff879b07SJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to 48*ff879b07SJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered 49*ff879b07SJung-uk Kim * Code and the date of any change. Licensee must include in that file the 50*ff879b07SJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee 51*ff879b07SJung-uk Kim * must include a prominent statement that the modification is derived, 52*ff879b07SJung-uk Kim * directly or indirectly, from Original Intel Code. 53*ff879b07SJung-uk Kim * 54*ff879b07SJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55*ff879b07SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 56*ff879b07SJung-uk Kim * Code or modification without rights to further distribute source must 57*ff879b07SJung-uk Kim * include the following Disclaimer and Export Compliance provision in the 58*ff879b07SJung-uk Kim * documentation and/or other materials provided with distribution. In 59*ff879b07SJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any 60*ff879b07SJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the 61*ff879b07SJung-uk Kim * license from Licensee to its licensee is limited to the intellectual 62*ff879b07SJung-uk Kim * property embodied in the software Licensee provides to its licensee, and 63*ff879b07SJung-uk Kim * not to intellectual property embodied in modifications its licensee may 64*ff879b07SJung-uk Kim * make. 65*ff879b07SJung-uk Kim * 66*ff879b07SJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any 67*ff879b07SJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the 68*ff879b07SJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance 69*ff879b07SJung-uk Kim * provision in the documentation and/or other materials provided with the 70*ff879b07SJung-uk Kim * distribution. 71*ff879b07SJung-uk Kim * 72*ff879b07SJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original 73*ff879b07SJung-uk Kim * Intel Code. 74*ff879b07SJung-uk Kim * 75*ff879b07SJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76*ff879b07SJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or 77*ff879b07SJung-uk Kim * other dealings in products derived from or relating to the Covered Code 78*ff879b07SJung-uk Kim * without prior written authorization from Intel. 79*ff879b07SJung-uk Kim * 80*ff879b07SJung-uk Kim * 4. Disclaimer and Export Compliance 81*ff879b07SJung-uk Kim * 82*ff879b07SJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83*ff879b07SJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84*ff879b07SJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85*ff879b07SJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86*ff879b07SJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87*ff879b07SJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88*ff879b07SJung-uk Kim * PARTICULAR PURPOSE. 89*ff879b07SJung-uk Kim * 90*ff879b07SJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91*ff879b07SJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92*ff879b07SJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93*ff879b07SJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94*ff879b07SJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95*ff879b07SJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96*ff879b07SJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97*ff879b07SJung-uk Kim * LIMITED REMEDY. 98*ff879b07SJung-uk Kim * 99*ff879b07SJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this 100*ff879b07SJung-uk Kim * software or system incorporating such software without first obtaining any 101*ff879b07SJung-uk Kim * required license or other approval from the U. S. Department of Commerce or 102*ff879b07SJung-uk Kim * any other agency or department of the United States Government. In the 103*ff879b07SJung-uk Kim * event Licensee exports any such software from the United States or 104*ff879b07SJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall 105*ff879b07SJung-uk Kim * ensure that the distribution and export/re-export of the software is in 106*ff879b07SJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the 107*ff879b07SJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108*ff879b07SJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process, 109*ff879b07SJung-uk Kim * software, or service, directly or indirectly, to any country for which the 110*ff879b07SJung-uk Kim * United States government or any agency thereof requires an export license, 111*ff879b07SJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining 112*ff879b07SJung-uk Kim * such license, approval or letter. 113*ff879b07SJung-uk Kim * 114*ff879b07SJung-uk Kim ***************************************************************************** 115*ff879b07SJung-uk Kim * 116*ff879b07SJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 117*ff879b07SJung-uk Kim * following license: 118*ff879b07SJung-uk Kim * 119*ff879b07SJung-uk Kim * Redistribution and use in source and binary forms, with or without 120*ff879b07SJung-uk Kim * modification, are permitted provided that the following conditions 121*ff879b07SJung-uk Kim * are met: 122*ff879b07SJung-uk Kim * 1. Redistributions of source code must retain the above copyright 123*ff879b07SJung-uk Kim * notice, this list of conditions, and the following disclaimer, 124*ff879b07SJung-uk Kim * without modification. 125*ff879b07SJung-uk Kim * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126*ff879b07SJung-uk Kim * substantially similar to the "NO WARRANTY" disclaimer below 127*ff879b07SJung-uk Kim * ("Disclaimer") and any redistribution must be conditioned upon 128*ff879b07SJung-uk Kim * including a substantially similar Disclaimer requirement for further 129*ff879b07SJung-uk Kim * binary redistribution. 130*ff879b07SJung-uk Kim * 3. Neither the names of the above-listed copyright holders nor the names 131*ff879b07SJung-uk Kim * of any contributors may be used to endorse or promote products derived 132*ff879b07SJung-uk Kim * from this software without specific prior written permission. 133*ff879b07SJung-uk Kim * 134*ff879b07SJung-uk Kim * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135*ff879b07SJung-uk Kim * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136*ff879b07SJung-uk Kim * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137*ff879b07SJung-uk Kim * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138*ff879b07SJung-uk Kim * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139*ff879b07SJung-uk Kim * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140*ff879b07SJung-uk Kim * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141*ff879b07SJung-uk Kim * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142*ff879b07SJung-uk Kim * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143*ff879b07SJung-uk Kim * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144*ff879b07SJung-uk Kim * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145*ff879b07SJung-uk Kim * 146*ff879b07SJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the 147*ff879b07SJung-uk Kim * GNU General Public License ("GPL") version 2 as published by the Free 148*ff879b07SJung-uk Kim * Software Foundation. 149*ff879b07SJung-uk Kim * 150*ff879b07SJung-uk Kim *****************************************************************************/ 151*ff879b07SJung-uk Kim 152*ff879b07SJung-uk Kim #include <contrib/dev/acpica/include/acpi.h> 153*ff879b07SJung-uk Kim #include <contrib/dev/acpica/include/accommon.h> 154*ff879b07SJung-uk Kim #include <contrib/dev/acpica/include/acdisasm.h> 155*ff879b07SJung-uk Kim #include <contrib/dev/acpica/include/actbinfo.h> 156*ff879b07SJung-uk Kim 157*ff879b07SJung-uk Kim /* This module used for application-level code only */ 158*ff879b07SJung-uk Kim 159*ff879b07SJung-uk Kim #define _COMPONENT ACPI_CA_DISASSEMBLER 160*ff879b07SJung-uk Kim ACPI_MODULE_NAME ("dmtbinfo1") 161*ff879b07SJung-uk Kim 162*ff879b07SJung-uk Kim /* 163*ff879b07SJung-uk Kim * How to add a new table: 164*ff879b07SJung-uk Kim * 165*ff879b07SJung-uk Kim * - Add the C table definition to the actbl1.h or actbl2.h header. 166*ff879b07SJung-uk Kim * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 167*ff879b07SJung-uk Kim * - Define the table in this file (for the disassembler). If any 168*ff879b07SJung-uk Kim * new data types are required (ACPI_DMT_*), see below. 169*ff879b07SJung-uk Kim * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 170*ff879b07SJung-uk Kim * in acdisam.h 171*ff879b07SJung-uk Kim * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 172*ff879b07SJung-uk Kim * If a simple table (with no subtables), no disassembly code is needed. 173*ff879b07SJung-uk Kim * Otherwise, create the AcpiDmDump* function for to disassemble the table 174*ff879b07SJung-uk Kim * and add it to the dmtbdump.c file. 175*ff879b07SJung-uk Kim * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 176*ff879b07SJung-uk Kim * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 177*ff879b07SJung-uk Kim * - Create a template for the new table 178*ff879b07SJung-uk Kim * - Add data table compiler support 179*ff879b07SJung-uk Kim * 180*ff879b07SJung-uk Kim * How to add a new data type (ACPI_DMT_*): 181*ff879b07SJung-uk Kim * 182*ff879b07SJung-uk Kim * - Add new type at the end of the ACPI_DMT list in acdisasm.h 183*ff879b07SJung-uk Kim * - Add length and implementation cases in dmtable.c (disassembler) 184*ff879b07SJung-uk Kim * - Add type and length cases in dtutils.c (DT compiler) 185*ff879b07SJung-uk Kim */ 186*ff879b07SJung-uk Kim 187*ff879b07SJung-uk Kim /* 188*ff879b07SJung-uk Kim * ACPI Table Information, used to dump formatted ACPI tables 189*ff879b07SJung-uk Kim * 190*ff879b07SJung-uk Kim * Each entry is of the form: <Field Type, Field Offset, Field Name> 191*ff879b07SJung-uk Kim */ 192*ff879b07SJung-uk Kim 193*ff879b07SJung-uk Kim 194*ff879b07SJung-uk Kim /******************************************************************************* 195*ff879b07SJung-uk Kim * 196*ff879b07SJung-uk Kim * ASF - Alert Standard Format table (Signature "ASF!") 197*ff879b07SJung-uk Kim * 198*ff879b07SJung-uk Kim ******************************************************************************/ 199*ff879b07SJung-uk Kim 200*ff879b07SJung-uk Kim /* Common Subtable header (one per Subtable) */ 201*ff879b07SJung-uk Kim 202*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 203*ff879b07SJung-uk Kim { 204*ff879b07SJung-uk Kim {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 205*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 206*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 207*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 208*ff879b07SJung-uk Kim }; 209*ff879b07SJung-uk Kim 210*ff879b07SJung-uk Kim /* 0: ASF Information */ 211*ff879b07SJung-uk Kim 212*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 213*ff879b07SJung-uk Kim { 214*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 215*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 216*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 217*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 218*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 219*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 220*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 221*ff879b07SJung-uk Kim }; 222*ff879b07SJung-uk Kim 223*ff879b07SJung-uk Kim /* 1: ASF Alerts */ 224*ff879b07SJung-uk Kim 225*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 226*ff879b07SJung-uk Kim { 227*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 228*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 229*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 230*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 231*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 232*ff879b07SJung-uk Kim }; 233*ff879b07SJung-uk Kim 234*ff879b07SJung-uk Kim /* 1a: ASF Alert data */ 235*ff879b07SJung-uk Kim 236*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 237*ff879b07SJung-uk Kim { 238*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 239*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 240*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 241*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 242*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 243*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 244*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 245*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 246*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 247*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 248*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 249*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 250*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 251*ff879b07SJung-uk Kim }; 252*ff879b07SJung-uk Kim 253*ff879b07SJung-uk Kim /* 2: ASF Remote Control */ 254*ff879b07SJung-uk Kim 255*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 256*ff879b07SJung-uk Kim { 257*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 258*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 259*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 260*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 261*ff879b07SJung-uk Kim }; 262*ff879b07SJung-uk Kim 263*ff879b07SJung-uk Kim /* 2a: ASF Control data */ 264*ff879b07SJung-uk Kim 265*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 266*ff879b07SJung-uk Kim { 267*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 268*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 269*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 270*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 271*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 272*ff879b07SJung-uk Kim }; 273*ff879b07SJung-uk Kim 274*ff879b07SJung-uk Kim /* 3: ASF RMCP Boot Options */ 275*ff879b07SJung-uk Kim 276*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 277*ff879b07SJung-uk Kim { 278*ff879b07SJung-uk Kim {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 279*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 280*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 281*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 282*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 283*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 284*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 285*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 286*ff879b07SJung-uk Kim }; 287*ff879b07SJung-uk Kim 288*ff879b07SJung-uk Kim /* 4: ASF Address */ 289*ff879b07SJung-uk Kim 290*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 291*ff879b07SJung-uk Kim { 292*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 293*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 294*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 295*ff879b07SJung-uk Kim }; 296*ff879b07SJung-uk Kim 297*ff879b07SJung-uk Kim 298*ff879b07SJung-uk Kim /******************************************************************************* 299*ff879b07SJung-uk Kim * 300*ff879b07SJung-uk Kim * BERT - Boot Error Record table 301*ff879b07SJung-uk Kim * 302*ff879b07SJung-uk Kim ******************************************************************************/ 303*ff879b07SJung-uk Kim 304*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 305*ff879b07SJung-uk Kim { 306*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 307*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 308*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 309*ff879b07SJung-uk Kim }; 310*ff879b07SJung-uk Kim 311*ff879b07SJung-uk Kim 312*ff879b07SJung-uk Kim /******************************************************************************* 313*ff879b07SJung-uk Kim * 314*ff879b07SJung-uk Kim * BGRT - Boot Graphics Resource Table (ACPI 5.0) 315*ff879b07SJung-uk Kim * 316*ff879b07SJung-uk Kim ******************************************************************************/ 317*ff879b07SJung-uk Kim 318*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] = 319*ff879b07SJung-uk Kim { 320*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0}, 321*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status (decoded below)", DT_FLAG}, 322*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Displayed", 0}, 323*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS1, ACPI_BGRT_FLAG_OFFSET (Status, 0), "Orientation Offset", 0}, 324*ff879b07SJung-uk Kim 325*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0}, 326*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0}, 327*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0}, 328*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0}, 329*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 330*ff879b07SJung-uk Kim }; 331*ff879b07SJung-uk Kim 332*ff879b07SJung-uk Kim 333*ff879b07SJung-uk Kim /******************************************************************************* 334*ff879b07SJung-uk Kim * 335*ff879b07SJung-uk Kim * BOOT - Simple Boot Flag Table 336*ff879b07SJung-uk Kim * 337*ff879b07SJung-uk Kim ******************************************************************************/ 338*ff879b07SJung-uk Kim 339*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 340*ff879b07SJung-uk Kim { 341*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 342*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 343*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 344*ff879b07SJung-uk Kim }; 345*ff879b07SJung-uk Kim 346*ff879b07SJung-uk Kim 347*ff879b07SJung-uk Kim /******************************************************************************* 348*ff879b07SJung-uk Kim * 349*ff879b07SJung-uk Kim * CPEP - Corrected Platform Error Polling table 350*ff879b07SJung-uk Kim * 351*ff879b07SJung-uk Kim ******************************************************************************/ 352*ff879b07SJung-uk Kim 353*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 354*ff879b07SJung-uk Kim { 355*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 356*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 357*ff879b07SJung-uk Kim }; 358*ff879b07SJung-uk Kim 359*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 360*ff879b07SJung-uk Kim { 361*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 362*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 363*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 364*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 365*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 366*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 367*ff879b07SJung-uk Kim }; 368*ff879b07SJung-uk Kim 369*ff879b07SJung-uk Kim 370*ff879b07SJung-uk Kim /******************************************************************************* 371*ff879b07SJung-uk Kim * 372*ff879b07SJung-uk Kim * CSRT - Core System Resource Table 373*ff879b07SJung-uk Kim * 374*ff879b07SJung-uk Kim ******************************************************************************/ 375*ff879b07SJung-uk Kim 376*ff879b07SJung-uk Kim /* Main table consists only of the standard ACPI table header */ 377*ff879b07SJung-uk Kim 378*ff879b07SJung-uk Kim /* Resource Group subtable */ 379*ff879b07SJung-uk Kim 380*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = 381*ff879b07SJung-uk Kim { 382*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", DT_LENGTH}, 383*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, 384*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, 385*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, 386*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0}, 387*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0}, 388*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0}, 389*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0}, 390*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 391*ff879b07SJung-uk Kim }; 392*ff879b07SJung-uk Kim 393*ff879b07SJung-uk Kim /* Shared Info subtable */ 394*ff879b07SJung-uk Kim 395*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = 396*ff879b07SJung-uk Kim { 397*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0}, 398*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0}, 399*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0}, 400*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0}, 401*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0}, 402*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0}, 403*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0}, 404*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0}, 405*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0}, 406*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0}, 407*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0}, 408*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0}, 409*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 410*ff879b07SJung-uk Kim }; 411*ff879b07SJung-uk Kim 412*ff879b07SJung-uk Kim /* Resource Descriptor subtable */ 413*ff879b07SJung-uk Kim 414*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = 415*ff879b07SJung-uk Kim { 416*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", DT_LENGTH}, 417*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, 418*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, 419*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, 420*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 421*ff879b07SJung-uk Kim }; 422*ff879b07SJung-uk Kim 423*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[] = 424*ff879b07SJung-uk Kim { 425*ff879b07SJung-uk Kim {ACPI_DMT_RAW_BUFFER, 0, "ResourceInfo", DT_OPTIONAL}, 426*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 427*ff879b07SJung-uk Kim }; 428*ff879b07SJung-uk Kim 429*ff879b07SJung-uk Kim 430*ff879b07SJung-uk Kim /******************************************************************************* 431*ff879b07SJung-uk Kim * 432*ff879b07SJung-uk Kim * DBG2 - Debug Port Table 2 433*ff879b07SJung-uk Kim * 434*ff879b07SJung-uk Kim ******************************************************************************/ 435*ff879b07SJung-uk Kim 436*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] = 437*ff879b07SJung-uk Kim { 438*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0}, 439*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0}, 440*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 441*ff879b07SJung-uk Kim }; 442*ff879b07SJung-uk Kim 443*ff879b07SJung-uk Kim /* Debug Device Information Subtable */ 444*ff879b07SJung-uk Kim 445*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] = 446*ff879b07SJung-uk Kim { 447*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0}, 448*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH}, 449*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0}, 450*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0}, 451*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0}, 452*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL}, 453*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL}, 454*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0}, 455*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0}, 456*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0}, 457*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0}, 458*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0}, 459*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 460*ff879b07SJung-uk Kim }; 461*ff879b07SJung-uk Kim 462*ff879b07SJung-uk Kim /* Variable-length data for the subtable */ 463*ff879b07SJung-uk Kim 464*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] = 465*ff879b07SJung-uk Kim { 466*ff879b07SJung-uk Kim {ACPI_DMT_GAS, 0, "Base Address Register", 0}, 467*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 468*ff879b07SJung-uk Kim }; 469*ff879b07SJung-uk Kim 470*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] = 471*ff879b07SJung-uk Kim { 472*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, 0, "Address Size", 0}, 473*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 474*ff879b07SJung-uk Kim }; 475*ff879b07SJung-uk Kim 476*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = 477*ff879b07SJung-uk Kim { 478*ff879b07SJung-uk Kim {ACPI_DMT_STRING, 0, "Namepath", 0}, 479*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 480*ff879b07SJung-uk Kim }; 481*ff879b07SJung-uk Kim 482*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = 483*ff879b07SJung-uk Kim { 484*ff879b07SJung-uk Kim {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", DT_OPTIONAL}, 485*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 486*ff879b07SJung-uk Kim }; 487*ff879b07SJung-uk Kim 488*ff879b07SJung-uk Kim 489*ff879b07SJung-uk Kim /******************************************************************************* 490*ff879b07SJung-uk Kim * 491*ff879b07SJung-uk Kim * DBGP - Debug Port 492*ff879b07SJung-uk Kim * 493*ff879b07SJung-uk Kim ******************************************************************************/ 494*ff879b07SJung-uk Kim 495*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 496*ff879b07SJung-uk Kim { 497*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 498*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 499*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 500*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 501*ff879b07SJung-uk Kim }; 502*ff879b07SJung-uk Kim 503*ff879b07SJung-uk Kim 504*ff879b07SJung-uk Kim /******************************************************************************* 505*ff879b07SJung-uk Kim * 506*ff879b07SJung-uk Kim * DMAR - DMA Remapping table 507*ff879b07SJung-uk Kim * 508*ff879b07SJung-uk Kim ******************************************************************************/ 509*ff879b07SJung-uk Kim 510*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 511*ff879b07SJung-uk Kim { 512*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 513*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 514*ff879b07SJung-uk Kim {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0}, 515*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 516*ff879b07SJung-uk Kim }; 517*ff879b07SJung-uk Kim 518*ff879b07SJung-uk Kim /* Common Subtable header (one per Subtable) */ 519*ff879b07SJung-uk Kim 520*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 521*ff879b07SJung-uk Kim { 522*ff879b07SJung-uk Kim {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 523*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 524*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 525*ff879b07SJung-uk Kim }; 526*ff879b07SJung-uk Kim 527*ff879b07SJung-uk Kim /* Common device scope entry */ 528*ff879b07SJung-uk Kim 529*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 530*ff879b07SJung-uk Kim { 531*ff879b07SJung-uk Kim {ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0}, 532*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 533*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 534*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 535*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 536*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 537*ff879b07SJung-uk Kim }; 538*ff879b07SJung-uk Kim 539*ff879b07SJung-uk Kim /* DMAR Subtables */ 540*ff879b07SJung-uk Kim 541*ff879b07SJung-uk Kim /* 0: Hardware Unit Definition */ 542*ff879b07SJung-uk Kim 543*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 544*ff879b07SJung-uk Kim { 545*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 546*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 547*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 548*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 549*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 550*ff879b07SJung-uk Kim }; 551*ff879b07SJung-uk Kim 552*ff879b07SJung-uk Kim /* 1: Reserved Memory Definition */ 553*ff879b07SJung-uk Kim 554*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 555*ff879b07SJung-uk Kim { 556*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 557*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 558*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 559*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 560*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 561*ff879b07SJung-uk Kim }; 562*ff879b07SJung-uk Kim 563*ff879b07SJung-uk Kim /* 2: Root Port ATS Capability Definition */ 564*ff879b07SJung-uk Kim 565*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 566*ff879b07SJung-uk Kim { 567*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 568*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 569*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 570*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 571*ff879b07SJung-uk Kim }; 572*ff879b07SJung-uk Kim 573*ff879b07SJung-uk Kim /* 3: Remapping Hardware Static Affinity Structure */ 574*ff879b07SJung-uk Kim 575*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 576*ff879b07SJung-uk Kim { 577*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 578*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 579*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 580*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 581*ff879b07SJung-uk Kim }; 582*ff879b07SJung-uk Kim 583*ff879b07SJung-uk Kim /* 4: ACPI Namespace Device Declaration Structure */ 584*ff879b07SJung-uk Kim 585*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] = 586*ff879b07SJung-uk Kim { 587*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0}, 588*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0}, 589*ff879b07SJung-uk Kim {ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0}, 590*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 591*ff879b07SJung-uk Kim }; 592*ff879b07SJung-uk Kim 593*ff879b07SJung-uk Kim 594*ff879b07SJung-uk Kim /******************************************************************************* 595*ff879b07SJung-uk Kim * 596*ff879b07SJung-uk Kim * DRTM - Dynamic Root of Trust for Measurement table 597*ff879b07SJung-uk Kim * 598*ff879b07SJung-uk Kim ******************************************************************************/ 599*ff879b07SJung-uk Kim 600*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = 601*ff879b07SJung-uk Kim { 602*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryBaseAddress), "Entry Base Address", 0}, 603*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryLength), "Entry Length", 0}, 604*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (EntryAddress32), "Entry 32", 0}, 605*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryAddress64), "Entry 64", 0}, 606*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ExitAddress), "Exit Address", 0}, 607*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (LogAreaAddress), "Log Area Start", 0}, 608*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (LogAreaLength), "Log Area Length", 0}, 609*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ArchDependentAddress), "Arch Dependent Address", 0}, 610*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (Flags), "Flags (decoded below)", 0}, 611*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Namespace in TCB", 0}, 612*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on S3 Resume", 0}, 613*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on DLME_Exit", 0}, 614*ff879b07SJung-uk Kim {ACPI_DMT_FLAG3, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "PCR_Authorities Changed", 0}, 615*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 616*ff879b07SJung-uk Kim }; 617*ff879b07SJung-uk Kim 618*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[] = 619*ff879b07SJung-uk Kim { 620*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM0_OFFSET (ValidatedTableCount), "Validated Table Count", DT_COUNT}, 621*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 622*ff879b07SJung-uk Kim }; 623*ff879b07SJung-uk Kim 624*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[] = 625*ff879b07SJung-uk Kim { 626*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, 0, "Table Address", DT_OPTIONAL}, 627*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 628*ff879b07SJung-uk Kim }; 629*ff879b07SJung-uk Kim 630*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[] = 631*ff879b07SJung-uk Kim { 632*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM1_OFFSET (ResourceCount), "Resource Count", DT_COUNT}, 633*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 634*ff879b07SJung-uk Kim }; 635*ff879b07SJung-uk Kim 636*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[] = 637*ff879b07SJung-uk Kim { 638*ff879b07SJung-uk Kim {ACPI_DMT_UINT56, ACPI_DRTM1a_OFFSET (Size[0]), "Size", DT_OPTIONAL}, 639*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DRTM1a_OFFSET (Type), "Type", 0}, 640*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Resource Type", 0}, 641*ff879b07SJung-uk Kim {ACPI_DMT_FLAG7, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Protections", 0}, 642*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DRTM1a_OFFSET (Address), "Address", 0}, 643*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 644*ff879b07SJung-uk Kim }; 645*ff879b07SJung-uk Kim 646*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[] = 647*ff879b07SJung-uk Kim { 648*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_DRTM2_OFFSET (DpsIdLength), "DLME Platform Id Length", DT_COUNT}, 649*ff879b07SJung-uk Kim {ACPI_DMT_BUF16, ACPI_DRTM2_OFFSET (DpsId), "DLME Platform Id", DT_COUNT}, 650*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 651*ff879b07SJung-uk Kim }; 652*ff879b07SJung-uk Kim 653*ff879b07SJung-uk Kim 654*ff879b07SJung-uk Kim /******************************************************************************* 655*ff879b07SJung-uk Kim * 656*ff879b07SJung-uk Kim * ECDT - Embedded Controller Boot Resources Table 657*ff879b07SJung-uk Kim * 658*ff879b07SJung-uk Kim ******************************************************************************/ 659*ff879b07SJung-uk Kim 660*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 661*ff879b07SJung-uk Kim { 662*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 663*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 664*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 665*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 666*ff879b07SJung-uk Kim {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 667*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 668*ff879b07SJung-uk Kim }; 669*ff879b07SJung-uk Kim 670*ff879b07SJung-uk Kim 671*ff879b07SJung-uk Kim /******************************************************************************* 672*ff879b07SJung-uk Kim * 673*ff879b07SJung-uk Kim * EINJ - Error Injection table 674*ff879b07SJung-uk Kim * 675*ff879b07SJung-uk Kim ******************************************************************************/ 676*ff879b07SJung-uk Kim 677*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 678*ff879b07SJung-uk Kim { 679*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 680*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 681*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 682*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 683*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 684*ff879b07SJung-uk Kim }; 685*ff879b07SJung-uk Kim 686*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 687*ff879b07SJung-uk Kim { 688*ff879b07SJung-uk Kim {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 689*ff879b07SJung-uk Kim {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 690*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 691*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 692*ff879b07SJung-uk Kim 693*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 694*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 695*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 696*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 697*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 698*ff879b07SJung-uk Kim }; 699*ff879b07SJung-uk Kim 700*ff879b07SJung-uk Kim 701*ff879b07SJung-uk Kim /******************************************************************************* 702*ff879b07SJung-uk Kim * 703*ff879b07SJung-uk Kim * ERST - Error Record Serialization table 704*ff879b07SJung-uk Kim * 705*ff879b07SJung-uk Kim ******************************************************************************/ 706*ff879b07SJung-uk Kim 707*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 708*ff879b07SJung-uk Kim { 709*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 710*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 711*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 712*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 713*ff879b07SJung-uk Kim }; 714*ff879b07SJung-uk Kim 715*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 716*ff879b07SJung-uk Kim { 717*ff879b07SJung-uk Kim {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 718*ff879b07SJung-uk Kim {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 719*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 720*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 721*ff879b07SJung-uk Kim 722*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 723*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 724*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 725*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 726*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 727*ff879b07SJung-uk Kim }; 728*ff879b07SJung-uk Kim 729*ff879b07SJung-uk Kim 730*ff879b07SJung-uk Kim /******************************************************************************* 731*ff879b07SJung-uk Kim * 732*ff879b07SJung-uk Kim * FPDT - Firmware Performance Data Table (ACPI 5.0) 733*ff879b07SJung-uk Kim * 734*ff879b07SJung-uk Kim ******************************************************************************/ 735*ff879b07SJung-uk Kim 736*ff879b07SJung-uk Kim /* Main table consists of only the standard ACPI header - subtables follow */ 737*ff879b07SJung-uk Kim 738*ff879b07SJung-uk Kim /* FPDT subtable header */ 739*ff879b07SJung-uk Kim 740*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] = 741*ff879b07SJung-uk Kim { 742*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0}, 743*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH}, 744*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0}, 745*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 746*ff879b07SJung-uk Kim }; 747*ff879b07SJung-uk Kim 748*ff879b07SJung-uk Kim /* 0: Firmware Basic Boot Performance Record */ 749*ff879b07SJung-uk Kim 750*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] = 751*ff879b07SJung-uk Kim { 752*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0}, 753*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "FPDT Boot Record Address", 0}, 754*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 755*ff879b07SJung-uk Kim }; 756*ff879b07SJung-uk Kim 757*ff879b07SJung-uk Kim /* 1: S3 Performance Table Pointer Record */ 758*ff879b07SJung-uk Kim 759*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] = 760*ff879b07SJung-uk Kim { 761*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0}, 762*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Record Address", 0}, 763*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 764*ff879b07SJung-uk Kim }; 765*ff879b07SJung-uk Kim 766*ff879b07SJung-uk Kim #if 0 767*ff879b07SJung-uk Kim /* Boot Performance Record, not supported at this time. */ 768*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0}, 769*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0}, 770*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0}, 771*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0}, 772*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0}, 773*ff879b07SJung-uk Kim #endif 774*ff879b07SJung-uk Kim 775*ff879b07SJung-uk Kim 776*ff879b07SJung-uk Kim /******************************************************************************* 777*ff879b07SJung-uk Kim * 778*ff879b07SJung-uk Kim * GTDT - Generic Timer Description Table 779*ff879b07SJung-uk Kim * 780*ff879b07SJung-uk Kim ******************************************************************************/ 781*ff879b07SJung-uk Kim 782*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] = 783*ff879b07SJung-uk Kim { 784*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterBlockAddresss), "Counter Block Address", 0}, 785*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Reserved), "Reserved", 0}, 786*ff879b07SJung-uk Kim ACPI_DMT_NEW_LINE, 787*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Interrupt), "Secure EL1 Interrupt", 0}, 788*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Flags), "EL1 Flags (decoded below)", DT_FLAG}, 789*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Trigger Mode", 0}, 790*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Polarity", 0}, 791*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Always On", 0}, 792*ff879b07SJung-uk Kim ACPI_DMT_NEW_LINE, 793*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Interrupt), "Non-Secure EL1 Interrupt", 0}, 794*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Flags), "NEL1 Flags (decoded below)", DT_FLAG}, 795*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Trigger Mode", 0}, 796*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Polarity", 0}, 797*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Always On", 0}, 798*ff879b07SJung-uk Kim ACPI_DMT_NEW_LINE, 799*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 800*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG}, 801*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0}, 802*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0}, 803*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Always On", 0}, 804*ff879b07SJung-uk Kim ACPI_DMT_NEW_LINE, 805*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Interrupt), "Non-Secure EL2 Interrupt", 0}, 806*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Flags), "NEL2 Flags (decoded below)", DT_FLAG}, 807*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Trigger Mode", 0}, 808*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Polarity", 0}, 809*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Always On", 0}, 810*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterReadBlockAddress), "Counter Read Block Address", 0}, 811*ff879b07SJung-uk Kim ACPI_DMT_NEW_LINE, 812*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerCount), "Platform Timer Count", 0}, 813*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerOffset), "Platform Timer Offset", 0}, 814*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 815*ff879b07SJung-uk Kim }; 816*ff879b07SJung-uk Kim 817*ff879b07SJung-uk Kim /* GTDT Subtable header (one per Subtable) */ 818*ff879b07SJung-uk Kim 819*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtHdr[] = 820*ff879b07SJung-uk Kim { 821*ff879b07SJung-uk Kim {ACPI_DMT_GTDT, ACPI_GTDTH_OFFSET (Type), "Subtable Type", 0}, 822*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_GTDTH_OFFSET (Length), "Length", DT_LENGTH}, 823*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 824*ff879b07SJung-uk Kim }; 825*ff879b07SJung-uk Kim 826*ff879b07SJung-uk Kim /* GTDT Subtables */ 827*ff879b07SJung-uk Kim 828*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0[] = 829*ff879b07SJung-uk Kim { 830*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_GTDT0_OFFSET (Reserved), "Reserved", 0}, 831*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT0_OFFSET (BlockAddress), "Block Address", 0}, 832*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerCount), "Timer Count", 0}, 833*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerOffset), "Timer Offset", 0}, 834*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 835*ff879b07SJung-uk Kim }; 836*ff879b07SJung-uk Kim 837*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0a[] = 838*ff879b07SJung-uk Kim { 839*ff879b07SJung-uk Kim {ACPI_DMT_UINT8 , ACPI_GTDT0a_OFFSET (FrameNumber), "Frame Number", 0}, 840*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_GTDT0a_OFFSET (Reserved[0]), "Reserved", 0}, 841*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (BaseAddress), "Base Address", 0}, 842*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (El0BaseAddress), "EL0 Base Address", 0}, 843*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 844*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerFlags), "Timer Flags (decoded below)", 0}, 845*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 846*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 847*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 848*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerFlags), "Virtual Timer Flags (decoded below)", 0}, 849*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Trigger Mode", 0}, 850*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Polarity", 0}, 851*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (CommonFlags), "Common Flags (decoded below)", 0}, 852*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Secure", 0}, 853*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Always On", 0}, 854*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 855*ff879b07SJung-uk Kim }; 856*ff879b07SJung-uk Kim 857*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt1[] = 858*ff879b07SJung-uk Kim { 859*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_GTDT1_OFFSET (Reserved), "Reserved", 0}, 860*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (RefreshFrameAddress), "Refresh Frame Address", 0}, 861*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (ControlFrameAddress), "Control Frame Address", 0}, 862*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 863*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerFlags), "Timer Flags (decoded below)", DT_FLAG}, 864*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 865*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 866*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Security", 0}, 867*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 868*ff879b07SJung-uk Kim }; 869*ff879b07SJung-uk Kim 870*ff879b07SJung-uk Kim 871*ff879b07SJung-uk Kim /******************************************************************************* 872*ff879b07SJung-uk Kim * 873*ff879b07SJung-uk Kim * HEST - Hardware Error Source table 874*ff879b07SJung-uk Kim * 875*ff879b07SJung-uk Kim ******************************************************************************/ 876*ff879b07SJung-uk Kim 877*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 878*ff879b07SJung-uk Kim { 879*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 880*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 881*ff879b07SJung-uk Kim }; 882*ff879b07SJung-uk Kim 883*ff879b07SJung-uk Kim /* Common HEST structures for subtables */ 884*ff879b07SJung-uk Kim 885*ff879b07SJung-uk Kim #define ACPI_DM_HEST_HEADER \ 886*ff879b07SJung-uk Kim {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 887*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 888*ff879b07SJung-uk Kim 889*ff879b07SJung-uk Kim #define ACPI_DM_HEST_AER \ 890*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 891*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 892*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 893*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Global", 0}, \ 894*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 895*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 896*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 897*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 898*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 899*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 900*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 901*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 902*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 903*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 904*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 905*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 906*ff879b07SJung-uk Kim 907*ff879b07SJung-uk Kim 908*ff879b07SJung-uk Kim /* HEST Subtables */ 909*ff879b07SJung-uk Kim 910*ff879b07SJung-uk Kim /* 0: IA32 Machine Check Exception */ 911*ff879b07SJung-uk Kim 912*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 913*ff879b07SJung-uk Kim { 914*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 915*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 916*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 917*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 918*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_HEST0_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 919*ff879b07SJung-uk Kim 920*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 921*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 922*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 923*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 924*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 925*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 926*ff879b07SJung-uk Kim {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 927*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 928*ff879b07SJung-uk Kim }; 929*ff879b07SJung-uk Kim 930*ff879b07SJung-uk Kim /* 1: IA32 Corrected Machine Check */ 931*ff879b07SJung-uk Kim 932*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 933*ff879b07SJung-uk Kim { 934*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 935*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 936*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 937*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 938*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_HEST1_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 939*ff879b07SJung-uk Kim 940*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 941*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 942*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 943*ff879b07SJung-uk Kim {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 944*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 945*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 946*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 947*ff879b07SJung-uk Kim }; 948*ff879b07SJung-uk Kim 949*ff879b07SJung-uk Kim /* 2: IA32 Non-Maskable Interrupt */ 950*ff879b07SJung-uk Kim 951*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 952*ff879b07SJung-uk Kim { 953*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 954*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 955*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 956*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 957*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 958*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 959*ff879b07SJung-uk Kim }; 960*ff879b07SJung-uk Kim 961*ff879b07SJung-uk Kim /* 6: PCI Express Root Port AER */ 962*ff879b07SJung-uk Kim 963*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 964*ff879b07SJung-uk Kim { 965*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 966*ff879b07SJung-uk Kim ACPI_DM_HEST_AER, 967*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 968*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 969*ff879b07SJung-uk Kim }; 970*ff879b07SJung-uk Kim 971*ff879b07SJung-uk Kim /* 7: PCI Express AER (AER Endpoint) */ 972*ff879b07SJung-uk Kim 973*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 974*ff879b07SJung-uk Kim { 975*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 976*ff879b07SJung-uk Kim ACPI_DM_HEST_AER, 977*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 978*ff879b07SJung-uk Kim }; 979*ff879b07SJung-uk Kim 980*ff879b07SJung-uk Kim /* 8: PCI Express/PCI-X Bridge AER */ 981*ff879b07SJung-uk Kim 982*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 983*ff879b07SJung-uk Kim { 984*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 985*ff879b07SJung-uk Kim ACPI_DM_HEST_AER, 986*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 987*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 988*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 989*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 990*ff879b07SJung-uk Kim }; 991*ff879b07SJung-uk Kim 992*ff879b07SJung-uk Kim /* 9: Generic Hardware Error Source */ 993*ff879b07SJung-uk Kim 994*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 995*ff879b07SJung-uk Kim { 996*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 997*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 998*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 999*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 1000*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1001*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1002*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1003*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1004*ff879b07SJung-uk Kim {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 1005*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1006*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1007*ff879b07SJung-uk Kim }; 1008*ff879b07SJung-uk Kim 1009*ff879b07SJung-uk Kim /* 10: Generic Hardware Error Source - Version 2 */ 1010*ff879b07SJung-uk Kim 1011*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest10[] = 1012*ff879b07SJung-uk Kim { 1013*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 1014*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST10_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1015*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Reserved), "Reserved", 0}, 1016*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Enabled), "Enabled", 0}, 1017*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1018*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1019*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1020*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1021*ff879b07SJung-uk Kim {ACPI_DMT_HESTNTFY, ACPI_HEST10_OFFSET (Notify), "Notify", 0}, 1022*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1023*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ReadAckRegister), "Read Ack Register", 0}, 1024*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckPreserve), "Read Ack Preserve", 0}, 1025*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckWrite), "Read Ack Write", 0}, 1026*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1027*ff879b07SJung-uk Kim }; 1028*ff879b07SJung-uk Kim 1029*ff879b07SJung-uk Kim /* 11: IA32 Deferred Machine Check */ 1030*ff879b07SJung-uk Kim 1031*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHest11[] = 1032*ff879b07SJung-uk Kim { 1033*ff879b07SJung-uk Kim ACPI_DM_HEST_HEADER, 1034*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HEST11_OFFSET (Reserved1), "Reserved1", 0}, 1035*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1036*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HEST11_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1037*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_HEST11_FLAG_OFFSET (Flags,0), "GHES Assist", 0}, 1038*ff879b07SJung-uk Kim 1039*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (Enabled), "Enabled", 0}, 1040*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1041*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HEST11_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1042*ff879b07SJung-uk Kim {ACPI_DMT_HESTNTFY, ACPI_HEST11_OFFSET (Notify), "Notify", 0}, 1043*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HEST11_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1044*ff879b07SJung-uk Kim {ACPI_DMT_UINT24, ACPI_HEST11_OFFSET (Reserved2[0]), "Reserved2", 0}, 1045*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1046*ff879b07SJung-uk Kim }; 1047*ff879b07SJung-uk Kim 1048*ff879b07SJung-uk Kim /* Notification Structure */ 1049*ff879b07SJung-uk Kim 1050*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 1051*ff879b07SJung-uk Kim { 1052*ff879b07SJung-uk Kim {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 1053*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 1054*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 1055*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 1056*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 1057*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 1058*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 1059*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 1060*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 1061*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1062*ff879b07SJung-uk Kim }; 1063*ff879b07SJung-uk Kim 1064*ff879b07SJung-uk Kim 1065*ff879b07SJung-uk Kim /* 1066*ff879b07SJung-uk Kim * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1067*ff879b07SJung-uk Kim * ACPI_HEST_IA_CORRECTED structures. 1068*ff879b07SJung-uk Kim */ 1069*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 1070*ff879b07SJung-uk Kim { 1071*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 1072*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 1073*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 1074*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 1075*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 1076*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 1077*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 1078*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 1079*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 1080*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1081*ff879b07SJung-uk Kim }; 1082*ff879b07SJung-uk Kim 1083*ff879b07SJung-uk Kim 1084*ff879b07SJung-uk Kim /******************************************************************************* 1085*ff879b07SJung-uk Kim * 1086*ff879b07SJung-uk Kim * HMAT - Heterogeneous Memory Attributes Table 1087*ff879b07SJung-uk Kim * 1088*ff879b07SJung-uk Kim ******************************************************************************/ 1089*ff879b07SJung-uk Kim 1090*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat[] = 1091*ff879b07SJung-uk Kim { 1092*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT_OFFSET (Reserved), "Reserved", 0}, 1093*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1094*ff879b07SJung-uk Kim }; 1095*ff879b07SJung-uk Kim 1096*ff879b07SJung-uk Kim /* Common HMAT structure header (one per Subtable) */ 1097*ff879b07SJung-uk Kim 1098*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmatHdr[] = 1099*ff879b07SJung-uk Kim { 1100*ff879b07SJung-uk Kim {ACPI_DMT_HMAT, ACPI_HMATH_OFFSET (Type), "Structure Type", 0}, 1101*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMATH_OFFSET (Reserved), "Reserved", 0}, 1102*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMATH_OFFSET (Length), "Length", 0}, 1103*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1104*ff879b07SJung-uk Kim }; 1105*ff879b07SJung-uk Kim 1106*ff879b07SJung-uk Kim /* HMAT subtables */ 1107*ff879b07SJung-uk Kim 1108*ff879b07SJung-uk Kim /* 0x00: Memory Subsystem Address Range */ 1109*ff879b07SJung-uk Kim 1110*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat0[] = 1111*ff879b07SJung-uk Kim { 1112*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Flags), "Flags (decoded below)", 0}, 1113*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Processor Proximity Domain Valid", 0}, 1114*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Memory Proximity Domain Valid", 0}, 1115*ff879b07SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_HMAT0_FLAG_OFFSET (Flags,0), "Reservation Hint", 0}, 1116*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMAT0_OFFSET (Reserved1), "Reserved1", 0}, 1117*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (ProcessorPD), "Processor Proximity Domain", 0}, 1118*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (MemoryPD), "Memory Proximity Domain", 0}, 1119*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT0_OFFSET (Reserved2), "Reserved2", 0}, 1120*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (PhysicalAddressBase), "Physical Address Range Base", 0}, 1121*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HMAT0_OFFSET (PhysicalAddressLength), "Physical Address Range Size", 0}, 1122*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1123*ff879b07SJung-uk Kim }; 1124*ff879b07SJung-uk Kim 1125*ff879b07SJung-uk Kim /* 0x01: System Locality Latency and Bandwidth Information */ 1126*ff879b07SJung-uk Kim 1127*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1[] = 1128*ff879b07SJung-uk Kim { 1129*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (Flags), "Flags (decoded below)", 0}, 1130*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS4_0, ACPI_HMAT1_FLAG_OFFSET (Flags,0), "Memory Hierarchy", 0}, 1131*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HMAT1_OFFSET (DataType), "Data Type", 0}, 1132*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMAT1_OFFSET (Reserved1), "Reserved1", 0}, 1133*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfInitiatorPDs), "Initiator Proximity Domains #", 0}, 1134*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (NumberOfTargetPDs), "Target Proximity Domains #", 0}, 1135*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT1_OFFSET (Reserved2), "Reserved2", 0}, 1136*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HMAT1_OFFSET (EntryBaseUnit), "Entry Base Unit", 0}, 1137*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1138*ff879b07SJung-uk Kim }; 1139*ff879b07SJung-uk Kim 1140*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1a[] = 1141*ff879b07SJung-uk Kim { 1142*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, 0, "Initiator Proximity Domain List", DT_OPTIONAL}, 1143*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1144*ff879b07SJung-uk Kim }; 1145*ff879b07SJung-uk Kim 1146*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1b[] = 1147*ff879b07SJung-uk Kim { 1148*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, 0, "Target Proximity Domain List", DT_OPTIONAL}, 1149*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1150*ff879b07SJung-uk Kim }; 1151*ff879b07SJung-uk Kim 1152*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat1c[] = 1153*ff879b07SJung-uk Kim { 1154*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, 0, "Entry", DT_OPTIONAL}, 1155*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1156*ff879b07SJung-uk Kim }; 1157*ff879b07SJung-uk Kim 1158*ff879b07SJung-uk Kim /* 0x02: Memory Side Cache Information */ 1159*ff879b07SJung-uk Kim 1160*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2[] = 1161*ff879b07SJung-uk Kim { 1162*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (MemoryPD), "Memory Proximity Domain", 0}, 1163*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (Reserved1), "Reserved1", 0}, 1164*ff879b07SJung-uk Kim {ACPI_DMT_UINT64, ACPI_HMAT2_OFFSET (CacheSize), "Memory Side Cache Size", 0}, 1165*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HMAT2_OFFSET (CacheAttributes), "Cache Attributes (decoded below)", 0}, 1166*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS4_0, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Total Cache Levels", 0}, 1167*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS4_4, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Level", 0}, 1168*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS4_8, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Associativity", 0}, 1169*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS4_12, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Write Policy", 0}, 1170*ff879b07SJung-uk Kim {ACPI_DMT_FLAGS16_16, ACPI_HMAT2_FLAG_OFFSET (CacheAttributes,0), "Cache Line Size", 0}, 1171*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (Reserved2), "Reserved2", 0}, 1172*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HMAT2_OFFSET (NumberOfSMBIOSHandles), "SMBIOS Handle #", 0}, 1173*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1174*ff879b07SJung-uk Kim }; 1175*ff879b07SJung-uk Kim 1176*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHmat2a[] = 1177*ff879b07SJung-uk Kim { 1178*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, 0, "SMBIOS Handle", DT_OPTIONAL}, 1179*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1180*ff879b07SJung-uk Kim }; 1181*ff879b07SJung-uk Kim 1182*ff879b07SJung-uk Kim 1183*ff879b07SJung-uk Kim /******************************************************************************* 1184*ff879b07SJung-uk Kim * 1185*ff879b07SJung-uk Kim * HPET - High Precision Event Timer table 1186*ff879b07SJung-uk Kim * 1187*ff879b07SJung-uk Kim ******************************************************************************/ 1188*ff879b07SJung-uk Kim 1189*ff879b07SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 1190*ff879b07SJung-uk Kim { 1191*ff879b07SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 1192*ff879b07SJung-uk Kim {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 1193*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 1194*ff879b07SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 1195*ff879b07SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1196*ff879b07SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 1197*ff879b07SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 1198*ff879b07SJung-uk Kim ACPI_DMT_TERMINATOR 1199*ff879b07SJung-uk Kim }; 1200*ff879b07SJung-uk Kim /*! [End] no source code translation !*/ 1201