1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2009, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 *****************************************************************************/ 115 116 #include <contrib/dev/acpica/include/acpi.h> 117 #include <contrib/dev/acpica/include/accommon.h> 118 #include <contrib/dev/acpica/include/acdisasm.h> 119 120 /* This module used for application-level code only */ 121 122 #define _COMPONENT ACPI_CA_DISASSEMBLER 123 ACPI_MODULE_NAME ("dmtbinfo") 124 125 /* 126 * Macros used to generate offsets to specific table fields 127 */ 128 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 129 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 130 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 131 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 132 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 133 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) 134 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 135 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 136 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 137 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 138 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 139 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) 140 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) 141 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 142 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 143 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 144 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 145 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 146 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 147 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 148 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 149 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 150 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 151 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 152 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 153 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) 154 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 155 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 156 157 /* Subtables */ 158 159 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 160 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 161 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 162 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 163 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 164 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 165 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 166 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 167 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 168 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 169 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 170 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 171 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 172 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 173 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 174 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 175 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 176 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 177 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) 178 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 179 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 180 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 181 #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 182 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 183 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 184 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 185 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 186 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 187 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 188 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 189 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 190 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 191 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 192 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 193 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 194 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 195 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 196 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 197 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 198 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 199 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 200 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 201 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 202 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 203 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 204 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 205 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 206 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 207 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 208 209 /* 210 * Simplify access to flag fields by breaking them up into bytes 211 */ 212 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 213 214 /* Flags */ 215 216 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 217 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 218 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 219 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 220 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 221 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 222 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 223 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 224 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 225 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 226 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 227 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 228 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 229 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 230 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 231 232 233 /* 234 * ACPI Table Information, used to dump formatted ACPI tables 235 * 236 * Each entry is of the form: <Field Type, Field Offset, Field Name> 237 */ 238 239 /******************************************************************************* 240 * 241 * Common ACPI table header 242 * 243 ******************************************************************************/ 244 245 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 246 { 247 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature"}, 248 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length"}, 249 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision"}, 250 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum"}, 251 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID"}, 252 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID"}, 253 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision"}, 254 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID"}, 255 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision"}, 256 {ACPI_DMT_EXIT, 0, NULL} 257 }; 258 259 260 /******************************************************************************* 261 * 262 * GAS - Generic Address Structure 263 * 264 ******************************************************************************/ 265 266 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 267 { 268 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID"}, 269 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width"}, 270 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset"}, 271 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width"}, 272 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address"}, 273 {ACPI_DMT_EXIT, 0, NULL} 274 }; 275 276 277 /******************************************************************************* 278 * 279 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 280 * 281 ******************************************************************************/ 282 283 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 284 { 285 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature"}, 286 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum"}, 287 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID"}, 288 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision"}, 289 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address"}, 290 {ACPI_DMT_EXIT, 0, NULL} 291 }; 292 293 /* ACPI 2.0+ Extensions */ 294 295 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 296 { 297 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length"}, 298 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address"}, 299 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum"}, 300 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved"}, 301 {ACPI_DMT_EXIT, 0, NULL} 302 }; 303 304 305 /******************************************************************************* 306 * 307 * FACS - Firmware ACPI Control Structure 308 * 309 ******************************************************************************/ 310 311 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 312 { 313 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature"}, 314 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length"}, 315 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature"}, 316 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector"}, 317 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock"}, 318 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)"}, 319 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present"}, 320 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)"}, 321 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector"}, 322 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version"}, 323 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved"}, 324 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)"}, 325 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)"}, 326 {ACPI_DMT_EXIT, 0, NULL} 327 }; 328 329 330 /******************************************************************************* 331 * 332 * FADT - Fixed ACPI Description Table (Signature is FACP) 333 * 334 ******************************************************************************/ 335 336 /* ACPI 1.0 FADT (Version 1) */ 337 338 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 339 { 340 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address"}, 341 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address"}, 342 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model"}, 343 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile"}, 344 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt"}, 345 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port"}, 346 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value"}, 347 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value"}, 348 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command"}, 349 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control"}, 350 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address"}, 351 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address"}, 352 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address"}, 353 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address"}, 354 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address"}, 355 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address"}, 356 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address"}, 357 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address"}, 358 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length"}, 359 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length"}, 360 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length"}, 361 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length"}, 362 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length"}, 363 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length"}, 364 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset"}, 365 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support"}, 366 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency"}, 367 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency"}, 368 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size"}, 369 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride"}, 370 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset"}, 371 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width"}, 372 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index"}, 373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index"}, 374 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index"}, 375 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)"}, 376 377 /* Boot Architecture Flags byte 0 */ 378 379 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)"}, 380 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)"}, 381 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)"}, 382 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)"}, 383 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)"}, 384 385 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved"}, 386 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)"}, 387 388 /* Flags byte 0 */ 389 390 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)"}, 391 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)"}, 392 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)"}, 393 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)"}, 394 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)"}, 395 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)"}, 396 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)"}, 397 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)"}, 398 399 /* Flags byte 1 */ 400 401 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)"}, 402 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)"}, 403 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)"}, 404 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)"}, 405 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)"}, 406 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)"}, 407 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)"}, 408 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)"}, 409 410 /* Flags byte 2 */ 411 412 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)"}, 413 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)"}, 414 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)"}, 415 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)"}, 416 {ACPI_DMT_EXIT, 0, NULL} 417 }; 418 419 /* ACPI 1.0 MS Extensions (FADT version 2) */ 420 421 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 422 { 423 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 424 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 425 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 426 {ACPI_DMT_EXIT, 0, NULL} 427 }; 428 429 /* ACPI 2.0+ Extensions (FADT version 3+) */ 430 431 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 432 { 433 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 434 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 435 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 436 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address"}, 437 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address"}, 438 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block"}, 439 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block"}, 440 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block"}, 441 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block"}, 442 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block"}, 443 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block"}, 444 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block"}, 445 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block"}, 446 {ACPI_DMT_EXIT, 0, NULL} 447 }; 448 449 450 /* 451 * Remaining tables are not consumed directly by the ACPICA subsystem 452 */ 453 454 /******************************************************************************* 455 * 456 * ASF - Alert Standard Format table (Signature "ASF!") 457 * 458 ******************************************************************************/ 459 460 /* Common Subtable header (one per Subtable) */ 461 462 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 463 { 464 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type"}, 465 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved"}, 466 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length"}, 467 {ACPI_DMT_EXIT, 0, NULL} 468 }; 469 470 /* 0: ASF Information */ 471 472 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 473 { 474 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value"}, 475 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval"}, 476 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID"}, 477 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID"}, 478 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags"}, 479 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved"}, 480 {ACPI_DMT_EXIT, 0, NULL} 481 }; 482 483 /* 1: ASF Alerts */ 484 485 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 486 { 487 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask"}, 488 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask"}, 489 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count"}, 490 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length"}, 491 {ACPI_DMT_EXIT, 0, NULL} 492 }; 493 494 /* 1a: ASF Alert data */ 495 496 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 497 { 498 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address"}, 499 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command"}, 500 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask"}, 501 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value"}, 502 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType"}, 503 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type"}, 504 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset"}, 505 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType"}, 506 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity"}, 507 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber"}, 508 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity"}, 509 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance"}, 510 {ACPI_DMT_EXIT, 0, NULL} 511 }; 512 513 /* 2: ASF Remote Control */ 514 515 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 516 { 517 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count"}, 518 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length"}, 519 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved"}, 520 {ACPI_DMT_EXIT, 0, NULL} 521 }; 522 523 /* 2a: ASF Control data */ 524 525 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 526 { 527 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function"}, 528 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address"}, 529 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command"}, 530 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value"}, 531 {ACPI_DMT_EXIT, 0, NULL} 532 }; 533 534 /* 3: ASF RMCP Boot Options */ 535 536 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 537 { 538 {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilites"}, 539 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code"}, 540 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID"}, 541 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command"}, 542 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter"}, 543 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options"}, 544 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters"}, 545 {ACPI_DMT_EXIT, 0, NULL} 546 }; 547 548 /* 4: ASF Address */ 549 550 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 551 { 552 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address"}, 553 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count"}, 554 {ACPI_DMT_EXIT, 0, NULL} 555 }; 556 557 558 /******************************************************************************* 559 * 560 * BERT - Boot Error Record table 561 * 562 ******************************************************************************/ 563 564 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 565 { 566 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length"}, 567 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address"}, 568 {ACPI_DMT_EXIT, 0, NULL} 569 }; 570 571 572 /******************************************************************************* 573 * 574 * BOOT - Simple Boot Flag Table 575 * 576 ******************************************************************************/ 577 578 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 579 { 580 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index"}, 581 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved"}, 582 {ACPI_DMT_EXIT, 0, NULL} 583 }; 584 585 586 /******************************************************************************* 587 * 588 * CPEP - Corrected Platform Error Polling table 589 * 590 ******************************************************************************/ 591 592 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 593 { 594 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved"}, 595 {ACPI_DMT_EXIT, 0, NULL} 596 }; 597 598 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 599 { 600 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type"}, 601 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length"}, 602 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID"}, 603 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID"}, 604 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval"}, 605 {ACPI_DMT_EXIT, 0, NULL} 606 }; 607 608 609 /******************************************************************************* 610 * 611 * DBGP - Debug Port 612 * 613 ******************************************************************************/ 614 615 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 616 { 617 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type"}, 618 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved"}, 619 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register"}, 620 {ACPI_DMT_EXIT, 0, NULL} 621 }; 622 623 624 /******************************************************************************* 625 * 626 * DMAR - DMA Remapping table 627 * 628 ******************************************************************************/ 629 630 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 631 { 632 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width"}, 633 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags"}, 634 {ACPI_DMT_EXIT, 0, NULL} 635 }; 636 637 /* Common Subtable header (one per Subtable) */ 638 639 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 640 { 641 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type"}, 642 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length"}, 643 {ACPI_DMT_EXIT, 0, NULL} 644 }; 645 646 /* Common device scope entry */ 647 648 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 649 { 650 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type"}, 651 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length"}, 652 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved"}, 653 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID"}, 654 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number"}, 655 {ACPI_DMT_EXIT, 0, NULL} 656 }; 657 658 /* DMAR Subtables */ 659 660 /* 0: Hardware Unit Definition */ 661 662 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 663 { 664 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags"}, 665 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved"}, 666 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number"}, 667 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address"}, 668 {ACPI_DMT_EXIT, 0, NULL} 669 }; 670 671 /* 1: Reserved Memory Definition */ 672 673 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 674 { 675 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved"}, 676 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number"}, 677 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address"}, 678 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)"}, 679 {ACPI_DMT_EXIT, 0, NULL} 680 }; 681 682 /* 2: Root Port ATS Capability Definition */ 683 684 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 685 { 686 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags"}, 687 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved"}, 688 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number"}, 689 {ACPI_DMT_EXIT, 0, NULL} 690 }; 691 692 /* 3: Remapping Hardware Static Affinity Structure */ 693 694 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 695 { 696 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved"}, 697 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address"}, 698 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain"}, 699 {ACPI_DMT_EXIT, 0, NULL} 700 }; 701 702 703 /******************************************************************************* 704 * 705 * ECDT - Embedded Controller Boot Resources Table 706 * 707 ******************************************************************************/ 708 709 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 710 { 711 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register"}, 712 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register"}, 713 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID"}, 714 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number"}, 715 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath"}, 716 {ACPI_DMT_EXIT, 0, NULL} 717 }; 718 719 720 /******************************************************************************* 721 * 722 * EINJ - Error Injection table 723 * 724 ******************************************************************************/ 725 726 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 727 { 728 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length"}, 729 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags"}, 730 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved"}, 731 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count"}, 732 {ACPI_DMT_EXIT, 0, NULL} 733 }; 734 735 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 736 { 737 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Action), "Action"}, 738 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Instruction), "Instruction"}, 739 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags"}, 740 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved"}, 741 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region"}, 742 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value"}, 743 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask"}, 744 {ACPI_DMT_EXIT, 0, NULL} 745 }; 746 747 748 /******************************************************************************* 749 * 750 * ERST - Error Record Serialization table 751 * 752 ******************************************************************************/ 753 754 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 755 { 756 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length"}, 757 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved"}, 758 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count"}, 759 {ACPI_DMT_EXIT, 0, NULL} 760 }; 761 762 763 /******************************************************************************* 764 * 765 * HEST - Hardware Error Source table 766 * 767 ******************************************************************************/ 768 769 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 770 { 771 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count"}, 772 {ACPI_DMT_EXIT, 0, NULL} 773 }; 774 775 /* Common HEST structures for subtables */ 776 777 #define ACPI_DM_HEST_HEADER \ 778 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type"}, \ 779 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id"} 780 781 #define ACPI_DM_HEST_AER \ 782 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved"}, \ 783 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags"}, \ 784 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled"}, \ 785 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate"}, \ 786 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record"}, \ 787 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus"}, \ 788 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device"}, \ 789 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function"}, \ 790 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl"}, \ 791 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved"}, \ 792 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask"}, \ 793 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity"}, \ 794 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask"}, \ 795 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities"} 796 797 798 /* HEST Subtables */ 799 800 /* 0: IA32 Machine Check Exception */ 801 802 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 803 { 804 ACPI_DM_HEST_HEADER, 805 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved"}, 806 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags"}, 807 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled"}, 808 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 809 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 810 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data"}, 811 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data"}, 812 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks"}, 813 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved"}, 814 {ACPI_DMT_EXIT, 0, NULL} 815 }; 816 817 /* 1: IA32 Corrected Machine Check */ 818 819 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 820 { 821 ACPI_DM_HEST_HEADER, 822 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved"}, 823 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags"}, 824 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled"}, 825 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 826 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 827 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify"}, 828 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks"}, 829 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved"}, 830 {ACPI_DMT_EXIT, 0, NULL} 831 }; 832 833 /* 2: IA32 Non-Maskable Interrupt */ 834 835 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 836 { 837 ACPI_DM_HEST_HEADER, 838 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved"}, 839 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 840 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 841 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length"}, 842 {ACPI_DMT_EXIT, 0, NULL} 843 }; 844 845 846 /* 6: PCI Express Root Port AER */ 847 848 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 849 { 850 ACPI_DM_HEST_HEADER, 851 ACPI_DM_HEST_AER, 852 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command"}, 853 {ACPI_DMT_EXIT, 0, NULL} 854 }; 855 856 /* 7: PCI Express AER (AER Endpoint) */ 857 858 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 859 { 860 ACPI_DM_HEST_HEADER, 861 ACPI_DM_HEST_AER, 862 {ACPI_DMT_EXIT, 0, NULL} 863 }; 864 865 /* 8: PCI Express/PCI-X Bridge AER */ 866 867 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 868 { 869 ACPI_DM_HEST_HEADER, 870 ACPI_DM_HEST_AER, 871 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask"}, 872 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity"}, 873 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities"}, 874 {ACPI_DMT_EXIT, 0, NULL} 875 }; 876 877 /* 9: Generic Hardware Error Source */ 878 879 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 880 { 881 ACPI_DM_HEST_HEADER, 882 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id"}, 883 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved"}, 884 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled"}, 885 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 886 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 887 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length"}, 888 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address"}, 889 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify"}, 890 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length"}, 891 {ACPI_DMT_EXIT, 0, NULL} 892 }; 893 894 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 895 { 896 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type"}, 897 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length"}, 898 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable"}, 899 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval"}, 900 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector"}, 901 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value"}, 902 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window"}, 903 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value"}, 904 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window"}, 905 {ACPI_DMT_EXIT, 0, NULL} 906 }; 907 908 909 /* 910 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 911 * ACPI_HEST_IA_CORRECTED structures. 912 */ 913 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 914 { 915 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number"}, 916 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init"}, 917 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format"}, 918 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved"}, 919 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register"}, 920 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data"}, 921 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register"}, 922 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register"}, 923 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register"}, 924 {ACPI_DMT_EXIT, 0, NULL} 925 }; 926 927 928 /******************************************************************************* 929 * 930 * HPET - High Precision Event Timer table 931 * 932 ******************************************************************************/ 933 934 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 935 { 936 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID"}, 937 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register"}, 938 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number"}, 939 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks"}, 940 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)"}, 941 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect"}, 942 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect"}, 943 {ACPI_DMT_EXIT, 0, NULL} 944 }; 945 946 947 /******************************************************************************* 948 * 949 * IVRS - I/O Virtualization Reporting Structure 950 * 951 ******************************************************************************/ 952 953 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 954 { 955 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info"}, 956 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved"}, 957 {ACPI_DMT_EXIT, 0, NULL} 958 }; 959 960 /* Common Subtable header (one per Subtable) */ 961 962 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 963 { 964 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type"}, 965 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags"}, 966 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length"}, 967 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId"}, 968 {ACPI_DMT_EXIT, 0, NULL} 969 }; 970 971 /* IVRS subtables */ 972 973 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 974 975 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 976 { 977 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset"}, 978 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address"}, 979 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group"}, 980 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info"}, 981 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved"}, 982 {ACPI_DMT_EXIT, 0, NULL} 983 }; 984 985 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 986 987 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 988 { 989 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data"}, 990 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved"}, 991 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address"}, 992 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length"}, 993 {ACPI_DMT_EXIT, 0, NULL} 994 }; 995 996 /* Device entry header for IVHD block */ 997 998 #define ACPI_DMT_IVRS_DE_HEADER \ 999 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type"}, \ 1000 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID"}, \ 1001 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting"} 1002 1003 /* 4-byte device entry */ 1004 1005 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 1006 { 1007 ACPI_DMT_IVRS_DE_HEADER, 1008 {ACPI_DMT_EXIT, 0, NULL} 1009 }; 1010 1011 /* 8-byte device entry */ 1012 1013 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1014 { 1015 ACPI_DMT_IVRS_DE_HEADER, 1016 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved"}, 1017 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID"}, 1018 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved"}, 1019 {ACPI_DMT_EXIT, 0, NULL} 1020 }; 1021 1022 /* 8-byte device entry */ 1023 1024 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1025 { 1026 ACPI_DMT_IVRS_DE_HEADER, 1027 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data"}, 1028 {ACPI_DMT_EXIT, 0, NULL} 1029 }; 1030 1031 /* 8-byte device entry */ 1032 1033 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1034 { 1035 ACPI_DMT_IVRS_DE_HEADER, 1036 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle"}, 1037 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID"}, 1038 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety"}, 1039 {ACPI_DMT_EXIT, 0, NULL} 1040 }; 1041 1042 1043 /******************************************************************************* 1044 * 1045 * MADT - Multiple APIC Description Table and subtables 1046 * 1047 ******************************************************************************/ 1048 1049 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1050 { 1051 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address"}, 1052 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)"}, 1053 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility"}, 1054 {ACPI_DMT_EXIT, 0, NULL} 1055 }; 1056 1057 /* Common Subtable header (one per Subtable) */ 1058 1059 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1060 { 1061 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type"}, 1062 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length"}, 1063 {ACPI_DMT_EXIT, 0, NULL} 1064 }; 1065 1066 /* MADT Subtables */ 1067 1068 /* 0: processor APIC */ 1069 1070 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1071 { 1072 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID"}, 1073 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID"}, 1074 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)"}, 1075 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1076 {ACPI_DMT_EXIT, 0, NULL} 1077 }; 1078 1079 /* 1: IO APIC */ 1080 1081 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1082 { 1083 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID"}, 1084 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved"}, 1085 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address"}, 1086 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt"}, 1087 {ACPI_DMT_EXIT, 0, NULL} 1088 }; 1089 1090 /* 2: Interrupt Override */ 1091 1092 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1093 { 1094 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus"}, 1095 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source"}, 1096 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt"}, 1097 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)"}, 1098 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1099 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1100 {ACPI_DMT_EXIT, 0, NULL} 1101 }; 1102 1103 /* 3: NMI Sources */ 1104 1105 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1106 { 1107 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)"}, 1108 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1109 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1110 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt"}, 1111 {ACPI_DMT_EXIT, 0, NULL} 1112 }; 1113 1114 /* 4: Local APIC NMI */ 1115 1116 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1117 { 1118 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID"}, 1119 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)"}, 1120 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1121 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1122 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT"}, 1123 {ACPI_DMT_EXIT, 0, NULL} 1124 }; 1125 1126 /* 5: Address Override */ 1127 1128 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1129 { 1130 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved"}, 1131 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address"}, 1132 {ACPI_DMT_EXIT, 0, NULL} 1133 }; 1134 1135 /* 6: I/O Sapic */ 1136 1137 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1138 { 1139 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID"}, 1140 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved"}, 1141 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base"}, 1142 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address"}, 1143 {ACPI_DMT_EXIT, 0, NULL} 1144 }; 1145 1146 /* 7: Local Sapic */ 1147 1148 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1149 { 1150 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID"}, 1151 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID"}, 1152 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID"}, 1153 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved"}, 1154 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)"}, 1155 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1156 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID"}, 1157 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String"}, 1158 {ACPI_DMT_EXIT, 0, NULL} 1159 }; 1160 1161 /* 8: Platform Interrupt Source */ 1162 1163 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1164 { 1165 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)"}, 1166 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1167 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1168 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType"}, 1169 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID"}, 1170 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID"}, 1171 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector"}, 1172 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt"}, 1173 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)"}, 1174 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override"}, 1175 {ACPI_DMT_EXIT, 0, NULL} 1176 }; 1177 1178 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1179 1180 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1181 { 1182 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved"}, 1183 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID"}, 1184 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)"}, 1185 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1186 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID"}, 1187 {ACPI_DMT_EXIT, 0, NULL} 1188 }; 1189 1190 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1191 1192 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1193 { 1194 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)"}, 1195 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1196 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1197 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID"}, 1198 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT"}, 1199 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved"}, 1200 {ACPI_DMT_EXIT, 0, NULL} 1201 }; 1202 1203 1204 /******************************************************************************* 1205 * 1206 * MCFG - PCI Memory Mapped Configuration table and Subtable 1207 * 1208 ******************************************************************************/ 1209 1210 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1211 { 1212 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved"}, 1213 {ACPI_DMT_EXIT, 0, NULL} 1214 }; 1215 1216 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1217 { 1218 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address"}, 1219 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number"}, 1220 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number"}, 1221 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number"}, 1222 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved"}, 1223 {ACPI_DMT_EXIT, 0, NULL} 1224 }; 1225 1226 1227 /******************************************************************************* 1228 * 1229 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1230 * 1231 ******************************************************************************/ 1232 1233 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1234 { 1235 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset"}, 1236 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains"}, 1237 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains"}, 1238 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address"}, 1239 {ACPI_DMT_EXIT, 0, NULL} 1240 }; 1241 1242 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1243 1244 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1245 { 1246 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision"}, 1247 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length"}, 1248 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start"}, 1249 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End"}, 1250 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity"}, 1251 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity"}, 1252 {ACPI_DMT_EXIT, 0, NULL} 1253 }; 1254 1255 1256 /******************************************************************************* 1257 * 1258 * SBST - Smart Battery Specification Table 1259 * 1260 ******************************************************************************/ 1261 1262 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1263 { 1264 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level"}, 1265 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level"}, 1266 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level"}, 1267 {ACPI_DMT_EXIT, 0, NULL} 1268 }; 1269 1270 1271 /******************************************************************************* 1272 * 1273 * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED 1274 * 1275 ******************************************************************************/ 1276 1277 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] = 1278 { 1279 {ACPI_DMT_EXIT, 0, NULL} 1280 }; 1281 1282 1283 /******************************************************************************* 1284 * 1285 * SLIT - System Locality Information Table 1286 * 1287 ******************************************************************************/ 1288 1289 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 1290 { 1291 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities"}, 1292 {ACPI_DMT_EXIT, 0, NULL} 1293 }; 1294 1295 1296 /******************************************************************************* 1297 * 1298 * SPCR - Serial Port Console Redirection table 1299 * 1300 ******************************************************************************/ 1301 1302 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 1303 { 1304 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type"}, 1305 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved"}, 1306 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register"}, 1307 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type"}, 1308 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ"}, 1309 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt"}, 1310 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate"}, 1311 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity"}, 1312 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits"}, 1313 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control"}, 1314 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type"}, 1315 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 1316 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID"}, 1317 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID"}, 1318 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus"}, 1319 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device"}, 1320 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function"}, 1321 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags"}, 1322 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment"}, 1323 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 1324 {ACPI_DMT_EXIT, 0, NULL} 1325 }; 1326 1327 1328 /******************************************************************************* 1329 * 1330 * SPMI - Server Platform Management Interface table 1331 * 1332 ******************************************************************************/ 1333 1334 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 1335 { 1336 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type"}, 1337 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved"}, 1338 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version"}, 1339 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type"}, 1340 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number"}, 1341 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved"}, 1342 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag"}, 1343 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt"}, 1344 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register"}, 1345 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment"}, 1346 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus"}, 1347 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device"}, 1348 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function"}, 1349 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved"}, 1350 {ACPI_DMT_EXIT, 0, NULL} 1351 }; 1352 1353 1354 /******************************************************************************* 1355 * 1356 * SRAT - System Resource Affinity Table and Subtables 1357 * 1358 ******************************************************************************/ 1359 1360 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 1361 { 1362 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision"}, 1363 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved"}, 1364 {ACPI_DMT_EXIT, 0, NULL} 1365 }; 1366 1367 /* Common Subtable header (one per Subtable) */ 1368 1369 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 1370 { 1371 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type"}, 1372 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length"}, 1373 {ACPI_DMT_EXIT, 0, NULL} 1374 }; 1375 1376 /* SRAT Subtables */ 1377 1378 /* 0: Processor Local APIC/SAPIC Affinity */ 1379 1380 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 1381 { 1382 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)"}, 1383 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID"}, 1384 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)"}, 1385 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled"}, 1386 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID"}, 1387 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)"}, 1388 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved"}, 1389 {ACPI_DMT_EXIT, 0, NULL} 1390 }; 1391 1392 /* 1: Memory Affinity */ 1393 1394 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 1395 { 1396 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain"}, 1397 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved"}, 1398 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address"}, 1399 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length"}, 1400 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved"}, 1401 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)"}, 1402 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled"}, 1403 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable"}, 1404 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile"}, 1405 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved"}, 1406 {ACPI_DMT_EXIT, 0, NULL} 1407 }; 1408 1409 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1410 1411 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 1412 { 1413 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved"}, 1414 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain"}, 1415 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID"}, 1416 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)"}, 1417 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled"}, 1418 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain"}, 1419 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved"}, 1420 {ACPI_DMT_EXIT, 0, NULL} 1421 }; 1422 1423 1424 /******************************************************************************* 1425 * 1426 * TCPA - Trusted Computing Platform Alliance table 1427 * 1428 ******************************************************************************/ 1429 1430 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 1431 { 1432 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved"}, 1433 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length"}, 1434 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address"}, 1435 {ACPI_DMT_EXIT, 0, NULL} 1436 }; 1437 1438 1439 /******************************************************************************* 1440 * 1441 * UEFI - UEFI Boot optimization Table 1442 * 1443 ******************************************************************************/ 1444 1445 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 1446 { 1447 {ACPI_DMT_BUF16, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier"}, 1448 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset"}, 1449 {ACPI_DMT_EXIT, 0, NULL} 1450 }; 1451 1452 1453 /******************************************************************************* 1454 * 1455 * WAET - Windows ACPI Emulated devices Table 1456 * 1457 ******************************************************************************/ 1458 1459 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 1460 { 1461 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)"}, 1462 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack"}, 1463 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only"}, 1464 {ACPI_DMT_EXIT, 0, NULL} 1465 }; 1466 1467 1468 /******************************************************************************* 1469 * 1470 * WDAT - Watchdog Action Table 1471 * 1472 ******************************************************************************/ 1473 1474 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 1475 { 1476 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length"}, 1477 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment"}, 1478 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus"}, 1479 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device"}, 1480 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function"}, 1481 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved"}, 1482 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period"}, 1483 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count"}, 1484 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count"}, 1485 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)"}, 1486 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled"}, 1487 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep"}, 1488 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved"}, 1489 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count"}, 1490 {ACPI_DMT_EXIT, 0, NULL} 1491 }; 1492 1493 /* WDAT Subtables - Watchdog Instruction Entries */ 1494 1495 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 1496 { 1497 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action"}, 1498 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction"}, 1499 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved"}, 1500 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region"}, 1501 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value"}, 1502 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask"}, 1503 {ACPI_DMT_EXIT, 0, NULL} 1504 }; 1505 1506 1507 /******************************************************************************* 1508 * 1509 * WDRT - Watchdog Resource Table 1510 * 1511 ******************************************************************************/ 1512 1513 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 1514 { 1515 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register"}, 1516 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register"}, 1517 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID"}, 1518 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID"}, 1519 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus"}, 1520 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device"}, 1521 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function"}, 1522 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment"}, 1523 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count"}, 1524 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units"}, 1525 {ACPI_DMT_EXIT, 0, NULL} 1526 }; 1527 1528