1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2010, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 *****************************************************************************/ 115 116 #include <contrib/dev/acpica/include/acpi.h> 117 #include <contrib/dev/acpica/include/accommon.h> 118 #include <contrib/dev/acpica/include/acdisasm.h> 119 120 /* This module used for application-level code only */ 121 122 #define _COMPONENT ACPI_CA_DISASSEMBLER 123 ACPI_MODULE_NAME ("dmtbinfo") 124 125 /* 126 * Macros used to generate offsets to specific table fields 127 */ 128 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 129 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 130 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 131 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 132 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 133 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f) 134 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 135 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 136 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 137 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 138 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 139 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f) 140 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f) 141 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 142 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 143 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 144 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 145 #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 146 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 147 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 148 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 149 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 150 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 151 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 152 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 153 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 154 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f) 155 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 156 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 157 158 /* Subtables */ 159 160 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 161 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 162 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 163 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 164 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 165 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 166 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 167 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 168 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 169 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 170 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 171 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 172 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 173 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 174 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 175 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 176 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 177 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 178 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f) 179 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 180 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 181 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 182 #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 183 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 184 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 185 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 186 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 187 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 188 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 189 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 190 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 191 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 192 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 193 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 194 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 195 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 196 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 197 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 198 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 199 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 200 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 201 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 202 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 203 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 204 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 205 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 206 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 207 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 208 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 209 210 /* 211 * Simplify access to flag fields by breaking them up into bytes 212 */ 213 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 214 215 /* Flags */ 216 217 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 218 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 219 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 220 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 221 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 222 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 223 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 224 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 225 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 226 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 227 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 228 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 229 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 230 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 231 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 232 233 234 /* 235 * ACPI Table Information, used to dump formatted ACPI tables 236 * 237 * Each entry is of the form: <Field Type, Field Offset, Field Name> 238 */ 239 240 /******************************************************************************* 241 * 242 * Common ACPI table header 243 * 244 ******************************************************************************/ 245 246 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 247 { 248 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature"}, 249 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length"}, 250 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision"}, 251 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum"}, 252 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID"}, 253 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID"}, 254 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision"}, 255 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID"}, 256 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision"}, 257 {ACPI_DMT_EXIT, 0, NULL} 258 }; 259 260 261 /******************************************************************************* 262 * 263 * GAS - Generic Address Structure 264 * 265 ******************************************************************************/ 266 267 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 268 { 269 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID"}, 270 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width"}, 271 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset"}, 272 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width"}, 273 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address"}, 274 {ACPI_DMT_EXIT, 0, NULL} 275 }; 276 277 278 /******************************************************************************* 279 * 280 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 281 * 282 ******************************************************************************/ 283 284 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 285 { 286 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature"}, 287 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum"}, 288 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID"}, 289 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision"}, 290 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address"}, 291 {ACPI_DMT_EXIT, 0, NULL} 292 }; 293 294 /* ACPI 2.0+ Extensions */ 295 296 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 297 { 298 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length"}, 299 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address"}, 300 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum"}, 301 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved"}, 302 {ACPI_DMT_EXIT, 0, NULL} 303 }; 304 305 306 /******************************************************************************* 307 * 308 * FACS - Firmware ACPI Control Structure 309 * 310 ******************************************************************************/ 311 312 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 313 { 314 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature"}, 315 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length"}, 316 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature"}, 317 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector"}, 318 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock"}, 319 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)"}, 320 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present"}, 321 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)"}, 322 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector"}, 323 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version"}, 324 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved"}, 325 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)"}, 326 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)"}, 327 {ACPI_DMT_EXIT, 0, NULL} 328 }; 329 330 331 /******************************************************************************* 332 * 333 * FADT - Fixed ACPI Description Table (Signature is FACP) 334 * 335 ******************************************************************************/ 336 337 /* ACPI 1.0 FADT (Version 1) */ 338 339 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 340 { 341 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address"}, 342 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address"}, 343 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model"}, 344 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile"}, 345 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt"}, 346 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port"}, 347 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value"}, 348 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value"}, 349 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command"}, 350 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control"}, 351 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address"}, 352 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address"}, 353 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address"}, 354 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address"}, 355 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address"}, 356 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address"}, 357 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address"}, 358 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address"}, 359 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length"}, 360 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length"}, 361 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length"}, 362 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length"}, 363 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length"}, 364 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length"}, 365 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset"}, 366 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support"}, 367 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency"}, 368 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency"}, 369 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size"}, 370 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride"}, 371 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset"}, 372 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width"}, 373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index"}, 374 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index"}, 375 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index"}, 376 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)"}, 377 378 /* Boot Architecture Flags byte 0 */ 379 380 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)"}, 381 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)"}, 382 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)"}, 383 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)"}, 384 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)"}, 385 386 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved"}, 387 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)"}, 388 389 /* Flags byte 0 */ 390 391 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)"}, 392 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)"}, 393 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)"}, 394 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)"}, 395 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)"}, 396 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)"}, 397 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)"}, 398 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)"}, 399 400 /* Flags byte 1 */ 401 402 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)"}, 403 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)"}, 404 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)"}, 405 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)"}, 406 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)"}, 407 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)"}, 408 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)"}, 409 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)"}, 410 411 /* Flags byte 2 */ 412 413 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)"}, 414 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)"}, 415 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)"}, 416 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)"}, 417 {ACPI_DMT_EXIT, 0, NULL} 418 }; 419 420 /* ACPI 1.0 MS Extensions (FADT version 2) */ 421 422 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 423 { 424 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 425 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 426 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 427 {ACPI_DMT_EXIT, 0, NULL} 428 }; 429 430 /* ACPI 2.0+ Extensions (FADT version 3+) */ 431 432 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 433 { 434 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 435 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 436 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 437 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address"}, 438 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address"}, 439 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block"}, 440 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block"}, 441 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block"}, 442 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block"}, 443 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block"}, 444 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block"}, 445 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block"}, 446 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block"}, 447 {ACPI_DMT_EXIT, 0, NULL} 448 }; 449 450 451 /* 452 * Remaining tables are not consumed directly by the ACPICA subsystem 453 */ 454 455 /******************************************************************************* 456 * 457 * ASF - Alert Standard Format table (Signature "ASF!") 458 * 459 ******************************************************************************/ 460 461 /* Common Subtable header (one per Subtable) */ 462 463 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 464 { 465 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type"}, 466 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved"}, 467 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length"}, 468 {ACPI_DMT_EXIT, 0, NULL} 469 }; 470 471 /* 0: ASF Information */ 472 473 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 474 { 475 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value"}, 476 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval"}, 477 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID"}, 478 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID"}, 479 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags"}, 480 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved"}, 481 {ACPI_DMT_EXIT, 0, NULL} 482 }; 483 484 /* 1: ASF Alerts */ 485 486 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 487 { 488 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask"}, 489 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask"}, 490 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count"}, 491 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length"}, 492 {ACPI_DMT_EXIT, 0, NULL} 493 }; 494 495 /* 1a: ASF Alert data */ 496 497 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 498 { 499 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address"}, 500 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command"}, 501 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask"}, 502 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value"}, 503 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType"}, 504 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type"}, 505 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset"}, 506 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType"}, 507 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity"}, 508 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber"}, 509 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity"}, 510 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance"}, 511 {ACPI_DMT_EXIT, 0, NULL} 512 }; 513 514 /* 2: ASF Remote Control */ 515 516 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 517 { 518 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count"}, 519 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length"}, 520 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved"}, 521 {ACPI_DMT_EXIT, 0, NULL} 522 }; 523 524 /* 2a: ASF Control data */ 525 526 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 527 { 528 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function"}, 529 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address"}, 530 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command"}, 531 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value"}, 532 {ACPI_DMT_EXIT, 0, NULL} 533 }; 534 535 /* 3: ASF RMCP Boot Options */ 536 537 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 538 { 539 {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilites"}, 540 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code"}, 541 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID"}, 542 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command"}, 543 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter"}, 544 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options"}, 545 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters"}, 546 {ACPI_DMT_EXIT, 0, NULL} 547 }; 548 549 /* 4: ASF Address */ 550 551 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 552 { 553 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address"}, 554 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count"}, 555 {ACPI_DMT_EXIT, 0, NULL} 556 }; 557 558 559 /******************************************************************************* 560 * 561 * BERT - Boot Error Record table 562 * 563 ******************************************************************************/ 564 565 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 566 { 567 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length"}, 568 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address"}, 569 {ACPI_DMT_EXIT, 0, NULL} 570 }; 571 572 573 /******************************************************************************* 574 * 575 * BOOT - Simple Boot Flag Table 576 * 577 ******************************************************************************/ 578 579 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 580 { 581 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index"}, 582 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved"}, 583 {ACPI_DMT_EXIT, 0, NULL} 584 }; 585 586 587 /******************************************************************************* 588 * 589 * CPEP - Corrected Platform Error Polling table 590 * 591 ******************************************************************************/ 592 593 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 594 { 595 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved"}, 596 {ACPI_DMT_EXIT, 0, NULL} 597 }; 598 599 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 600 { 601 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type"}, 602 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length"}, 603 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID"}, 604 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID"}, 605 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval"}, 606 {ACPI_DMT_EXIT, 0, NULL} 607 }; 608 609 610 /******************************************************************************* 611 * 612 * DBGP - Debug Port 613 * 614 ******************************************************************************/ 615 616 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 617 { 618 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type"}, 619 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved"}, 620 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register"}, 621 {ACPI_DMT_EXIT, 0, NULL} 622 }; 623 624 625 /******************************************************************************* 626 * 627 * DMAR - DMA Remapping table 628 * 629 ******************************************************************************/ 630 631 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 632 { 633 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width"}, 634 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags"}, 635 {ACPI_DMT_EXIT, 0, NULL} 636 }; 637 638 /* Common Subtable header (one per Subtable) */ 639 640 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 641 { 642 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type"}, 643 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length"}, 644 {ACPI_DMT_EXIT, 0, NULL} 645 }; 646 647 /* Common device scope entry */ 648 649 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 650 { 651 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type"}, 652 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length"}, 653 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved"}, 654 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID"}, 655 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number"}, 656 {ACPI_DMT_EXIT, 0, NULL} 657 }; 658 659 /* DMAR Subtables */ 660 661 /* 0: Hardware Unit Definition */ 662 663 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 664 { 665 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags"}, 666 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved"}, 667 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number"}, 668 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address"}, 669 {ACPI_DMT_EXIT, 0, NULL} 670 }; 671 672 /* 1: Reserved Memory Definition */ 673 674 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 675 { 676 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved"}, 677 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number"}, 678 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address"}, 679 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)"}, 680 {ACPI_DMT_EXIT, 0, NULL} 681 }; 682 683 /* 2: Root Port ATS Capability Definition */ 684 685 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 686 { 687 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags"}, 688 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved"}, 689 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number"}, 690 {ACPI_DMT_EXIT, 0, NULL} 691 }; 692 693 /* 3: Remapping Hardware Static Affinity Structure */ 694 695 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 696 { 697 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved"}, 698 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address"}, 699 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain"}, 700 {ACPI_DMT_EXIT, 0, NULL} 701 }; 702 703 704 /******************************************************************************* 705 * 706 * ECDT - Embedded Controller Boot Resources Table 707 * 708 ******************************************************************************/ 709 710 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 711 { 712 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register"}, 713 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register"}, 714 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID"}, 715 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number"}, 716 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath"}, 717 {ACPI_DMT_EXIT, 0, NULL} 718 }; 719 720 721 /******************************************************************************* 722 * 723 * EINJ - Error Injection table 724 * 725 ******************************************************************************/ 726 727 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 728 { 729 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length"}, 730 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags"}, 731 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved"}, 732 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count"}, 733 {ACPI_DMT_EXIT, 0, NULL} 734 }; 735 736 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 737 { 738 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Action), "Action"}, 739 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Instruction), "Instruction"}, 740 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags"}, 741 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved"}, 742 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region"}, 743 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value"}, 744 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask"}, 745 {ACPI_DMT_EXIT, 0, NULL} 746 }; 747 748 749 /******************************************************************************* 750 * 751 * ERST - Error Record Serialization table 752 * 753 ******************************************************************************/ 754 755 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 756 { 757 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length"}, 758 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved"}, 759 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count"}, 760 {ACPI_DMT_EXIT, 0, NULL} 761 }; 762 763 764 /******************************************************************************* 765 * 766 * HEST - Hardware Error Source table 767 * 768 ******************************************************************************/ 769 770 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 771 { 772 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count"}, 773 {ACPI_DMT_EXIT, 0, NULL} 774 }; 775 776 /* Common HEST structures for subtables */ 777 778 #define ACPI_DM_HEST_HEADER \ 779 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type"}, \ 780 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id"} 781 782 #define ACPI_DM_HEST_AER \ 783 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved"}, \ 784 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags"}, \ 785 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled"}, \ 786 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate"}, \ 787 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record"}, \ 788 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus"}, \ 789 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device"}, \ 790 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function"}, \ 791 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl"}, \ 792 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved"}, \ 793 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask"}, \ 794 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity"}, \ 795 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask"}, \ 796 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities"} 797 798 799 /* HEST Subtables */ 800 801 /* 0: IA32 Machine Check Exception */ 802 803 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 804 { 805 ACPI_DM_HEST_HEADER, 806 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved"}, 807 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags"}, 808 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled"}, 809 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 810 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 811 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data"}, 812 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data"}, 813 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks"}, 814 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved"}, 815 {ACPI_DMT_EXIT, 0, NULL} 816 }; 817 818 /* 1: IA32 Corrected Machine Check */ 819 820 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 821 { 822 ACPI_DM_HEST_HEADER, 823 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved"}, 824 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags"}, 825 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled"}, 826 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 827 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 828 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify"}, 829 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks"}, 830 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved"}, 831 {ACPI_DMT_EXIT, 0, NULL} 832 }; 833 834 /* 2: IA32 Non-Maskable Interrupt */ 835 836 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 837 { 838 ACPI_DM_HEST_HEADER, 839 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved"}, 840 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 841 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 842 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length"}, 843 {ACPI_DMT_EXIT, 0, NULL} 844 }; 845 846 847 /* 6: PCI Express Root Port AER */ 848 849 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 850 { 851 ACPI_DM_HEST_HEADER, 852 ACPI_DM_HEST_AER, 853 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command"}, 854 {ACPI_DMT_EXIT, 0, NULL} 855 }; 856 857 /* 7: PCI Express AER (AER Endpoint) */ 858 859 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 860 { 861 ACPI_DM_HEST_HEADER, 862 ACPI_DM_HEST_AER, 863 {ACPI_DMT_EXIT, 0, NULL} 864 }; 865 866 /* 8: PCI Express/PCI-X Bridge AER */ 867 868 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 869 { 870 ACPI_DM_HEST_HEADER, 871 ACPI_DM_HEST_AER, 872 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask"}, 873 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity"}, 874 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities"}, 875 {ACPI_DMT_EXIT, 0, NULL} 876 }; 877 878 /* 9: Generic Hardware Error Source */ 879 880 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 881 { 882 ACPI_DM_HEST_HEADER, 883 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id"}, 884 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved"}, 885 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled"}, 886 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate"}, 887 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record"}, 888 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length"}, 889 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address"}, 890 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify"}, 891 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length"}, 892 {ACPI_DMT_EXIT, 0, NULL} 893 }; 894 895 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 896 { 897 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type"}, 898 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length"}, 899 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable"}, 900 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval"}, 901 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector"}, 902 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value"}, 903 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window"}, 904 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value"}, 905 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window"}, 906 {ACPI_DMT_EXIT, 0, NULL} 907 }; 908 909 910 /* 911 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 912 * ACPI_HEST_IA_CORRECTED structures. 913 */ 914 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 915 { 916 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number"}, 917 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init"}, 918 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format"}, 919 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved"}, 920 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register"}, 921 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data"}, 922 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register"}, 923 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register"}, 924 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register"}, 925 {ACPI_DMT_EXIT, 0, NULL} 926 }; 927 928 929 /******************************************************************************* 930 * 931 * HPET - High Precision Event Timer table 932 * 933 ******************************************************************************/ 934 935 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 936 { 937 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID"}, 938 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register"}, 939 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number"}, 940 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks"}, 941 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)"}, 942 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect"}, 943 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect"}, 944 {ACPI_DMT_EXIT, 0, NULL} 945 }; 946 947 948 /******************************************************************************* 949 * 950 * IVRS - I/O Virtualization Reporting Structure 951 * 952 ******************************************************************************/ 953 954 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 955 { 956 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info"}, 957 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved"}, 958 {ACPI_DMT_EXIT, 0, NULL} 959 }; 960 961 /* Common Subtable header (one per Subtable) */ 962 963 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 964 { 965 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type"}, 966 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags"}, 967 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length"}, 968 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId"}, 969 {ACPI_DMT_EXIT, 0, NULL} 970 }; 971 972 /* IVRS subtables */ 973 974 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 975 976 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 977 { 978 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset"}, 979 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address"}, 980 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group"}, 981 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info"}, 982 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved"}, 983 {ACPI_DMT_EXIT, 0, NULL} 984 }; 985 986 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 987 988 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 989 { 990 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data"}, 991 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved"}, 992 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address"}, 993 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length"}, 994 {ACPI_DMT_EXIT, 0, NULL} 995 }; 996 997 /* Device entry header for IVHD block */ 998 999 #define ACPI_DMT_IVRS_DE_HEADER \ 1000 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type"}, \ 1001 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID"}, \ 1002 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting"} 1003 1004 /* 4-byte device entry */ 1005 1006 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 1007 { 1008 ACPI_DMT_IVRS_DE_HEADER, 1009 {ACPI_DMT_EXIT, 0, NULL} 1010 }; 1011 1012 /* 8-byte device entry */ 1013 1014 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1015 { 1016 ACPI_DMT_IVRS_DE_HEADER, 1017 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved"}, 1018 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID"}, 1019 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved"}, 1020 {ACPI_DMT_EXIT, 0, NULL} 1021 }; 1022 1023 /* 8-byte device entry */ 1024 1025 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1026 { 1027 ACPI_DMT_IVRS_DE_HEADER, 1028 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data"}, 1029 {ACPI_DMT_EXIT, 0, NULL} 1030 }; 1031 1032 /* 8-byte device entry */ 1033 1034 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1035 { 1036 ACPI_DMT_IVRS_DE_HEADER, 1037 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle"}, 1038 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID"}, 1039 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety"}, 1040 {ACPI_DMT_EXIT, 0, NULL} 1041 }; 1042 1043 1044 /******************************************************************************* 1045 * 1046 * MADT - Multiple APIC Description Table and subtables 1047 * 1048 ******************************************************************************/ 1049 1050 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1051 { 1052 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address"}, 1053 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)"}, 1054 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility"}, 1055 {ACPI_DMT_EXIT, 0, NULL} 1056 }; 1057 1058 /* Common Subtable header (one per Subtable) */ 1059 1060 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1061 { 1062 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type"}, 1063 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length"}, 1064 {ACPI_DMT_EXIT, 0, NULL} 1065 }; 1066 1067 /* MADT Subtables */ 1068 1069 /* 0: processor APIC */ 1070 1071 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1072 { 1073 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID"}, 1074 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID"}, 1075 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)"}, 1076 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1077 {ACPI_DMT_EXIT, 0, NULL} 1078 }; 1079 1080 /* 1: IO APIC */ 1081 1082 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1083 { 1084 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID"}, 1085 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved"}, 1086 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address"}, 1087 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt"}, 1088 {ACPI_DMT_EXIT, 0, NULL} 1089 }; 1090 1091 /* 2: Interrupt Override */ 1092 1093 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1094 { 1095 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus"}, 1096 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source"}, 1097 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt"}, 1098 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)"}, 1099 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1100 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1101 {ACPI_DMT_EXIT, 0, NULL} 1102 }; 1103 1104 /* 3: NMI Sources */ 1105 1106 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1107 { 1108 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)"}, 1109 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1110 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1111 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt"}, 1112 {ACPI_DMT_EXIT, 0, NULL} 1113 }; 1114 1115 /* 4: Local APIC NMI */ 1116 1117 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1118 { 1119 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID"}, 1120 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)"}, 1121 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1122 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1123 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT"}, 1124 {ACPI_DMT_EXIT, 0, NULL} 1125 }; 1126 1127 /* 5: Address Override */ 1128 1129 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1130 { 1131 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved"}, 1132 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address"}, 1133 {ACPI_DMT_EXIT, 0, NULL} 1134 }; 1135 1136 /* 6: I/O Sapic */ 1137 1138 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1139 { 1140 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID"}, 1141 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved"}, 1142 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base"}, 1143 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address"}, 1144 {ACPI_DMT_EXIT, 0, NULL} 1145 }; 1146 1147 /* 7: Local Sapic */ 1148 1149 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1150 { 1151 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID"}, 1152 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID"}, 1153 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID"}, 1154 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved"}, 1155 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)"}, 1156 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1157 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID"}, 1158 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String"}, 1159 {ACPI_DMT_EXIT, 0, NULL} 1160 }; 1161 1162 /* 8: Platform Interrupt Source */ 1163 1164 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1165 { 1166 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)"}, 1167 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1168 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1169 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType"}, 1170 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID"}, 1171 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID"}, 1172 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector"}, 1173 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt"}, 1174 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)"}, 1175 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override"}, 1176 {ACPI_DMT_EXIT, 0, NULL} 1177 }; 1178 1179 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1180 1181 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1182 { 1183 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved"}, 1184 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID"}, 1185 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)"}, 1186 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 1187 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID"}, 1188 {ACPI_DMT_EXIT, 0, NULL} 1189 }; 1190 1191 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1192 1193 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1194 { 1195 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)"}, 1196 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 1197 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 1198 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID"}, 1199 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT"}, 1200 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved"}, 1201 {ACPI_DMT_EXIT, 0, NULL} 1202 }; 1203 1204 1205 /******************************************************************************* 1206 * 1207 * MCFG - PCI Memory Mapped Configuration table and Subtable 1208 * 1209 ******************************************************************************/ 1210 1211 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1212 { 1213 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved"}, 1214 {ACPI_DMT_EXIT, 0, NULL} 1215 }; 1216 1217 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1218 { 1219 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address"}, 1220 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number"}, 1221 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number"}, 1222 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number"}, 1223 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved"}, 1224 {ACPI_DMT_EXIT, 0, NULL} 1225 }; 1226 1227 1228 /******************************************************************************* 1229 * 1230 * MCHI - Management Controller Host Interface table 1231 * 1232 ******************************************************************************/ 1233 1234 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1235 { 1236 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type"}, 1237 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol"}, 1238 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data"}, 1239 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type"}, 1240 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe"}, 1241 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag"}, 1242 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt"}, 1243 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register"}, 1244 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment"}, 1245 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus"}, 1246 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device"}, 1247 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function"}, 1248 {ACPI_DMT_EXIT, 0, NULL} 1249 }; 1250 1251 1252 /******************************************************************************* 1253 * 1254 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1255 * 1256 ******************************************************************************/ 1257 1258 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 1259 { 1260 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset"}, 1261 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains"}, 1262 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains"}, 1263 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address"}, 1264 {ACPI_DMT_EXIT, 0, NULL} 1265 }; 1266 1267 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1268 1269 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 1270 { 1271 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision"}, 1272 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length"}, 1273 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start"}, 1274 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End"}, 1275 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity"}, 1276 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity"}, 1277 {ACPI_DMT_EXIT, 0, NULL} 1278 }; 1279 1280 1281 /******************************************************************************* 1282 * 1283 * SBST - Smart Battery Specification Table 1284 * 1285 ******************************************************************************/ 1286 1287 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1288 { 1289 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level"}, 1290 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level"}, 1291 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level"}, 1292 {ACPI_DMT_EXIT, 0, NULL} 1293 }; 1294 1295 1296 /******************************************************************************* 1297 * 1298 * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED 1299 * 1300 ******************************************************************************/ 1301 1302 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] = 1303 { 1304 {ACPI_DMT_EXIT, 0, NULL} 1305 }; 1306 1307 1308 /******************************************************************************* 1309 * 1310 * SLIT - System Locality Information Table 1311 * 1312 ******************************************************************************/ 1313 1314 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 1315 { 1316 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities"}, 1317 {ACPI_DMT_EXIT, 0, NULL} 1318 }; 1319 1320 1321 /******************************************************************************* 1322 * 1323 * SPCR - Serial Port Console Redirection table 1324 * 1325 ******************************************************************************/ 1326 1327 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 1328 { 1329 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type"}, 1330 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved"}, 1331 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register"}, 1332 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type"}, 1333 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ"}, 1334 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt"}, 1335 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate"}, 1336 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity"}, 1337 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits"}, 1338 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control"}, 1339 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type"}, 1340 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 1341 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID"}, 1342 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID"}, 1343 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus"}, 1344 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device"}, 1345 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function"}, 1346 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags"}, 1347 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment"}, 1348 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 1349 {ACPI_DMT_EXIT, 0, NULL} 1350 }; 1351 1352 1353 /******************************************************************************* 1354 * 1355 * SPMI - Server Platform Management Interface table 1356 * 1357 ******************************************************************************/ 1358 1359 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 1360 { 1361 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type"}, 1362 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved"}, 1363 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version"}, 1364 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type"}, 1365 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number"}, 1366 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved"}, 1367 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag"}, 1368 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt"}, 1369 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register"}, 1370 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment"}, 1371 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus"}, 1372 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device"}, 1373 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function"}, 1374 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved"}, 1375 {ACPI_DMT_EXIT, 0, NULL} 1376 }; 1377 1378 1379 /******************************************************************************* 1380 * 1381 * SRAT - System Resource Affinity Table and Subtables 1382 * 1383 ******************************************************************************/ 1384 1385 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 1386 { 1387 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision"}, 1388 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved"}, 1389 {ACPI_DMT_EXIT, 0, NULL} 1390 }; 1391 1392 /* Common Subtable header (one per Subtable) */ 1393 1394 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 1395 { 1396 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type"}, 1397 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length"}, 1398 {ACPI_DMT_EXIT, 0, NULL} 1399 }; 1400 1401 /* SRAT Subtables */ 1402 1403 /* 0: Processor Local APIC/SAPIC Affinity */ 1404 1405 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 1406 { 1407 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)"}, 1408 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID"}, 1409 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)"}, 1410 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled"}, 1411 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID"}, 1412 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)"}, 1413 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved"}, 1414 {ACPI_DMT_EXIT, 0, NULL} 1415 }; 1416 1417 /* 1: Memory Affinity */ 1418 1419 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 1420 { 1421 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain"}, 1422 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved"}, 1423 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address"}, 1424 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length"}, 1425 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved"}, 1426 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)"}, 1427 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled"}, 1428 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable"}, 1429 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile"}, 1430 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved"}, 1431 {ACPI_DMT_EXIT, 0, NULL} 1432 }; 1433 1434 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1435 1436 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 1437 { 1438 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved"}, 1439 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain"}, 1440 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID"}, 1441 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)"}, 1442 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled"}, 1443 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain"}, 1444 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved"}, 1445 {ACPI_DMT_EXIT, 0, NULL} 1446 }; 1447 1448 1449 /******************************************************************************* 1450 * 1451 * TCPA - Trusted Computing Platform Alliance table 1452 * 1453 ******************************************************************************/ 1454 1455 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 1456 { 1457 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved"}, 1458 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length"}, 1459 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address"}, 1460 {ACPI_DMT_EXIT, 0, NULL} 1461 }; 1462 1463 1464 /******************************************************************************* 1465 * 1466 * UEFI - UEFI Boot optimization Table 1467 * 1468 ******************************************************************************/ 1469 1470 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 1471 { 1472 {ACPI_DMT_BUF16, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier"}, 1473 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset"}, 1474 {ACPI_DMT_EXIT, 0, NULL} 1475 }; 1476 1477 1478 /******************************************************************************* 1479 * 1480 * WAET - Windows ACPI Emulated devices Table 1481 * 1482 ******************************************************************************/ 1483 1484 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 1485 { 1486 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)"}, 1487 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack"}, 1488 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only"}, 1489 {ACPI_DMT_EXIT, 0, NULL} 1490 }; 1491 1492 1493 /******************************************************************************* 1494 * 1495 * WDAT - Watchdog Action Table 1496 * 1497 ******************************************************************************/ 1498 1499 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 1500 { 1501 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length"}, 1502 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment"}, 1503 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus"}, 1504 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device"}, 1505 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function"}, 1506 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved"}, 1507 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period"}, 1508 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count"}, 1509 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count"}, 1510 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)"}, 1511 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled"}, 1512 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep"}, 1513 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved"}, 1514 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count"}, 1515 {ACPI_DMT_EXIT, 0, NULL} 1516 }; 1517 1518 /* WDAT Subtables - Watchdog Instruction Entries */ 1519 1520 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 1521 { 1522 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action"}, 1523 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction"}, 1524 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved"}, 1525 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region"}, 1526 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value"}, 1527 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask"}, 1528 {ACPI_DMT_EXIT, 0, NULL} 1529 }; 1530 1531 1532 /******************************************************************************* 1533 * 1534 * WDRT - Watchdog Resource Table 1535 * 1536 ******************************************************************************/ 1537 1538 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 1539 { 1540 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register"}, 1541 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register"}, 1542 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID"}, 1543 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID"}, 1544 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus"}, 1545 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device"}, 1546 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function"}, 1547 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment"}, 1548 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count"}, 1549 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units"}, 1550 {ACPI_DMT_EXIT, 0, NULL} 1551 }; 1552 1553