1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2016, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #include <contrib/dev/acpica/include/acpi.h> 45 #include <contrib/dev/acpica/include/accommon.h> 46 #include <contrib/dev/acpica/include/acdisasm.h> 47 48 /* This module used for application-level code only */ 49 50 #define _COMPONENT ACPI_CA_DISASSEMBLER 51 ACPI_MODULE_NAME ("dmtbinfo") 52 53 /* 54 * How to add a new table: 55 * 56 * - Add the C table definition to the actbl1.h or actbl2.h header. 57 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 58 * - Define the table in this file (for the disassembler). If any 59 * new data types are required (ACPI_DMT_*), see below. 60 * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 61 * in acdisam.h 62 * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 63 * If a simple table (with no subtables), no disassembly code is needed. 64 * Otherwise, create the AcpiDmDump* function for to disassemble the table 65 * and add it to the dmtbdump.c file. 66 * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 67 * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 68 * - Create a template for the new table 69 * - Add data table compiler support 70 * 71 * How to add a new data type (ACPI_DMT_*): 72 * 73 * - Add new type at the end of the ACPI_DMT list in acdisasm.h 74 * - Add length and implementation cases in dmtable.c (disassembler) 75 * - Add type and length cases in dtutils.c (DT compiler) 76 */ 77 78 /* 79 * Macros used to generate offsets to specific table fields 80 */ 81 #define ACPI_FACS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_FACS,f) 82 #define ACPI_GAS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 83 #define ACPI_HDR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 84 #define ACPI_RSDP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 85 #define ACPI_BERT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BERT,f) 86 #define ACPI_BGRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BGRT,f) 87 #define ACPI_BOOT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 88 #define ACPI_CPEP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 89 #define ACPI_DBG2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBG2,f) 90 #define ACPI_DBGP_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 91 #define ACPI_DMAR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 92 #define ACPI_DRTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_DRTM,f) 93 #define ACPI_ECDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 94 #define ACPI_EINJ_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_EINJ,f) 95 #define ACPI_ERST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_ERST,f) 96 #define ACPI_GTDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f) 97 #define ACPI_HEST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f) 98 #define ACPI_HPET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f) 99 #define ACPI_IORT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IORT,f) 100 #define ACPI_IVRS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f) 101 #define ACPI_MADT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f) 102 #define ACPI_MCFG_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 103 #define ACPI_MCHI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f) 104 #define ACPI_MPST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f) 105 #define ACPI_MSCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f) 106 #define ACPI_NFIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_NFIT,f) 107 #define ACPI_PCCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f) 108 #define ACPI_PMTT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f) 109 #define ACPI_RASF_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_RASF,f) 110 #define ACPI_S3PT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f) 111 #define ACPI_SBST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SBST,f) 112 #define ACPI_SLIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 113 #define ACPI_SPCR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 114 #define ACPI_SPMI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 115 #define ACPI_SRAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 116 #define ACPI_STAO_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_STAO,f) 117 #define ACPI_TCPA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_HDR,f) 118 #define ACPI_TPM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f) 119 #define ACPI_UEFI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f) 120 #define ACPI_WAET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WAET,f) 121 #define ACPI_WDAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f) 122 #define ACPI_WDDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f) 123 #define ACPI_WDRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 124 #define ACPI_WPBT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WPBT,f) 125 #define ACPI_XENV_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_XENV,f) 126 127 /* Subtables */ 128 129 #define ACPI_ASF0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_INFO,f) 130 #define ACPI_ASF1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT,f) 131 #define ACPI_ASF1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 132 #define ACPI_ASF2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 133 #define ACPI_ASF2a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 134 #define ACPI_ASF3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_RMCP,f) 135 #define ACPI_ASF4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 136 #define ACPI_CPEP0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 137 #define ACPI_CSRT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_GROUP,f) 138 #define ACPI_CSRT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_SHARED_INFO,f) 139 #define ACPI_CSRT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_CSRT_DESCRIPTOR,f) 140 #define ACPI_DBG20_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DBG2_DEVICE,f) 141 #define ACPI_DMARS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 142 #define ACPI_DMAR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 143 #define ACPI_DMAR1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 144 #define ACPI_DMAR2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f) 145 #define ACPI_DMAR3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f) 146 #define ACPI_DMAR4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f) 147 #define ACPI_DRTM0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST,f) 148 #define ACPI_DRTM1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST,f) 149 #define ACPI_DRTM1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE,f) 150 #define ACPI_DRTM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_DPS_ID,f) 151 #define ACPI_EINJ0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 152 #define ACPI_ERST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) 153 #define ACPI_FPDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f) 154 #define ACPI_FPDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_BOOT_POINTER,f) 155 #define ACPI_FPDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_S3PT_POINTER,f) 156 #define ACPI_GTDT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_BLOCK,f) 157 #define ACPI_GTDT0a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_TIMER_ENTRY,f) 158 #define ACPI_GTDT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_WATCHDOG,f) 159 #define ACPI_GTDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_GTDT_HEADER,f) 160 #define ACPI_HEST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f) 161 #define ACPI_HEST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f) 162 #define ACPI_HEST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_NMI,f) 163 #define ACPI_HEST6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f) 164 #define ACPI_HEST7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER,f) 165 #define ACPI_HEST8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f) 166 #define ACPI_HEST9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f) 167 #define ACPI_HEST10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC_V2,f) 168 #define ACPI_HESTN_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) 169 #define ACPI_HESTB_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) 170 #define ACPI_IORT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ITS_GROUP,f) 171 #define ACPI_IORT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT,f) 172 #define ACPI_IORT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ROOT_COMPLEX,f) 173 #define ACPI_IORT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU,f) 174 #define ACPI_IORT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU_V3,f) 175 #define ACPI_IORTA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_MEMORY_ACCESS,f) 176 #define ACPI_IORTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NODE,f) 177 #define ACPI_IORTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ID_MAPPING,f) 178 #define ACPI_IVRSH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f) 179 #define ACPI_IVRS0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) 180 #define ACPI_IVRS1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) 181 #define ACPI_IVRSD_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f) 182 #define ACPI_IVRS8A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f) 183 #define ACPI_IVRS8B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f) 184 #define ACPI_IVRS8C_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) 185 #define ACPI_LPITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f) 186 #define ACPI_LPIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f) 187 #define ACPI_MADT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 188 #define ACPI_MADT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 189 #define ACPI_MADT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 190 #define ACPI_MADT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 191 #define ACPI_MADT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 192 #define ACPI_MADT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 193 #define ACPI_MADT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 194 #define ACPI_MADT7_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 195 #define ACPI_MADT8_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 196 #define ACPI_MADT9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f) 197 #define ACPI_MADT10_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f) 198 #define ACPI_MADT11_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f) 199 #define ACPI_MADT12_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f) 200 #define ACPI_MADT13_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f) 201 #define ACPI_MADT14_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f) 202 #define ACPI_MADT15_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_TRANSLATOR,f) 203 #define ACPI_MADTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 204 #define ACPI_MCFG0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 205 #define ACPI_MPST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f) 206 #define ACPI_MPST0A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_STATE,f) 207 #define ACPI_MPST0B_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_COMPONENT,f) 208 #define ACPI_MPST1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_DATA_HDR,f) 209 #define ACPI_MPST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f) 210 #define ACPI_MSCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) 211 #define ACPI_MTMR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f) 212 #define ACPI_NFITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_HEADER,f) 213 #define ACPI_NFIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f) 214 #define ACPI_NFIT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_MEMORY_MAP,f) 215 #define ACPI_NFIT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_INTERLEAVE,f) 216 #define ACPI_NFIT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SMBIOS,f) 217 #define ACPI_NFIT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_CONTROL_REGION,f) 218 #define ACPI_NFIT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_DATA_REGION,f) 219 #define ACPI_NFIT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_FLUSH_ADDRESS,f) 220 #define ACPI_PCCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f) 221 #define ACPI_PCCT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f) 222 #define ACPI_PCCT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f) 223 #define ACPI_PMTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f) 224 #define ACPI_PMTT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_CONTROLLER,f) 225 #define ACPI_PMTT1A_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_DOMAIN,f) 226 #define ACPI_PMTT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_PHYSICAL_COMPONENT,f) 227 #define ACPI_PMTTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_HEADER,f) 228 #define ACPI_S3PTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f) 229 #define ACPI_S3PT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_RESUME,f) 230 #define ACPI_S3PT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_S3PT_SUSPEND,f) 231 #define ACPI_SLIC_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SLIC,f) 232 #define ACPI_SRATH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 233 #define ACPI_SRAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 234 #define ACPI_SRAT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 235 #define ACPI_SRAT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f) 236 #define ACPI_SRAT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SRAT_GICC_AFFINITY,f) 237 #define ACPI_TCPA_CLIENT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_CLIENT,f) 238 #define ACPI_TCPA_SERVER_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA_SERVER,f) 239 #define ACPI_VRTC0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_VRTC_ENTRY,f) 240 #define ACPI_WDAT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WDAT_ENTRY,f) 241 242 /* 243 * Simplify access to flag fields by breaking them up into bytes 244 */ 245 #define ACPI_FLAG_OFFSET(d,f,o) (UINT16) (ACPI_OFFSET (d,f) + o) 246 247 /* Flags */ 248 249 #define ACPI_DRTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_DRTM,f,o) 250 #define ACPI_DRTM1a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_DRTM_RESOURCE,f,o) 251 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 252 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 253 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 254 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 255 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 256 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o) 257 #define ACPI_SRAT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_GICC_AFFINITY,f,o) 258 #define ACPI_GTDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o) 259 #define ACPI_GTDT0a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o) 260 #define ACPI_GTDT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o) 261 #define ACPI_IORT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU,f,o) 262 #define ACPI_IORT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU_V3,f,o) 263 #define ACPI_IORTA_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_MEMORY_ACCESS,f,o) 264 #define ACPI_IORTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_ID_MAPPING,f,o) 265 #define ACPI_LPITH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o) 266 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 267 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 268 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 269 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 270 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 271 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 272 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 273 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o) 274 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o) 275 #define ACPI_MADT11_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_INTERRUPT,f,o) 276 #define ACPI_MADT13_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o) 277 #define ACPI_MPST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o) 278 #define ACPI_MPST2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o) 279 #define ACPI_NFIT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f,o) 280 #define ACPI_NFIT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_MEMORY_MAP,f,o) 281 #define ACPI_NFIT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_CONTROL_REGION,f,o) 282 #define ACPI_PCCT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o) 283 #define ACPI_PCCT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o) 284 #define ACPI_PCCT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED_TYPE2,f,o) 285 #define ACPI_PMTTH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o) 286 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o) 287 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 288 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o) 289 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o) 290 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o) 291 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o) 292 293 /* 294 * Required terminator for all tables below 295 */ 296 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0} 297 #define ACPI_DMT_NEW_LINE {ACPI_DMT_EXTRA_TEXT, 0, "\n", 0} 298 299 300 /* 301 * ACPI Table Information, used to dump formatted ACPI tables 302 * 303 * Each entry is of the form: <Field Type, Field Offset, Field Name> 304 */ 305 306 /******************************************************************************* 307 * 308 * Common ACPI table header 309 * 310 ******************************************************************************/ 311 312 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 313 { 314 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0}, 315 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH}, 316 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0}, 317 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0}, 318 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0}, 319 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0}, 320 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0}, 321 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0}, 322 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0}, 323 ACPI_DMT_TERMINATOR 324 }; 325 326 327 /******************************************************************************* 328 * 329 * GAS - Generic Address Structure 330 * 331 ******************************************************************************/ 332 333 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 334 { 335 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0}, 336 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0}, 337 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0}, 338 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0}, 339 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0}, 340 ACPI_DMT_TERMINATOR 341 }; 342 343 344 /******************************************************************************* 345 * 346 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 347 * 348 ******************************************************************************/ 349 350 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 351 { 352 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0}, 353 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0}, 354 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0}, 355 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0}, 356 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0}, 357 ACPI_DMT_TERMINATOR 358 }; 359 360 /* ACPI 2.0+ Extensions */ 361 362 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 363 { 364 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH}, 365 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0}, 366 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0}, 367 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0}, 368 ACPI_DMT_TERMINATOR 369 }; 370 371 372 /******************************************************************************* 373 * 374 * FACS - Firmware ACPI Control Structure 375 * 376 ******************************************************************************/ 377 378 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 379 { 380 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0}, 381 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH}, 382 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0}, 383 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0}, 384 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0}, 385 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 386 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0}, 387 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0}, 388 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0}, 389 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0}, 390 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0}, 391 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG}, 392 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0}, 393 ACPI_DMT_TERMINATOR 394 }; 395 396 397 /******************************************************************************* 398 * 399 * FADT - Fixed ACPI Description Table (Signature is FACP) 400 * 401 ******************************************************************************/ 402 403 /* ACPI 1.0 FADT (Version 1) */ 404 405 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 406 { 407 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0}, 408 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO}, 409 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0}, 410 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0}, 411 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0}, 412 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0}, 413 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0}, 414 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0}, 415 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0}, 416 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0}, 417 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0}, 418 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0}, 419 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0}, 420 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0}, 421 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0}, 422 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0}, 423 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0}, 424 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0}, 425 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0}, 426 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0}, 427 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0}, 428 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0}, 429 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0}, 430 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0}, 431 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0}, 432 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0}, 433 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0}, 434 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0}, 435 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0}, 436 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0}, 437 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0}, 438 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0}, 439 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0}, 440 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0}, 441 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0}, 442 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG}, 443 444 /* Boot Architecture Flags byte 0 */ 445 446 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0}, 447 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0}, 448 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0}, 449 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0}, 450 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0}, 451 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "CMOS RTC Not Present (V5)", 0}, 452 453 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0}, 454 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 455 456 /* Flags byte 0 */ 457 458 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0}, 459 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0}, 460 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0}, 461 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0}, 462 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0}, 463 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0}, 464 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0}, 465 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0}, 466 467 /* Flags byte 1 */ 468 469 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0}, 470 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0}, 471 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0}, 472 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0}, 473 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0}, 474 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0}, 475 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0}, 476 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0}, 477 478 /* Flags byte 2 */ 479 480 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0}, 481 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0}, 482 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0}, 483 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0}, 484 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,2), "Hardware Reduced (V5)", 0}, 485 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,2), "Low Power S0 Idle (V5)", 0}, 486 ACPI_DMT_TERMINATOR 487 }; 488 489 /* ACPI 1.0 MS Extensions (FADT version 2) */ 490 491 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 492 { 493 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 494 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 495 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "Reserved", 0}, 496 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "Reserved", 0}, 497 ACPI_DMT_TERMINATOR 498 }; 499 500 /* ACPI 2.0+ Extensions (FADT version 3, 4, and 5) */ 501 502 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] = 503 { 504 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0}, 505 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0}, 506 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (ArmBootFlags), "ARM Flags (decoded below)", DT_FLAG}, 507 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "PSCI Compliant", 0}, 508 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET(ArmBootFlags,0), "Must use HVC for PSCI", 0}, 509 ACPI_DMT_NEW_LINE, 510 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MinorRevision), "FADT Minor Revision", 0}, 511 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0}, 512 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0}, 513 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0}, 514 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0}, 515 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0}, 516 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0}, 517 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0}, 518 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0}, 519 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0}, 520 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0}, 521 ACPI_DMT_TERMINATOR 522 }; 523 524 /* ACPI 5.0 Extensions (FADT version 5) */ 525 526 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[] = 527 { 528 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepControl), "Sleep Control Register", 0}, 529 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (SleepStatus), "Sleep Status Register", 0}, 530 ACPI_DMT_TERMINATOR 531 }; 532 533 /* ACPI 6.0 Extensions (FADT version 6) */ 534 535 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt6[] = 536 { 537 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (HypervisorId), "Hypervisor ID", 0}, 538 ACPI_DMT_TERMINATOR 539 }; 540 541 542 /* 543 * Remaining tables are not consumed directly by the ACPICA subsystem 544 */ 545 546 /******************************************************************************* 547 * 548 * ASF - Alert Standard Format table (Signature "ASF!") 549 * 550 ******************************************************************************/ 551 552 /* Common Subtable header (one per Subtable) */ 553 554 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 555 { 556 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0}, 557 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0}, 558 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH}, 559 ACPI_DMT_TERMINATOR 560 }; 561 562 /* 0: ASF Information */ 563 564 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 565 { 566 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0}, 567 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0}, 568 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0}, 569 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0}, 570 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0}, 571 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0}, 572 ACPI_DMT_TERMINATOR 573 }; 574 575 /* 1: ASF Alerts */ 576 577 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 578 { 579 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0}, 580 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0}, 581 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0}, 582 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0}, 583 ACPI_DMT_TERMINATOR 584 }; 585 586 /* 1a: ASF Alert data */ 587 588 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 589 { 590 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0}, 591 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0}, 592 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0}, 593 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0}, 594 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0}, 595 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0}, 596 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0}, 597 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0}, 598 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0}, 599 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0}, 600 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0}, 601 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0}, 602 ACPI_DMT_TERMINATOR 603 }; 604 605 /* 2: ASF Remote Control */ 606 607 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 608 { 609 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0}, 610 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0}, 611 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0}, 612 ACPI_DMT_TERMINATOR 613 }; 614 615 /* 2a: ASF Control data */ 616 617 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 618 { 619 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0}, 620 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0}, 621 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0}, 622 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0}, 623 ACPI_DMT_TERMINATOR 624 }; 625 626 /* 3: ASF RMCP Boot Options */ 627 628 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 629 { 630 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0}, 631 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0}, 632 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0}, 633 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0}, 634 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0}, 635 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0}, 636 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0}, 637 ACPI_DMT_TERMINATOR 638 }; 639 640 /* 4: ASF Address */ 641 642 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 643 { 644 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0}, 645 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT}, 646 ACPI_DMT_TERMINATOR 647 }; 648 649 650 /******************************************************************************* 651 * 652 * BERT - Boot Error Record table 653 * 654 ******************************************************************************/ 655 656 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] = 657 { 658 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0}, 659 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0}, 660 ACPI_DMT_TERMINATOR 661 }; 662 663 664 /******************************************************************************* 665 * 666 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 667 * 668 ******************************************************************************/ 669 670 ACPI_DMTABLE_INFO AcpiDmTableInfoBgrt[] = 671 { 672 {ACPI_DMT_UINT16, ACPI_BGRT_OFFSET (Version), "Version", 0}, 673 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (Status), "Status", 0}, 674 {ACPI_DMT_UINT8, ACPI_BGRT_OFFSET (ImageType), "Image Type", 0}, 675 {ACPI_DMT_UINT64, ACPI_BGRT_OFFSET (ImageAddress), "Image Address", 0}, 676 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetX), "Image OffsetX", 0}, 677 {ACPI_DMT_UINT32, ACPI_BGRT_OFFSET (ImageOffsetY), "Image OffsetY", 0}, 678 ACPI_DMT_TERMINATOR 679 }; 680 681 682 /******************************************************************************* 683 * 684 * BOOT - Simple Boot Flag Table 685 * 686 ******************************************************************************/ 687 688 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 689 { 690 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0}, 691 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0}, 692 ACPI_DMT_TERMINATOR 693 }; 694 695 696 /******************************************************************************* 697 * 698 * CPEP - Corrected Platform Error Polling table 699 * 700 ******************************************************************************/ 701 702 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 703 { 704 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0}, 705 ACPI_DMT_TERMINATOR 706 }; 707 708 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 709 { 710 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0}, 711 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH}, 712 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0}, 713 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0}, 714 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0}, 715 ACPI_DMT_TERMINATOR 716 }; 717 718 719 /******************************************************************************* 720 * 721 * CSRT - Core System Resource Table 722 * 723 ******************************************************************************/ 724 725 /* Main table consists only of the standard ACPI table header */ 726 727 /* Resource Group subtable */ 728 729 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = 730 { 731 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", DT_LENGTH}, 732 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, 733 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, 734 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, 735 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (SubdeviceId), "Subdevice ID", 0}, 736 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Revision), "Revision", 0}, 737 {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (Reserved), "Reserved", 0}, 738 {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SharedInfoLength), "Shared Info Length", 0}, 739 ACPI_DMT_TERMINATOR 740 }; 741 742 /* Shared Info subtable */ 743 744 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = 745 { 746 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MajorVersion), "Major Version", 0}, 747 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (MinorVersion), "Minor Version", 0}, 748 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseLow), "MMIO Base Address Low", 0}, 749 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MmioBaseHigh), "MMIO Base Address High", 0}, 750 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (GsiInterrupt), "GSI Interrupt", 0}, 751 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptPolarity), "Interrupt Polarity", 0}, 752 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (InterruptMode), "Interrupt Mode", 0}, 753 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (NumChannels), "Num Channels", 0}, 754 {ACPI_DMT_UINT8, ACPI_CSRT1_OFFSET (DmaAddressWidth), "DMA Address Width", 0}, 755 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (BaseRequestLine), "Base Request Line", 0}, 756 {ACPI_DMT_UINT16, ACPI_CSRT1_OFFSET (NumHandshakeSignals), "Num Handshake Signals", 0}, 757 {ACPI_DMT_UINT32, ACPI_CSRT1_OFFSET (MaxBlockSize), "Max Block Size", 0}, 758 ACPI_DMT_TERMINATOR 759 }; 760 761 762 /* Resource Descriptor subtable */ 763 764 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = 765 { 766 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", DT_LENGTH}, 767 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, 768 {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, 769 {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, 770 ACPI_DMT_TERMINATOR 771 }; 772 773 ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[] = 774 { 775 {ACPI_DMT_RAW_BUFFER, 0, "ResourceInfo", DT_OPTIONAL}, 776 ACPI_DMT_TERMINATOR 777 }; 778 779 780 /******************************************************************************* 781 * 782 * DBG2 - Debug Port Table 2 783 * 784 ******************************************************************************/ 785 786 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[] = 787 { 788 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoOffset), "Info Offset", 0}, 789 {ACPI_DMT_UINT32, ACPI_DBG2_OFFSET (InfoCount), "Info Count", 0}, 790 ACPI_DMT_TERMINATOR 791 }; 792 793 /* Debug Device Information Subtable */ 794 795 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[] = 796 { 797 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (Revision), "Revision", 0}, 798 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Length), "Length", DT_LENGTH}, 799 {ACPI_DMT_UINT8, ACPI_DBG20_OFFSET (RegisterCount), "Register Count", 0}, 800 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathLength), "Namepath Length", 0}, 801 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (NamepathOffset), "Namepath Offset", 0}, 802 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataLength), "OEM Data Length", DT_DESCRIBES_OPTIONAL}, 803 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (OemDataOffset), "OEM Data Offset", DT_DESCRIBES_OPTIONAL}, 804 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortType), "Port Type", 0}, 805 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (PortSubtype), "Port Subtype", 0}, 806 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (Reserved), "Reserved", 0}, 807 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (BaseAddressOffset), "Base Address Offset", 0}, 808 {ACPI_DMT_UINT16, ACPI_DBG20_OFFSET (AddressSizeOffset), "Address Size Offset", 0}, 809 ACPI_DMT_TERMINATOR 810 }; 811 812 /* Variable-length data for the subtable */ 813 814 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[] = 815 { 816 {ACPI_DMT_GAS, 0, "Base Address Register", 0}, 817 ACPI_DMT_TERMINATOR 818 }; 819 820 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Size[] = 821 { 822 {ACPI_DMT_UINT32, 0, "Address Size", 0}, 823 ACPI_DMT_TERMINATOR 824 }; 825 826 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = 827 { 828 {ACPI_DMT_STRING, 0, "Namepath", 0}, 829 ACPI_DMT_TERMINATOR 830 }; 831 832 ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = 833 { 834 {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", DT_OPTIONAL}, 835 ACPI_DMT_TERMINATOR 836 }; 837 838 839 /******************************************************************************* 840 * 841 * DBGP - Debug Port 842 * 843 ******************************************************************************/ 844 845 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 846 { 847 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0}, 848 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0}, 849 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0}, 850 ACPI_DMT_TERMINATOR 851 }; 852 853 854 /******************************************************************************* 855 * 856 * DMAR - DMA Remapping table 857 * 858 ******************************************************************************/ 859 860 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 861 { 862 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0}, 863 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0}, 864 {ACPI_DMT_BUF10, ACPI_DMAR_OFFSET (Reserved[0]), "Reserved", 0}, 865 ACPI_DMT_TERMINATOR 866 }; 867 868 /* Common Subtable header (one per Subtable) */ 869 870 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 871 { 872 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0}, 873 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH}, 874 ACPI_DMT_TERMINATOR 875 }; 876 877 /* Common device scope entry */ 878 879 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 880 { 881 {ACPI_DMT_DMAR_SCOPE, ACPI_DMARS_OFFSET (EntryType), "Device Scope Type", 0}, 882 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH}, 883 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0}, 884 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0}, 885 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0}, 886 ACPI_DMT_TERMINATOR 887 }; 888 889 /* DMAR Subtables */ 890 891 /* 0: Hardware Unit Definition */ 892 893 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 894 { 895 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0}, 896 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0}, 897 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0}, 898 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0}, 899 ACPI_DMT_TERMINATOR 900 }; 901 902 /* 1: Reserved Memory Definition */ 903 904 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 905 { 906 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0}, 907 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0}, 908 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0}, 909 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0}, 910 ACPI_DMT_TERMINATOR 911 }; 912 913 /* 2: Root Port ATS Capability Definition */ 914 915 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] = 916 { 917 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0}, 918 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0}, 919 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0}, 920 ACPI_DMT_TERMINATOR 921 }; 922 923 /* 3: Remapping Hardware Static Affinity Structure */ 924 925 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] = 926 { 927 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0}, 928 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0}, 929 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 930 ACPI_DMT_TERMINATOR 931 }; 932 933 /* 4: ACPI Namespace Device Declaration Structure */ 934 935 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] = 936 { 937 {ACPI_DMT_UINT24, ACPI_DMAR4_OFFSET (Reserved[0]), "Reserved", 0}, 938 {ACPI_DMT_UINT8, ACPI_DMAR4_OFFSET (DeviceNumber), "Device Number", 0}, 939 {ACPI_DMT_STRING, ACPI_DMAR4_OFFSET (DeviceName[0]), "Device Name", 0}, 940 ACPI_DMT_TERMINATOR 941 }; 942 943 944 /******************************************************************************* 945 * 946 * DRTM - Dynamic Root of Trust for Measurement table 947 * 948 ******************************************************************************/ 949 950 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = 951 { 952 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryBaseAddress), "Entry Base Address", 0}, 953 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryLength), "Entry Length", 0}, 954 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (EntryAddress32), "Entry 32", 0}, 955 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryAddress64), "Entry 64", 0}, 956 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ExitAddress), "Exit Address", 0}, 957 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (LogAreaAddress), "Log Area Start", 0}, 958 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (LogAreaLength), "Log Area Length", 0}, 959 {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ArchDependentAddress), "Arch Dependent Address", 0}, 960 {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (Flags), "Flags (decoded below)", 0}, 961 {ACPI_DMT_FLAG0, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Namespace in TCB", 0}, 962 {ACPI_DMT_FLAG1, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on S3 Resume", 0}, 963 {ACPI_DMT_FLAG2, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on DLME_Exit", 0}, 964 {ACPI_DMT_FLAG3, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "PCR_Authorities Changed", 0}, 965 ACPI_DMT_TERMINATOR 966 }; 967 968 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[] = 969 { 970 {ACPI_DMT_UINT32, ACPI_DRTM0_OFFSET (ValidatedTableCount), "Validated Table Count", DT_COUNT}, 971 ACPI_DMT_TERMINATOR 972 }; 973 974 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[] = 975 { 976 {ACPI_DMT_UINT64, 0, "Table Address", DT_OPTIONAL}, 977 ACPI_DMT_TERMINATOR 978 }; 979 980 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[] = 981 { 982 {ACPI_DMT_UINT32, ACPI_DRTM1_OFFSET (ResourceCount), "Resource Count", DT_COUNT}, 983 ACPI_DMT_TERMINATOR 984 }; 985 986 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[] = 987 { 988 {ACPI_DMT_UINT56, ACPI_DRTM1a_OFFSET (Size[0]), "Size", DT_OPTIONAL}, 989 {ACPI_DMT_UINT8, ACPI_DRTM1a_OFFSET (Type), "Type", 0}, 990 {ACPI_DMT_FLAG0, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Resource Type", 0}, 991 {ACPI_DMT_FLAG7, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Protections", 0}, 992 {ACPI_DMT_UINT64, ACPI_DRTM1a_OFFSET (Address), "Address", 0}, 993 ACPI_DMT_TERMINATOR 994 }; 995 996 ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[] = 997 { 998 {ACPI_DMT_UINT32, ACPI_DRTM2_OFFSET (DpsIdLength), "DLME Platform Id Length", DT_COUNT}, 999 {ACPI_DMT_BUF16, ACPI_DRTM2_OFFSET (DpsId), "DLME Platform Id", DT_COUNT}, 1000 ACPI_DMT_TERMINATOR 1001 }; 1002 1003 1004 /******************************************************************************* 1005 * 1006 * ECDT - Embedded Controller Boot Resources Table 1007 * 1008 ******************************************************************************/ 1009 1010 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 1011 { 1012 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0}, 1013 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0}, 1014 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0}, 1015 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0}, 1016 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0}, 1017 ACPI_DMT_TERMINATOR 1018 }; 1019 1020 1021 /******************************************************************************* 1022 * 1023 * EINJ - Error Injection table 1024 * 1025 ******************************************************************************/ 1026 1027 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] = 1028 { 1029 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0}, 1030 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0}, 1031 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0}, 1032 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0}, 1033 ACPI_DMT_TERMINATOR 1034 }; 1035 1036 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] = 1037 { 1038 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0}, 1039 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0}, 1040 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1041 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 1042 1043 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0}, 1044 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0}, 1045 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0}, 1046 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0}, 1047 ACPI_DMT_TERMINATOR 1048 }; 1049 1050 1051 /******************************************************************************* 1052 * 1053 * ERST - Error Record Serialization table 1054 * 1055 ******************************************************************************/ 1056 1057 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] = 1058 { 1059 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0}, 1060 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0}, 1061 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0}, 1062 ACPI_DMT_TERMINATOR 1063 }; 1064 1065 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] = 1066 { 1067 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0}, 1068 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0}, 1069 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1070 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0}, 1071 1072 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0}, 1073 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0}, 1074 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0}, 1075 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0}, 1076 ACPI_DMT_TERMINATOR 1077 }; 1078 1079 1080 /******************************************************************************* 1081 * 1082 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1083 * 1084 ******************************************************************************/ 1085 1086 /* Main table consists of only the standard ACPI header - subtables follow */ 1087 1088 /* FPDT subtable header */ 1089 1090 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[] = 1091 { 1092 {ACPI_DMT_UINT16, ACPI_FPDTH_OFFSET (Type), "Subtable Type", 0}, 1093 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Length), "Length", DT_LENGTH}, 1094 {ACPI_DMT_UINT8, ACPI_FPDTH_OFFSET (Revision), "Revision", 0}, 1095 ACPI_DMT_TERMINATOR 1096 }; 1097 1098 /* 0: Firmware Basic Boot Performance Record */ 1099 1100 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[] = 1101 { 1102 {ACPI_DMT_UINT32, ACPI_FPDT0_OFFSET (Reserved), "Reserved", 0}, 1103 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "FPDT Boot Record Address", 0}, 1104 ACPI_DMT_TERMINATOR 1105 }; 1106 1107 /* 1: S3 Performance Table Pointer Record */ 1108 1109 ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt1[] = 1110 { 1111 {ACPI_DMT_UINT32, ACPI_FPDT1_OFFSET (Reserved), "Reserved", 0}, 1112 {ACPI_DMT_UINT64, ACPI_FPDT1_OFFSET (Address), "S3PT Record Address", 0}, 1113 ACPI_DMT_TERMINATOR 1114 }; 1115 1116 #if 0 1117 /* Boot Performance Record, not supported at this time. */ 1118 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ResetEnd), "Reset End", 0}, 1119 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (LoadStart), "Load Image Start", 0}, 1120 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (StartupStart), "Start Image Start", 0}, 1121 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesEntry), "Exit Services Entry", 0}, 1122 {ACPI_DMT_UINT64, ACPI_FPDT0_OFFSET (ExitServicesExit), "Exit Services Exit", 0}, 1123 #endif 1124 1125 /******************************************************************************* 1126 * 1127 * GTDT - Generic Timer Description Table 1128 * 1129 ******************************************************************************/ 1130 1131 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt[] = 1132 { 1133 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterBlockAddresss), "Counter Block Address", 0}, 1134 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (Reserved), "Reserved", 0}, 1135 ACPI_DMT_NEW_LINE, 1136 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Interrupt), "Secure EL1 Interrupt", 0}, 1137 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (SecureEl1Flags), "EL1 Flags (decoded below)", DT_FLAG}, 1138 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Trigger Mode", 0}, 1139 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Polarity", 0}, 1140 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (SecureEl1Flags,0), "Always On", 0}, 1141 ACPI_DMT_NEW_LINE, 1142 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Interrupt), "Non-Secure EL1 Interrupt", 0}, 1143 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl1Flags), "NEL1 Flags (decoded below)", DT_FLAG}, 1144 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Trigger Mode", 0}, 1145 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Polarity", 0}, 1146 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl1Flags,0),"Always On", 0}, 1147 ACPI_DMT_NEW_LINE, 1148 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1149 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (VirtualTimerFlags), "VT Flags (decoded below)", DT_FLAG}, 1150 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Trigger Mode", 0}, 1151 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Polarity", 0}, 1152 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (VirtualTimerFlags,0),"Always On", 0}, 1153 ACPI_DMT_NEW_LINE, 1154 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Interrupt), "Non-Secure EL2 Interrupt", 0}, 1155 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (NonSecureEl2Flags), "NEL2 Flags (decoded below)", DT_FLAG}, 1156 {ACPI_DMT_FLAG0, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Trigger Mode", 0}, 1157 {ACPI_DMT_FLAG1, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Polarity", 0}, 1158 {ACPI_DMT_FLAG2, ACPI_GTDT_FLAG_OFFSET (NonSecureEl2Flags,0),"Always On", 0}, 1159 {ACPI_DMT_UINT64, ACPI_GTDT_OFFSET (CounterReadBlockAddress), "Counter Read Block Address", 0}, 1160 ACPI_DMT_NEW_LINE, 1161 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerCount), "Platform Timer Count", 0}, 1162 {ACPI_DMT_UINT32, ACPI_GTDT_OFFSET (PlatformTimerOffset), "Platform Timer Offset", 0}, 1163 ACPI_DMT_TERMINATOR 1164 }; 1165 1166 /* GTDT Subtable header (one per Subtable) */ 1167 1168 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdtHdr[] = 1169 { 1170 {ACPI_DMT_GTDT, ACPI_GTDTH_OFFSET (Type), "Subtable Type", 0}, 1171 {ACPI_DMT_UINT16, ACPI_GTDTH_OFFSET (Length), "Length", DT_LENGTH}, 1172 ACPI_DMT_TERMINATOR 1173 }; 1174 1175 /* GTDT Subtables */ 1176 1177 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0[] = 1178 { 1179 {ACPI_DMT_UINT8, ACPI_GTDT0_OFFSET (Reserved), "Reserved", 0}, 1180 {ACPI_DMT_UINT64, ACPI_GTDT0_OFFSET (BlockAddress), "Block Address", 0}, 1181 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerCount), "Timer Count", 0}, 1182 {ACPI_DMT_UINT32, ACPI_GTDT0_OFFSET (TimerOffset), "Timer Offset", 0}, 1183 ACPI_DMT_TERMINATOR 1184 }; 1185 1186 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt0a[] = 1187 { 1188 {ACPI_DMT_UINT8 , ACPI_GTDT0a_OFFSET (FrameNumber), "Frame Number", 0}, 1189 {ACPI_DMT_UINT24, ACPI_GTDT0a_OFFSET (Reserved[0]), "Reserved", 0}, 1190 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (BaseAddress), "Base Address", 0}, 1191 {ACPI_DMT_UINT64, ACPI_GTDT0a_OFFSET (El0BaseAddress), "EL0 Base Address", 0}, 1192 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1193 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (TimerFlags), "Timer Flags (decoded below)", 0}, 1194 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1195 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1196 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerInterrupt), "Virtual Timer Interrupt", 0}, 1197 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (VirtualTimerFlags), "Virtual Timer Flags (decoded below)", 0}, 1198 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Trigger Mode", 0}, 1199 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (VirtualTimerFlags,0), "Polarity", 0}, 1200 {ACPI_DMT_UINT32, ACPI_GTDT0a_OFFSET (CommonFlags), "Common Flags (decoded below)", 0}, 1201 {ACPI_DMT_FLAG0, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Secure", 0}, 1202 {ACPI_DMT_FLAG1, ACPI_GTDT0a_FLAG_OFFSET (CommonFlags,0), "Always On", 0}, 1203 ACPI_DMT_TERMINATOR 1204 }; 1205 1206 ACPI_DMTABLE_INFO AcpiDmTableInfoGtdt1[] = 1207 { 1208 {ACPI_DMT_UINT8, ACPI_GTDT1_OFFSET (Reserved), "Reserved", 0}, 1209 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (RefreshFrameAddress), "Refresh Frame Address", 0}, 1210 {ACPI_DMT_UINT64, ACPI_GTDT1_OFFSET (ControlFrameAddress), "Control Frame Address", 0}, 1211 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerInterrupt), "Timer Interrupt", 0}, 1212 {ACPI_DMT_UINT32, ACPI_GTDT1_OFFSET (TimerFlags), "Timer Flags (decoded below)", DT_FLAG}, 1213 {ACPI_DMT_FLAG0, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Trigger Mode", 0}, 1214 {ACPI_DMT_FLAG1, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Polarity", 0}, 1215 {ACPI_DMT_FLAG2, ACPI_GTDT1_FLAG_OFFSET (TimerFlags,0), "Security", 0}, 1216 ACPI_DMT_TERMINATOR 1217 }; 1218 1219 1220 /******************************************************************************* 1221 * 1222 * HEST - Hardware Error Source table 1223 * 1224 ******************************************************************************/ 1225 1226 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] = 1227 { 1228 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0}, 1229 ACPI_DMT_TERMINATOR 1230 }; 1231 1232 /* Common HEST structures for subtables */ 1233 1234 #define ACPI_DM_HEST_HEADER \ 1235 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \ 1236 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0} 1237 1238 #define ACPI_DM_HEST_AER \ 1239 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \ 1240 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \ 1241 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \ 1242 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \ 1243 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \ 1244 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \ 1245 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \ 1246 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \ 1247 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \ 1248 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \ 1249 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \ 1250 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \ 1251 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \ 1252 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \ 1253 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0} 1254 1255 1256 /* HEST Subtables */ 1257 1258 /* 0: IA32 Machine Check Exception */ 1259 1260 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] = 1261 { 1262 ACPI_DM_HEST_HEADER, 1263 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0}, 1264 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1265 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1266 1267 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0}, 1268 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1269 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1270 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0}, 1271 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0}, 1272 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1273 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0}, 1274 ACPI_DMT_TERMINATOR 1275 }; 1276 1277 /* 1: IA32 Corrected Machine Check */ 1278 1279 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] = 1280 { 1281 ACPI_DM_HEST_HEADER, 1282 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0}, 1283 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1284 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0}, 1285 1286 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0}, 1287 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1288 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1289 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0}, 1290 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0}, 1291 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0}, 1292 ACPI_DMT_TERMINATOR 1293 }; 1294 1295 /* 2: IA32 Non-Maskable Interrupt */ 1296 1297 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] = 1298 { 1299 ACPI_DM_HEST_HEADER, 1300 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0}, 1301 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1302 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1303 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1304 ACPI_DMT_TERMINATOR 1305 }; 1306 1307 /* 6: PCI Express Root Port AER */ 1308 1309 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] = 1310 { 1311 ACPI_DM_HEST_HEADER, 1312 ACPI_DM_HEST_AER, 1313 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0}, 1314 ACPI_DMT_TERMINATOR 1315 }; 1316 1317 /* 7: PCI Express AER (AER Endpoint) */ 1318 1319 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] = 1320 { 1321 ACPI_DM_HEST_HEADER, 1322 ACPI_DM_HEST_AER, 1323 ACPI_DMT_TERMINATOR 1324 }; 1325 1326 /* 8: PCI Express/PCI-X Bridge AER */ 1327 1328 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] = 1329 { 1330 ACPI_DM_HEST_HEADER, 1331 ACPI_DM_HEST_AER, 1332 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0}, 1333 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0}, 1334 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0}, 1335 ACPI_DMT_TERMINATOR 1336 }; 1337 1338 /* 9: Generic Hardware Error Source */ 1339 1340 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] = 1341 { 1342 ACPI_DM_HEST_HEADER, 1343 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1344 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0}, 1345 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0}, 1346 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1347 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1348 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1349 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1350 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0}, 1351 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1352 ACPI_DMT_TERMINATOR 1353 }; 1354 1355 /* 10: Generic Hardware Error Source - Version 2 */ 1356 1357 ACPI_DMTABLE_INFO AcpiDmTableInfoHest10[] = 1358 { 1359 ACPI_DM_HEST_HEADER, 1360 {ACPI_DMT_UINT16, ACPI_HEST10_OFFSET (RelatedSourceId), "Related Source Id", 0}, 1361 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Reserved), "Reserved", 0}, 1362 {ACPI_DMT_UINT8, ACPI_HEST10_OFFSET (Enabled), "Enabled", 0}, 1363 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0}, 1364 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0}, 1365 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0}, 1366 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ErrorStatusAddress), "Error Status Address", 0}, 1367 {ACPI_DMT_HESTNTFY, ACPI_HEST10_OFFSET (Notify), "Notify", 0}, 1368 {ACPI_DMT_UINT32, ACPI_HEST10_OFFSET (ErrorBlockLength), "Error Status Block Length", 0}, 1369 {ACPI_DMT_GAS, ACPI_HEST10_OFFSET (ReadAckRegister), "Read Ack Register", 0}, 1370 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckPreserve), "Read Ack Preserve", 0}, 1371 {ACPI_DMT_UINT64, ACPI_HEST10_OFFSET (ReadAckWrite), "Read Ack Write", 0}, 1372 ACPI_DMT_TERMINATOR 1373 }; 1374 1375 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] = 1376 { 1377 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0}, 1378 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH}, 1379 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0}, 1380 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0}, 1381 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0}, 1382 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0}, 1383 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0}, 1384 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0}, 1385 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0}, 1386 ACPI_DMT_TERMINATOR 1387 }; 1388 1389 1390 /* 1391 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1392 * ACPI_HEST_IA_CORRECTED structures. 1393 */ 1394 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] = 1395 { 1396 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0}, 1397 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0}, 1398 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0}, 1399 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0}, 1400 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0}, 1401 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0}, 1402 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0}, 1403 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0}, 1404 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0}, 1405 ACPI_DMT_TERMINATOR 1406 }; 1407 1408 1409 /******************************************************************************* 1410 * 1411 * HPET - High Precision Event Timer table 1412 * 1413 ******************************************************************************/ 1414 1415 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 1416 { 1417 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0}, 1418 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0}, 1419 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0}, 1420 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0}, 1421 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1422 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0}, 1423 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0}, 1424 ACPI_DMT_TERMINATOR 1425 }; 1426 1427 1428 /******************************************************************************* 1429 * 1430 * IORT - IO Remapping Table 1431 * 1432 ******************************************************************************/ 1433 1434 ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] = 1435 { 1436 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0}, 1437 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0}, 1438 {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0}, 1439 ACPI_DMT_TERMINATOR 1440 }; 1441 1442 /* Optional padding field */ 1443 1444 ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] = 1445 { 1446 {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL}, 1447 ACPI_DMT_TERMINATOR 1448 }; 1449 1450 /* Common Subtable header (one per Subtable) */ 1451 1452 ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] = 1453 { 1454 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 1455 {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 1456 {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 1457 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Reserved), "Reserved", 0}, 1458 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 1459 {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 1460 ACPI_DMT_TERMINATOR 1461 }; 1462 1463 ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] = 1464 { 1465 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL}, 1466 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0}, 1467 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0}, 1468 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0}, 1469 {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0}, 1470 {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0}, 1471 ACPI_DMT_TERMINATOR 1472 }; 1473 1474 ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] = 1475 { 1476 {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0}, 1477 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0}, 1478 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0}, 1479 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0}, 1480 {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0}, 1481 {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0}, 1482 {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0}, 1483 {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0}, 1484 {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0}, 1485 {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0}, 1486 ACPI_DMT_TERMINATOR 1487 }; 1488 1489 /* IORT subtables */ 1490 1491 /* 0x00: ITS Group */ 1492 1493 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] = 1494 { 1495 {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0}, 1496 ACPI_DMT_TERMINATOR 1497 }; 1498 1499 ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] = 1500 { 1501 {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL}, 1502 ACPI_DMT_TERMINATOR 1503 }; 1504 1505 /* 0x01: Named Component */ 1506 1507 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] = 1508 { 1509 {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0}, 1510 {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0}, 1511 {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 1512 {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0}, 1513 ACPI_DMT_TERMINATOR 1514 }; 1515 1516 ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] = 1517 { 1518 {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL}, 1519 ACPI_DMT_TERMINATOR 1520 }; 1521 1522 /* 0x02: PCI Root Complex */ 1523 1524 ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] = 1525 { 1526 {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0}, 1527 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0}, 1528 {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0}, 1529 ACPI_DMT_TERMINATOR 1530 }; 1531 1532 /* 0x03: SMMUv1/2 */ 1533 1534 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] = 1535 { 1536 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0}, 1537 {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0}, 1538 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0}, 1539 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0}, 1540 {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0}, 1541 {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0}, 1542 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0}, 1543 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0}, 1544 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0}, 1545 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0}, 1546 {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0}, 1547 ACPI_DMT_TERMINATOR 1548 }; 1549 1550 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] = 1551 { 1552 {ACPI_DMT_UINT64, 0, "SMMU_NSgIrpt Interrupt", 0}, 1553 {ACPI_DMT_UINT64, 0, "SMMU_NSgCfgIrpt Interrupt", 0}, 1554 ACPI_DMT_TERMINATOR 1555 }; 1556 1557 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] = 1558 { 1559 {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL}, 1560 ACPI_DMT_TERMINATOR 1561 }; 1562 1563 ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] = 1564 { 1565 {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL}, 1566 ACPI_DMT_TERMINATOR 1567 }; 1568 1569 /* 0x04: SMMUv3 */ 1570 1571 ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] = 1572 { 1573 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0}, 1574 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0}, 1575 {ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0}, 1576 {ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0}, 1577 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0}, 1578 {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0}, 1579 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0}, 1580 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0}, 1581 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0}, 1582 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0}, 1583 {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0}, 1584 ACPI_DMT_TERMINATOR 1585 }; 1586 1587 /******************************************************************************* 1588 * 1589 * IVRS - I/O Virtualization Reporting Structure 1590 * 1591 ******************************************************************************/ 1592 1593 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 1594 { 1595 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 1596 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 1597 ACPI_DMT_TERMINATOR 1598 }; 1599 1600 /* Common Subtable header (one per Subtable) */ 1601 1602 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 1603 { 1604 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 1605 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 1606 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 1607 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 1608 ACPI_DMT_TERMINATOR 1609 }; 1610 1611 /* IVRS subtables */ 1612 1613 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 1614 1615 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 1616 { 1617 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 1618 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 1619 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 1620 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 1621 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 1622 ACPI_DMT_TERMINATOR 1623 }; 1624 1625 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 1626 1627 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 1628 { 1629 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 1630 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 1631 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 1632 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 1633 ACPI_DMT_TERMINATOR 1634 }; 1635 1636 /* Device entry header for IVHD block */ 1637 1638 #define ACPI_DMT_IVRS_DE_HEADER \ 1639 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 1640 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 1641 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 1642 1643 /* 4-byte device entry */ 1644 1645 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 1646 { 1647 ACPI_DMT_IVRS_DE_HEADER, 1648 {ACPI_DMT_EXIT, 0, NULL, 0}, 1649 }; 1650 1651 /* 8-byte device entry */ 1652 1653 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 1654 { 1655 ACPI_DMT_IVRS_DE_HEADER, 1656 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 1657 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 1658 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 1659 ACPI_DMT_TERMINATOR 1660 }; 1661 1662 /* 8-byte device entry */ 1663 1664 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 1665 { 1666 ACPI_DMT_IVRS_DE_HEADER, 1667 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 1668 ACPI_DMT_TERMINATOR 1669 }; 1670 1671 /* 8-byte device entry */ 1672 1673 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 1674 { 1675 ACPI_DMT_IVRS_DE_HEADER, 1676 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 1677 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 1678 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 1679 ACPI_DMT_TERMINATOR 1680 }; 1681 1682 1683 /******************************************************************************* 1684 * 1685 * LPIT - Low Power Idle Table 1686 * 1687 ******************************************************************************/ 1688 1689 /* Main table consists only of the standard ACPI table header */ 1690 1691 /* Common Subtable header (one per Subtable) */ 1692 1693 ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] = 1694 { 1695 {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0}, 1696 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH}, 1697 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0}, 1698 {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0}, 1699 {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1700 {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0}, 1701 {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0}, 1702 ACPI_DMT_TERMINATOR 1703 }; 1704 1705 /* LPIT Subtables */ 1706 1707 /* 0: Native C-state */ 1708 1709 ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = 1710 { 1711 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0}, 1712 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0}, 1713 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0}, 1714 {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0}, 1715 {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0}, 1716 ACPI_DMT_TERMINATOR 1717 }; 1718 1719 1720 /******************************************************************************* 1721 * 1722 * MADT - Multiple APIC Description Table and subtables 1723 * 1724 ******************************************************************************/ 1725 1726 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 1727 { 1728 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 1729 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1730 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 1731 ACPI_DMT_TERMINATOR 1732 }; 1733 1734 /* Common Subtable header (one per Subtable) */ 1735 1736 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 1737 { 1738 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 1739 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 1740 ACPI_DMT_TERMINATOR 1741 }; 1742 1743 /* MADT Subtables */ 1744 1745 /* 0: processor APIC */ 1746 1747 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 1748 { 1749 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 1750 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 1751 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1752 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1753 ACPI_DMT_TERMINATOR 1754 }; 1755 1756 /* 1: IO APIC */ 1757 1758 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 1759 { 1760 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 1761 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 1762 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 1763 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 1764 ACPI_DMT_TERMINATOR 1765 }; 1766 1767 /* 2: Interrupt Override */ 1768 1769 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 1770 { 1771 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 1772 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 1773 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 1774 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1775 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1776 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1777 ACPI_DMT_TERMINATOR 1778 }; 1779 1780 /* 3: NMI Sources */ 1781 1782 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 1783 { 1784 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1785 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1786 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1787 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 1788 ACPI_DMT_TERMINATOR 1789 }; 1790 1791 /* 4: Local APIC NMI */ 1792 1793 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 1794 { 1795 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 1796 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1797 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1798 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1799 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 1800 ACPI_DMT_TERMINATOR 1801 }; 1802 1803 /* 5: Address Override */ 1804 1805 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 1806 { 1807 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 1808 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 1809 ACPI_DMT_TERMINATOR 1810 }; 1811 1812 /* 6: I/O Sapic */ 1813 1814 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 1815 { 1816 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 1817 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 1818 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1819 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 1820 ACPI_DMT_TERMINATOR 1821 }; 1822 1823 /* 7: Local Sapic */ 1824 1825 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 1826 { 1827 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 1828 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 1829 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 1830 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 1831 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1832 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1833 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 1834 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 1835 ACPI_DMT_TERMINATOR 1836 }; 1837 1838 /* 8: Platform Interrupt Source */ 1839 1840 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 1841 { 1842 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1843 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1844 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1845 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 1846 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 1847 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 1848 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 1849 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 1850 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1851 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 1852 ACPI_DMT_TERMINATOR 1853 }; 1854 1855 /* 9: Processor Local X2_APIC (ACPI 4.0) */ 1856 1857 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 1858 { 1859 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 1860 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 1861 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 1862 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 1863 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 1864 ACPI_DMT_TERMINATOR 1865 }; 1866 1867 /* 10: Local X2_APIC NMI (ACPI 4.0) */ 1868 1869 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 1870 { 1871 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 1872 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 1873 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 1874 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 1875 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 1876 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 1877 ACPI_DMT_TERMINATOR 1878 }; 1879 1880 /* 11: Generic Interrupt Controller (ACPI 5.0) */ 1881 1882 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 1883 { 1884 {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 1885 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0}, 1886 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 1887 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1888 {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 1889 {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0}, 1890 {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0}, 1891 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 1892 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 1893 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 1894 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 1895 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0}, 1896 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0}, 1897 {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, 1898 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, 1899 {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, 1900 {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0}, 1901 {ACPI_DMT_UINT24, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0}, 1902 ACPI_DMT_TERMINATOR 1903 }; 1904 1905 /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 1906 1907 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 1908 { 1909 {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 1910 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 1911 {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 1912 {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 1913 {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0}, 1914 {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0}, 1915 ACPI_DMT_TERMINATOR 1916 }; 1917 1918 /* 13: Generic MSI Frame (ACPI 5.1) */ 1919 1920 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] = 1921 { 1922 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0}, 1923 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0}, 1924 {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0}, 1925 {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1926 {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0}, 1927 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0}, 1928 {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0}, 1929 ACPI_DMT_TERMINATOR 1930 }; 1931 1932 /* 14: Generic Redistributor (ACPI 5.1) */ 1933 1934 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = 1935 { 1936 {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0}, 1937 {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0}, 1938 {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0}, 1939 ACPI_DMT_TERMINATOR 1940 }; 1941 1942 /* 15: Generic Translator (ACPI 6.0) */ 1943 1944 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] = 1945 { 1946 {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0}, 1947 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0}, 1948 {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0}, 1949 {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0}, 1950 ACPI_DMT_TERMINATOR 1951 }; 1952 1953 /******************************************************************************* 1954 * 1955 * MCFG - PCI Memory Mapped Configuration table and Subtable 1956 * 1957 ******************************************************************************/ 1958 1959 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 1960 { 1961 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 1962 ACPI_DMT_TERMINATOR 1963 }; 1964 1965 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 1966 { 1967 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 1968 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 1969 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 1970 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 1971 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 1972 ACPI_DMT_TERMINATOR 1973 }; 1974 1975 1976 /******************************************************************************* 1977 * 1978 * MCHI - Management Controller Host Interface table 1979 * 1980 ******************************************************************************/ 1981 1982 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 1983 { 1984 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 1985 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 1986 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 1987 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 1988 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 1989 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 1990 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 1991 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 1992 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 1993 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 1994 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 1995 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 1996 ACPI_DMT_TERMINATOR 1997 }; 1998 1999 2000 /******************************************************************************* 2001 * 2002 * MPST - Memory Power State Table 2003 * 2004 ******************************************************************************/ 2005 2006 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 2007 { 2008 {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 2009 {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 2010 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 2011 {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 2012 ACPI_DMT_TERMINATOR 2013 }; 2014 2015 /* MPST subtables */ 2016 2017 /* 0: Memory Power Node Structure */ 2018 2019 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 2020 { 2021 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2022 {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 2023 {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 2024 {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 2025 2026 {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 2027 {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 2028 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 2029 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 2030 {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 2031 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 2032 {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 2033 ACPI_DMT_TERMINATOR 2034 }; 2035 2036 /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 2037 2038 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 2039 { 2040 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 2041 {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 2042 ACPI_DMT_TERMINATOR 2043 }; 2044 2045 /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 2046 2047 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 2048 { 2049 {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 2050 ACPI_DMT_TERMINATOR 2051 }; 2052 2053 /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 2054 2055 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 2056 { 2057 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 2058 {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 2059 ACPI_DMT_TERMINATOR 2060 }; 2061 2062 /* 02: Memory Power State Characteristics Structure */ 2063 2064 ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 2065 { 2066 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 2067 {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2068 {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 2069 {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 2070 {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 2071 2072 {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 2073 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 2074 {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 2075 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 2076 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 2077 ACPI_DMT_TERMINATOR 2078 }; 2079 2080 2081 /******************************************************************************* 2082 * 2083 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 2084 * 2085 ******************************************************************************/ 2086 2087 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 2088 { 2089 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 2090 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 2091 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 2092 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 2093 ACPI_DMT_TERMINATOR 2094 }; 2095 2096 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 2097 2098 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 2099 { 2100 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 2101 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 2102 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 2103 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 2104 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 2105 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 2106 ACPI_DMT_TERMINATOR 2107 }; 2108 2109 2110 /******************************************************************************* 2111 * 2112 * MTMR - MID Timer Table 2113 * 2114 ******************************************************************************/ 2115 2116 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[] = 2117 { 2118 ACPI_DMT_TERMINATOR 2119 }; 2120 2121 /* MTMR Subtables - MTMR Entry */ 2122 2123 ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] = 2124 { 2125 {ACPI_DMT_GAS, ACPI_MTMR0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 2126 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Frequency), "Frequency", 0}, 2127 {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Irq), "IRQ", 0}, 2128 ACPI_DMT_TERMINATOR 2129 }; 2130 2131 2132 /******************************************************************************* 2133 * 2134 * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0) 2135 * 2136 ******************************************************************************/ 2137 2138 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] = 2139 { 2140 {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0}, 2141 ACPI_DMT_TERMINATOR 2142 }; 2143 2144 /* Common Subtable header */ 2145 2146 ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] = 2147 { 2148 {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0}, 2149 {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH}, 2150 ACPI_DMT_TERMINATOR 2151 }; 2152 2153 /* 0: System Physical Address Range Structure */ 2154 2155 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] = 2156 { 2157 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0}, 2158 {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2159 {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0}, 2160 {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0}, 2161 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0}, 2162 {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2163 {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Address Range GUID", 0}, 2164 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0}, 2165 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0}, 2166 {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0}, 2167 ACPI_DMT_TERMINATOR 2168 }; 2169 2170 /* 1: Memory Device to System Address Range Map Structure */ 2171 2172 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] = 2173 { 2174 {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0}, 2175 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0}, 2176 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0}, 2177 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0}, 2178 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0}, 2179 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0}, 2180 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0}, 2181 {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0}, 2182 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0}, 2183 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0}, 2184 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG}, 2185 {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0}, 2186 {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0}, 2187 {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0}, 2188 {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0}, 2189 {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0}, 2190 {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0}, 2191 {ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0}, 2192 {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0}, 2193 ACPI_DMT_TERMINATOR 2194 }; 2195 2196 /* 2: Interleave Structure */ 2197 2198 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] = 2199 { 2200 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0}, 2201 {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0}, 2202 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0}, 2203 {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0}, 2204 ACPI_DMT_TERMINATOR 2205 }; 2206 2207 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] = 2208 { 2209 {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL}, 2210 ACPI_DMT_TERMINATOR 2211 }; 2212 2213 /* 3: SMBIOS Management Information Structure */ 2214 2215 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] = 2216 { 2217 {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0}, 2218 ACPI_DMT_TERMINATOR 2219 }; 2220 2221 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] = 2222 { 2223 {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL}, 2224 ACPI_DMT_TERMINATOR 2225 }; 2226 2227 /* 4: NVDIMM Control Region Structure */ 2228 2229 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] = 2230 { 2231 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0}, 2232 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0}, 2233 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0}, 2234 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0}, 2235 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0}, 2236 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0}, 2237 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0}, 2238 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0}, 2239 {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0}, 2240 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0}, 2241 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0}, 2242 {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0}, 2243 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0}, 2244 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0}, 2245 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0}, 2246 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0}, 2247 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0}, 2248 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0}, 2249 {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0}, 2250 {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG}, 2251 {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0}, 2252 {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0}, 2253 ACPI_DMT_TERMINATOR 2254 }; 2255 2256 /* 5: NVDIMM Block Data Window Region Structure */ 2257 2258 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] = 2259 { 2260 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0}, 2261 {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0}, 2262 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0}, 2263 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0}, 2264 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0}, 2265 {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0}, 2266 ACPI_DMT_TERMINATOR 2267 }; 2268 2269 /* 6: Flush Hint Address Structure */ 2270 2271 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] = 2272 { 2273 {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0}, 2274 {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0}, 2275 {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0}, 2276 ACPI_DMT_TERMINATOR 2277 }; 2278 2279 ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] = 2280 { 2281 {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL}, 2282 ACPI_DMT_TERMINATOR 2283 }; 2284 2285 2286 /******************************************************************************* 2287 * 2288 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2289 * 2290 ******************************************************************************/ 2291 2292 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 2293 { 2294 {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2295 {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Doorbell", 0}, 2296 {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 2297 ACPI_DMT_TERMINATOR 2298 }; 2299 2300 /* PCCT subtables */ 2301 2302 ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 2303 { 2304 {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 2305 {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 2306 ACPI_DMT_TERMINATOR 2307 }; 2308 2309 /* 0: Generic Communications Subspace */ 2310 2311 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 2312 { 2313 {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 2314 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 2315 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 2316 {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 2317 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 2318 {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 2319 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 2320 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 2321 {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 2322 ACPI_DMT_TERMINATOR 2323 }; 2324 2325 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2326 2327 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] = 2328 { 2329 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (DoorbellInterrupt), "Doorbell Interrupt", 0}, 2330 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 2331 {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0}, 2332 {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0}, 2333 {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0}, 2334 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0}, 2335 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0}, 2336 {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 2337 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0}, 2338 {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0}, 2339 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0}, 2340 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 2341 {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 2342 ACPI_DMT_TERMINATOR 2343 }; 2344 2345 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2346 2347 ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] = 2348 { 2349 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (DoorbellInterrupt), "Doorbell Interrupt", 0}, 2350 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 2351 {ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0}, 2352 {ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0}, 2353 {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0}, 2354 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0}, 2355 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0}, 2356 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 2357 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0}, 2358 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0}, 2359 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0}, 2360 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 2361 {ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 2362 {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellAckRegister), "Doorbell ACK Register", 0}, 2363 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 2364 {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0}, 2365 ACPI_DMT_TERMINATOR 2366 }; 2367 2368 2369 /******************************************************************************* 2370 * 2371 * PMTT - Platform Memory Topology Table 2372 * 2373 ******************************************************************************/ 2374 2375 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 2376 { 2377 {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (Reserved), "Reserved", 0}, 2378 ACPI_DMT_TERMINATOR 2379 }; 2380 2381 /* Common Subtable header (one per Subtable) */ 2382 2383 ACPI_DMTABLE_INFO AcpiDmTableInfoPmttHdr[] = 2384 { 2385 {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, 2386 {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, 2387 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, 2388 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2389 {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, 2390 {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, 2391 {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, 2392 {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, 2393 ACPI_DMT_TERMINATOR 2394 }; 2395 2396 /* PMTT Subtables */ 2397 2398 /* 0: Socket */ 2399 2400 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 2401 { 2402 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 2403 {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 2404 ACPI_DMT_TERMINATOR 2405 }; 2406 2407 /* 1: Memory Controller */ 2408 2409 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 2410 { 2411 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0}, 2412 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0}, 2413 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadBandwidth), "Read Bandwidth", 0}, 2414 {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteBandwidth), "Write Bandwidth", 0}, 2415 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (AccessWidth), "Access Width", 0}, 2416 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Alignment), "Alignment", 0}, 2417 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 2418 {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (DomainCount), "Domain Count", 0}, 2419 ACPI_DMT_TERMINATOR 2420 }; 2421 2422 /* 1a: Proximity Domain */ 2423 2424 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1a[] = 2425 { 2426 {ACPI_DMT_UINT32, ACPI_PMTT1A_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2427 ACPI_DMT_TERMINATOR 2428 }; 2429 2430 /* 2: Physical Component */ 2431 2432 ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 2433 { 2434 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (ComponentId), "Component ID", 0}, 2435 {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (Reserved), "Reserved", 0}, 2436 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (MemorySize), "Memory Size", 0}, 2437 {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 2438 ACPI_DMT_TERMINATOR 2439 }; 2440 2441 2442 /******************************************************************************* 2443 * 2444 * RASF - RAS Feature table 2445 * 2446 ******************************************************************************/ 2447 2448 ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] = 2449 { 2450 {ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0}, 2451 ACPI_DMT_TERMINATOR 2452 }; 2453 2454 /******************************************************************************* 2455 * 2456 * S3PT - S3 Performance Table 2457 * 2458 ******************************************************************************/ 2459 2460 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 2461 { 2462 {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 2463 {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 2464 ACPI_DMT_TERMINATOR 2465 }; 2466 2467 /* S3PT subtable header */ 2468 2469 ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 2470 { 2471 {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 2472 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 2473 {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 2474 ACPI_DMT_TERMINATOR 2475 }; 2476 2477 /* 0: Basic S3 Resume Performance Record */ 2478 2479 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 2480 { 2481 {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 2482 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 2483 {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 2484 ACPI_DMT_TERMINATOR 2485 }; 2486 2487 /* 1: Basic S3 Suspend Performance Record */ 2488 2489 ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 2490 { 2491 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 2492 {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 2493 ACPI_DMT_TERMINATOR 2494 }; 2495 2496 2497 /******************************************************************************* 2498 * 2499 * SBST - Smart Battery Specification Table 2500 * 2501 ******************************************************************************/ 2502 2503 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 2504 { 2505 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 2506 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 2507 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 2508 ACPI_DMT_TERMINATOR 2509 }; 2510 2511 2512 /******************************************************************************* 2513 * 2514 * SLIC - Software Licensing Description Table. This table contains the standard 2515 * ACPI header followed by proprietary data structures 2516 * 2517 ******************************************************************************/ 2518 2519 /* Single subtable, a proprietary format, so treat it as a buffer */ 2520 2521 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] = 2522 { 2523 {ACPI_DMT_RAW_BUFFER, 0, "Software Licensing Structure", 0}, 2524 ACPI_DMT_TERMINATOR 2525 }; 2526 2527 2528 /******************************************************************************* 2529 * 2530 * SLIT - System Locality Information Table 2531 * 2532 ******************************************************************************/ 2533 2534 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 2535 { 2536 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0}, 2537 ACPI_DMT_TERMINATOR 2538 }; 2539 2540 2541 /******************************************************************************* 2542 * 2543 * SPCR - Serial Port Console Redirection table 2544 * 2545 ******************************************************************************/ 2546 2547 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 2548 { 2549 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0}, 2550 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0}, 2551 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0}, 2552 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0}, 2553 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0}, 2554 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0}, 2555 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0}, 2556 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0}, 2557 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0}, 2558 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0}, 2559 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0}, 2560 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 2561 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0}, 2562 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2563 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0}, 2564 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0}, 2565 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0}, 2566 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0}, 2567 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0}, 2568 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0}, 2569 ACPI_DMT_TERMINATOR 2570 }; 2571 2572 2573 /******************************************************************************* 2574 * 2575 * SPMI - Server Platform Management Interface table 2576 * 2577 ******************************************************************************/ 2578 2579 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 2580 { 2581 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0}, 2582 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", DT_NON_ZERO}, /* Value must be 1 */ 2583 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0}, 2584 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0}, 2585 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0}, 2586 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0}, 2587 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0}, 2588 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0}, 2589 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0}, 2590 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0}, 2591 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0}, 2592 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0}, 2593 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0}, 2594 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0}, 2595 ACPI_DMT_TERMINATOR 2596 }; 2597 2598 2599 /******************************************************************************* 2600 * 2601 * SRAT - System Resource Affinity Table and Subtables 2602 * 2603 ******************************************************************************/ 2604 2605 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 2606 { 2607 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0}, 2608 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0}, 2609 ACPI_DMT_TERMINATOR 2610 }; 2611 2612 /* Common Subtable header (one per Subtable) */ 2613 2614 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] = 2615 { 2616 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0}, 2617 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH}, 2618 ACPI_DMT_TERMINATOR 2619 }; 2620 2621 /* SRAT Subtables */ 2622 2623 /* 0: Processor Local APIC/SAPIC Affinity */ 2624 2625 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 2626 { 2627 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0}, 2628 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0}, 2629 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2630 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2631 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0}, 2632 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0}, 2633 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (ClockDomain), "Clock Domain", 0}, 2634 ACPI_DMT_TERMINATOR 2635 }; 2636 2637 /* 1: Memory Affinity */ 2638 2639 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 2640 { 2641 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2642 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0}, 2643 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0}, 2644 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0}, 2645 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0}, 2646 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2647 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2648 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0}, 2649 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0}, 2650 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0}, 2651 ACPI_DMT_TERMINATOR 2652 }; 2653 2654 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 2655 2656 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] = 2657 { 2658 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0}, 2659 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2660 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0}, 2661 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2662 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2663 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0}, 2664 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0}, 2665 ACPI_DMT_TERMINATOR 2666 }; 2667 2668 /* : GICC Affinity (ACPI 5.1) */ 2669 2670 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat3[] = 2671 { 2672 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ProximityDomain), "Proximity Domain", 0}, 2673 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (AcpiProcessorUid), "Acpi Processor UID", 0}, 2674 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2675 {ACPI_DMT_FLAG0, ACPI_SRAT3_FLAG_OFFSET (Flags,0), "Enabled", 0}, 2676 {ACPI_DMT_UINT32, ACPI_SRAT3_OFFSET (ClockDomain), "Clock Domain", 0}, 2677 ACPI_DMT_TERMINATOR 2678 }; 2679 2680 2681 /******************************************************************************* 2682 * 2683 * STAO - Status Override Table (_STA override) - ACPI 6.0 2684 * 2685 ******************************************************************************/ 2686 2687 ACPI_DMTABLE_INFO AcpiDmTableInfoStao[] = 2688 { 2689 {ACPI_DMT_UINT8, ACPI_STAO_OFFSET (IgnoreUart), "Ignore UART", 0}, 2690 ACPI_DMT_TERMINATOR 2691 }; 2692 2693 ACPI_DMTABLE_INFO AcpiDmTableInfoStaoStr[] = 2694 { 2695 {ACPI_DMT_STRING, 0, "Namepath", 0}, 2696 ACPI_DMT_TERMINATOR 2697 }; 2698 2699 2700 /******************************************************************************* 2701 * 2702 * TCPA - Trusted Computing Platform Alliance table (Client) 2703 * 2704 * NOTE: There are two versions of the table with the same signature -- 2705 * the client version and the server version. The common PlatformClass 2706 * field is used to differentiate the two types of tables. 2707 * 2708 ******************************************************************************/ 2709 2710 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaHdr[] = 2711 { 2712 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (PlatformClass), "Platform Class", 0}, 2713 ACPI_DMT_TERMINATOR 2714 }; 2715 2716 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaClient[] = 2717 { 2718 {ACPI_DMT_UINT32, ACPI_TCPA_CLIENT_OFFSET (MinimumLogLength), "Min Event Log Length", 0}, 2719 {ACPI_DMT_UINT64, ACPI_TCPA_CLIENT_OFFSET (LogAddress), "Event Log Address", 0}, 2720 ACPI_DMT_TERMINATOR 2721 }; 2722 2723 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpaServer[] = 2724 { 2725 {ACPI_DMT_UINT16, ACPI_TCPA_SERVER_OFFSET (Reserved), "Reserved", 0}, 2726 {ACPI_DMT_UINT64, ACPI_TCPA_SERVER_OFFSET (MinimumLogLength), "Min Event Log Length", 0}, 2727 {ACPI_DMT_UINT64, ACPI_TCPA_SERVER_OFFSET (LogAddress), "Event Log Address", 0}, 2728 {ACPI_DMT_UINT16, ACPI_TCPA_SERVER_OFFSET (SpecRevision), "Specification Revision", 0}, 2729 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Device Flags (decoded below)", DT_FLAG}, 2730 {ACPI_DMT_FLAG0, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Pci Device", 0}, 2731 {ACPI_DMT_FLAG1, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Bus is Pnp", 0}, 2732 {ACPI_DMT_FLAG2, ACPI_TCPA_SERVER_OFFSET (DeviceFlags), "Address Valid", 0}, 2733 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Interrupt Flags (decoded below)", DT_FLAG}, 2734 {ACPI_DMT_FLAG0, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Mode", 0}, 2735 {ACPI_DMT_FLAG1, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Polarity", 0}, 2736 {ACPI_DMT_FLAG2, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "GPE SCI Triggered", 0}, 2737 {ACPI_DMT_FLAG3, ACPI_TCPA_SERVER_OFFSET (InterruptFlags), "Global System Interrupt", 0}, 2738 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (GpeNumber), "Gpe Number", 0}, 2739 {ACPI_DMT_UINT24, ACPI_TCPA_SERVER_OFFSET (Reserved2[0]), "Reserved", 0}, 2740 {ACPI_DMT_UINT32, ACPI_TCPA_SERVER_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 2741 {ACPI_DMT_GAS, ACPI_TCPA_SERVER_OFFSET (Address), "Address", 0}, 2742 {ACPI_DMT_UINT32, ACPI_TCPA_SERVER_OFFSET (Reserved3), "Reserved", 0}, 2743 {ACPI_DMT_GAS, ACPI_TCPA_SERVER_OFFSET (ConfigAddress), "Configuration Address", 0}, 2744 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Group), "Pci Group", 0}, 2745 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Bus), "Pci Bus", 0}, 2746 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Device), "Pci Device", 0}, 2747 {ACPI_DMT_UINT8, ACPI_TCPA_SERVER_OFFSET (Function), "Pci Function", 0}, 2748 ACPI_DMT_TERMINATOR 2749 }; 2750 2751 2752 /******************************************************************************* 2753 * 2754 * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table 2755 * 2756 ******************************************************************************/ 2757 2758 ACPI_DMTABLE_INFO AcpiDmTableInfoTpm2[] = 2759 { 2760 {ACPI_DMT_UINT16, ACPI_TPM2_OFFSET (PlatformClass), "Platform Class", 0}, 2761 {ACPI_DMT_UINT16, ACPI_TPM2_OFFSET (Reserved), "Reserved", 0}, 2762 {ACPI_DMT_UINT64, ACPI_TPM2_OFFSET (ControlAddress), "Control Address", 0}, 2763 {ACPI_DMT_UINT32, ACPI_TPM2_OFFSET (StartMethod), "Start Method", 0}, 2764 ACPI_DMT_TERMINATOR 2765 }; 2766 2767 2768 /******************************************************************************* 2769 * 2770 * UEFI - UEFI Boot optimization Table 2771 * 2772 ******************************************************************************/ 2773 2774 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] = 2775 { 2776 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0}, 2777 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0}, 2778 ACPI_DMT_TERMINATOR 2779 }; 2780 2781 2782 /******************************************************************************* 2783 * 2784 * VRTC - Virtual Real Time Clock Table 2785 * 2786 ******************************************************************************/ 2787 2788 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc[] = 2789 { 2790 ACPI_DMT_TERMINATOR 2791 }; 2792 2793 /* VRTC Subtables - VRTC Entry */ 2794 2795 ACPI_DMTABLE_INFO AcpiDmTableInfoVrtc0[] = 2796 { 2797 {ACPI_DMT_GAS, ACPI_VRTC0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 2798 {ACPI_DMT_UINT32, ACPI_VRTC0_OFFSET (Irq), "IRQ", 0}, 2799 ACPI_DMT_TERMINATOR 2800 }; 2801 2802 2803 /******************************************************************************* 2804 * 2805 * WAET - Windows ACPI Emulated devices Table 2806 * 2807 ******************************************************************************/ 2808 2809 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] = 2810 { 2811 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2812 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0}, 2813 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0}, 2814 ACPI_DMT_TERMINATOR 2815 }; 2816 2817 2818 /******************************************************************************* 2819 * 2820 * WDAT - Watchdog Action Table 2821 * 2822 ******************************************************************************/ 2823 2824 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] = 2825 { 2826 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH}, 2827 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0}, 2828 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0}, 2829 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0}, 2830 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0}, 2831 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0}, 2832 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0}, 2833 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0}, 2834 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0}, 2835 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 2836 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0}, 2837 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0}, 2838 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0}, 2839 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0}, 2840 ACPI_DMT_TERMINATOR 2841 }; 2842 2843 /* WDAT Subtables - Watchdog Instruction Entries */ 2844 2845 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] = 2846 { 2847 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0}, 2848 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0}, 2849 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0}, 2850 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0}, 2851 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0}, 2852 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0}, 2853 ACPI_DMT_TERMINATOR 2854 }; 2855 2856 2857 /******************************************************************************* 2858 * 2859 * WDDT - Watchdog Description Table 2860 * 2861 ******************************************************************************/ 2862 2863 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] = 2864 { 2865 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0}, 2866 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0}, 2867 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2868 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0}, 2869 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0}, 2870 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0}, 2871 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0}, 2872 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0}, 2873 2874 /* Status Flags byte 0 */ 2875 2876 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0}, 2877 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0}, 2878 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0}, 2879 2880 /* Status Flags byte 1 */ 2881 2882 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0}, 2883 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0}, 2884 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0}, 2885 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0}, 2886 2887 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0}, 2888 2889 /* Capability Flags byte 0 */ 2890 2891 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0}, 2892 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0}, 2893 ACPI_DMT_TERMINATOR 2894 }; 2895 2896 2897 /******************************************************************************* 2898 * 2899 * WDRT - Watchdog Resource Table 2900 * 2901 ******************************************************************************/ 2902 2903 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 2904 { 2905 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0}, 2906 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0}, 2907 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0}, 2908 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0}, 2909 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0}, 2910 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0}, 2911 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0}, 2912 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0}, 2913 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0}, 2914 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0}, 2915 ACPI_DMT_TERMINATOR 2916 }; 2917 2918 2919 /******************************************************************************* 2920 * 2921 * WPBT - Windows Platform Environment Table (ACPI 6.0) 2922 * Version 1 2923 * 2924 * Conforms to "Windows Platform Binary Table (WPBT)" 29 November 2011 2925 * 2926 ******************************************************************************/ 2927 2928 ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt[] = 2929 { 2930 {ACPI_DMT_UINT32, ACPI_WPBT_OFFSET (HandoffSize), "Handoff Size", 0}, 2931 {ACPI_DMT_UINT64, ACPI_WPBT_OFFSET (HandoffAddress), "Handoff Address", 0}, 2932 {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Layout), "Layout", 0}, 2933 {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Type), "Type", 0}, 2934 {ACPI_DMT_UINT16, ACPI_WPBT_OFFSET (ArgumentsLength), "Arguments Length", 0}, 2935 ACPI_DMT_TERMINATOR 2936 }; 2937 2938 ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt0[] = 2939 { 2940 {ACPI_DMT_UNICODE, sizeof (ACPI_TABLE_WPBT), "Command-line Arguments", 0}, 2941 ACPI_DMT_TERMINATOR 2942 }; 2943 2944 2945 /******************************************************************************* 2946 * 2947 * XENV - Xen Environment table (ACPI 6.0) 2948 * 2949 ******************************************************************************/ 2950 2951 ACPI_DMTABLE_INFO AcpiDmTableInfoXenv[] = 2952 { 2953 {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableAddress), "Grant Table Address", 0}, 2954 {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableSize), "Grant Table Size", 0}, 2955 {ACPI_DMT_UINT32, ACPI_XENV_OFFSET (EventInterrupt), "Event Interrupt", 0}, 2956 {ACPI_DMT_UINT8, ACPI_XENV_OFFSET (EventFlags), "Event Flags", 0}, 2957 ACPI_DMT_TERMINATOR 2958 }; 2959 2960 2961 /*! [Begin] no source code translation */ 2962 2963 /* 2964 * Generic types (used in UEFI and custom tables) 2965 * 2966 * Examples: 2967 * 2968 * Buffer : cc 04 ff bb 2969 * UINT8 : 11 2970 * UINT16 : 1122 2971 * UINT24 : 112233 2972 * UINT32 : 11223344 2973 * UINT56 : 11223344556677 2974 * UINT64 : 1122334455667788 2975 * 2976 * String : "This is string" 2977 * Unicode : "This string encoded to Unicode" 2978 * 2979 * GUID : 11223344-5566-7788-99aa-bbccddeeff00 2980 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)" 2981 */ 2982 2983 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName) \ 2984 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR} 2985 2986 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] = 2987 { 2988 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"), 2989 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"), 2990 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"), 2991 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"), 2992 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT40, "UINT40"), 2993 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT48, "UINT48"), 2994 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"), 2995 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"), 2996 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"), 2997 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"), 2998 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"), 2999 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"), 3000 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"), 3001 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"), 3002 {ACPI_DMT_TERMINATOR} 3003 }; 3004 /*! [End] no source code translation !*/ 3005