1 /****************************************************************************** 2 * 3 * Module Name: dmtbinfo - Table info for non-AML tables 4 * $Revision: 1.13 $ 5 * 6 *****************************************************************************/ 7 8 /****************************************************************************** 9 * 10 * 1. Copyright Notice 11 * 12 * Some or all of this work - Copyright (c) 1999 - 2007, Intel Corp. 13 * All rights reserved. 14 * 15 * 2. License 16 * 17 * 2.1. This is your license from Intel Corp. under its intellectual property 18 * rights. You may have additional license terms from the party that provided 19 * you this software, covering your right to use that party's intellectual 20 * property rights. 21 * 22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23 * copy of the source code appearing in this file ("Covered Code") an 24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25 * base code distributed originally by Intel ("Original Intel Code") to copy, 26 * make derivatives, distribute, use and display any portion of the Covered 27 * Code in any form, with the right to sublicense such rights; and 28 * 29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30 * license (with the right to sublicense), under only those claims of Intel 31 * patents that are infringed by the Original Intel Code, to make, use, sell, 32 * offer to sell, and import the Covered Code and derivative works thereof 33 * solely to the minimum extent necessary to exercise the above copyright 34 * license, and in no event shall the patent license extend to any additions 35 * to or modifications of the Original Intel Code. No other license or right 36 * is granted directly or by implication, estoppel or otherwise; 37 * 38 * The above copyright and patent license is granted only if the following 39 * conditions are met: 40 * 41 * 3. Conditions 42 * 43 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44 * Redistribution of source code of any substantial portion of the Covered 45 * Code or modification with rights to further distribute source must include 46 * the above Copyright Notice, the above License, this list of Conditions, 47 * and the following Disclaimer and Export Compliance provision. In addition, 48 * Licensee must cause all Covered Code to which Licensee contributes to 49 * contain a file documenting the changes Licensee made to create that Covered 50 * Code and the date of any change. Licensee must include in that file the 51 * documentation of any changes made by any predecessor Licensee. Licensee 52 * must include a prominent statement that the modification is derived, 53 * directly or indirectly, from Original Intel Code. 54 * 55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56 * Redistribution of source code of any substantial portion of the Covered 57 * Code or modification without rights to further distribute source must 58 * include the following Disclaimer and Export Compliance provision in the 59 * documentation and/or other materials provided with distribution. In 60 * addition, Licensee may not authorize further sublicense of source of any 61 * portion of the Covered Code, and must include terms to the effect that the 62 * license from Licensee to its licensee is limited to the intellectual 63 * property embodied in the software Licensee provides to its licensee, and 64 * not to intellectual property embodied in modifications its licensee may 65 * make. 66 * 67 * 3.3. Redistribution of Executable. Redistribution in executable form of any 68 * substantial portion of the Covered Code or modification must reproduce the 69 * above Copyright Notice, and the following Disclaimer and Export Compliance 70 * provision in the documentation and/or other materials provided with the 71 * distribution. 72 * 73 * 3.4. Intel retains all right, title, and interest in and to the Original 74 * Intel Code. 75 * 76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77 * Intel shall be used in advertising or otherwise to promote the sale, use or 78 * other dealings in products derived from or relating to the Covered Code 79 * without prior written authorization from Intel. 80 * 81 * 4. Disclaimer and Export Compliance 82 * 83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89 * PARTICULAR PURPOSE. 90 * 91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98 * LIMITED REMEDY. 99 * 100 * 4.3. Licensee shall not export, either directly or indirectly, any of this 101 * software or system incorporating such software without first obtaining any 102 * required license or other approval from the U. S. Department of Commerce or 103 * any other agency or department of the United States Government. In the 104 * event Licensee exports any such software from the United States or 105 * re-exports any such software from a foreign destination, Licensee shall 106 * ensure that the distribution and export/re-export of the software is in 107 * compliance with all laws, regulations, orders, or other restrictions of the 108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109 * any of its subsidiaries will export/re-export any technical data, process, 110 * software, or service, directly or indirectly, to any country for which the 111 * United States government or any agency thereof requires an export license, 112 * other governmental approval, or letter of assurance, without first obtaining 113 * such license, approval or letter. 114 * 115 *****************************************************************************/ 116 117 #include <contrib/dev/acpica/acpi.h> 118 #include <contrib/dev/acpica/acdisasm.h> 119 120 /* This module used for application-level code only */ 121 122 #define _COMPONENT ACPI_CA_DISASSEMBLER 123 ACPI_MODULE_NAME ("dmtbinfo") 124 125 /* 126 * Macros used to generate offsets to specific table fields 127 */ 128 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 129 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 130 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 131 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 132 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 133 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 134 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 135 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 136 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 137 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 138 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 139 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 140 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 141 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 142 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 143 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 144 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 145 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 146 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 147 148 /* Sub-tables */ 149 150 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 151 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 152 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 153 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 154 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 155 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 156 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 157 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 158 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 159 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 160 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 161 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 162 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 163 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 164 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 165 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 166 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 167 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 168 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 169 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 170 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 171 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 172 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 173 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 174 175 /* 176 * Simplify access to flag fields by breaking them up into bytes 177 */ 178 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 179 180 /* Flags */ 181 182 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 183 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 184 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 185 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 186 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 187 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 188 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 189 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 190 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 191 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 192 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 193 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 194 195 196 /* 197 * ACPI Table Information, used to dump formatted ACPI tables 198 * 199 * Each entry is of the form: <Field Type, Field Offset, Field Name> 200 */ 201 202 /******************************************************************************* 203 * 204 * Common ACPI table header 205 * 206 ******************************************************************************/ 207 208 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 209 { 210 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature"}, 211 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length"}, 212 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision"}, 213 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum"}, 214 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID"}, 215 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID"}, 216 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision"}, 217 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID"}, 218 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision"}, 219 {ACPI_DMT_EXIT, 0, NULL} 220 }; 221 222 223 /******************************************************************************* 224 * 225 * GAS - Generic Address Structure 226 * 227 ******************************************************************************/ 228 229 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 230 { 231 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID"}, 232 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width"}, 233 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset"}, 234 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width"}, 235 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address"}, 236 {ACPI_DMT_EXIT, 0, NULL} 237 }; 238 239 240 /******************************************************************************* 241 * 242 * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 243 * 244 ******************************************************************************/ 245 246 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 247 { 248 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature"}, 249 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum"}, 250 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID"}, 251 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision"}, 252 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address"}, 253 {ACPI_DMT_EXIT, 0, NULL} 254 }; 255 256 /* ACPI 2.0+ Extensions */ 257 258 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 259 { 260 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length"}, 261 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address"}, 262 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum"}, 263 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved"}, 264 {ACPI_DMT_EXIT, 0, NULL} 265 }; 266 267 268 /******************************************************************************* 269 * 270 * FACS - Firmware ACPI Control Structure 271 * 272 ******************************************************************************/ 273 274 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 275 { 276 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature"}, 277 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length"}, 278 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature"}, 279 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "Firmware Waking Vector(32)"}, 280 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock"}, 281 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)"}, 282 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present"}, 283 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "Firmware Waking Vector(64)"}, 284 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version"}, 285 {ACPI_DMT_EXIT, 0, NULL} 286 }; 287 288 289 /******************************************************************************* 290 * 291 * FADT - Fixed ACPI Description Table (Signature is FACP) 292 * 293 ******************************************************************************/ 294 295 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 296 { 297 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address"}, 298 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address"}, 299 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model"}, 300 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile"}, 301 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt"}, 302 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port"}, 303 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value"}, 304 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value"}, 305 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command"}, 306 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control"}, 307 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address"}, 308 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address"}, 309 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address"}, 310 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address"}, 311 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address"}, 312 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address"}, 313 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address"}, 314 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address"}, 315 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length"}, 316 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length"}, 317 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length"}, 318 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length"}, 319 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length"}, 320 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length"}, 321 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset"}, 322 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support"}, 323 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency"}, 324 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency"}, 325 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size"}, 326 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride"}, 327 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset"}, 328 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width"}, 329 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index"}, 330 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index"}, 331 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index"}, 332 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Architecture Flags"}, 333 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved"}, 334 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)"}, 335 336 /* Flags byte 0 */ 337 338 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD is operational"}, 339 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD does not invalidate"}, 340 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1"}, 341 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system"}, 342 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Power button is generic"}, 343 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Sleep button is generic"}, 344 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wakeup not fixed"}, 345 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wakeup/S4 not possible"}, 346 347 /* Flags byte 1 */ 348 349 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer"}, 350 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported"}, 351 {ACPI_DMT_EXIT, 0, NULL} 352 }; 353 354 /* ACPI 2.0+ Extensions */ 355 356 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 357 { 358 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported"}, 359 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case"}, 360 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video"}, 361 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Native instr after SLP_TYP"}, 362 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Supported"}, 363 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer"}, 364 365 /* Flags byte 2 */ 366 367 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid after S4"}, 368 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable"}, 369 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "APIC Cluster Model"}, 370 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "APIC Physical Dest Mode"}, 371 372 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 374 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 375 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address"}, 376 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address"}, 377 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block"}, 378 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block"}, 379 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block"}, 380 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block"}, 381 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block"}, 382 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block"}, 383 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block"}, 384 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block"}, 385 {ACPI_DMT_EXIT, 0, NULL} 386 }; 387 388 389 /* 390 * Remaining tables are not consumed directly by the ACPICA subsystem 391 */ 392 393 /******************************************************************************* 394 * 395 * ASF - Alert Standard Format table (Signature "ASF!") 396 * 397 ******************************************************************************/ 398 399 /* Common sub-table header (one per sub-table) */ 400 401 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 402 { 403 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Type), "Sub-Table Type"}, 404 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved"}, 405 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length"}, 406 {ACPI_DMT_EXIT, 0, NULL} 407 }; 408 409 /* 0: ASF Information */ 410 411 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 412 { 413 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value"}, 414 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Polling Interval"}, 415 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID"}, 416 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (SystemId), "Manufacturer ID"}, 417 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags"}, 418 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved"}, 419 {ACPI_DMT_EXIT, 0, NULL} 420 }; 421 422 /* 1: ASF Alerts */ 423 424 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 425 { 426 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask"}, 427 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask"}, 428 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count"}, 429 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length"}, 430 {ACPI_DMT_EXIT, 0, NULL} 431 }; 432 433 /* 1a: ASF Alert data */ 434 435 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 436 { 437 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address"}, 438 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command"}, 439 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask"}, 440 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value"}, 441 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType"}, 442 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type"}, 443 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset"}, 444 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType"}, 445 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity"}, 446 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber"}, 447 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity"}, 448 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance"}, 449 {ACPI_DMT_EXIT, 0, NULL} 450 }; 451 452 /* 2: ASF Remote Control */ 453 454 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 455 { 456 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count"}, 457 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length"}, 458 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved"}, 459 {ACPI_DMT_EXIT, 0, NULL} 460 }; 461 462 /* 2a: ASF Control data */ 463 464 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 465 { 466 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function"}, 467 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address"}, 468 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command"}, 469 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value"}, 470 {ACPI_DMT_EXIT, 0, NULL} 471 }; 472 473 /* 3: ASF RMCP Boot Options */ 474 475 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 476 { 477 {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilites"}, 478 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code"}, 479 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID"}, 480 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command"}, 481 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter"}, 482 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options"}, 483 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters"}, 484 {ACPI_DMT_EXIT, 0, NULL} 485 }; 486 487 /* 4: ASF Address */ 488 489 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 490 { 491 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address"}, 492 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count"}, 493 {ACPI_DMT_EXIT, 0, NULL} 494 }; 495 496 497 /******************************************************************************* 498 * 499 * BOOT - Simple Boot Flag Table 500 * 501 ******************************************************************************/ 502 503 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 504 { 505 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index"}, 506 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved"}, 507 {ACPI_DMT_EXIT, 0, NULL} 508 }; 509 510 511 /******************************************************************************* 512 * 513 * CPEP - Corrected Platform Error Polling table 514 * 515 ******************************************************************************/ 516 517 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 518 { 519 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved"}, 520 {ACPI_DMT_EXIT, 0, NULL} 521 }; 522 523 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 524 { 525 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Type), "Sub-Table Type"}, 526 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Length), "Length"}, 527 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID"}, 528 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID"}, 529 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval"}, 530 {ACPI_DMT_EXIT, 0, NULL} 531 }; 532 533 534 /******************************************************************************* 535 * 536 * DBGP - Debug Port 537 * 538 ******************************************************************************/ 539 540 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 541 { 542 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type"}, 543 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved"}, 544 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register"}, 545 {ACPI_DMT_EXIT, 0, NULL} 546 }; 547 548 549 /******************************************************************************* 550 * 551 * DMAR - DMA Remapping table 552 * 553 ******************************************************************************/ 554 555 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 556 { 557 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width"}, 558 {ACPI_DMT_EXIT, 0, NULL} 559 }; 560 561 /* Common sub-table header (one per sub-table) */ 562 563 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 564 { 565 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Sub-Table Type"}, 566 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length"}, 567 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Header.Flags), "Flags"}, 568 {ACPI_DMT_UINT24, ACPI_DMAR0_OFFSET (Header.Reserved[0]), "Reserved"}, 569 {ACPI_DMT_EXIT, 0, NULL} 570 }; 571 572 /* Common device scope entry */ 573 574 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 575 { 576 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type"}, 577 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length"}, 578 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Segment), "PCI Segment Number"}, 579 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number"}, 580 {ACPI_DMT_EXIT, 0, NULL} 581 }; 582 583 /* DMAR sub-tables */ 584 585 /* 0: Hardware Unit Definition */ 586 587 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 588 { 589 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address"}, 590 {ACPI_DMT_EXIT, 0, NULL} 591 }; 592 593 /* 1: Reserved Memory Defininition */ 594 595 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 596 { 597 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (Address), "Base Address"}, 598 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)"}, 599 {ACPI_DMT_EXIT, 0, NULL} 600 }; 601 602 603 /******************************************************************************* 604 * 605 * ECDT - Embedded Controller Boot Resources Table 606 * 607 ******************************************************************************/ 608 609 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 610 { 611 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register"}, 612 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register"}, 613 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID"}, 614 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number"}, 615 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath"}, 616 {ACPI_DMT_EXIT, 0, NULL} 617 }; 618 619 620 /******************************************************************************* 621 * 622 * HPET - High Precision Event Timer table 623 * 624 ******************************************************************************/ 625 626 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 627 { 628 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID"}, 629 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register"}, 630 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number"}, 631 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks"}, 632 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)"}, 633 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "Page Protect"}, 634 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect"}, 635 {ACPI_DMT_FLAG2, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect"}, 636 {ACPI_DMT_EXIT, 0, NULL} 637 }; 638 639 640 /******************************************************************************* 641 * 642 * MADT - Multiple APIC Description Table and subtables 643 * 644 ******************************************************************************/ 645 646 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 647 { 648 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address"}, 649 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)"}, 650 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility"}, 651 {ACPI_DMT_EXIT, 0, NULL} 652 }; 653 654 /* Common sub-table header (one per sub-table) */ 655 656 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 657 { 658 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Sub-Table Type"}, 659 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length"}, 660 {ACPI_DMT_EXIT, 0, NULL} 661 }; 662 663 /* MADT sub-tables */ 664 665 /* 0: processor APIC */ 666 667 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 668 { 669 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID"}, 670 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID"}, 671 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)"}, 672 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 673 {ACPI_DMT_EXIT, 0, NULL} 674 }; 675 676 /* 1: IO APIC */ 677 678 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 679 { 680 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID"}, 681 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved"}, 682 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address"}, 683 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt"}, 684 {ACPI_DMT_EXIT, 0, NULL} 685 }; 686 687 /* 2: Interrupt Override */ 688 689 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 690 { 691 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus"}, 692 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source"}, 693 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt"}, 694 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)"}, 695 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 696 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 697 {ACPI_DMT_EXIT, 0, NULL} 698 }; 699 700 /* 3: NMI Sources */ 701 702 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 703 { 704 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)"}, 705 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 706 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 707 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt"}, 708 {ACPI_DMT_EXIT, 0, NULL} 709 }; 710 711 /* 4: Local APIC NMI */ 712 713 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 714 { 715 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID"}, 716 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)"}, 717 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 718 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 719 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT"}, 720 {ACPI_DMT_EXIT, 0, NULL} 721 }; 722 723 /* 5: Address Override */ 724 725 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 726 { 727 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved"}, 728 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address"}, 729 {ACPI_DMT_EXIT, 0, NULL} 730 }; 731 732 /* 6: I/O Sapic */ 733 734 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 735 { 736 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID"}, 737 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved"}, 738 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base"}, 739 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address"}, 740 {ACPI_DMT_EXIT, 0, NULL} 741 }; 742 743 /* 7: Local Sapic */ 744 745 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 746 { 747 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID"}, 748 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID"}, 749 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID"}, 750 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved"}, 751 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)"}, 752 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 753 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID"}, 754 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String"}, 755 {ACPI_DMT_EXIT, 0, NULL} 756 }; 757 758 /* 8: Platform Interrupt Source */ 759 760 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 761 { 762 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)"}, 763 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 764 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 765 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType"}, 766 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID"}, 767 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID"}, 768 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector"}, 769 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt"}, 770 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)"}, 771 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override"}, 772 {ACPI_DMT_EXIT, 0, NULL} 773 }; 774 775 776 /******************************************************************************* 777 * 778 * MCFG - PCI Memory Mapped Configuration table and sub-table 779 * 780 ******************************************************************************/ 781 782 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 783 { 784 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved"}, 785 {ACPI_DMT_EXIT, 0, NULL} 786 }; 787 788 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 789 { 790 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address"}, 791 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number"}, 792 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number"}, 793 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number"}, 794 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved"}, 795 {ACPI_DMT_EXIT, 0, NULL} 796 }; 797 798 799 /******************************************************************************* 800 * 801 * SBST - Smart Battery Specification Table 802 * 803 ******************************************************************************/ 804 805 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 806 { 807 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level"}, 808 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level"}, 809 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level"}, 810 {ACPI_DMT_EXIT, 0, NULL} 811 }; 812 813 814 /******************************************************************************* 815 * 816 * SLIT - System Locality Information Table 817 * 818 ******************************************************************************/ 819 820 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 821 { 822 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities"}, 823 {ACPI_DMT_EXIT, 0, NULL} 824 }; 825 826 827 /******************************************************************************* 828 * 829 * SPCR - Serial Port Console Redirection table 830 * 831 ******************************************************************************/ 832 833 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 834 { 835 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type"}, 836 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved"}, 837 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register"}, 838 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type"}, 839 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ"}, 840 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt"}, 841 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate"}, 842 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity"}, 843 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits"}, 844 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control"}, 845 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type"}, 846 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 847 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID"}, 848 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID"}, 849 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus"}, 850 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device"}, 851 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function"}, 852 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags"}, 853 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment"}, 854 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 855 {ACPI_DMT_EXIT, 0, NULL} 856 }; 857 858 859 /******************************************************************************* 860 * 861 * SPMI - Server Platform Management Interface table 862 * 863 ******************************************************************************/ 864 865 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 866 { 867 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved"}, 868 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type"}, 869 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version"}, 870 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type"}, 871 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number"}, 872 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved"}, 873 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag"}, 874 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt"}, 875 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register"}, 876 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment"}, 877 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus"}, 878 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device"}, 879 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function"}, 880 {ACPI_DMT_EXIT, 0, NULL} 881 }; 882 883 884 /******************************************************************************* 885 * 886 * SRAT - System Resource Affinity Table and sub-tables 887 * 888 ******************************************************************************/ 889 890 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 891 { 892 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision"}, 893 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved"}, 894 {ACPI_DMT_EXIT, 0, NULL} 895 }; 896 897 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 898 { 899 {ACPI_DMT_SRAT, ACPI_SRAT0_OFFSET (Header.Type), "Sub-Table Type"}, 900 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (Header.Length), "Length"}, 901 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)"}, 902 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID"}, 903 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)"}, 904 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled"}, 905 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID"}, 906 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)"}, 907 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved"}, 908 {ACPI_DMT_EXIT, 0, NULL} 909 }; 910 911 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 912 { 913 {ACPI_DMT_SRAT, ACPI_SRAT1_OFFSET (Header.Type), "Sub-Table Type"}, 914 {ACPI_DMT_UINT8, ACPI_SRAT1_OFFSET (Header.Length), "Length"}, 915 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain"}, 916 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved"}, 917 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address"}, 918 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length"}, 919 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (MemoryType), "Memory Type"}, 920 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)"}, 921 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled"}, 922 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable"}, 923 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile"}, 924 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved1), "Reserved"}, 925 {ACPI_DMT_EXIT, 0, NULL} 926 }; 927 928 929 /******************************************************************************* 930 * 931 * TCPA - Trusted Computing Platform Alliance table 932 * 933 ******************************************************************************/ 934 935 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 936 { 937 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved"}, 938 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length"}, 939 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address"}, 940 {ACPI_DMT_EXIT, 0, NULL} 941 }; 942 943 944 /******************************************************************************* 945 * 946 * WDRT - Watchdog Resource Table 947 * 948 ******************************************************************************/ 949 950 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 951 { 952 {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (HeaderLength), "Header Length"}, 953 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment"}, 954 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus"}, 955 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device"}, 956 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function"}, 957 {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (TimerPeriod), "Timer Period"}, 958 {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (MaxCount), "Max Count"}, 959 {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (MinCount), "Min Count"}, 960 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Flags), "Flags (decoded below)"}, 961 {ACPI_DMT_FLAG0, ACPI_WDRT_OFFSET (Flags), "Enabled"}, 962 {ACPI_DMT_FLAG7, ACPI_WDRT_OFFSET (Flags), "Stopped When Asleep"}, 963 {ACPI_DMT_UINT24, ACPI_WDRT_OFFSET (Reserved[0]), "Reserved"}, 964 {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (Entries), "Watchdog Entries"}, 965 {ACPI_DMT_EXIT, 0, NULL} 966 }; 967 968