11a39cfb0SJung-uk Kim /****************************************************************************** 21a39cfb0SJung-uk Kim * 31a39cfb0SJung-uk Kim * Module Name: dmtbinfo - Table info for non-AML tables 41a39cfb0SJung-uk Kim * $Revision: 1.13 $ 51a39cfb0SJung-uk Kim * 61a39cfb0SJung-uk Kim *****************************************************************************/ 71a39cfb0SJung-uk Kim 81a39cfb0SJung-uk Kim /****************************************************************************** 91a39cfb0SJung-uk Kim * 101a39cfb0SJung-uk Kim * 1. Copyright Notice 111a39cfb0SJung-uk Kim * 121a39cfb0SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2007, Intel Corp. 131a39cfb0SJung-uk Kim * All rights reserved. 141a39cfb0SJung-uk Kim * 151a39cfb0SJung-uk Kim * 2. License 161a39cfb0SJung-uk Kim * 171a39cfb0SJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property 181a39cfb0SJung-uk Kim * rights. You may have additional license terms from the party that provided 191a39cfb0SJung-uk Kim * you this software, covering your right to use that party's intellectual 201a39cfb0SJung-uk Kim * property rights. 211a39cfb0SJung-uk Kim * 221a39cfb0SJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 231a39cfb0SJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an 241a39cfb0SJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the 251a39cfb0SJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy, 261a39cfb0SJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered 271a39cfb0SJung-uk Kim * Code in any form, with the right to sublicense such rights; and 281a39cfb0SJung-uk Kim * 291a39cfb0SJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 301a39cfb0SJung-uk Kim * license (with the right to sublicense), under only those claims of Intel 311a39cfb0SJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell, 321a39cfb0SJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof 331a39cfb0SJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright 341a39cfb0SJung-uk Kim * license, and in no event shall the patent license extend to any additions 351a39cfb0SJung-uk Kim * to or modifications of the Original Intel Code. No other license or right 361a39cfb0SJung-uk Kim * is granted directly or by implication, estoppel or otherwise; 371a39cfb0SJung-uk Kim * 381a39cfb0SJung-uk Kim * The above copyright and patent license is granted only if the following 391a39cfb0SJung-uk Kim * conditions are met: 401a39cfb0SJung-uk Kim * 411a39cfb0SJung-uk Kim * 3. Conditions 421a39cfb0SJung-uk Kim * 431a39cfb0SJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source. 441a39cfb0SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 451a39cfb0SJung-uk Kim * Code or modification with rights to further distribute source must include 461a39cfb0SJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions, 471a39cfb0SJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition, 481a39cfb0SJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to 491a39cfb0SJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered 501a39cfb0SJung-uk Kim * Code and the date of any change. Licensee must include in that file the 511a39cfb0SJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee 521a39cfb0SJung-uk Kim * must include a prominent statement that the modification is derived, 531a39cfb0SJung-uk Kim * directly or indirectly, from Original Intel Code. 541a39cfb0SJung-uk Kim * 551a39cfb0SJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 561a39cfb0SJung-uk Kim * Redistribution of source code of any substantial portion of the Covered 571a39cfb0SJung-uk Kim * Code or modification without rights to further distribute source must 581a39cfb0SJung-uk Kim * include the following Disclaimer and Export Compliance provision in the 591a39cfb0SJung-uk Kim * documentation and/or other materials provided with distribution. In 601a39cfb0SJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any 611a39cfb0SJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the 621a39cfb0SJung-uk Kim * license from Licensee to its licensee is limited to the intellectual 631a39cfb0SJung-uk Kim * property embodied in the software Licensee provides to its licensee, and 641a39cfb0SJung-uk Kim * not to intellectual property embodied in modifications its licensee may 651a39cfb0SJung-uk Kim * make. 661a39cfb0SJung-uk Kim * 671a39cfb0SJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any 681a39cfb0SJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the 691a39cfb0SJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance 701a39cfb0SJung-uk Kim * provision in the documentation and/or other materials provided with the 711a39cfb0SJung-uk Kim * distribution. 721a39cfb0SJung-uk Kim * 731a39cfb0SJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original 741a39cfb0SJung-uk Kim * Intel Code. 751a39cfb0SJung-uk Kim * 761a39cfb0SJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by 771a39cfb0SJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or 781a39cfb0SJung-uk Kim * other dealings in products derived from or relating to the Covered Code 791a39cfb0SJung-uk Kim * without prior written authorization from Intel. 801a39cfb0SJung-uk Kim * 811a39cfb0SJung-uk Kim * 4. Disclaimer and Export Compliance 821a39cfb0SJung-uk Kim * 831a39cfb0SJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 841a39cfb0SJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 851a39cfb0SJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 861a39cfb0SJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 871a39cfb0SJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 881a39cfb0SJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 891a39cfb0SJung-uk Kim * PARTICULAR PURPOSE. 901a39cfb0SJung-uk Kim * 911a39cfb0SJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 921a39cfb0SJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 931a39cfb0SJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 941a39cfb0SJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 951a39cfb0SJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 961a39cfb0SJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 971a39cfb0SJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 981a39cfb0SJung-uk Kim * LIMITED REMEDY. 991a39cfb0SJung-uk Kim * 1001a39cfb0SJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this 1011a39cfb0SJung-uk Kim * software or system incorporating such software without first obtaining any 1021a39cfb0SJung-uk Kim * required license or other approval from the U. S. Department of Commerce or 1031a39cfb0SJung-uk Kim * any other agency or department of the United States Government. In the 1041a39cfb0SJung-uk Kim * event Licensee exports any such software from the United States or 1051a39cfb0SJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall 1061a39cfb0SJung-uk Kim * ensure that the distribution and export/re-export of the software is in 1071a39cfb0SJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the 1081a39cfb0SJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor 1091a39cfb0SJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process, 1101a39cfb0SJung-uk Kim * software, or service, directly or indirectly, to any country for which the 1111a39cfb0SJung-uk Kim * United States government or any agency thereof requires an export license, 1121a39cfb0SJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining 1131a39cfb0SJung-uk Kim * such license, approval or letter. 1141a39cfb0SJung-uk Kim * 1151a39cfb0SJung-uk Kim *****************************************************************************/ 1161a39cfb0SJung-uk Kim 1171a39cfb0SJung-uk Kim #include <contrib/dev/acpica/acpi.h> 1181a39cfb0SJung-uk Kim #include <contrib/dev/acpica/acdisasm.h> 1191a39cfb0SJung-uk Kim 1201a39cfb0SJung-uk Kim /* This module used for application-level code only */ 1211a39cfb0SJung-uk Kim 1221a39cfb0SJung-uk Kim #define _COMPONENT ACPI_CA_DISASSEMBLER 1231a39cfb0SJung-uk Kim ACPI_MODULE_NAME ("dmtbinfo") 1241a39cfb0SJung-uk Kim 1251a39cfb0SJung-uk Kim /* 1261a39cfb0SJung-uk Kim * Macros used to generate offsets to specific table fields 1271a39cfb0SJung-uk Kim */ 1281a39cfb0SJung-uk Kim #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f) 1291a39cfb0SJung-uk Kim #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f) 1301a39cfb0SJung-uk Kim #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f) 1311a39cfb0SJung-uk Kim #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f) 1321a39cfb0SJung-uk Kim #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f) 1331a39cfb0SJung-uk Kim #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f) 1341a39cfb0SJung-uk Kim #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f) 1351a39cfb0SJung-uk Kim #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f) 1361a39cfb0SJung-uk Kim #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f) 1371a39cfb0SJung-uk Kim #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f) 1381a39cfb0SJung-uk Kim #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f) 1391a39cfb0SJung-uk Kim #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f) 1401a39cfb0SJung-uk Kim #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f) 1411a39cfb0SJung-uk Kim #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f) 1421a39cfb0SJung-uk Kim #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f) 1431a39cfb0SJung-uk Kim #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f) 1441a39cfb0SJung-uk Kim #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f) 1451a39cfb0SJung-uk Kim #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f) 1461a39cfb0SJung-uk Kim #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f) 1471a39cfb0SJung-uk Kim 1481a39cfb0SJung-uk Kim /* Sub-tables */ 1491a39cfb0SJung-uk Kim 1501a39cfb0SJung-uk Kim #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f) 1511a39cfb0SJung-uk Kim #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f) 1521a39cfb0SJung-uk Kim #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f) 1531a39cfb0SJung-uk Kim #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f) 1541a39cfb0SJung-uk Kim #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f) 1551a39cfb0SJung-uk Kim #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f) 1561a39cfb0SJung-uk Kim #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f) 1571a39cfb0SJung-uk Kim #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f) 1581a39cfb0SJung-uk Kim #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f) 1591a39cfb0SJung-uk Kim #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f) 1601a39cfb0SJung-uk Kim #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f) 1611a39cfb0SJung-uk Kim #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) 1621a39cfb0SJung-uk Kim #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) 1631a39cfb0SJung-uk Kim #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) 1641a39cfb0SJung-uk Kim #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f) 1651a39cfb0SJung-uk Kim #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f) 1661a39cfb0SJung-uk Kim #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f) 1671a39cfb0SJung-uk Kim #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f) 1681a39cfb0SJung-uk Kim #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f) 1691a39cfb0SJung-uk Kim #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f) 1701a39cfb0SJung-uk Kim #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) 1711a39cfb0SJung-uk Kim #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) 1721a39cfb0SJung-uk Kim #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f) 1731a39cfb0SJung-uk Kim #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f) 1741a39cfb0SJung-uk Kim 1751a39cfb0SJung-uk Kim /* 1761a39cfb0SJung-uk Kim * Simplify access to flag fields by breaking them up into bytes 1771a39cfb0SJung-uk Kim */ 1781a39cfb0SJung-uk Kim #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o) 1791a39cfb0SJung-uk Kim 1801a39cfb0SJung-uk Kim /* Flags */ 1811a39cfb0SJung-uk Kim 1821a39cfb0SJung-uk Kim #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) 1831a39cfb0SJung-uk Kim #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) 1841a39cfb0SJung-uk Kim #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) 1851a39cfb0SJung-uk Kim #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o) 1861a39cfb0SJung-uk Kim #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o) 1871a39cfb0SJung-uk Kim #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) 1881a39cfb0SJung-uk Kim #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) 1891a39cfb0SJung-uk Kim #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o) 1901a39cfb0SJung-uk Kim #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o) 1911a39cfb0SJung-uk Kim #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o) 1921a39cfb0SJung-uk Kim #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o) 1931a39cfb0SJung-uk Kim #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o) 1941a39cfb0SJung-uk Kim 1951a39cfb0SJung-uk Kim 1961a39cfb0SJung-uk Kim /* 1971a39cfb0SJung-uk Kim * ACPI Table Information, used to dump formatted ACPI tables 1981a39cfb0SJung-uk Kim * 1991a39cfb0SJung-uk Kim * Each entry is of the form: <Field Type, Field Offset, Field Name> 2001a39cfb0SJung-uk Kim */ 2011a39cfb0SJung-uk Kim 2021a39cfb0SJung-uk Kim /******************************************************************************* 2031a39cfb0SJung-uk Kim * 2041a39cfb0SJung-uk Kim * Common ACPI table header 2051a39cfb0SJung-uk Kim * 2061a39cfb0SJung-uk Kim ******************************************************************************/ 2071a39cfb0SJung-uk Kim 2081a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] = 2091a39cfb0SJung-uk Kim { 2101a39cfb0SJung-uk Kim {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature"}, 2111a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length"}, 2121a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision"}, 2131a39cfb0SJung-uk Kim {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum"}, 2141a39cfb0SJung-uk Kim {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID"}, 2151a39cfb0SJung-uk Kim {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID"}, 2161a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision"}, 2171a39cfb0SJung-uk Kim {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID"}, 2181a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision"}, 2191a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 2201a39cfb0SJung-uk Kim }; 2211a39cfb0SJung-uk Kim 2221a39cfb0SJung-uk Kim 2231a39cfb0SJung-uk Kim /******************************************************************************* 2241a39cfb0SJung-uk Kim * 2251a39cfb0SJung-uk Kim * GAS - Generic Address Structure 2261a39cfb0SJung-uk Kim * 2271a39cfb0SJung-uk Kim ******************************************************************************/ 2281a39cfb0SJung-uk Kim 2291a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] = 2301a39cfb0SJung-uk Kim { 2311a39cfb0SJung-uk Kim {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID"}, 2321a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width"}, 2331a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset"}, 2341a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (AccessWidth), "Access Width"}, 2351a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address"}, 2361a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 2371a39cfb0SJung-uk Kim }; 2381a39cfb0SJung-uk Kim 2391a39cfb0SJung-uk Kim 2401a39cfb0SJung-uk Kim /******************************************************************************* 2411a39cfb0SJung-uk Kim * 2421a39cfb0SJung-uk Kim * RSDP - Root System Description Pointer (Signature is "RSD PTR ") 2431a39cfb0SJung-uk Kim * 2441a39cfb0SJung-uk Kim ******************************************************************************/ 2451a39cfb0SJung-uk Kim 2461a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] = 2471a39cfb0SJung-uk Kim { 2481a39cfb0SJung-uk Kim {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature"}, 2491a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum"}, 2501a39cfb0SJung-uk Kim {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID"}, 2511a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision"}, 2521a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address"}, 2531a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 2541a39cfb0SJung-uk Kim }; 2551a39cfb0SJung-uk Kim 2561a39cfb0SJung-uk Kim /* ACPI 2.0+ Extensions */ 2571a39cfb0SJung-uk Kim 2581a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] = 2591a39cfb0SJung-uk Kim { 2601a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length"}, 2611a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address"}, 2621a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum"}, 2631a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved"}, 2641a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 2651a39cfb0SJung-uk Kim }; 2661a39cfb0SJung-uk Kim 2671a39cfb0SJung-uk Kim 2681a39cfb0SJung-uk Kim /******************************************************************************* 2691a39cfb0SJung-uk Kim * 2701a39cfb0SJung-uk Kim * FACS - Firmware ACPI Control Structure 2711a39cfb0SJung-uk Kim * 2721a39cfb0SJung-uk Kim ******************************************************************************/ 2731a39cfb0SJung-uk Kim 2741a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] = 2751a39cfb0SJung-uk Kim { 2761a39cfb0SJung-uk Kim {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature"}, 2771a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length"}, 2781a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature"}, 2791a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "Firmware Waking Vector(32)"}, 2801a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock"}, 2811a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)"}, 2821a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present"}, 2831a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "Firmware Waking Vector(64)"}, 2841a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version"}, 2851a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 2861a39cfb0SJung-uk Kim }; 2871a39cfb0SJung-uk Kim 2881a39cfb0SJung-uk Kim 2891a39cfb0SJung-uk Kim /******************************************************************************* 2901a39cfb0SJung-uk Kim * 2911a39cfb0SJung-uk Kim * FADT - Fixed ACPI Description Table (Signature is FACP) 2921a39cfb0SJung-uk Kim * 2931a39cfb0SJung-uk Kim ******************************************************************************/ 2941a39cfb0SJung-uk Kim 2951a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] = 2961a39cfb0SJung-uk Kim { 2971a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address"}, 2981a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address"}, 2991a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model"}, 3001a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile"}, 3011a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt"}, 3021a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port"}, 3031a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value"}, 3041a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value"}, 3051a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command"}, 3061a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control"}, 3071a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address"}, 3081a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address"}, 3091a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address"}, 3101a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address"}, 3111a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address"}, 3121a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address"}, 3131a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address"}, 3141a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address"}, 3151a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length"}, 3161a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length"}, 3171a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length"}, 3181a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length"}, 3191a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length"}, 3201a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length"}, 3211a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset"}, 3221a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support"}, 3231a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency"}, 3241a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency"}, 3251a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size"}, 3261a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride"}, 3271a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset"}, 3281a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width"}, 3291a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index"}, 3301a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index"}, 3311a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index"}, 3321a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Architecture Flags"}, 3331a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved"}, 3341a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)"}, 3351a39cfb0SJung-uk Kim 3361a39cfb0SJung-uk Kim /* Flags byte 0 */ 3371a39cfb0SJung-uk Kim 3381a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD is operational"}, 3391a39cfb0SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD does not invalidate"}, 3401a39cfb0SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1"}, 3411a39cfb0SJung-uk Kim {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system"}, 3421a39cfb0SJung-uk Kim {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Power button is generic"}, 3431a39cfb0SJung-uk Kim {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Sleep button is generic"}, 3441a39cfb0SJung-uk Kim {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wakeup not fixed"}, 3451a39cfb0SJung-uk Kim {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wakeup/S4 not possible"}, 3461a39cfb0SJung-uk Kim 3471a39cfb0SJung-uk Kim /* Flags byte 1 */ 3481a39cfb0SJung-uk Kim 3491a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer"}, 3501a39cfb0SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported"}, 3511a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 3521a39cfb0SJung-uk Kim }; 3531a39cfb0SJung-uk Kim 3541a39cfb0SJung-uk Kim /* ACPI 2.0+ Extensions */ 3551a39cfb0SJung-uk Kim 3561a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] = 3571a39cfb0SJung-uk Kim { 3581a39cfb0SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported"}, 3591a39cfb0SJung-uk Kim {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case"}, 3601a39cfb0SJung-uk Kim {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video"}, 3611a39cfb0SJung-uk Kim {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Native instr after SLP_TYP"}, 3621a39cfb0SJung-uk Kim {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Supported"}, 3631a39cfb0SJung-uk Kim {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer"}, 3641a39cfb0SJung-uk Kim 3651a39cfb0SJung-uk Kim /* Flags byte 2 */ 3661a39cfb0SJung-uk Kim 3671a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid after S4"}, 3681a39cfb0SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable"}, 3691a39cfb0SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "APIC Cluster Model"}, 3701a39cfb0SJung-uk Kim {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "APIC Physical Dest Mode"}, 3711a39cfb0SJung-uk Kim 3721a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register"}, 3731a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset"}, 3741a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved"}, 3751a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address"}, 3761a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address"}, 3771a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block"}, 3781a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block"}, 3791a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block"}, 3801a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block"}, 3811a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block"}, 3821a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block"}, 3831a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block"}, 3841a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block"}, 3851a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 3861a39cfb0SJung-uk Kim }; 3871a39cfb0SJung-uk Kim 3881a39cfb0SJung-uk Kim 3891a39cfb0SJung-uk Kim /* 3901a39cfb0SJung-uk Kim * Remaining tables are not consumed directly by the ACPICA subsystem 3911a39cfb0SJung-uk Kim */ 3921a39cfb0SJung-uk Kim 3931a39cfb0SJung-uk Kim /******************************************************************************* 3941a39cfb0SJung-uk Kim * 3951a39cfb0SJung-uk Kim * ASF - Alert Standard Format table (Signature "ASF!") 3961a39cfb0SJung-uk Kim * 3971a39cfb0SJung-uk Kim ******************************************************************************/ 3981a39cfb0SJung-uk Kim 3991a39cfb0SJung-uk Kim /* Common sub-table header (one per sub-table) */ 4001a39cfb0SJung-uk Kim 4011a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] = 4021a39cfb0SJung-uk Kim { 4031a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Type), "Sub-Table Type"}, 4041a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved"}, 4051a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length"}, 4061a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4071a39cfb0SJung-uk Kim }; 4081a39cfb0SJung-uk Kim 4091a39cfb0SJung-uk Kim /* 0: ASF Information */ 4101a39cfb0SJung-uk Kim 4111a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] = 4121a39cfb0SJung-uk Kim { 4131a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value"}, 4141a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Polling Interval"}, 4151a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID"}, 4161a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (SystemId), "Manufacturer ID"}, 4171a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags"}, 4181a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved"}, 4191a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4201a39cfb0SJung-uk Kim }; 4211a39cfb0SJung-uk Kim 4221a39cfb0SJung-uk Kim /* 1: ASF Alerts */ 4231a39cfb0SJung-uk Kim 4241a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] = 4251a39cfb0SJung-uk Kim { 4261a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask"}, 4271a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask"}, 4281a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count"}, 4291a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length"}, 4301a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4311a39cfb0SJung-uk Kim }; 4321a39cfb0SJung-uk Kim 4331a39cfb0SJung-uk Kim /* 1a: ASF Alert data */ 4341a39cfb0SJung-uk Kim 4351a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] = 4361a39cfb0SJung-uk Kim { 4371a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address"}, 4381a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command"}, 4391a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask"}, 4401a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value"}, 4411a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType"}, 4421a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type"}, 4431a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset"}, 4441a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType"}, 4451a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity"}, 4461a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber"}, 4471a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity"}, 4481a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance"}, 4491a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4501a39cfb0SJung-uk Kim }; 4511a39cfb0SJung-uk Kim 4521a39cfb0SJung-uk Kim /* 2: ASF Remote Control */ 4531a39cfb0SJung-uk Kim 4541a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] = 4551a39cfb0SJung-uk Kim { 4561a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count"}, 4571a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length"}, 4581a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved"}, 4591a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4601a39cfb0SJung-uk Kim }; 4611a39cfb0SJung-uk Kim 4621a39cfb0SJung-uk Kim /* 2a: ASF Control data */ 4631a39cfb0SJung-uk Kim 4641a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] = 4651a39cfb0SJung-uk Kim { 4661a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function"}, 4671a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address"}, 4681a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command"}, 4691a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value"}, 4701a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4711a39cfb0SJung-uk Kim }; 4721a39cfb0SJung-uk Kim 4731a39cfb0SJung-uk Kim /* 3: ASF RMCP Boot Options */ 4741a39cfb0SJung-uk Kim 4751a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] = 4761a39cfb0SJung-uk Kim { 4771a39cfb0SJung-uk Kim {ACPI_DMT_UINT56, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilites"}, 4781a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code"}, 4791a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID"}, 4801a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command"}, 4811a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter"}, 4821a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options"}, 4831a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters"}, 4841a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4851a39cfb0SJung-uk Kim }; 4861a39cfb0SJung-uk Kim 4871a39cfb0SJung-uk Kim /* 4: ASF Address */ 4881a39cfb0SJung-uk Kim 4891a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] = 4901a39cfb0SJung-uk Kim { 4911a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address"}, 4921a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count"}, 4931a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 4941a39cfb0SJung-uk Kim }; 4951a39cfb0SJung-uk Kim 4961a39cfb0SJung-uk Kim 4971a39cfb0SJung-uk Kim /******************************************************************************* 4981a39cfb0SJung-uk Kim * 4991a39cfb0SJung-uk Kim * BOOT - Simple Boot Flag Table 5001a39cfb0SJung-uk Kim * 5011a39cfb0SJung-uk Kim ******************************************************************************/ 5021a39cfb0SJung-uk Kim 5031a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] = 5041a39cfb0SJung-uk Kim { 5051a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index"}, 5061a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved"}, 5071a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5081a39cfb0SJung-uk Kim }; 5091a39cfb0SJung-uk Kim 5101a39cfb0SJung-uk Kim 5111a39cfb0SJung-uk Kim /******************************************************************************* 5121a39cfb0SJung-uk Kim * 5131a39cfb0SJung-uk Kim * CPEP - Corrected Platform Error Polling table 5141a39cfb0SJung-uk Kim * 5151a39cfb0SJung-uk Kim ******************************************************************************/ 5161a39cfb0SJung-uk Kim 5171a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] = 5181a39cfb0SJung-uk Kim { 5191a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved"}, 5201a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5211a39cfb0SJung-uk Kim }; 5221a39cfb0SJung-uk Kim 5231a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = 5241a39cfb0SJung-uk Kim { 5251a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Type), "Sub-Table Type"}, 5261a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Length), "Length"}, 5271a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID"}, 5281a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID"}, 5291a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval"}, 5301a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5311a39cfb0SJung-uk Kim }; 5321a39cfb0SJung-uk Kim 5331a39cfb0SJung-uk Kim 5341a39cfb0SJung-uk Kim /******************************************************************************* 5351a39cfb0SJung-uk Kim * 5361a39cfb0SJung-uk Kim * DBGP - Debug Port 5371a39cfb0SJung-uk Kim * 5381a39cfb0SJung-uk Kim ******************************************************************************/ 5391a39cfb0SJung-uk Kim 5401a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] = 5411a39cfb0SJung-uk Kim { 5421a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type"}, 5431a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved"}, 5441a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register"}, 5451a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5461a39cfb0SJung-uk Kim }; 5471a39cfb0SJung-uk Kim 5481a39cfb0SJung-uk Kim 5491a39cfb0SJung-uk Kim /******************************************************************************* 5501a39cfb0SJung-uk Kim * 5511a39cfb0SJung-uk Kim * DMAR - DMA Remapping table 5521a39cfb0SJung-uk Kim * 5531a39cfb0SJung-uk Kim ******************************************************************************/ 5541a39cfb0SJung-uk Kim 5551a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] = 5561a39cfb0SJung-uk Kim { 5571a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width"}, 5581a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5591a39cfb0SJung-uk Kim }; 5601a39cfb0SJung-uk Kim 5611a39cfb0SJung-uk Kim /* Common sub-table header (one per sub-table) */ 5621a39cfb0SJung-uk Kim 5631a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] = 5641a39cfb0SJung-uk Kim { 5651a39cfb0SJung-uk Kim {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Sub-Table Type"}, 5661a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length"}, 5671a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Header.Flags), "Flags"}, 5681a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_DMAR0_OFFSET (Header.Reserved[0]), "Reserved"}, 5691a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5701a39cfb0SJung-uk Kim }; 5711a39cfb0SJung-uk Kim 5721a39cfb0SJung-uk Kim /* Common device scope entry */ 5731a39cfb0SJung-uk Kim 5741a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] = 5751a39cfb0SJung-uk Kim { 5761a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type"}, 5771a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length"}, 5781a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Segment), "PCI Segment Number"}, 5791a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number"}, 5801a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5811a39cfb0SJung-uk Kim }; 5821a39cfb0SJung-uk Kim 5831a39cfb0SJung-uk Kim /* DMAR sub-tables */ 5841a39cfb0SJung-uk Kim 5851a39cfb0SJung-uk Kim /* 0: Hardware Unit Definition */ 5861a39cfb0SJung-uk Kim 5871a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] = 5881a39cfb0SJung-uk Kim { 5891a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address"}, 5901a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 5911a39cfb0SJung-uk Kim }; 5921a39cfb0SJung-uk Kim 5931a39cfb0SJung-uk Kim /* 1: Reserved Memory Defininition */ 5941a39cfb0SJung-uk Kim 5951a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] = 5961a39cfb0SJung-uk Kim { 5971a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (Address), "Base Address"}, 5981a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)"}, 5991a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6001a39cfb0SJung-uk Kim }; 6011a39cfb0SJung-uk Kim 6021a39cfb0SJung-uk Kim 6031a39cfb0SJung-uk Kim /******************************************************************************* 6041a39cfb0SJung-uk Kim * 6051a39cfb0SJung-uk Kim * ECDT - Embedded Controller Boot Resources Table 6061a39cfb0SJung-uk Kim * 6071a39cfb0SJung-uk Kim ******************************************************************************/ 6081a39cfb0SJung-uk Kim 6091a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] = 6101a39cfb0SJung-uk Kim { 6111a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register"}, 6121a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register"}, 6131a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID"}, 6141a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number"}, 6151a39cfb0SJung-uk Kim {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath"}, 6161a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6171a39cfb0SJung-uk Kim }; 6181a39cfb0SJung-uk Kim 6191a39cfb0SJung-uk Kim 6201a39cfb0SJung-uk Kim /******************************************************************************* 6211a39cfb0SJung-uk Kim * 6221a39cfb0SJung-uk Kim * HPET - High Precision Event Timer table 6231a39cfb0SJung-uk Kim * 6241a39cfb0SJung-uk Kim ******************************************************************************/ 6251a39cfb0SJung-uk Kim 6261a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = 6271a39cfb0SJung-uk Kim { 6281a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID"}, 6291a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register"}, 6301a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number"}, 6311a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks"}, 6321a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)"}, 6331a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "Page Protect"}, 6341a39cfb0SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect"}, 6351a39cfb0SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect"}, 6361a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6371a39cfb0SJung-uk Kim }; 6381a39cfb0SJung-uk Kim 6391a39cfb0SJung-uk Kim 6401a39cfb0SJung-uk Kim /******************************************************************************* 6411a39cfb0SJung-uk Kim * 6421a39cfb0SJung-uk Kim * MADT - Multiple APIC Description Table and subtables 6431a39cfb0SJung-uk Kim * 6441a39cfb0SJung-uk Kim ******************************************************************************/ 6451a39cfb0SJung-uk Kim 6461a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 6471a39cfb0SJung-uk Kim { 6481a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address"}, 6491a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)"}, 6501a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility"}, 6511a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6521a39cfb0SJung-uk Kim }; 6531a39cfb0SJung-uk Kim 6541a39cfb0SJung-uk Kim /* Common sub-table header (one per sub-table) */ 6551a39cfb0SJung-uk Kim 6561a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 6571a39cfb0SJung-uk Kim { 6581a39cfb0SJung-uk Kim {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Sub-Table Type"}, 6591a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length"}, 6601a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6611a39cfb0SJung-uk Kim }; 6621a39cfb0SJung-uk Kim 6631a39cfb0SJung-uk Kim /* MADT sub-tables */ 6641a39cfb0SJung-uk Kim 6651a39cfb0SJung-uk Kim /* 0: processor APIC */ 6661a39cfb0SJung-uk Kim 6671a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 6681a39cfb0SJung-uk Kim { 6691a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID"}, 6701a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID"}, 6711a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)"}, 6721a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 6731a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6741a39cfb0SJung-uk Kim }; 6751a39cfb0SJung-uk Kim 6761a39cfb0SJung-uk Kim /* 1: IO APIC */ 6771a39cfb0SJung-uk Kim 6781a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 6791a39cfb0SJung-uk Kim { 6801a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID"}, 6811a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved"}, 6821a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address"}, 6831a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt"}, 6841a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6851a39cfb0SJung-uk Kim }; 6861a39cfb0SJung-uk Kim 6871a39cfb0SJung-uk Kim /* 2: Interrupt Override */ 6881a39cfb0SJung-uk Kim 6891a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 6901a39cfb0SJung-uk Kim { 6911a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus"}, 6921a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source"}, 6931a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt"}, 6941a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)"}, 6951a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 6961a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 6971a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 6981a39cfb0SJung-uk Kim }; 6991a39cfb0SJung-uk Kim 7001a39cfb0SJung-uk Kim /* 3: NMI Sources */ 7011a39cfb0SJung-uk Kim 7021a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 7031a39cfb0SJung-uk Kim { 7041a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)"}, 7051a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 7061a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 7071a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt"}, 7081a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7091a39cfb0SJung-uk Kim }; 7101a39cfb0SJung-uk Kim 7111a39cfb0SJung-uk Kim /* 4: Local APIC NMI */ 7121a39cfb0SJung-uk Kim 7131a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 7141a39cfb0SJung-uk Kim { 7151a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID"}, 7161a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)"}, 7171a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 7181a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 7191a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT"}, 7201a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7211a39cfb0SJung-uk Kim }; 7221a39cfb0SJung-uk Kim 7231a39cfb0SJung-uk Kim /* 5: Address Override */ 7241a39cfb0SJung-uk Kim 7251a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 7261a39cfb0SJung-uk Kim { 7271a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved"}, 7281a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address"}, 7291a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7301a39cfb0SJung-uk Kim }; 7311a39cfb0SJung-uk Kim 7321a39cfb0SJung-uk Kim /* 6: I/O Sapic */ 7331a39cfb0SJung-uk Kim 7341a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 7351a39cfb0SJung-uk Kim { 7361a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID"}, 7371a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved"}, 7381a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base"}, 7391a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address"}, 7401a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7411a39cfb0SJung-uk Kim }; 7421a39cfb0SJung-uk Kim 7431a39cfb0SJung-uk Kim /* 7: Local Sapic */ 7441a39cfb0SJung-uk Kim 7451a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 7461a39cfb0SJung-uk Kim { 7471a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID"}, 7481a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID"}, 7491a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID"}, 7501a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved"}, 7511a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)"}, 7521a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled"}, 7531a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID"}, 7541a39cfb0SJung-uk Kim {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String"}, 7551a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7561a39cfb0SJung-uk Kim }; 7571a39cfb0SJung-uk Kim 7581a39cfb0SJung-uk Kim /* 8: Platform Interrupt Source */ 7591a39cfb0SJung-uk Kim 7601a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 7611a39cfb0SJung-uk Kim { 7621a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)"}, 7631a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity"}, 7641a39cfb0SJung-uk Kim {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode"}, 7651a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType"}, 7661a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID"}, 7671a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID"}, 7681a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector"}, 7691a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt"}, 7701a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)"}, 7711a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override"}, 7721a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7731a39cfb0SJung-uk Kim }; 7741a39cfb0SJung-uk Kim 7751a39cfb0SJung-uk Kim 7761a39cfb0SJung-uk Kim /******************************************************************************* 7771a39cfb0SJung-uk Kim * 7781a39cfb0SJung-uk Kim * MCFG - PCI Memory Mapped Configuration table and sub-table 7791a39cfb0SJung-uk Kim * 7801a39cfb0SJung-uk Kim ******************************************************************************/ 7811a39cfb0SJung-uk Kim 7821a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 7831a39cfb0SJung-uk Kim { 7841a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved"}, 7851a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7861a39cfb0SJung-uk Kim }; 7871a39cfb0SJung-uk Kim 7881a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 7891a39cfb0SJung-uk Kim { 7901a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address"}, 7911a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number"}, 7921a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number"}, 7931a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number"}, 7941a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved"}, 7951a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 7961a39cfb0SJung-uk Kim }; 7971a39cfb0SJung-uk Kim 7981a39cfb0SJung-uk Kim 7991a39cfb0SJung-uk Kim /******************************************************************************* 8001a39cfb0SJung-uk Kim * 8011a39cfb0SJung-uk Kim * SBST - Smart Battery Specification Table 8021a39cfb0SJung-uk Kim * 8031a39cfb0SJung-uk Kim ******************************************************************************/ 8041a39cfb0SJung-uk Kim 8051a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 8061a39cfb0SJung-uk Kim { 8071a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level"}, 8081a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level"}, 8091a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level"}, 8101a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 8111a39cfb0SJung-uk Kim }; 8121a39cfb0SJung-uk Kim 8131a39cfb0SJung-uk Kim 8141a39cfb0SJung-uk Kim /******************************************************************************* 8151a39cfb0SJung-uk Kim * 8161a39cfb0SJung-uk Kim * SLIT - System Locality Information Table 8171a39cfb0SJung-uk Kim * 8181a39cfb0SJung-uk Kim ******************************************************************************/ 8191a39cfb0SJung-uk Kim 8201a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] = 8211a39cfb0SJung-uk Kim { 8221a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities"}, 8231a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 8241a39cfb0SJung-uk Kim }; 8251a39cfb0SJung-uk Kim 8261a39cfb0SJung-uk Kim 8271a39cfb0SJung-uk Kim /******************************************************************************* 8281a39cfb0SJung-uk Kim * 8291a39cfb0SJung-uk Kim * SPCR - Serial Port Console Redirection table 8301a39cfb0SJung-uk Kim * 8311a39cfb0SJung-uk Kim ******************************************************************************/ 8321a39cfb0SJung-uk Kim 8331a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] = 8341a39cfb0SJung-uk Kim { 8351a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type"}, 8361a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved"}, 8371a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register"}, 8381a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type"}, 8391a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ"}, 8401a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt"}, 8411a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate"}, 8421a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity"}, 8431a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits"}, 8441a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control"}, 8451a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type"}, 8461a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 8471a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID"}, 8481a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID"}, 8491a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus"}, 8501a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device"}, 8511a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function"}, 8521a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags"}, 8531a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment"}, 8541a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved"}, 8551a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 8561a39cfb0SJung-uk Kim }; 8571a39cfb0SJung-uk Kim 8581a39cfb0SJung-uk Kim 8591a39cfb0SJung-uk Kim /******************************************************************************* 8601a39cfb0SJung-uk Kim * 8611a39cfb0SJung-uk Kim * SPMI - Server Platform Management Interface table 8621a39cfb0SJung-uk Kim * 8631a39cfb0SJung-uk Kim ******************************************************************************/ 8641a39cfb0SJung-uk Kim 8651a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] = 8661a39cfb0SJung-uk Kim { 8671a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved"}, 8681a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type"}, 8691a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version"}, 8701a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type"}, 8711a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number"}, 8721a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved"}, 8731a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag"}, 8741a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt"}, 8751a39cfb0SJung-uk Kim {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register"}, 8761a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment"}, 8771a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus"}, 8781a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device"}, 8791a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function"}, 8801a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 8811a39cfb0SJung-uk Kim }; 8821a39cfb0SJung-uk Kim 8831a39cfb0SJung-uk Kim 8841a39cfb0SJung-uk Kim /******************************************************************************* 8851a39cfb0SJung-uk Kim * 8861a39cfb0SJung-uk Kim * SRAT - System Resource Affinity Table and sub-tables 8871a39cfb0SJung-uk Kim * 8881a39cfb0SJung-uk Kim ******************************************************************************/ 8891a39cfb0SJung-uk Kim 8901a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] = 8911a39cfb0SJung-uk Kim { 8921a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision"}, 8931a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved"}, 8941a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 8951a39cfb0SJung-uk Kim }; 8961a39cfb0SJung-uk Kim 8971a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] = 8981a39cfb0SJung-uk Kim { 8991a39cfb0SJung-uk Kim {ACPI_DMT_SRAT, ACPI_SRAT0_OFFSET (Header.Type), "Sub-Table Type"}, 9001a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (Header.Length), "Length"}, 9011a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)"}, 9021a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID"}, 9031a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)"}, 9041a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled"}, 9051a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID"}, 9061a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)"}, 9071a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved"}, 9081a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 9091a39cfb0SJung-uk Kim }; 9101a39cfb0SJung-uk Kim 9111a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] = 9121a39cfb0SJung-uk Kim { 9131a39cfb0SJung-uk Kim {ACPI_DMT_SRAT, ACPI_SRAT1_OFFSET (Header.Type), "Sub-Table Type"}, 9141a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_SRAT1_OFFSET (Header.Length), "Length"}, 9151a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain"}, 9161a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved"}, 9171a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address"}, 9181a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length"}, 9191a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (MemoryType), "Memory Type"}, 9201a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)"}, 9211a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled"}, 9221a39cfb0SJung-uk Kim {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable"}, 9231a39cfb0SJung-uk Kim {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile"}, 9241a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved1), "Reserved"}, 9251a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 9261a39cfb0SJung-uk Kim }; 9271a39cfb0SJung-uk Kim 9281a39cfb0SJung-uk Kim 9291a39cfb0SJung-uk Kim /******************************************************************************* 9301a39cfb0SJung-uk Kim * 9311a39cfb0SJung-uk Kim * TCPA - Trusted Computing Platform Alliance table 9321a39cfb0SJung-uk Kim * 9331a39cfb0SJung-uk Kim ******************************************************************************/ 9341a39cfb0SJung-uk Kim 9351a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] = 9361a39cfb0SJung-uk Kim { 9371a39cfb0SJung-uk Kim {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved"}, 9381a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length"}, 9391a39cfb0SJung-uk Kim {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address"}, 9401a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 9411a39cfb0SJung-uk Kim }; 9421a39cfb0SJung-uk Kim 9431a39cfb0SJung-uk Kim 9441a39cfb0SJung-uk Kim /******************************************************************************* 9451a39cfb0SJung-uk Kim * 9461a39cfb0SJung-uk Kim * WDRT - Watchdog Resource Table 9471a39cfb0SJung-uk Kim * 9481a39cfb0SJung-uk Kim ******************************************************************************/ 9491a39cfb0SJung-uk Kim 9501a39cfb0SJung-uk Kim ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = 9511a39cfb0SJung-uk Kim { 9521a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (HeaderLength), "Header Length"}, 9531a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment"}, 9541a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus"}, 9551a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device"}, 9561a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function"}, 9571a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (TimerPeriod), "Timer Period"}, 9581a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (MaxCount), "Max Count"}, 9591a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (MinCount), "Min Count"}, 9601a39cfb0SJung-uk Kim {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Flags), "Flags (decoded below)"}, 9611a39cfb0SJung-uk Kim {ACPI_DMT_FLAG0, ACPI_WDRT_OFFSET (Flags), "Enabled"}, 9621a39cfb0SJung-uk Kim {ACPI_DMT_FLAG7, ACPI_WDRT_OFFSET (Flags), "Stopped When Asleep"}, 9631a39cfb0SJung-uk Kim {ACPI_DMT_UINT24, ACPI_WDRT_OFFSET (Reserved[0]), "Reserved"}, 9641a39cfb0SJung-uk Kim {ACPI_DMT_UINT32, ACPI_WDRT_OFFSET (Entries), "Watchdog Entries"}, 9651a39cfb0SJung-uk Kim {ACPI_DMT_EXIT, 0, NULL} 9661a39cfb0SJung-uk Kim }; 9671a39cfb0SJung-uk Kim 968