1 /* 2 * Copyright 2009-2015 Samy Al Bahra. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef CK_PR_X86_64_H 28 #define CK_PR_X86_64_H 29 30 #ifndef CK_PR_H 31 #error Do not include this file directly, use ck_pr.h 32 #endif 33 34 #include <ck_cc.h> 35 #include <ck_md.h> 36 #include <ck_stdint.h> 37 38 /* 39 * The following represent supported atomic operations. 40 * These operations may be emulated. 41 */ 42 #include "ck_f_pr.h" 43 44 /* 45 * Support for TSX extensions. 46 */ 47 #ifdef CK_MD_RTM_ENABLE 48 #include "ck_pr_rtm.h" 49 #endif 50 51 /* Minimum requirements for the CK_PR interface are met. */ 52 #define CK_F_PR 53 54 #ifdef CK_MD_UMP 55 #define CK_PR_LOCK_PREFIX 56 #else 57 #define CK_PR_LOCK_PREFIX "lock " 58 #endif 59 60 /* 61 * Prevent speculative execution in busy-wait loops (P4 <=) 62 * or "predefined delay". 63 */ 64 CK_CC_INLINE static void 65 ck_pr_stall(void) 66 { 67 __asm__ __volatile__("pause" ::: "memory"); 68 return; 69 } 70 71 #define CK_PR_FENCE(T, I) \ 72 CK_CC_INLINE static void \ 73 ck_pr_fence_strict_##T(void) \ 74 { \ 75 __asm__ __volatile__(I ::: "memory"); \ 76 } 77 78 CK_PR_FENCE(atomic, "sfence") 79 CK_PR_FENCE(atomic_store, "sfence") 80 CK_PR_FENCE(atomic_load, "mfence") 81 CK_PR_FENCE(store_atomic, "sfence") 82 CK_PR_FENCE(load_atomic, "mfence") 83 CK_PR_FENCE(load, "lfence") 84 CK_PR_FENCE(load_store, "mfence") 85 CK_PR_FENCE(store, "sfence") 86 CK_PR_FENCE(store_load, "mfence") 87 CK_PR_FENCE(memory, "mfence") 88 CK_PR_FENCE(release, "mfence") 89 CK_PR_FENCE(acquire, "mfence") 90 CK_PR_FENCE(acqrel, "mfence") 91 CK_PR_FENCE(lock, "mfence") 92 CK_PR_FENCE(unlock, "mfence") 93 94 #undef CK_PR_FENCE 95 96 /* 97 * Read for ownership. Older compilers will generate the 32-bit 98 * 3DNow! variant which is binary compatible with x86-64 variant 99 * of prefetchw. 100 */ 101 #ifndef CK_F_PR_RFO 102 #define CK_F_PR_RFO 103 CK_CC_INLINE static void 104 ck_pr_rfo(const void *m) 105 { 106 107 __asm__ __volatile__("prefetchw (%0)" 108 : 109 : "r" (m) 110 : "memory"); 111 112 return; 113 } 114 #endif /* CK_F_PR_RFO */ 115 116 /* 117 * Atomic fetch-and-store operations. 118 */ 119 #define CK_PR_FAS(S, M, T, C, I) \ 120 CK_CC_INLINE static T \ 121 ck_pr_fas_##S(M *target, T v) \ 122 { \ 123 __asm__ __volatile__(I " %0, %1" \ 124 : "+m" (*(C *)target), \ 125 "+q" (v) \ 126 : \ 127 : "memory"); \ 128 return v; \ 129 } 130 131 CK_PR_FAS(ptr, void, void *, char, "xchgq") 132 133 #define CK_PR_FAS_S(S, T, I) CK_PR_FAS(S, T, T, T, I) 134 135 #ifndef CK_PR_DISABLE_DOUBLE 136 CK_PR_FAS_S(double, double, "xchgq") 137 #endif 138 CK_PR_FAS_S(char, char, "xchgb") 139 CK_PR_FAS_S(uint, unsigned int, "xchgl") 140 CK_PR_FAS_S(int, int, "xchgl") 141 CK_PR_FAS_S(64, uint64_t, "xchgq") 142 CK_PR_FAS_S(32, uint32_t, "xchgl") 143 CK_PR_FAS_S(16, uint16_t, "xchgw") 144 CK_PR_FAS_S(8, uint8_t, "xchgb") 145 146 #undef CK_PR_FAS_S 147 #undef CK_PR_FAS 148 149 /* 150 * Atomic load-from-memory operations. 151 */ 152 #define CK_PR_LOAD(S, M, T, C, I) \ 153 CK_CC_INLINE static T \ 154 ck_pr_md_load_##S(const M *target) \ 155 { \ 156 T r; \ 157 __asm__ __volatile__(I " %1, %0" \ 158 : "=q" (r) \ 159 : "m" (*(const C *)target) \ 160 : "memory"); \ 161 return (r); \ 162 } 163 164 CK_PR_LOAD(ptr, void, void *, char, "movq") 165 166 #define CK_PR_LOAD_S(S, T, I) CK_PR_LOAD(S, T, T, T, I) 167 168 CK_PR_LOAD_S(char, char, "movb") 169 CK_PR_LOAD_S(uint, unsigned int, "movl") 170 CK_PR_LOAD_S(int, int, "movl") 171 #ifndef CK_PR_DISABLE_DOUBLE 172 CK_PR_LOAD_S(double, double, "movq") 173 #endif 174 CK_PR_LOAD_S(64, uint64_t, "movq") 175 CK_PR_LOAD_S(32, uint32_t, "movl") 176 CK_PR_LOAD_S(16, uint16_t, "movw") 177 CK_PR_LOAD_S(8, uint8_t, "movb") 178 179 #undef CK_PR_LOAD_S 180 #undef CK_PR_LOAD 181 182 CK_CC_INLINE static void 183 ck_pr_load_64_2(const uint64_t target[2], uint64_t v[2]) 184 { 185 __asm__ __volatile__("movq %%rdx, %%rcx;" 186 "movq %%rax, %%rbx;" 187 CK_PR_LOCK_PREFIX "cmpxchg16b %2;" 188 : "=a" (v[0]), 189 "=d" (v[1]) 190 : "m" (*(const uint64_t *)target) 191 : "rbx", "rcx", "memory", "cc"); 192 return; 193 } 194 195 CK_CC_INLINE static void 196 ck_pr_load_ptr_2(const void *t, void *v) 197 { 198 ck_pr_load_64_2(CK_CPP_CAST(const uint64_t *, t), 199 CK_CPP_CAST(uint64_t *, v)); 200 return; 201 } 202 203 #define CK_PR_LOAD_2(S, W, T) \ 204 CK_CC_INLINE static void \ 205 ck_pr_md_load_##S##_##W(const T t[2], T v[2]) \ 206 { \ 207 ck_pr_load_64_2((const uint64_t *)(const void *)t, \ 208 (uint64_t *)(void *)v); \ 209 return; \ 210 } 211 212 CK_PR_LOAD_2(char, 16, char) 213 CK_PR_LOAD_2(int, 4, int) 214 CK_PR_LOAD_2(uint, 4, unsigned int) 215 CK_PR_LOAD_2(32, 4, uint32_t) 216 CK_PR_LOAD_2(16, 8, uint16_t) 217 CK_PR_LOAD_2(8, 16, uint8_t) 218 219 #undef CK_PR_LOAD_2 220 221 /* 222 * Atomic store-to-memory operations. 223 */ 224 #define CK_PR_STORE_IMM(S, M, T, C, I, K) \ 225 CK_CC_INLINE static void \ 226 ck_pr_md_store_##S(M *target, T v) \ 227 { \ 228 __asm__ __volatile__(I " %1, %0" \ 229 : "=m" (*(C *)target) \ 230 : K "q" (v) \ 231 : "memory"); \ 232 return; \ 233 } 234 235 #define CK_PR_STORE(S, M, T, C, I) \ 236 CK_CC_INLINE static void \ 237 ck_pr_md_store_##S(M *target, T v) \ 238 { \ 239 __asm__ __volatile__(I " %1, %0" \ 240 : "=m" (*(C *)target) \ 241 : "q" (v) \ 242 : "memory"); \ 243 return; \ 244 } 245 246 CK_PR_STORE_IMM(ptr, void, const void *, char, "movq", CK_CC_IMM_U32) 247 #ifndef CK_PR_DISABLE_DOUBLE 248 CK_PR_STORE(double, double, double, double, "movq") 249 #endif 250 251 #define CK_PR_STORE_S(S, T, I, K) CK_PR_STORE_IMM(S, T, T, T, I, K) 252 253 CK_PR_STORE_S(char, char, "movb", CK_CC_IMM_S32) 254 CK_PR_STORE_S(int, int, "movl", CK_CC_IMM_S32) 255 CK_PR_STORE_S(uint, unsigned int, "movl", CK_CC_IMM_U32) 256 CK_PR_STORE_S(64, uint64_t, "movq", CK_CC_IMM_U32) 257 CK_PR_STORE_S(32, uint32_t, "movl", CK_CC_IMM_U32) 258 CK_PR_STORE_S(16, uint16_t, "movw", CK_CC_IMM_U32) 259 CK_PR_STORE_S(8, uint8_t, "movb", CK_CC_IMM_U32) 260 261 #undef CK_PR_STORE_S 262 #undef CK_PR_STORE_IMM 263 #undef CK_PR_STORE 264 265 /* 266 * Atomic fetch-and-add operations. 267 */ 268 #define CK_PR_FAA(S, M, T, C, I) \ 269 CK_CC_INLINE static T \ 270 ck_pr_faa_##S(M *target, T d) \ 271 { \ 272 __asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \ 273 : "+m" (*(C *)target), \ 274 "+q" (d) \ 275 : \ 276 : "memory", "cc"); \ 277 return (d); \ 278 } 279 280 CK_PR_FAA(ptr, void, uintptr_t, char, "xaddq") 281 282 #define CK_PR_FAA_S(S, T, I) CK_PR_FAA(S, T, T, T, I) 283 284 CK_PR_FAA_S(char, char, "xaddb") 285 CK_PR_FAA_S(uint, unsigned int, "xaddl") 286 CK_PR_FAA_S(int, int, "xaddl") 287 CK_PR_FAA_S(64, uint64_t, "xaddq") 288 CK_PR_FAA_S(32, uint32_t, "xaddl") 289 CK_PR_FAA_S(16, uint16_t, "xaddw") 290 CK_PR_FAA_S(8, uint8_t, "xaddb") 291 292 #undef CK_PR_FAA_S 293 #undef CK_PR_FAA 294 295 /* 296 * Atomic store-only unary operations. 297 */ 298 #define CK_PR_UNARY(K, S, T, C, I) \ 299 CK_PR_UNARY_R(K, S, T, C, I) \ 300 CK_PR_UNARY_V(K, S, T, C, I) 301 302 #define CK_PR_UNARY_R(K, S, T, C, I) \ 303 CK_CC_INLINE static void \ 304 ck_pr_##K##_##S(T *target) \ 305 { \ 306 __asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0" \ 307 : "+m" (*(C *)target) \ 308 : \ 309 : "memory", "cc"); \ 310 return; \ 311 } 312 313 #define CK_PR_UNARY_V(K, S, T, C, I) \ 314 CK_CC_INLINE static void \ 315 ck_pr_##K##_##S##_zero(T *target, bool *r) \ 316 { \ 317 __asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0; setz %1" \ 318 : "+m" (*(C *)target), \ 319 "=m" (*r) \ 320 : \ 321 : "memory", "cc"); \ 322 return; \ 323 } 324 325 326 #define CK_PR_UNARY_S(K, S, T, I) CK_PR_UNARY(K, S, T, T, I) 327 328 #define CK_PR_GENERATE(K) \ 329 CK_PR_UNARY(K, ptr, void, char, #K "q") \ 330 CK_PR_UNARY_S(K, char, char, #K "b") \ 331 CK_PR_UNARY_S(K, int, int, #K "l") \ 332 CK_PR_UNARY_S(K, uint, unsigned int, #K "l") \ 333 CK_PR_UNARY_S(K, 64, uint64_t, #K "q") \ 334 CK_PR_UNARY_S(K, 32, uint32_t, #K "l") \ 335 CK_PR_UNARY_S(K, 16, uint16_t, #K "w") \ 336 CK_PR_UNARY_S(K, 8, uint8_t, #K "b") 337 338 CK_PR_GENERATE(inc) 339 CK_PR_GENERATE(dec) 340 CK_PR_GENERATE(neg) 341 342 /* not does not affect condition flags. */ 343 #undef CK_PR_UNARY_V 344 #define CK_PR_UNARY_V(a, b, c, d, e) 345 CK_PR_GENERATE(not) 346 347 #undef CK_PR_GENERATE 348 #undef CK_PR_UNARY_S 349 #undef CK_PR_UNARY_V 350 #undef CK_PR_UNARY_R 351 #undef CK_PR_UNARY 352 353 /* 354 * Atomic store-only binary operations. 355 */ 356 #define CK_PR_BINARY(K, S, M, T, C, I, O) \ 357 CK_CC_INLINE static void \ 358 ck_pr_##K##_##S(M *target, T d) \ 359 { \ 360 __asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \ 361 : "+m" (*(C *)target) \ 362 : O "q" (d) \ 363 : "memory", "cc"); \ 364 return; \ 365 } 366 367 #define CK_PR_BINARY_S(K, S, T, I, O) CK_PR_BINARY(K, S, T, T, T, I, O) 368 369 #define CK_PR_GENERATE(K) \ 370 CK_PR_BINARY(K, ptr, void, uintptr_t, char, #K "q", CK_CC_IMM_U32) \ 371 CK_PR_BINARY_S(K, char, char, #K "b", CK_CC_IMM_S32) \ 372 CK_PR_BINARY_S(K, int, int, #K "l", CK_CC_IMM_S32) \ 373 CK_PR_BINARY_S(K, uint, unsigned int, #K "l", CK_CC_IMM_U32) \ 374 CK_PR_BINARY_S(K, 64, uint64_t, #K "q", CK_CC_IMM_U32) \ 375 CK_PR_BINARY_S(K, 32, uint32_t, #K "l", CK_CC_IMM_U32) \ 376 CK_PR_BINARY_S(K, 16, uint16_t, #K "w", CK_CC_IMM_U32) \ 377 CK_PR_BINARY_S(K, 8, uint8_t, #K "b", CK_CC_IMM_U32) 378 379 CK_PR_GENERATE(add) 380 CK_PR_GENERATE(sub) 381 CK_PR_GENERATE(and) 382 CK_PR_GENERATE(or) 383 CK_PR_GENERATE(xor) 384 385 #undef CK_PR_GENERATE 386 #undef CK_PR_BINARY_S 387 #undef CK_PR_BINARY 388 389 /* 390 * Atomic compare and swap. 391 */ 392 #define CK_PR_CAS(S, M, T, C, I) \ 393 CK_CC_INLINE static bool \ 394 ck_pr_cas_##S(M *target, T compare, T set) \ 395 { \ 396 bool z; \ 397 __asm__ __volatile__(CK_PR_LOCK_PREFIX I " %2, %0; setz %1" \ 398 : "+m" (*(C *)target), \ 399 "=a" (z) \ 400 : "q" (set), \ 401 "a" (compare) \ 402 : "memory", "cc"); \ 403 return z; \ 404 } 405 406 CK_PR_CAS(ptr, void, void *, char, "cmpxchgq") 407 408 #define CK_PR_CAS_S(S, T, I) CK_PR_CAS(S, T, T, T, I) 409 410 CK_PR_CAS_S(char, char, "cmpxchgb") 411 CK_PR_CAS_S(int, int, "cmpxchgl") 412 CK_PR_CAS_S(uint, unsigned int, "cmpxchgl") 413 #ifndef CK_PR_DISABLE_DOUBLE 414 CK_PR_CAS_S(double, double, "cmpxchgq") 415 #endif 416 CK_PR_CAS_S(64, uint64_t, "cmpxchgq") 417 CK_PR_CAS_S(32, uint32_t, "cmpxchgl") 418 CK_PR_CAS_S(16, uint16_t, "cmpxchgw") 419 CK_PR_CAS_S(8, uint8_t, "cmpxchgb") 420 421 #undef CK_PR_CAS_S 422 #undef CK_PR_CAS 423 424 /* 425 * Compare and swap, set *v to old value of target. 426 */ 427 #define CK_PR_CAS_O(S, M, T, C, I, R) \ 428 CK_CC_INLINE static bool \ 429 ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \ 430 { \ 431 bool z; \ 432 __asm__ __volatile__(CK_PR_LOCK_PREFIX "cmpxchg" I " %3, %0;" \ 433 "mov %% " R ", %2;" \ 434 "setz %1;" \ 435 : "+m" (*(C *)target), \ 436 "=a" (z), \ 437 "=m" (*(C *)v) \ 438 : "q" (set), \ 439 "a" (compare) \ 440 : "memory", "cc"); \ 441 return z; \ 442 } 443 444 CK_PR_CAS_O(ptr, void, void *, char, "q", "rax") 445 446 #define CK_PR_CAS_O_S(S, T, I, R) \ 447 CK_PR_CAS_O(S, T, T, T, I, R) 448 449 CK_PR_CAS_O_S(char, char, "b", "al") 450 CK_PR_CAS_O_S(int, int, "l", "eax") 451 CK_PR_CAS_O_S(uint, unsigned int, "l", "eax") 452 #ifndef CK_PR_DISABLE_DOUBLE 453 CK_PR_CAS_O_S(double, double, "q", "rax") 454 #endif 455 CK_PR_CAS_O_S(64, uint64_t, "q", "rax") 456 CK_PR_CAS_O_S(32, uint32_t, "l", "eax") 457 CK_PR_CAS_O_S(16, uint16_t, "w", "ax") 458 CK_PR_CAS_O_S(8, uint8_t, "b", "al") 459 460 #undef CK_PR_CAS_O_S 461 #undef CK_PR_CAS_O 462 463 /* 464 * Contrary to C-interface, alignment requirements are that of uint64_t[2]. 465 */ 466 CK_CC_INLINE static bool 467 ck_pr_cas_64_2(uint64_t target[2], uint64_t compare[2], uint64_t set[2]) 468 { 469 bool z; 470 471 __asm__ __volatile__("movq 0(%4), %%rax;" 472 "movq 8(%4), %%rdx;" 473 CK_PR_LOCK_PREFIX "cmpxchg16b %0; setz %1" 474 : "+m" (*target), 475 "=q" (z) 476 : "b" (set[0]), 477 "c" (set[1]), 478 "q" (compare) 479 : "memory", "cc", "%rax", "%rdx"); 480 return z; 481 } 482 483 CK_CC_INLINE static bool 484 ck_pr_cas_ptr_2(void *t, void *c, void *s) 485 { 486 return ck_pr_cas_64_2(CK_CPP_CAST(uint64_t *, t), 487 CK_CPP_CAST(uint64_t *, c), 488 CK_CPP_CAST(uint64_t *, s)); 489 } 490 491 CK_CC_INLINE static bool 492 ck_pr_cas_64_2_value(uint64_t target[2], 493 uint64_t compare[2], 494 uint64_t set[2], 495 uint64_t v[2]) 496 { 497 bool z; 498 499 __asm__ __volatile__(CK_PR_LOCK_PREFIX "cmpxchg16b %0;" 500 "setz %3" 501 : "+m" (*target), 502 "=a" (v[0]), 503 "=d" (v[1]), 504 "=q" (z) 505 : "a" (compare[0]), 506 "d" (compare[1]), 507 "b" (set[0]), 508 "c" (set[1]) 509 : "memory", "cc"); 510 return z; 511 } 512 513 CK_CC_INLINE static bool 514 ck_pr_cas_ptr_2_value(void *t, void *c, void *s, void *v) 515 { 516 return ck_pr_cas_64_2_value(CK_CPP_CAST(uint64_t *,t), 517 CK_CPP_CAST(uint64_t *,c), 518 CK_CPP_CAST(uint64_t *,s), 519 CK_CPP_CAST(uint64_t *,v)); 520 } 521 522 #define CK_PR_CAS_V(S, W, T) \ 523 CK_CC_INLINE static bool \ 524 ck_pr_cas_##S##_##W(T t[W], T c[W], T s[W]) \ 525 { \ 526 return ck_pr_cas_64_2((uint64_t *)(void *)t, \ 527 (uint64_t *)(void *)c, \ 528 (uint64_t *)(void *)s); \ 529 } \ 530 CK_CC_INLINE static bool \ 531 ck_pr_cas_##S##_##W##_value(T *t, T c[W], T s[W], T *v) \ 532 { \ 533 return ck_pr_cas_64_2_value((uint64_t *)(void *)t, \ 534 (uint64_t *)(void *)c, \ 535 (uint64_t *)(void *)s, \ 536 (uint64_t *)(void *)v); \ 537 } 538 539 #ifndef CK_PR_DISABLE_DOUBLE 540 CK_PR_CAS_V(double, 2, double) 541 #endif 542 CK_PR_CAS_V(char, 16, char) 543 CK_PR_CAS_V(int, 4, int) 544 CK_PR_CAS_V(uint, 4, unsigned int) 545 CK_PR_CAS_V(32, 4, uint32_t) 546 CK_PR_CAS_V(16, 8, uint16_t) 547 CK_PR_CAS_V(8, 16, uint8_t) 548 549 #undef CK_PR_CAS_V 550 551 /* 552 * Atomic bit test operations. 553 */ 554 #define CK_PR_BT(K, S, T, P, C, I) \ 555 CK_CC_INLINE static bool \ 556 ck_pr_##K##_##S(T *target, unsigned int b) \ 557 { \ 558 bool c; \ 559 __asm__ __volatile__(CK_PR_LOCK_PREFIX I "; setc %1" \ 560 : "+m" (*(C *)target), \ 561 "=q" (c) \ 562 : "q" ((P)b) \ 563 : "memory", "cc"); \ 564 return c; \ 565 } 566 567 #define CK_PR_BT_S(K, S, T, I) CK_PR_BT(K, S, T, T, T, I) 568 569 #define CK_PR_GENERATE(K) \ 570 CK_PR_BT(K, ptr, void, uint64_t, char, #K "q %2, %0") \ 571 CK_PR_BT_S(K, uint, unsigned int, #K "l %2, %0") \ 572 CK_PR_BT_S(K, int, int, #K "l %2, %0") \ 573 CK_PR_BT_S(K, 64, uint64_t, #K "q %2, %0") \ 574 CK_PR_BT_S(K, 32, uint32_t, #K "l %2, %0") \ 575 CK_PR_BT_S(K, 16, uint16_t, #K "w %w2, %0") 576 577 CK_PR_GENERATE(btc) 578 CK_PR_GENERATE(bts) 579 CK_PR_GENERATE(btr) 580 581 #undef CK_PR_GENERATE 582 #undef CK_PR_BT 583 584 #endif /* CK_PR_X86_64_H */ 585 586