1*f4b37ed0SZbigniew Bodek /*- 2*f4b37ed0SZbigniew Bodek ******************************************************************************** 3*f4b37ed0SZbigniew Bodek Copyright (C) 2015 Annapurna Labs Ltd. 4*f4b37ed0SZbigniew Bodek 5*f4b37ed0SZbigniew Bodek This file may be licensed under the terms of the Annapurna Labs Commercial 6*f4b37ed0SZbigniew Bodek License Agreement. 7*f4b37ed0SZbigniew Bodek 8*f4b37ed0SZbigniew Bodek Alternatively, this file can be distributed under the terms of the GNU General 9*f4b37ed0SZbigniew Bodek Public License V2 as published by the Free Software Foundation and can be 10*f4b37ed0SZbigniew Bodek found at http://www.gnu.org/licenses/gpl-2.0.html 11*f4b37ed0SZbigniew Bodek 12*f4b37ed0SZbigniew Bodek Alternatively, redistribution and use in source and binary forms, with or 13*f4b37ed0SZbigniew Bodek without modification, are permitted provided that the following conditions are 14*f4b37ed0SZbigniew Bodek met: 15*f4b37ed0SZbigniew Bodek 16*f4b37ed0SZbigniew Bodek * Redistributions of source code must retain the above copyright notice, 17*f4b37ed0SZbigniew Bodek this list of conditions and the following disclaimer. 18*f4b37ed0SZbigniew Bodek 19*f4b37ed0SZbigniew Bodek * Redistributions in binary form must reproduce the above copyright 20*f4b37ed0SZbigniew Bodek notice, this list of conditions and the following disclaimer in 21*f4b37ed0SZbigniew Bodek the documentation and/or other materials provided with the 22*f4b37ed0SZbigniew Bodek distribution. 23*f4b37ed0SZbigniew Bodek 24*f4b37ed0SZbigniew Bodek THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 25*f4b37ed0SZbigniew Bodek ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26*f4b37ed0SZbigniew Bodek WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27*f4b37ed0SZbigniew Bodek DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 28*f4b37ed0SZbigniew Bodek ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29*f4b37ed0SZbigniew Bodek (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30*f4b37ed0SZbigniew Bodek LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 31*f4b37ed0SZbigniew Bodek ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32*f4b37ed0SZbigniew Bodek (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33*f4b37ed0SZbigniew Bodek SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34*f4b37ed0SZbigniew Bodek 35*f4b37ed0SZbigniew Bodek *******************************************************************************/ 36*f4b37ed0SZbigniew Bodek 37*f4b37ed0SZbigniew Bodek /** 38*f4b37ed0SZbigniew Bodek * @defgroup group_interrupts Common I/O Fabric Interrupt Controller 39*f4b37ed0SZbigniew Bodek * This HAL provides the API for programming the Common I/O Fabric Interrupt 40*f4b37ed0SZbigniew Bodek * Controller (IOFIC) found in most of the units attached to the I/O Fabric of 41*f4b37ed0SZbigniew Bodek * Alpine platform 42*f4b37ed0SZbigniew Bodek * @{ 43*f4b37ed0SZbigniew Bodek * @file al_hal_iofic.h 44*f4b37ed0SZbigniew Bodek * 45*f4b37ed0SZbigniew Bodek * @brief Header file for the interrupt controller that's embedded in various units 46*f4b37ed0SZbigniew Bodek * 47*f4b37ed0SZbigniew Bodek */ 48*f4b37ed0SZbigniew Bodek 49*f4b37ed0SZbigniew Bodek #ifndef __AL_HAL_IOFIC_H__ 50*f4b37ed0SZbigniew Bodek #define __AL_HAL_IOFIC_H__ 51*f4b37ed0SZbigniew Bodek 52*f4b37ed0SZbigniew Bodek #include <al_hal_common.h> 53*f4b37ed0SZbigniew Bodek 54*f4b37ed0SZbigniew Bodek /* *INDENT-OFF* */ 55*f4b37ed0SZbigniew Bodek #ifdef __cplusplus 56*f4b37ed0SZbigniew Bodek extern "C" { 57*f4b37ed0SZbigniew Bodek #endif 58*f4b37ed0SZbigniew Bodek /* *INDENT-ON* */ 59*f4b37ed0SZbigniew Bodek 60*f4b37ed0SZbigniew Bodek #define AL_IOFIC_MAX_GROUPS 4 61*f4b37ed0SZbigniew Bodek 62*f4b37ed0SZbigniew Bodek /* 63*f4b37ed0SZbigniew Bodek * Configurations 64*f4b37ed0SZbigniew Bodek */ 65*f4b37ed0SZbigniew Bodek 66*f4b37ed0SZbigniew Bodek /** 67*f4b37ed0SZbigniew Bodek * Configure the interrupt controller registers, actual interrupts are still 68*f4b37ed0SZbigniew Bodek * masked at this stage. 69*f4b37ed0SZbigniew Bodek * 70*f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to interrupt controller registers 71*f4b37ed0SZbigniew Bodek * @param group the interrupt group. 72*f4b37ed0SZbigniew Bodek * @param flags flags of Interrupt Control Register 73*f4b37ed0SZbigniew Bodek * 74*f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 75*f4b37ed0SZbigniew Bodek */ 76*f4b37ed0SZbigniew Bodek int al_iofic_config(void __iomem *regs_base, int group, 77*f4b37ed0SZbigniew Bodek uint32_t flags); 78*f4b37ed0SZbigniew Bodek 79*f4b37ed0SZbigniew Bodek /** 80*f4b37ed0SZbigniew Bodek * configure the moderation timer resolution for a given group 81*f4b37ed0SZbigniew Bodek * Applies for both msix and legacy mode. 82*f4b37ed0SZbigniew Bodek * 83*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 84*f4b37ed0SZbigniew Bodek * @param group the interrupt group 85*f4b37ed0SZbigniew Bodek * @param resolution resolution of the timer interval, the resolution determines the rate 86*f4b37ed0SZbigniew Bodek * of decrementing the interval timer, setting value N means that the interval 87*f4b37ed0SZbigniew Bodek * timer will be decremented each (N+1) * (0.68) micro seconds. 88*f4b37ed0SZbigniew Bodek * 89*f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 90*f4b37ed0SZbigniew Bodek */ 91*f4b37ed0SZbigniew Bodek int al_iofic_moder_res_config(void __iomem *regs_base, int group, 92*f4b37ed0SZbigniew Bodek uint8_t resolution); 93*f4b37ed0SZbigniew Bodek 94*f4b37ed0SZbigniew Bodek /** 95*f4b37ed0SZbigniew Bodek * configure the moderation timer interval for a given legacy interrupt group 96*f4b37ed0SZbigniew Bodek * 97*f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to unit registers 98*f4b37ed0SZbigniew Bodek * @param group the interrupt group 99*f4b37ed0SZbigniew Bodek * @param interval between interrupts in resolution units. 0 disable 100*f4b37ed0SZbigniew Bodek * 101*f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 102*f4b37ed0SZbigniew Bodek */ 103*f4b37ed0SZbigniew Bodek int al_iofic_legacy_moder_interval_config(void __iomem *regs_base, int group, 104*f4b37ed0SZbigniew Bodek uint8_t interval); 105*f4b37ed0SZbigniew Bodek 106*f4b37ed0SZbigniew Bodek /** 107*f4b37ed0SZbigniew Bodek * configure the moderation timer interval for a given msix vector 108*f4b37ed0SZbigniew Bodek * 109*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 110*f4b37ed0SZbigniew Bodek * @param group the interrupt group 111*f4b37ed0SZbigniew Bodek * @param vector vector index 112*f4b37ed0SZbigniew Bodek * @param interval interval between interrupts, 0 disable 113*f4b37ed0SZbigniew Bodek * 114*f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 115*f4b37ed0SZbigniew Bodek */ 116*f4b37ed0SZbigniew Bodek int al_iofic_msix_moder_interval_config(void __iomem *regs_base, int group, 117*f4b37ed0SZbigniew Bodek uint8_t vector, uint8_t interval); 118*f4b37ed0SZbigniew Bodek 119*f4b37ed0SZbigniew Bodek /** 120*f4b37ed0SZbigniew Bodek * configure the vmid attributes for a given msix vector. 121*f4b37ed0SZbigniew Bodek * 122*f4b37ed0SZbigniew Bodek * @param group the interrupt group 123*f4b37ed0SZbigniew Bodek * @param vector index 124*f4b37ed0SZbigniew Bodek * @param vmid the vmid value 125*f4b37ed0SZbigniew Bodek * @param vmid_en take vmid from the intc 126*f4b37ed0SZbigniew Bodek * 127*f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 128*f4b37ed0SZbigniew Bodek */ 129*f4b37ed0SZbigniew Bodek int al_iofic_msix_vmid_attributes_config(void __iomem *regs_base, int group, 130*f4b37ed0SZbigniew Bodek uint8_t vector, uint32_t vmid, uint8_t vmid_en); 131*f4b37ed0SZbigniew Bodek 132*f4b37ed0SZbigniew Bodek /** 133*f4b37ed0SZbigniew Bodek * return the offset of the unmask register for a given group. 134*f4b37ed0SZbigniew Bodek * this function can be used when the upper layer wants to directly 135*f4b37ed0SZbigniew Bodek * access the unmask regiter and bypass the al_iofic_unmask() API. 136*f4b37ed0SZbigniew Bodek * 137*f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to unit registers 138*f4b37ed0SZbigniew Bodek * @param group the interrupt group 139*f4b37ed0SZbigniew Bodek * @return the offset of the unmask register. 140*f4b37ed0SZbigniew Bodek */ 141*f4b37ed0SZbigniew Bodek uint32_t __iomem * al_iofic_unmask_offset_get(void __iomem *regs_base, int group); 142*f4b37ed0SZbigniew Bodek 143*f4b37ed0SZbigniew Bodek /** 144*f4b37ed0SZbigniew Bodek * unmask specific interrupts for a given group 145*f4b37ed0SZbigniew Bodek * this functions guarantees atomic operations, it is performance optimized as 146*f4b37ed0SZbigniew Bodek * it will not require read-modify-write. The unmask done using the interrupt 147*f4b37ed0SZbigniew Bodek * mask clear register, so it's safe to call it while the mask is changed by 148*f4b37ed0SZbigniew Bodek * the HW (auto mask) or another core. 149*f4b37ed0SZbigniew Bodek * 150*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 151*f4b37ed0SZbigniew Bodek * @param group the interrupt group 152*f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to unmask, set bits will be unmasked. 153*f4b37ed0SZbigniew Bodek */ 154*f4b37ed0SZbigniew Bodek void al_iofic_unmask(void __iomem *regs_base, int group, uint32_t mask); 155*f4b37ed0SZbigniew Bodek 156*f4b37ed0SZbigniew Bodek /** 157*f4b37ed0SZbigniew Bodek * mask specific interrupts for a given group 158*f4b37ed0SZbigniew Bodek * this functions modifies interrupt mask register, the callee must make sure 159*f4b37ed0SZbigniew Bodek * the mask is not changed by another cpu. 160*f4b37ed0SZbigniew Bodek * 161*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 162*f4b37ed0SZbigniew Bodek * @param group the interrupt group 163*f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to mask, set bits will be masked. 164*f4b37ed0SZbigniew Bodek */ 165*f4b37ed0SZbigniew Bodek void al_iofic_mask(void __iomem *regs_base, int group, uint32_t mask); 166*f4b37ed0SZbigniew Bodek 167*f4b37ed0SZbigniew Bodek /** 168*f4b37ed0SZbigniew Bodek * read the mask register for a given group 169*f4b37ed0SZbigniew Bodek * this functions return the interrupt mask register 170*f4b37ed0SZbigniew Bodek * 171*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 172*f4b37ed0SZbigniew Bodek * @param group the interrupt group 173*f4b37ed0SZbigniew Bodek */ 174*f4b37ed0SZbigniew Bodek uint32_t al_iofic_read_mask(void __iomem *regs_base, int group); 175*f4b37ed0SZbigniew Bodek 176*f4b37ed0SZbigniew Bodek /** 177*f4b37ed0SZbigniew Bodek * read interrupt cause register for a given group 178*f4b37ed0SZbigniew Bodek * this will clear the set bits if the Clear on Read mode enabled. 179*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 180*f4b37ed0SZbigniew Bodek * @param group the interrupt group 181*f4b37ed0SZbigniew Bodek */ 182*f4b37ed0SZbigniew Bodek uint32_t al_iofic_read_cause(void __iomem *regs_base, int group); 183*f4b37ed0SZbigniew Bodek 184*f4b37ed0SZbigniew Bodek /** 185*f4b37ed0SZbigniew Bodek * clear bits in the interrupt cause register for a given group 186*f4b37ed0SZbigniew Bodek * 187*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 188*f4b37ed0SZbigniew Bodek * @param group the interrupt group 189*f4b37ed0SZbigniew Bodek * @param mask bitwise of bits to be cleared, set bits will be cleared. 190*f4b37ed0SZbigniew Bodek */ 191*f4b37ed0SZbigniew Bodek void al_iofic_clear_cause(void __iomem *regs_base, int group, uint32_t mask); 192*f4b37ed0SZbigniew Bodek 193*f4b37ed0SZbigniew Bodek /** 194*f4b37ed0SZbigniew Bodek * set the cause register for a given group 195*f4b37ed0SZbigniew Bodek * this function set the cause register. It will generate an interrupt (if 196*f4b37ed0SZbigniew Bodek * the the interrupt isn't masked ) 197*f4b37ed0SZbigniew Bodek * 198*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 199*f4b37ed0SZbigniew Bodek * @param group the interrupt group 200*f4b37ed0SZbigniew Bodek * @param mask bitwise of bits to be set. 201*f4b37ed0SZbigniew Bodek */ 202*f4b37ed0SZbigniew Bodek void al_iofic_set_cause(void __iomem *regs_base, int group, uint32_t mask); 203*f4b37ed0SZbigniew Bodek 204*f4b37ed0SZbigniew Bodek /** 205*f4b37ed0SZbigniew Bodek * unmask specific interrupts from aborting the udma a given group 206*f4b37ed0SZbigniew Bodek * 207*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 208*f4b37ed0SZbigniew Bodek * @param group the interrupt group 209*f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to mask 210*f4b37ed0SZbigniew Bodek */ 211*f4b37ed0SZbigniew Bodek void al_iofic_abort_mask(void __iomem *regs_base, int group, uint32_t mask); 212*f4b37ed0SZbigniew Bodek 213*f4b37ed0SZbigniew Bodek /** 214*f4b37ed0SZbigniew Bodek * trigger all interrupts that are waiting for moderation timers to expire 215*f4b37ed0SZbigniew Bodek * 216*f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 217*f4b37ed0SZbigniew Bodek * @param group the interrupt group 218*f4b37ed0SZbigniew Bodek */ 219*f4b37ed0SZbigniew Bodek void al_iofic_interrupt_moderation_reset(void __iomem *regs_base, int group); 220*f4b37ed0SZbigniew Bodek 221*f4b37ed0SZbigniew Bodek #endif 222*f4b37ed0SZbigniew Bodek /** @} end of interrupt controller group */ 223