1f4b37ed0SZbigniew Bodek /*- 2f4b37ed0SZbigniew Bodek ******************************************************************************** 3f4b37ed0SZbigniew Bodek Copyright (C) 2015 Annapurna Labs Ltd. 4f4b37ed0SZbigniew Bodek 5f4b37ed0SZbigniew Bodek This file may be licensed under the terms of the Annapurna Labs Commercial 6f4b37ed0SZbigniew Bodek License Agreement. 7f4b37ed0SZbigniew Bodek 8f4b37ed0SZbigniew Bodek Alternatively, this file can be distributed under the terms of the GNU General 9f4b37ed0SZbigniew Bodek Public License V2 as published by the Free Software Foundation and can be 10f4b37ed0SZbigniew Bodek found at http://www.gnu.org/licenses/gpl-2.0.html 11f4b37ed0SZbigniew Bodek 12f4b37ed0SZbigniew Bodek Alternatively, redistribution and use in source and binary forms, with or 13f4b37ed0SZbigniew Bodek without modification, are permitted provided that the following conditions are 14f4b37ed0SZbigniew Bodek met: 15f4b37ed0SZbigniew Bodek 16f4b37ed0SZbigniew Bodek * Redistributions of source code must retain the above copyright notice, 17f4b37ed0SZbigniew Bodek this list of conditions and the following disclaimer. 18f4b37ed0SZbigniew Bodek 19f4b37ed0SZbigniew Bodek * Redistributions in binary form must reproduce the above copyright 20f4b37ed0SZbigniew Bodek notice, this list of conditions and the following disclaimer in 21f4b37ed0SZbigniew Bodek the documentation and/or other materials provided with the 22f4b37ed0SZbigniew Bodek distribution. 23f4b37ed0SZbigniew Bodek 24f4b37ed0SZbigniew Bodek THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 25f4b37ed0SZbigniew Bodek ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26f4b37ed0SZbigniew Bodek WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27f4b37ed0SZbigniew Bodek DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 28f4b37ed0SZbigniew Bodek ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29f4b37ed0SZbigniew Bodek (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30f4b37ed0SZbigniew Bodek LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 31f4b37ed0SZbigniew Bodek ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32f4b37ed0SZbigniew Bodek (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33f4b37ed0SZbigniew Bodek SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34f4b37ed0SZbigniew Bodek 35f4b37ed0SZbigniew Bodek *******************************************************************************/ 36f4b37ed0SZbigniew Bodek 37f4b37ed0SZbigniew Bodek /** 38f4b37ed0SZbigniew Bodek * @defgroup group_interrupts Common I/O Fabric Interrupt Controller 39f4b37ed0SZbigniew Bodek * This HAL provides the API for programming the Common I/O Fabric Interrupt 40f4b37ed0SZbigniew Bodek * Controller (IOFIC) found in most of the units attached to the I/O Fabric of 41f4b37ed0SZbigniew Bodek * Alpine platform 42f4b37ed0SZbigniew Bodek * @{ 43f4b37ed0SZbigniew Bodek * @file al_hal_iofic.h 44f4b37ed0SZbigniew Bodek * 45f4b37ed0SZbigniew Bodek * @brief Header file for the interrupt controller that's embedded in various units 46f4b37ed0SZbigniew Bodek * 47f4b37ed0SZbigniew Bodek */ 48f4b37ed0SZbigniew Bodek 49f4b37ed0SZbigniew Bodek #ifndef __AL_HAL_IOFIC_H__ 50f4b37ed0SZbigniew Bodek #define __AL_HAL_IOFIC_H__ 51f4b37ed0SZbigniew Bodek 52f4b37ed0SZbigniew Bodek #include <al_hal_common.h> 53f4b37ed0SZbigniew Bodek 54f4b37ed0SZbigniew Bodek /* *INDENT-OFF* */ 55f4b37ed0SZbigniew Bodek #ifdef __cplusplus 56f4b37ed0SZbigniew Bodek extern "C" { 57f4b37ed0SZbigniew Bodek #endif 58f4b37ed0SZbigniew Bodek /* *INDENT-ON* */ 59f4b37ed0SZbigniew Bodek 60f4b37ed0SZbigniew Bodek #define AL_IOFIC_MAX_GROUPS 4 61f4b37ed0SZbigniew Bodek 62f4b37ed0SZbigniew Bodek /* 63f4b37ed0SZbigniew Bodek * Configurations 64f4b37ed0SZbigniew Bodek */ 65f4b37ed0SZbigniew Bodek 66f4b37ed0SZbigniew Bodek /** 67f4b37ed0SZbigniew Bodek * Configure the interrupt controller registers, actual interrupts are still 68f4b37ed0SZbigniew Bodek * masked at this stage. 69f4b37ed0SZbigniew Bodek * 70f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to interrupt controller registers 71f4b37ed0SZbigniew Bodek * @param group the interrupt group. 72f4b37ed0SZbigniew Bodek * @param flags flags of Interrupt Control Register 73f4b37ed0SZbigniew Bodek * 74f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 75f4b37ed0SZbigniew Bodek */ 76f4b37ed0SZbigniew Bodek int al_iofic_config(void __iomem *regs_base, int group, 77f4b37ed0SZbigniew Bodek uint32_t flags); 78f4b37ed0SZbigniew Bodek 79f4b37ed0SZbigniew Bodek /** 80f4b37ed0SZbigniew Bodek * configure the moderation timer resolution for a given group 81f4b37ed0SZbigniew Bodek * Applies for both msix and legacy mode. 82f4b37ed0SZbigniew Bodek * 83f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 84f4b37ed0SZbigniew Bodek * @param group the interrupt group 85f4b37ed0SZbigniew Bodek * @param resolution resolution of the timer interval, the resolution determines the rate 86f4b37ed0SZbigniew Bodek * of decrementing the interval timer, setting value N means that the interval 87f4b37ed0SZbigniew Bodek * timer will be decremented each (N+1) * (0.68) micro seconds. 88f4b37ed0SZbigniew Bodek * 89f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 90f4b37ed0SZbigniew Bodek */ 91f4b37ed0SZbigniew Bodek int al_iofic_moder_res_config(void __iomem *regs_base, int group, 92f4b37ed0SZbigniew Bodek uint8_t resolution); 93f4b37ed0SZbigniew Bodek 94f4b37ed0SZbigniew Bodek /** 95f4b37ed0SZbigniew Bodek * configure the moderation timer interval for a given legacy interrupt group 96f4b37ed0SZbigniew Bodek * 97f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to unit registers 98f4b37ed0SZbigniew Bodek * @param group the interrupt group 99f4b37ed0SZbigniew Bodek * @param interval between interrupts in resolution units. 0 disable 100f4b37ed0SZbigniew Bodek * 101f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 102f4b37ed0SZbigniew Bodek */ 103f4b37ed0SZbigniew Bodek int al_iofic_legacy_moder_interval_config(void __iomem *regs_base, int group, 104f4b37ed0SZbigniew Bodek uint8_t interval); 105f4b37ed0SZbigniew Bodek 106f4b37ed0SZbigniew Bodek /** 107f4b37ed0SZbigniew Bodek * configure the moderation timer interval for a given msix vector 108f4b37ed0SZbigniew Bodek * 109f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 110f4b37ed0SZbigniew Bodek * @param group the interrupt group 111f4b37ed0SZbigniew Bodek * @param vector vector index 112f4b37ed0SZbigniew Bodek * @param interval interval between interrupts, 0 disable 113f4b37ed0SZbigniew Bodek * 114f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 115f4b37ed0SZbigniew Bodek */ 116f4b37ed0SZbigniew Bodek int al_iofic_msix_moder_interval_config(void __iomem *regs_base, int group, 117f4b37ed0SZbigniew Bodek uint8_t vector, uint8_t interval); 118f4b37ed0SZbigniew Bodek 119f4b37ed0SZbigniew Bodek /** 120*3fc36ee0SWojciech Macek * configure the tgtid attributes for a given msix vector. 121f4b37ed0SZbigniew Bodek * 122f4b37ed0SZbigniew Bodek * @param group the interrupt group 123f4b37ed0SZbigniew Bodek * @param vector index 124*3fc36ee0SWojciech Macek * @param tgtid the target-id value 125*3fc36ee0SWojciech Macek * @param tgtid_en take target-id from the intc 126f4b37ed0SZbigniew Bodek * 127f4b37ed0SZbigniew Bodek * @return 0 on success. -EINVAL otherwise. 128f4b37ed0SZbigniew Bodek */ 129*3fc36ee0SWojciech Macek int al_iofic_msix_tgtid_attributes_config(void __iomem *regs_base, int group, 130*3fc36ee0SWojciech Macek uint8_t vector, uint32_t tgtid, uint8_t tgtid_en); 131f4b37ed0SZbigniew Bodek 132f4b37ed0SZbigniew Bodek /** 133f4b37ed0SZbigniew Bodek * return the offset of the unmask register for a given group. 134f4b37ed0SZbigniew Bodek * this function can be used when the upper layer wants to directly 135f4b37ed0SZbigniew Bodek * access the unmask regiter and bypass the al_iofic_unmask() API. 136f4b37ed0SZbigniew Bodek * 137f4b37ed0SZbigniew Bodek * @param regs_base regs pointer to unit registers 138f4b37ed0SZbigniew Bodek * @param group the interrupt group 139f4b37ed0SZbigniew Bodek * @return the offset of the unmask register. 140f4b37ed0SZbigniew Bodek */ 141f4b37ed0SZbigniew Bodek uint32_t __iomem * al_iofic_unmask_offset_get(void __iomem *regs_base, int group); 142f4b37ed0SZbigniew Bodek 143f4b37ed0SZbigniew Bodek /** 144f4b37ed0SZbigniew Bodek * unmask specific interrupts for a given group 145f4b37ed0SZbigniew Bodek * this functions guarantees atomic operations, it is performance optimized as 146f4b37ed0SZbigniew Bodek * it will not require read-modify-write. The unmask done using the interrupt 147f4b37ed0SZbigniew Bodek * mask clear register, so it's safe to call it while the mask is changed by 148f4b37ed0SZbigniew Bodek * the HW (auto mask) or another core. 149f4b37ed0SZbigniew Bodek * 150f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 151f4b37ed0SZbigniew Bodek * @param group the interrupt group 152f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to unmask, set bits will be unmasked. 153f4b37ed0SZbigniew Bodek */ 154f4b37ed0SZbigniew Bodek void al_iofic_unmask(void __iomem *regs_base, int group, uint32_t mask); 155f4b37ed0SZbigniew Bodek 156f4b37ed0SZbigniew Bodek /** 157f4b37ed0SZbigniew Bodek * mask specific interrupts for a given group 158f4b37ed0SZbigniew Bodek * this functions modifies interrupt mask register, the callee must make sure 159f4b37ed0SZbigniew Bodek * the mask is not changed by another cpu. 160f4b37ed0SZbigniew Bodek * 161f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 162f4b37ed0SZbigniew Bodek * @param group the interrupt group 163f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to mask, set bits will be masked. 164f4b37ed0SZbigniew Bodek */ 165f4b37ed0SZbigniew Bodek void al_iofic_mask(void __iomem *regs_base, int group, uint32_t mask); 166f4b37ed0SZbigniew Bodek 167f4b37ed0SZbigniew Bodek /** 168f4b37ed0SZbigniew Bodek * read the mask register for a given group 169f4b37ed0SZbigniew Bodek * this functions return the interrupt mask register 170f4b37ed0SZbigniew Bodek * 171f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 172f4b37ed0SZbigniew Bodek * @param group the interrupt group 173f4b37ed0SZbigniew Bodek */ 174f4b37ed0SZbigniew Bodek uint32_t al_iofic_read_mask(void __iomem *regs_base, int group); 175f4b37ed0SZbigniew Bodek 176f4b37ed0SZbigniew Bodek /** 177f4b37ed0SZbigniew Bodek * read interrupt cause register for a given group 178f4b37ed0SZbigniew Bodek * this will clear the set bits if the Clear on Read mode enabled. 179f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 180f4b37ed0SZbigniew Bodek * @param group the interrupt group 181f4b37ed0SZbigniew Bodek */ 182f4b37ed0SZbigniew Bodek uint32_t al_iofic_read_cause(void __iomem *regs_base, int group); 183f4b37ed0SZbigniew Bodek 184f4b37ed0SZbigniew Bodek /** 185f4b37ed0SZbigniew Bodek * clear bits in the interrupt cause register for a given group 186f4b37ed0SZbigniew Bodek * 187f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 188f4b37ed0SZbigniew Bodek * @param group the interrupt group 189f4b37ed0SZbigniew Bodek * @param mask bitwise of bits to be cleared, set bits will be cleared. 190f4b37ed0SZbigniew Bodek */ 191f4b37ed0SZbigniew Bodek void al_iofic_clear_cause(void __iomem *regs_base, int group, uint32_t mask); 192f4b37ed0SZbigniew Bodek 193f4b37ed0SZbigniew Bodek /** 194f4b37ed0SZbigniew Bodek * set the cause register for a given group 195f4b37ed0SZbigniew Bodek * this function set the cause register. It will generate an interrupt (if 196f4b37ed0SZbigniew Bodek * the the interrupt isn't masked ) 197f4b37ed0SZbigniew Bodek * 198f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 199f4b37ed0SZbigniew Bodek * @param group the interrupt group 200f4b37ed0SZbigniew Bodek * @param mask bitwise of bits to be set. 201f4b37ed0SZbigniew Bodek */ 202f4b37ed0SZbigniew Bodek void al_iofic_set_cause(void __iomem *regs_base, int group, uint32_t mask); 203f4b37ed0SZbigniew Bodek 204f4b37ed0SZbigniew Bodek /** 205f4b37ed0SZbigniew Bodek * unmask specific interrupts from aborting the udma a given group 206f4b37ed0SZbigniew Bodek * 207f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 208f4b37ed0SZbigniew Bodek * @param group the interrupt group 209f4b37ed0SZbigniew Bodek * @param mask bitwise of interrupts to mask 210f4b37ed0SZbigniew Bodek */ 211f4b37ed0SZbigniew Bodek void al_iofic_abort_mask(void __iomem *regs_base, int group, uint32_t mask); 212f4b37ed0SZbigniew Bodek 213f4b37ed0SZbigniew Bodek /** 214f4b37ed0SZbigniew Bodek * trigger all interrupts that are waiting for moderation timers to expire 215f4b37ed0SZbigniew Bodek * 216f4b37ed0SZbigniew Bodek * @param regs_base pointer to unit registers 217f4b37ed0SZbigniew Bodek * @param group the interrupt group 218f4b37ed0SZbigniew Bodek */ 219f4b37ed0SZbigniew Bodek void al_iofic_interrupt_moderation_reset(void __iomem *regs_base, int group); 220f4b37ed0SZbigniew Bodek 221f4b37ed0SZbigniew Bodek #endif 222f4b37ed0SZbigniew Bodek /** @} end of interrupt controller group */ 223