1 /*- 2 * Copyright (c) 2010 Isilon Systems, Inc. 3 * Copyright (c) 2010 iX Systems, Inc. 4 * Copyright (c) 2010 Panasas, Inc. 5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 #ifndef _LINUX_PCI_H_ 32 #define _LINUX_PCI_H_ 33 34 #define CONFIG_PCI_MSI 35 36 #include <linux/types.h> 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/pciio.h> 41 #include <sys/rman.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pci_private.h> 45 46 #include <machine/resource.h> 47 48 #include <linux/list.h> 49 #include <linux/dmapool.h> 50 #include <linux/dma-mapping.h> 51 #include <linux/compiler.h> 52 #include <linux/errno.h> 53 #include <asm/atomic.h> 54 #include <linux/device.h> 55 56 struct pci_device_id { 57 uint32_t vendor; 58 uint32_t device; 59 uint32_t subvendor; 60 uint32_t subdevice; 61 uint32_t class_mask; 62 uintptr_t driver_data; 63 }; 64 65 #define MODULE_DEVICE_TABLE(bus, table) 66 #define PCI_ANY_ID (-1) 67 #define PCI_VENDOR_ID_MELLANOX 0x15b3 68 #define PCI_VENDOR_ID_TOPSPIN 0x1867 69 #define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 70 #define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46 71 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 72 #define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 73 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 74 #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 75 76 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 77 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 78 #define PCI_FUNC(devfn) ((devfn) & 0x07) 79 80 #define PCI_VDEVICE(_vendor, _device) \ 81 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \ 82 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 83 #define PCI_DEVICE(_vendor, _device) \ 84 .vendor = (_vendor), .device = (_device), \ 85 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 86 87 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 88 89 #define PCI_VENDOR_ID PCIR_DEVVENDOR 90 #define PCI_COMMAND PCIR_COMMAND 91 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */ 92 #define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */ 93 #define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */ 94 #define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */ 95 #define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */ 96 #define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */ 97 #define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */ 98 #define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */ 99 #define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */ 100 #define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */ 101 #define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */ 102 #define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */ 103 #define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */ 104 #define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */ 105 #define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */ 106 #define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */ 107 #define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */ 108 #define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */ 109 #define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */ 110 #define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */ 111 #define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */ 112 #define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */ 113 #define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */ 114 #define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */ 115 #define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */ 116 #define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */ 117 118 119 #define IORESOURCE_MEM SYS_RES_MEMORY 120 #define IORESOURCE_IO SYS_RES_IOPORT 121 #define IORESOURCE_IRQ SYS_RES_IRQ 122 123 struct pci_dev; 124 125 126 struct pci_driver { 127 struct list_head links; 128 char *name; 129 const struct pci_device_id *id_table; 130 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); 131 void (*remove)(struct pci_dev *dev); 132 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 133 int (*resume) (struct pci_dev *dev); /* Device woken up */ 134 void (*shutdown) (struct pci_dev *dev); /* Device shutdown */ 135 driver_t driver; 136 devclass_t bsdclass; 137 const struct pci_error_handlers *err_handler; 138 }; 139 140 extern struct list_head pci_drivers; 141 extern struct list_head pci_devices; 142 extern spinlock_t pci_lock; 143 144 #define __devexit_p(x) x 145 146 struct pci_dev { 147 struct device dev; 148 struct list_head links; 149 struct pci_driver *pdrv; 150 uint64_t dma_mask; 151 uint16_t device; 152 uint16_t vendor; 153 unsigned int irq; 154 unsigned int devfn; 155 u8 revision; 156 }; 157 158 static inline struct resource_list_entry * 159 _pci_get_rle(struct pci_dev *pdev, int type, int rid) 160 { 161 struct pci_devinfo *dinfo; 162 struct resource_list *rl; 163 164 dinfo = device_get_ivars(pdev->dev.bsddev); 165 rl = &dinfo->resources; 166 return resource_list_find(rl, type, rid); 167 } 168 169 static inline struct resource_list_entry * 170 _pci_get_bar(struct pci_dev *pdev, int bar) 171 { 172 struct resource_list_entry *rle; 173 174 bar = PCIR_BAR(bar); 175 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL) 176 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar); 177 return (rle); 178 } 179 180 static inline struct device * 181 _pci_find_irq_dev(unsigned int irq) 182 { 183 struct pci_dev *pdev; 184 185 spin_lock(&pci_lock); 186 list_for_each_entry(pdev, &pci_devices, links) { 187 if (irq == pdev->dev.irq) 188 break; 189 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max) 190 break; 191 } 192 spin_unlock(&pci_lock); 193 if (pdev) 194 return &pdev->dev; 195 return (NULL); 196 } 197 198 static inline unsigned long 199 pci_resource_start(struct pci_dev *pdev, int bar) 200 { 201 struct resource_list_entry *rle; 202 203 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 204 return (0); 205 return rle->start; 206 } 207 208 static inline unsigned long 209 pci_resource_len(struct pci_dev *pdev, int bar) 210 { 211 struct resource_list_entry *rle; 212 213 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 214 return (0); 215 return rle->count; 216 } 217 218 /* 219 * All drivers just seem to want to inspect the type not flags. 220 */ 221 static inline int 222 pci_resource_flags(struct pci_dev *pdev, int bar) 223 { 224 struct resource_list_entry *rle; 225 226 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 227 return (0); 228 return rle->type; 229 } 230 231 static inline const char * 232 pci_name(struct pci_dev *d) 233 { 234 235 return device_get_desc(d->dev.bsddev); 236 } 237 238 static inline void * 239 pci_get_drvdata(struct pci_dev *pdev) 240 { 241 242 return dev_get_drvdata(&pdev->dev); 243 } 244 245 static inline void 246 pci_set_drvdata(struct pci_dev *pdev, void *data) 247 { 248 249 dev_set_drvdata(&pdev->dev, data); 250 } 251 252 static inline int 253 pci_enable_device(struct pci_dev *pdev) 254 { 255 256 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT); 257 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY); 258 return (0); 259 } 260 261 static inline void 262 pci_disable_device(struct pci_dev *pdev) 263 { 264 } 265 266 static inline int 267 pci_set_master(struct pci_dev *pdev) 268 { 269 270 pci_enable_busmaster(pdev->dev.bsddev); 271 return (0); 272 } 273 274 static inline int 275 pci_clear_master(struct pci_dev *pdev) 276 { 277 278 pci_disable_busmaster(pdev->dev.bsddev); 279 return (0); 280 } 281 282 static inline int 283 pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) 284 { 285 int rid; 286 int type; 287 288 type = pci_resource_flags(pdev, bar); 289 if (type == 0) 290 return (-ENODEV); 291 rid = PCIR_BAR(bar); 292 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid, 293 RF_ACTIVE) == NULL) 294 return (-EINVAL); 295 return (0); 296 } 297 298 static inline void 299 pci_release_region(struct pci_dev *pdev, int bar) 300 { 301 struct resource_list_entry *rle; 302 303 if ((rle = _pci_get_bar(pdev, bar)) == NULL) 304 return; 305 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res); 306 } 307 308 static inline void 309 pci_release_regions(struct pci_dev *pdev) 310 { 311 int i; 312 313 for (i = 0; i <= PCIR_MAX_BAR_0; i++) 314 pci_release_region(pdev, i); 315 } 316 317 static inline int 318 pci_request_regions(struct pci_dev *pdev, const char *res_name) 319 { 320 int error; 321 int i; 322 323 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 324 error = pci_request_region(pdev, i, res_name); 325 if (error && error != -ENODEV) { 326 pci_release_regions(pdev); 327 return (error); 328 } 329 } 330 return (0); 331 } 332 333 static inline void 334 pci_disable_msix(struct pci_dev *pdev) 335 { 336 337 pci_release_msi(pdev->dev.bsddev); 338 } 339 340 #define PCI_CAP_ID_EXP PCIY_EXPRESS 341 #define PCI_CAP_ID_PCIX PCIY_PCIX 342 343 344 static inline int 345 pci_find_capability(struct pci_dev *pdev, int capid) 346 { 347 int reg; 348 349 if (pci_find_cap(pdev->dev.bsddev, capid, ®)) 350 return (0); 351 return (reg); 352 } 353 354 355 356 357 /** 358 * pci_pcie_cap - get the saved PCIe capability offset 359 * @dev: PCI device 360 * 361 * PCIe capability offset is calculated at PCI device initialization 362 * time and saved in the data structure. This function returns saved 363 * PCIe capability offset. Using this instead of pci_find_capability() 364 * reduces unnecessary search in the PCI configuration space. If you 365 * need to calculate PCIe capability offset from raw device for some 366 * reasons, please use pci_find_capability() instead. 367 */ 368 static inline int pci_pcie_cap(struct pci_dev *dev) 369 { 370 return pci_find_capability(dev, PCI_CAP_ID_EXP); 371 } 372 373 374 static inline int 375 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 376 { 377 378 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 379 return (0); 380 } 381 382 static inline int 383 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 384 { 385 386 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 387 return (0); 388 } 389 390 static inline int 391 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 392 { 393 394 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 395 return (0); 396 } 397 398 static inline int 399 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 400 { 401 402 pci_write_config(pdev->dev.bsddev, where, val, 1); 403 return (0); 404 } 405 406 static inline int 407 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 408 { 409 410 pci_write_config(pdev->dev.bsddev, where, val, 2); 411 return (0); 412 } 413 414 static inline int 415 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 416 { 417 418 pci_write_config(pdev->dev.bsddev, where, val, 4); 419 return (0); 420 } 421 422 extern int pci_register_driver(struct pci_driver *pdrv); 423 extern void pci_unregister_driver(struct pci_driver *pdrv); 424 425 struct msix_entry { 426 int entry; 427 int vector; 428 }; 429 430 /* 431 * Enable msix, positive errors indicate actual number of available 432 * vectors. Negative errors are failures. 433 * 434 * NB: define added to prevent this definition of pci_enable_msix from 435 * clashing with the native FreeBSD version. 436 */ 437 #define pci_enable_msix linux_pci_enable_msix 438 static inline int 439 pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq) 440 { 441 struct resource_list_entry *rle; 442 int error; 443 int avail; 444 int i; 445 446 avail = pci_msix_count(pdev->dev.bsddev); 447 if (avail < nreq) { 448 if (avail == 0) 449 return -EINVAL; 450 return avail; 451 } 452 avail = nreq; 453 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0) 454 return error; 455 /* 456 * Handle case where "pci_alloc_msix()" may allocate less 457 * interrupts than available and return with no error: 458 */ 459 if (avail < nreq) { 460 pci_release_msi(pdev->dev.bsddev); 461 return avail; 462 } 463 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1); 464 pdev->dev.msix = rle->start; 465 pdev->dev.msix_max = rle->start + avail; 466 for (i = 0; i < nreq; i++) 467 entries[i].vector = pdev->dev.msix + i; 468 return (0); 469 } 470 471 #define pci_enable_msix_range linux_pci_enable_msix_range 472 static inline int 473 pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, 474 int minvec, int maxvec) 475 { 476 int nvec = maxvec; 477 int rc; 478 479 if (maxvec < minvec) 480 return (-ERANGE); 481 482 do { 483 rc = pci_enable_msix(dev, entries, nvec); 484 if (rc < 0) { 485 return (rc); 486 } else if (rc > 0) { 487 if (rc < minvec) 488 return (-ENOSPC); 489 nvec = rc; 490 } 491 } while (rc); 492 return (nvec); 493 } 494 495 static inline int pci_channel_offline(struct pci_dev *pdev) 496 { 497 return false; 498 } 499 500 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 501 { 502 return -ENODEV; 503 } 504 static inline void pci_disable_sriov(struct pci_dev *dev) 505 { 506 } 507 508 /** 509 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 510 * @_table: device table name 511 * 512 * This macro is used to create a struct pci_device_id array (a device table) 513 * in a generic manner. 514 */ 515 #define DEFINE_PCI_DEVICE_TABLE(_table) \ 516 const struct pci_device_id _table[] __devinitdata 517 518 519 /* XXX This should not be necessary. */ 520 #define pcix_set_mmrbc(d, v) 0 521 #define pcix_get_max_mmrbc(d) 0 522 #define pcie_set_readrq(d, v) 0 523 524 #define PCI_DMA_BIDIRECTIONAL 0 525 #define PCI_DMA_TODEVICE 1 526 #define PCI_DMA_FROMDEVICE 2 527 #define PCI_DMA_NONE 3 528 529 #define pci_pool dma_pool 530 #define pci_pool_destroy dma_pool_destroy 531 #define pci_pool_alloc dma_pool_alloc 532 #define pci_pool_free dma_pool_free 533 #define pci_pool_create(_name, _pdev, _size, _align, _alloc) \ 534 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc) 535 #define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \ 536 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 537 _size, _vaddr, _dma_handle) 538 #define pci_map_sg(_hwdev, _sg, _nents, _dir) \ 539 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 540 _sg, _nents, (enum dma_data_direction)_dir) 541 #define pci_map_single(_hwdev, _ptr, _size, _dir) \ 542 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \ 543 (_ptr), (_size), (enum dma_data_direction)_dir) 544 #define pci_unmap_single(_hwdev, _addr, _size, _dir) \ 545 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 546 _addr, _size, (enum dma_data_direction)_dir) 547 #define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \ 548 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 549 _sg, _nents, (enum dma_data_direction)_dir) 550 #define pci_map_page(_hwdev, _page, _offset, _size, _dir) \ 551 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\ 552 _offset, _size, (enum dma_data_direction)_dir) 553 #define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \ 554 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \ 555 _dma_address, _size, (enum dma_data_direction)_dir) 556 #define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask)) 557 #define pci_dma_mapping_error(_pdev, _dma_addr) \ 558 dma_mapping_error(&(_pdev)->dev, _dma_addr) 559 #define pci_set_consistent_dma_mask(_pdev, _mask) \ 560 dma_set_coherent_mask(&(_pdev)->dev, (_mask)) 561 #define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x); 562 #define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x); 563 #define pci_unmap_addr dma_unmap_addr 564 #define pci_unmap_addr_set dma_unmap_addr_set 565 #define pci_unmap_len dma_unmap_len 566 #define pci_unmap_len_set dma_unmap_len_set 567 568 typedef unsigned int __bitwise pci_channel_state_t; 569 typedef unsigned int __bitwise pci_ers_result_t; 570 571 enum pci_channel_state { 572 /* I/O channel is in normal state */ 573 pci_channel_io_normal = (__force pci_channel_state_t) 1, 574 575 /* I/O to channel is blocked */ 576 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 577 578 /* PCI card is dead */ 579 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 580 }; 581 582 enum pci_ers_result { 583 /* no result/none/not supported in device driver */ 584 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 585 586 /* Device driver can recover without slot reset */ 587 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 588 589 /* Device driver wants slot to be reset. */ 590 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 591 592 /* Device has completely failed, is unrecoverable */ 593 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 594 595 /* Device driver is fully recovered and operational */ 596 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 597 }; 598 599 600 /* PCI bus error event callbacks */ 601 struct pci_error_handlers { 602 /* PCI bus error detected on this device */ 603 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 604 enum pci_channel_state error); 605 606 /* MMIO has been re-enabled, but not DMA */ 607 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 608 609 /* PCI Express link has been reset */ 610 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 611 612 /* PCI slot has been reset */ 613 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 614 615 /* Device driver may resume normal operations */ 616 void (*resume)(struct pci_dev *dev); 617 }; 618 619 /* freeBSD does not support SRIOV - yet */ 620 static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 621 { 622 return dev; 623 } 624 625 static inline bool pci_is_pcie(struct pci_dev *dev) 626 { 627 return !!pci_pcie_cap(dev); 628 } 629 630 static inline u16 pcie_flags_reg(struct pci_dev *dev) 631 { 632 int pos; 633 u16 reg16; 634 635 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 636 if (!pos) 637 return 0; 638 639 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); 640 641 return reg16; 642 } 643 644 645 static inline int pci_pcie_type(struct pci_dev *dev) 646 { 647 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; 648 } 649 650 static inline int pcie_cap_version(struct pci_dev *dev) 651 { 652 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS; 653 } 654 655 static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev) 656 { 657 int type = pci_pcie_type(dev); 658 659 return pcie_cap_version(dev) > 1 || 660 type == PCI_EXP_TYPE_ROOT_PORT || 661 type == PCI_EXP_TYPE_ENDPOINT || 662 type == PCI_EXP_TYPE_LEG_END; 663 } 664 665 static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) 666 { 667 return true; 668 } 669 670 static inline bool pcie_cap_has_sltctl(struct pci_dev *dev) 671 { 672 int type = pci_pcie_type(dev); 673 674 return pcie_cap_version(dev) > 1 || 675 type == PCI_EXP_TYPE_ROOT_PORT || 676 (type == PCI_EXP_TYPE_DOWNSTREAM && 677 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT); 678 } 679 680 static inline bool pcie_cap_has_rtctl(struct pci_dev *dev) 681 { 682 int type = pci_pcie_type(dev); 683 684 return pcie_cap_version(dev) > 1 || 685 type == PCI_EXP_TYPE_ROOT_PORT || 686 type == PCI_EXP_TYPE_RC_EC; 687 } 688 689 static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos) 690 { 691 if (!pci_is_pcie(dev)) 692 return false; 693 694 switch (pos) { 695 case PCI_EXP_FLAGS_TYPE: 696 return true; 697 case PCI_EXP_DEVCAP: 698 case PCI_EXP_DEVCTL: 699 case PCI_EXP_DEVSTA: 700 return pcie_cap_has_devctl(dev); 701 case PCI_EXP_LNKCAP: 702 case PCI_EXP_LNKCTL: 703 case PCI_EXP_LNKSTA: 704 return pcie_cap_has_lnkctl(dev); 705 case PCI_EXP_SLTCAP: 706 case PCI_EXP_SLTCTL: 707 case PCI_EXP_SLTSTA: 708 return pcie_cap_has_sltctl(dev); 709 case PCI_EXP_RTCTL: 710 case PCI_EXP_RTCAP: 711 case PCI_EXP_RTSTA: 712 return pcie_cap_has_rtctl(dev); 713 case PCI_EXP_DEVCAP2: 714 case PCI_EXP_DEVCTL2: 715 case PCI_EXP_LNKCAP2: 716 case PCI_EXP_LNKCTL2: 717 case PCI_EXP_LNKSTA2: 718 return pcie_cap_version(dev) > 1; 719 default: 720 return false; 721 } 722 } 723 724 725 static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) 726 { 727 if (pos & 1) 728 return -EINVAL; 729 730 if (!pcie_capability_reg_implemented(dev, pos)) 731 return 0; 732 733 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); 734 } 735 736 #endif /* _LINUX_PCI_H_ */ 737