1 /*- 2 * Copyright (c) 2016-2017 Mellanox Technologies, Ltd. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 #ifndef _ASM_ATOMIC64_H_ 29 #define _ASM_ATOMIC64_H_ 30 31 #include <linux/compiler.h> 32 #include <sys/types.h> 33 #include <machine/atomic.h> 34 35 typedef struct { 36 volatile int64_t counter; 37 } atomic64_t; 38 #define ATOMIC64_INIT(x) { .counter = (x) } 39 40 /*------------------------------------------------------------------------* 41 * 64-bit atomic operations 42 *------------------------------------------------------------------------*/ 43 44 #define atomic64_add(i, v) atomic64_add_return((i), (v)) 45 #define atomic64_sub(i, v) atomic64_sub_return((i), (v)) 46 #define atomic64_inc_return(v) atomic64_add_return(1, (v)) 47 #define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0) 48 #define atomic64_add_and_test(i, v) (atomic64_add_return((i), (v)) == 0) 49 #define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0) 50 #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) 51 #define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) 52 #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) 53 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 54 55 static inline int64_t 56 atomic64_add_return(int64_t i, atomic64_t *v) 57 { 58 return i + atomic_fetchadd_64(&v->counter, i); 59 } 60 61 static inline int64_t 62 atomic64_sub_return(int64_t i, atomic64_t *v) 63 { 64 return atomic_fetchadd_64(&v->counter, -i) - i; 65 } 66 67 static inline void 68 atomic64_set(atomic64_t *v, int64_t i) 69 { 70 atomic_store_rel_64(&v->counter, i); 71 } 72 73 static inline int64_t 74 atomic64_read(atomic64_t *v) 75 { 76 return READ_ONCE(v->counter); 77 } 78 79 static inline int64_t 80 atomic64_inc(atomic64_t *v) 81 { 82 return atomic_fetchadd_64(&v->counter, 1) + 1; 83 } 84 85 static inline int64_t 86 atomic64_dec(atomic64_t *v) 87 { 88 return atomic_fetchadd_64(&v->counter, -1) - 1; 89 } 90 91 static inline int64_t 92 atomic64_add_unless(atomic64_t *v, int64_t a, int64_t u) 93 { 94 int64_t c = atomic64_read(v); 95 96 for (;;) { 97 if (unlikely(c == u)) 98 break; 99 if (likely(atomic_fcmpset_64(&v->counter, &c, c + a))) 100 break; 101 } 102 return (c != u); 103 } 104 105 static inline int64_t 106 atomic64_fetch_add_unless(atomic64_t *v, int64_t a, int64_t u) 107 { 108 int64_t c = atomic64_read(v); 109 110 for (;;) { 111 if (unlikely(c == u)) 112 break; 113 if (likely(atomic_fcmpset_64(&v->counter, &c, c + a))) 114 break; 115 } 116 return (c); 117 } 118 119 static inline int64_t 120 atomic64_xchg(atomic64_t *v, int64_t i) 121 { 122 #if !((defined(__mips__) && !(defined(__mips_n32) || defined(__mips_n64))) || \ 123 (defined(__powerpc__) && !defined(__powerpc64__))) 124 return (atomic_swap_64(&v->counter, i)); 125 #else 126 int64_t ret = atomic64_read(v); 127 128 while (!atomic_fcmpset_64(&v->counter, &ret, i)) 129 ; 130 return (ret); 131 #endif 132 } 133 134 static inline int64_t 135 atomic64_cmpxchg(atomic64_t *v, int64_t old, int64_t new) 136 { 137 int64_t ret = old; 138 139 for (;;) { 140 if (atomic_fcmpset_64(&v->counter, &ret, new)) 141 break; 142 if (ret != old) 143 break; 144 } 145 return (ret); 146 } 147 148 #endif /* _ASM_ATOMIC64_H_ */ 149