1 /*- 2 * Copyright (c) 2016 Mellanox Technologies, Ltd. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 #ifndef _ASM_ATOMIC64_H_ 29 #define _ASM_ATOMIC64_H_ 30 31 #include <sys/cdefs.h> 32 #include <sys/types.h> 33 #include <machine/atomic.h> 34 35 typedef struct { 36 volatile int64_t counter; 37 } atomic64_t; 38 39 /*------------------------------------------------------------------------* 40 * 64-bit atomic operations 41 *------------------------------------------------------------------------*/ 42 43 #define atomic64_add(i, v) atomic64_add_return((i), (v)) 44 #define atomic64_sub(i, v) atomic64_sub_return((i), (v)) 45 #define atomic64_inc_return(v) atomic64_add_return(1, (v)) 46 #define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0) 47 #define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0) 48 #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) 49 #define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) 50 #define atomic64_dec_return(v) atomic64_sub_return(1, (v)) 51 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 52 53 static inline int64_t 54 atomic64_add_return(int64_t i, atomic64_t *v) 55 { 56 return i + atomic_fetchadd_64(&v->counter, i); 57 } 58 59 static inline int64_t 60 atomic64_sub_return(int64_t i, atomic64_t *v) 61 { 62 return atomic_fetchadd_64(&v->counter, -i) - i; 63 } 64 65 static inline void 66 atomic64_set(atomic64_t *v, int64_t i) 67 { 68 atomic_store_rel_64(&v->counter, i); 69 } 70 71 static inline int64_t 72 atomic64_read(atomic64_t *v) 73 { 74 return atomic_load_acq_64(&v->counter); 75 } 76 77 static inline int64_t 78 atomic64_inc(atomic64_t *v) 79 { 80 return atomic_fetchadd_64(&v->counter, 1) + 1; 81 } 82 83 static inline int64_t 84 atomic64_dec(atomic64_t *v) 85 { 86 return atomic_fetchadd_64(&v->counter, -1) - 1; 87 } 88 89 static inline int64_t 90 atomic64_add_unless(atomic64_t *v, int64_t a, int64_t u) 91 { 92 int64_t c; 93 94 for (;;) { 95 c = atomic64_read(v); 96 if (unlikely(c == u)) 97 break; 98 if (likely(atomic_cmpset_64(&v->counter, c, c + a))) 99 break; 100 } 101 return (c != u); 102 } 103 104 #endif /* _ASM_ATOMIC64_H_ */ 105